1/*
2 * DTS File for HiSilicon Poplar Development Board
3 *
4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
5 *
6 * Released under the GPLv2 only.
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10/dts-v1/;
11
12#include <dt-bindings/gpio/gpio.h>
13#include "hi3798cv200.dtsi"
14#include "poplar-pinctrl.dtsi"
15
16/ {
17	model = "HiSilicon Poplar Development Board";
18	compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
19
20	aliases {
21		serial0 = &uart0;
22		serial2 = &uart2;
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@0 {
30		device_type = "memory";
31		reg = <0x0 0x0 0x0 0x80000000>;
32	};
33
34	firmware {
35		optee {
36			compatible = "linaro,optee-tz";
37			method = "smc";
38		};
39	};
40
41	leds {
42		compatible = "gpio-leds";
43
44		user-led0 {
45			label = "USER-LED0";
46			gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
47			linux,default-trigger = "heartbeat";
48			default-state = "off";
49		};
50
51		user-led1 {
52			label = "USER-LED1";
53			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
54			linux,default-trigger = "mmc0";
55			default-state = "off";
56		};
57
58		user-led2 {
59			label = "USER-LED2";
60			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
61			linux,default-trigger = "none";
62			default-state = "off";
63		};
64
65		user-led3 {
66			label = "USER-LED3";
67			gpios = <&gpio10 6 GPIO_ACTIVE_LOW>;
68			linux,default-trigger = "cpu0";
69			default-state = "off";
70		};
71	};
72
73	reg_pcie: regulator-pcie {
74		compatible = "regulator-fixed";
75		regulator-name = "3V3_PCIE0";
76		regulator-min-microvolt = <3300000>;
77		regulator-max-microvolt = <3300000>;
78		gpio = <&gpio6 7 0>;
79		enable-active-high;
80	};
81};
82
83&ehci {
84	status = "okay";
85};
86
87&emmc {
88	pinctrl-names = "default";
89	pinctrl-0 = <&emmc_pins_1 &emmc_pins_2
90		     &emmc_pins_3 &emmc_pins_4>;
91	fifo-depth = <256>;
92	clock-frequency = <200000000>;
93	cap-mmc-highspeed;
94	mmc-ddr-1_8v;
95	mmc-hs200-1_8v;
96	non-removable;
97	bus-width = <8>;
98	status = "okay";
99};
100
101&gmac1 {
102	status = "okay";
103	#address-cells = <1>;
104	#size-cells = <0>;
105	phy-handle = <&eth_phy1>;
106	phy-mode = "rgmii";
107	hisilicon,phy-reset-delays-us = <10000 10000 30000>;
108
109	eth_phy1: phy@3 {
110		reg = <3>;
111	};
112};
113
114&gpio1 {
115	status = "okay";
116	gpio-line-names = "GPIO-E",	"",
117			  "",		"",
118			  "",		"GPIO-F",
119			  "",		"GPIO-J";
120};
121
122&gpio2 {
123	status = "okay";
124	gpio-line-names = "GPIO-H",	"GPIO-I",
125			  "GPIO-L",	"GPIO-G",
126			  "GPIO-K",	"",
127			  "",		"";
128};
129
130&gpio3 {
131	status = "okay";
132	gpio-line-names = "",		"",
133			  "",		"",
134			  "GPIO-C",	"",
135			  "",		"GPIO-B";
136};
137
138&gpio4 {
139	status = "okay";
140	gpio-line-names = "",		"",
141			  "",		"",
142			  "",		"GPIO-D",
143			  "",		"";
144};
145
146&gpio5 {
147	status = "okay";
148	gpio-line-names = "",		"USER-LED-1",
149			  "USER-LED-2",	"",
150			  "",		"GPIO-A",
151			  "",		"";
152};
153
154&gpio6 {
155	status = "okay";
156	gpio-line-names = "",		"",
157			  "",		"USER-LED-0",
158			  "",		"",
159			  "",		"";
160};
161
162&gpio10 {
163	status = "okay";
164	gpio-line-names = "",		"",
165			  "",		"",
166			  "",		"",
167			  "USER-LED-3",	"";
168};
169
170&i2c0 {
171	status = "okay";
172	label = "LS-I2C0";
173};
174
175&i2c2 {
176	status = "okay";
177	label = "LS-I2C1";
178};
179
180&ir {
181	status = "okay";
182};
183
184&ohci {
185	status = "okay";
186};
187
188&pcie {
189	reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
190	vpcie-supply = <&reg_pcie>;
191	status = "okay";
192};
193
194&sd0 {
195	bus-width = <4>;
196	cap-sd-highspeed;
197	status = "okay";
198};
199
200&spi0 {
201	status = "okay";
202	label = "LS-SPI0";
203};
204
205&uart0 {
206	status = "okay";
207};
208
209&uart2 {
210	status = "okay";
211	label = "LS-UART0";
212};
213/* No optional LS-UART1 on Low Speed Expansion Connector. */
214