1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Freescale ls1021a QDS board common device tree source
4 *
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
6 */
7
8#include "ls1021a.dtsi"
9
10/ {
11	model = "LS1021A QDS Board";
12
13	aliases {
14		enet0-rgmii-phy = &rgmii_phy1;
15		enet1-rgmii-phy = &rgmii_phy2;
16		enet2-rgmii-phy = &rgmii_phy3;
17		enet0-sgmii-phy = &sgmii_phy1c;
18		enet1-sgmii-phy = &sgmii_phy1d;
19		spi0 = &qspi;
20		spi1 = &dspi0;
21	};
22};
23
24&dspi0 {
25	bus-num = <0>;
26	status = "okay";
27
28	dspiflash: at45db021d@0 {
29		#address-cells = <1>;
30		#size-cells = <1>;
31		compatible = "atmel,dataflash";
32		spi-max-frequency = <16000000>;
33		spi-cpol;
34		spi-cpha;
35		reg = <0>;
36	};
37};
38
39&qspi {
40	bus-num = <0>;
41	status = "okay";
42
43	qflash0: s25fl128s@0 {
44		#address-cells = <1>;
45		#size-cells = <1>;
46		compatible = "jedec,spi-nor";
47		spi-max-frequency = <20000000>;
48		reg = <0>;
49	};
50};
51
52&i2c0 {
53	status = "okay";
54
55	pca9547: mux@77 {
56		reg = <0x77>;
57		#address-cells = <1>;
58		#size-cells = <0>;
59
60		i2c@0 {
61			#address-cells = <1>;
62			#size-cells = <0>;
63			reg = <0x0>;
64
65			ds3232: rtc@68 {
66				compatible = "dallas,ds3232";
67				reg = <0x68>;
68				interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
69			};
70		};
71
72		i2c@2 {
73			#address-cells = <1>;
74			#size-cells = <0>;
75			reg = <0x2>;
76
77			ina220@40 {
78				compatible = "ti,ina220";
79				reg = <0x40>;
80				shunt-resistor = <1000>;
81			};
82
83			ina220@41 {
84				compatible = "ti,ina220";
85				reg = <0x41>;
86				shunt-resistor = <1000>;
87			};
88		};
89
90		i2c@3 {
91			#address-cells = <1>;
92			#size-cells = <0>;
93			reg = <0x3>;
94
95			eeprom@56 {
96				compatible = "atmel,24c512";
97				reg = <0x56>;
98			};
99
100			eeprom@57 {
101				compatible = "atmel,24c512";
102				reg = <0x57>;
103			};
104
105			adt7461a@4c {
106				compatible = "adi,adt7461a";
107				reg = <0x4c>;
108			};
109		};
110	};
111};
112
113&ifc {
114	#address-cells = <2>;
115	#size-cells = <1>;
116	/* NOR, NAND Flashes and FPGA on board */
117	ranges = <0x0 0x0 0x60000000 0x08000000
118		  0x2 0x0 0x7e800000 0x00010000
119		  0x3 0x0 0x7fb00000 0x00000100>;
120	status = "okay";
121
122	nor@0,0 {
123		#address-cells = <1>;
124		#size-cells = <1>;
125		compatible = "cfi-flash";
126		reg = <0x0 0x0 0x8000000>;
127		bank-width = <2>;
128		device-width = <1>;
129	};
130
131	fpga: board-control@3,0 {
132		#address-cells = <1>;
133		#size-cells = <1>;
134		compatible = "simple-bus";
135		reg = <0x3 0x0 0x0000100>;
136		bank-width = <1>;
137		device-width = <1>;
138		ranges = <0 3 0 0x100>;
139
140		mdio-mux-emi1 {
141			compatible = "mdio-mux-mmioreg";
142			mdio-parent-bus = <&mdio0>;
143			#address-cells = <1>;
144			#size-cells = <0>;
145			reg = <0x54 1>; /* BRDCFG4 */
146			mux-mask = <0xe0>; /* EMI1[2:0] */
147
148			/* Onboard PHYs */
149			ls1021amdio0: mdio@0 {
150				reg = <0>;
151				#address-cells = <1>;
152				#size-cells = <0>;
153				rgmii_phy1: ethernet-phy@1 {
154					reg = <0x1>;
155				};
156			};
157
158			ls1021amdio1: mdio@20 {
159				reg = <0x20>;
160				#address-cells = <1>;
161				#size-cells = <0>;
162				rgmii_phy2: ethernet-phy@2 {
163					reg = <0x2>;
164				};
165			};
166
167			ls1021amdio2: mdio@40 {
168				reg = <0x40>;
169				#address-cells = <1>;
170				#size-cells = <0>;
171				rgmii_phy3: ethernet-phy@3 {
172					reg = <0x3>;
173				};
174			};
175
176			ls1021amdio3: mdio@60 {
177				reg = <0x60>;
178				#address-cells = <1>;
179				#size-cells = <0>;
180				sgmii_phy1c: ethernet-phy@1c {
181					reg = <0x1c>;
182				};
183			};
184
185			ls1021amdio4: mdio@80 {
186				reg = <0x80>;
187				#address-cells = <1>;
188				#size-cells = <0>;
189				sgmii_phy1d: ethernet-phy@1d {
190					reg = <0x1d>;
191				};
192			};
193		};
194	};
195};
196
197&lpuart0 {
198	status = "okay";
199};
200
201&mdio0 {
202	tbi0: tbi-phy@8 {
203		reg = <0x8>;
204		device_type = "tbi-phy";
205	};
206};
207
208&uart0 {
209	status = "okay";
210};
211
212&uart1 {
213	status = "okay";
214};
215
216&sata {
217	status = "okay";
218};
219