1/dts-v1/;
2
3#include "tegra30.dtsi"
4
5/ {
6	model = "Toradex Apalis T30";
7	compatible = "toradex,apalis_t30", "nvidia,tegra30";
8
9	chosen {
10		stdout-path = &uarta;
11	};
12
13	aliases {
14		i2c0 = "/i2c@7000d000";
15		i2c1 = "/i2c@7000c000";
16		i2c2 = "/i2c@7000c500";
17		i2c3 = "/i2c@7000c700";
18		mmc0 = "/sdhci@78000600";
19		mmc1 = "/sdhci@78000400";
20		mmc2 = "/sdhci@78000000";
21		spi0 = "/spi@7000d400";
22		spi1 = "/spi@7000dc00";
23		spi2 = "/spi@7000de00";
24		spi3 = "/spi@7000da00";
25		usb0 = "/usb@7d000000";
26		usb1 = "/usb@7d004000";
27		usb2 = "/usb@7d008000";
28	};
29
30	memory {
31		device_type = "memory";
32		reg = <0x80000000 0x40000000>;
33	};
34
35	pcie@3000 {
36		status = "okay";
37		avdd-pexa-supply = <&vdd2_reg>;
38		vdd-pexa-supply = <&vdd2_reg>;
39		avdd-pexb-supply = <&vdd2_reg>;
40		vdd-pexb-supply = <&vdd2_reg>;
41		avdd-pex-pll-supply = <&vdd2_reg>;
42		avdd-plle-supply = <&ldo6_reg>;
43		vddio-pex-ctl-supply = <&sys_3v3_reg>;
44		hvdd-pex-supply = <&sys_3v3_reg>;
45
46		/* Apalis Type Specific 4 Lane PCIe */
47		pci@1,0 {
48			/* TS_DIFF1/2/3/4 left disabled */
49			nvidia,num-lanes = <4>;
50		};
51
52		/* Apalis PCIe */
53		pci@2,0 {
54			/* PCIE1_RX/TX left disabled */
55			nvidia,num-lanes = <1>;
56		};
57
58		/* I210 Gigabit Ethernet Controller (On-module) */
59		pci@3,0 {
60			status = "okay";
61			nvidia,num-lanes = <1>;
62		};
63	};
64
65	/*
66	 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
67	 * board)
68	 */
69	i2c@7000c000 {
70		status = "okay";
71		clock-frequency = <400000>;
72	};
73
74	/* GEN2_I2C: unused */
75
76	/*
77	 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
78	 * carrier board)
79	 */
80	i2c@7000c500 {
81		status = "okay";
82		clock-frequency = <400000>;
83	};
84
85	/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
86	i2c@7000c700 {
87		status = "okay";
88		clock-frequency = <10000>;
89	};
90
91	/*
92	 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
93	 * touch screen controller
94	 */
95	i2c@7000d000 {
96		status = "okay";
97		clock-frequency = <100000>;
98
99		pmic: tps65911@2d {
100			compatible = "ti,tps65911";
101			reg = <0x2d>;
102
103			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
104			#interrupt-cells = <2>;
105			interrupt-controller;
106
107			ti,system-power-controller;
108
109			#gpio-cells = <2>;
110			gpio-controller;
111
112			vcc1-supply = <&sys_3v3_reg>;
113			vcc2-supply = <&sys_3v3_reg>;
114			vcc3-supply = <&vio_reg>;
115			vcc4-supply = <&sys_3v3_reg>;
116			vcc5-supply = <&sys_3v3_reg>;
117			vcc6-supply = <&vio_reg>;
118			vcc7-supply = <&charge_pump_5v0_reg>;
119			vccio-supply = <&sys_3v3_reg>;
120
121			regulators {
122				/* SW1: +V1.35_VDDIO_DDR */
123				vdd1_reg: vdd1 {
124					regulator-name = "vddio_ddr_1v35";
125					regulator-min-microvolt = <1350000>;
126					regulator-max-microvolt = <1350000>;
127					regulator-always-on;
128				};
129
130				/* SW2: +V1.05 */
131				vdd2_reg: vdd2 {
132					regulator-name =
133						"vdd_pexa,vdd_pexb,vdd_sata";
134					regulator-min-microvolt = <1050000>;
135					regulator-max-microvolt = <1050000>;
136				};
137
138				/* SW CTRL: +V1.0_VDD_CPU */
139				vddctrl_reg: vddctrl {
140					regulator-name = "vdd_cpu,vdd_sys";
141					regulator-min-microvolt = <1150000>;
142					regulator-max-microvolt = <1150000>;
143					regulator-always-on;
144				};
145
146				/* SWIO: +V1.8 */
147				vio_reg: vio {
148					regulator-name = "vdd_1v8_gen";
149					regulator-min-microvolt = <1800000>;
150					regulator-max-microvolt = <1800000>;
151					regulator-always-on;
152				};
153
154				/* LDO1: unused */
155
156				/*
157				 * EN_+V3.3 switching via FET:
158				 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
159				 * see also v3_3 fixed supply
160				 */
161				ldo2_reg: ldo2 {
162					regulator-name = "en_3v3";
163					regulator-min-microvolt = <3300000>;
164					regulator-max-microvolt = <3300000>;
165					regulator-always-on;
166				};
167
168				/* +V1.2_CSI */
169				ldo3_reg: ldo3 {
170					regulator-name =
171						"avdd_dsi_csi,pwrdet_mipi";
172					regulator-min-microvolt = <1200000>;
173					regulator-max-microvolt = <1200000>;
174				};
175
176				/* +V1.2_VDD_RTC */
177				ldo4_reg: ldo4 {
178					regulator-name = "vdd_rtc";
179					regulator-min-microvolt = <1200000>;
180					regulator-max-microvolt = <1200000>;
181					regulator-always-on;
182				};
183
184				/*
185				 * +V2.8_AVDD_VDAC:
186				 * only required for analog RGB
187				 */
188				ldo5_reg: ldo5 {
189					regulator-name = "avdd_vdac";
190					regulator-min-microvolt = <2800000>;
191					regulator-max-microvolt = <2800000>;
192					regulator-always-on;
193				};
194
195				/*
196				 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
197				 * but LDO6 can't set voltage in 50mV
198				 * granularity
199				 */
200				ldo6_reg: ldo6 {
201					regulator-name = "avdd_plle";
202					regulator-min-microvolt = <1100000>;
203					regulator-max-microvolt = <1100000>;
204				};
205
206				/* +V1.2_AVDD_PLL */
207				ldo7_reg: ldo7 {
208					regulator-name = "avdd_pll";
209					regulator-min-microvolt = <1200000>;
210					regulator-max-microvolt = <1200000>;
211					regulator-always-on;
212				};
213
214				/* +V1.0_VDD_DDR_HS */
215				ldo8_reg: ldo8 {
216					regulator-name = "vdd_ddr_hs";
217					regulator-min-microvolt = <1000000>;
218					regulator-max-microvolt = <1000000>;
219					regulator-always-on;
220				};
221			};
222		};
223	};
224
225	/* SPI1: Apalis SPI1 */
226	spi@7000d400 {
227		status = "okay";
228		spi-max-frequency = <25000000>;
229	};
230
231	/* SPI4: CAN2 */
232	spi@7000da00 {
233		status = "okay";
234		spi-max-frequency = <25000000>;
235	};
236
237	/* SPI5: Apalis SPI2 */
238	spi@7000dc00 {
239		status = "okay";
240		spi-max-frequency = <25000000>;
241	};
242
243	/* SPI6: CAN1 */
244	spi@7000de00 {
245		status = "okay";
246		spi-max-frequency = <25000000>;
247	};
248
249	sdhci@78000000 {
250		status = "okay";
251		bus-width = <4>;
252		/* SD1_CD# */
253		cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>;
254	};
255
256	sdhci@78000400 {
257		status = "okay";
258		bus-width = <8>;
259		/* MMC1_CD# */
260		cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
261	};
262
263	sdhci@78000600 {
264		status = "okay";
265		bus-width = <8>;
266		non-removable;
267	};
268
269	/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
270	usb@7d000000 {
271		status = "okay";
272		dr_mode = "otg";
273		/* USBO1_EN */
274		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
275	};
276
277	/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
278	usb@7d004000 {
279		status = "okay";
280		/* USBH_EN */
281		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
282	};
283
284	/* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
285	usb@7d008000 {
286		status = "okay";
287		/* USBH_EN */
288		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
289	};
290
291	clocks {
292		compatible = "simple-bus";
293		#address-cells = <1>;
294		#size-cells = <0>;
295
296		clk32k_in: clk@0 {
297			compatible = "fixed-clock";
298			reg=<0>;
299			#clock-cells = <0>;
300			clock-frequency = <32768>;
301		};
302		clk16m: clk@1 {
303			compatible = "fixed-clock";
304			reg=<1>;
305			#clock-cells = <0>;
306			clock-frequency = <16000000>;
307			clock-output-names = "clk16m";
308		};
309	};
310
311	regulators {
312		compatible = "simple-bus";
313		#address-cells = <1>;
314		#size-cells = <0>;
315
316		sys_3v3_reg: regulator@100 {
317			compatible = "regulator-fixed";
318			reg = <100>;
319			regulator-name = "3v3";
320			regulator-min-microvolt = <3300000>;
321			regulator-max-microvolt = <3300000>;
322			regulator-always-on;
323		};
324
325		charge_pump_5v0_reg: regulator@101 {
326			compatible = "regulator-fixed";
327			reg = <101>;
328			regulator-name = "5v0";
329			regulator-min-microvolt = <5000000>;
330			regulator-max-microvolt = <5000000>;
331			regulator-always-on;
332		};
333	};
334};
335
336&uarta {
337	status = "okay";
338};
339