1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * dts file for Xilinx ZynqMP ZCU100 revC
4 *
5 * (C) Copyright 2016 - 2020, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Nathalie Chan King Choy
9 */
10
11/dts-v1/;
12
13#include "zynqmp.dtsi"
14#include "zynqmp-clk-ccf.dtsi"
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19#include <dt-bindings/phy/phy.h>
20
21/ {
22	model = "ZynqMP ZCU100 RevC";
23	compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
24
25	aliases {
26		gpio0 = &gpio;
27		i2c0 = &i2c1;
28		rtc0 = &rtc;
29		serial0 = &uart1;
30		serial1 = &uart0;
31		serial2 = &dcc;
32		spi0 = &spi0;
33		spi1 = &spi1;
34		usb0 = &usb0;
35		usb1 = &usb1;
36		mmc0 = &sdhci0;
37		mmc1 = &sdhci1;
38	};
39
40	chosen {
41		bootargs = "earlycon";
42		stdout-path = "serial0:115200n8";
43	};
44
45	memory@0 {
46		device_type = "memory";
47		reg = <0x0 0x0 0x0 0x80000000>;
48	};
49
50	gpio-keys {
51		compatible = "gpio-keys";
52		autorepeat;
53		sw4 {
54			label = "sw4";
55			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
56			linux,code = <KEY_POWER>;
57			wakeup-source;
58			autorepeat;
59		};
60	};
61
62	iio-hwmon {
63		compatible = "iio-hwmon";
64		io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
65			      <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
66			      <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
67			      <&xilinx_ams 9>, <&xilinx_ams 10>,
68			      <&xilinx_ams 11>, <&xilinx_ams 12>;
69	};
70
71	leds {
72		compatible = "gpio-leds";
73		led-ds2 {
74			label = "ds2";
75			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
76			linux,default-trigger = "heartbeat";
77		};
78
79		led-ds3 {
80			label = "ds3";
81			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
82			linux,default-trigger = "phy0tx"; /* WLAN tx */
83			default-state = "off";
84		};
85
86		led-ds4 {
87			label = "ds4";
88			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
89			linux,default-trigger = "phy0rx"; /* WLAN rx */
90			default-state = "off";
91		};
92
93		led-ds5 {
94			label = "ds5";
95			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
96			linux,default-trigger = "bluetooth-power";
97		};
98
99		vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
100			label = "vbus_det";
101			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
102			default-state = "on";
103		};
104	};
105
106	ltc2954: ltc2954 { /* U7 */
107		compatible = "lltc,ltc2954", "lltc,ltc2952";
108		status = "disabled";
109		trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
110		/* If there is HW watchdog on mezzanine this signal should be connected there */
111		watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
112		kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
113	};
114
115	wmmcsdio_fixed: fixedregulator-mmcsdio {
116		compatible = "regulator-fixed";
117		regulator-name = "wmmcsdio_fixed";
118		regulator-min-microvolt = <3300000>;
119		regulator-max-microvolt = <3300000>;
120		regulator-always-on;
121		regulator-boot-on;
122	};
123
124	sdio_pwrseq: sdio-pwrseq {
125		compatible = "mmc-pwrseq-simple";
126		reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
127		post-power-on-delay-ms = <10>;
128	};
129
130	ina226 {
131		compatible = "iio-hwmon";
132		io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
133	};
134
135	si5335a_0: clk26 {
136		compatible = "fixed-clock";
137		#clock-cells = <0>;
138		clock-frequency = <26000000>;
139	};
140
141	si5335a_1: clk27 {
142		compatible = "fixed-clock";
143		#clock-cells = <0>;
144		clock-frequency = <27000000>;
145	};
146};
147
148&dcc {
149	status = "okay";
150};
151
152&gpio {
153	status = "okay";
154	gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
155			  "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
156			  "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
157			  "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
158			  "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
159			  "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
160			  "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
161			  "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
162			  "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
163			  "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
164			  "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
165			  "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
166			  "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
167			  "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
168			  "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
169			  "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
170			  "", "",
171			  "", "", "", "", "", "", "", "", "", "",
172			  "", "", "", "", "", "", "", "", "", "",
173			  "", "", "", "", "", "", "", "", "", "",
174			  "", "", "", "", "", "", "", "", "", "",
175			  "", "", "", "", "", "", "", "", "", "",
176			  "", "", "", "", "", "", "", "", "", "",
177			  "", "", "", "", "", "", "", "", "", "",
178			  "", "", "", "", "", "", "", "", "", "",
179			  "", "", "", "", "", "", "", "", "", "",
180			  "", "", "", "";
181};
182
183&gpu {
184	status = "okay";
185};
186
187&i2c1 {
188	status = "okay";
189	pinctrl-names = "default", "gpio";
190	pinctrl-0 = <&pinctrl_i2c1_default>;
191	pinctrl-1 = <&pinctrl_i2c1_gpio>;
192	scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
193	sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
194	clock-frequency = <100000>;
195	i2c-mux@75 { /* u11 */
196		compatible = "nxp,pca9548";
197		#address-cells = <1>;
198		#size-cells = <0>;
199		reg = <0x75>;
200		i2csw_0: i2c@0 {
201			#address-cells = <1>;
202			#size-cells = <0>;
203			reg = <0>;
204			label = "LS-I2C0";
205		};
206		i2csw_1: i2c@1 {
207			#address-cells = <1>;
208			#size-cells = <0>;
209			reg = <1>;
210			label = "LS-I2C1";
211		};
212		i2csw_2: i2c@2 {
213			#address-cells = <1>;
214			#size-cells = <0>;
215			reg = <2>;
216			label = "HS-I2C2";
217		};
218		i2csw_3: i2c@3 {
219			#address-cells = <1>;
220			#size-cells = <0>;
221			reg = <3>;
222			label = "HS-I2C3";
223		};
224		i2csw_4: i2c@4 {
225			#address-cells = <1>;
226			#size-cells = <0>;
227			reg = <0x4>;
228
229			pmic: pmic@5e { /* Custom TI PMIC u33 */
230				compatible = "ti,tps65086";
231				reg = <0x5e>;
232				interrupt-parent = <&gpio>;
233				interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
234				#gpio-cells = <2>;
235				gpio-controller;
236			};
237		};
238		i2csw_5: i2c@5 {
239			#address-cells = <1>;
240			#size-cells = <0>;
241			reg = <5>;
242			/* PS_PMBUS */
243			u35: ina226@40 { /* u35 */
244				compatible = "ti,ina226";
245				#io-channel-cells = <1>;
246				reg = <0x40>;
247				shunt-resistor = <10000>;
248				/* MIO31 is alert which should be routed to PMUFW */
249			};
250		};
251		i2csw_6: i2c@6 {
252			#address-cells = <1>;
253			#size-cells = <0>;
254			reg = <6>;
255			/*
256			 * Not Connected
257			 */
258		};
259		i2csw_7: i2c@7 {
260			#address-cells = <1>;
261			#size-cells = <0>;
262			reg = <7>;
263			/*
264			 * usb5744 (DNP) - U5
265			 * 100kHz - this is default freq for us
266			 */
267		};
268	};
269};
270
271&pinctrl0 {
272	status = "okay";
273	pinctrl_i2c1_default: i2c1-default {
274		mux {
275			groups = "i2c1_1_grp";
276			function = "i2c1";
277		};
278
279		conf {
280			groups = "i2c1_1_grp";
281			bias-pull-up;
282			slew-rate = <SLEW_RATE_SLOW>;
283			power-source = <IO_STANDARD_LVCMOS18>;
284		};
285	};
286
287	pinctrl_i2c1_gpio: i2c1-gpio {
288		mux {
289			groups = "gpio0_4_grp", "gpio0_5_grp";
290			function = "gpio0";
291		};
292
293		conf {
294			groups = "gpio0_4_grp", "gpio0_5_grp";
295			slew-rate = <SLEW_RATE_SLOW>;
296			power-source = <IO_STANDARD_LVCMOS18>;
297		};
298	};
299
300	pinctrl_sdhci0_default: sdhci0-default {
301		mux {
302			groups = "sdio0_3_grp";
303			function = "sdio0";
304		};
305
306		conf {
307			groups = "sdio0_3_grp";
308			slew-rate = <SLEW_RATE_SLOW>;
309			power-source = <IO_STANDARD_LVCMOS18>;
310			bias-disable;
311		};
312
313		mux-cd {
314			groups = "sdio0_cd_0_grp";
315			function = "sdio0_cd";
316		};
317
318		conf-cd {
319			groups = "sdio0_cd_0_grp";
320			bias-high-impedance;
321			bias-pull-up;
322			slew-rate = <SLEW_RATE_SLOW>;
323			power-source = <IO_STANDARD_LVCMOS18>;
324		};
325	};
326
327	pinctrl_sdhci1_default: sdhci1-default {
328		mux {
329			groups = "sdio1_2_grp";
330			function = "sdio1";
331		};
332
333		conf {
334			groups = "sdio1_2_grp";
335			slew-rate = <SLEW_RATE_SLOW>;
336			power-source = <IO_STANDARD_LVCMOS18>;
337			bias-disable;
338		};
339	};
340
341	pinctrl_spi0_default: spi0-default {
342		mux {
343			groups = "spi0_3_grp";
344			function = "spi0";
345		};
346
347		conf {
348			groups = "spi0_3_grp";
349			bias-disable;
350			slew-rate = <SLEW_RATE_SLOW>;
351			power-source = <IO_STANDARD_LVCMOS18>;
352		};
353
354		mux-cs {
355			groups = "spi0_ss_9_grp";
356			function = "spi0_ss";
357		};
358
359		conf-cs {
360			groups = "spi0_ss_9_grp";
361			bias-disable;
362		};
363
364	};
365
366	pinctrl_spi1_default: spi1-default {
367		mux {
368			groups = "spi1_0_grp";
369			function = "spi1";
370		};
371
372		conf {
373			groups = "spi1_0_grp";
374			bias-disable;
375			slew-rate = <SLEW_RATE_SLOW>;
376			power-source = <IO_STANDARD_LVCMOS18>;
377		};
378
379		mux-cs {
380			groups = "spi1_ss_0_grp";
381			function = "spi1_ss";
382		};
383
384		conf-cs {
385			groups = "spi1_ss_0_grp";
386			bias-disable;
387		};
388
389	};
390
391	pinctrl_uart0_default: uart0-default {
392		mux {
393			groups = "uart0_0_grp";
394			function = "uart0";
395		};
396
397		conf {
398			groups = "uart0_0_grp";
399			slew-rate = <SLEW_RATE_SLOW>;
400			power-source = <IO_STANDARD_LVCMOS18>;
401		};
402
403		conf-rx {
404			pins = "MIO3";
405			bias-high-impedance;
406		};
407
408		conf-tx {
409			pins = "MIO2";
410			bias-disable;
411		};
412	};
413
414	pinctrl_uart1_default: uart1-default {
415		mux {
416			groups = "uart1_0_grp";
417			function = "uart1";
418		};
419
420		conf {
421			groups = "uart1_0_grp";
422			slew-rate = <SLEW_RATE_SLOW>;
423			power-source = <IO_STANDARD_LVCMOS18>;
424		};
425
426		conf-rx {
427			pins = "MIO1";
428			bias-high-impedance;
429		};
430
431		conf-tx {
432			pins = "MIO0";
433			bias-disable;
434		};
435	};
436
437	pinctrl_usb0_default: usb0-default {
438		mux {
439			groups = "usb0_0_grp";
440			function = "usb0";
441		};
442
443		conf {
444			groups = "usb0_0_grp";
445			slew-rate = <SLEW_RATE_SLOW>;
446			power-source = <IO_STANDARD_LVCMOS18>;
447		};
448
449		conf-rx {
450			pins = "MIO52", "MIO53", "MIO55";
451			bias-high-impedance;
452		};
453
454		conf-tx {
455			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
456			       "MIO60", "MIO61", "MIO62", "MIO63";
457			bias-disable;
458		};
459	};
460
461	pinctrl_usb1_default: usb1-default {
462		mux {
463			groups = "usb1_0_grp";
464			function = "usb1";
465		};
466
467		conf {
468			groups = "usb1_0_grp";
469			slew-rate = <SLEW_RATE_SLOW>;
470			power-source = <IO_STANDARD_LVCMOS18>;
471		};
472
473		conf-rx {
474			pins = "MIO64", "MIO65", "MIO67";
475			bias-high-impedance;
476		};
477
478		conf-tx {
479			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
480			       "MIO72", "MIO73", "MIO74", "MIO75";
481			bias-disable;
482		};
483	};
484};
485
486&psgtr {
487	status = "okay";
488	/* usb3, dps */
489	clocks = <&si5335a_0>, <&si5335a_1>;
490	clock-names = "ref0", "ref1";
491};
492
493&rtc {
494	status = "okay";
495};
496
497/* SD0 only supports 3.3V, no level shifter */
498&sdhci0 {
499	status = "okay";
500	no-1-8-v;
501	disable-wp;
502	pinctrl-names = "default";
503	pinctrl-0 = <&pinctrl_sdhci0_default>;
504	xlnx,mio-bank = <0>;
505};
506
507&sdhci1 {
508	status = "okay";
509	bus-width = <0x4>;
510	pinctrl-names = "default";
511	pinctrl-0 = <&pinctrl_sdhci1_default>;
512	xlnx,mio-bank = <0>;
513	non-removable;
514	disable-wp;
515	cap-power-off-card;
516	mmc-pwrseq = <&sdio_pwrseq>;
517	vqmmc-supply = <&wmmcsdio_fixed>;
518	#address-cells = <1>;
519	#size-cells = <0>;
520	wlcore: wifi@2 {
521		compatible = "ti,wl1831";
522		reg = <2>;
523		interrupt-parent = <&gpio>;
524		interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
525	};
526};
527
528&spi0 { /* Low Speed connector */
529	status = "okay";
530	label = "LS-SPI0";
531	num-cs = <1>;
532	pinctrl-names = "default";
533	pinctrl-0 = <&pinctrl_spi0_default>;
534};
535
536&spi1 { /* High Speed connector */
537	status = "okay";
538	label = "HS-SPI1";
539	num-cs = <1>;
540	pinctrl-names = "default";
541	pinctrl-0 = <&pinctrl_spi1_default>;
542};
543
544&uart0 {
545	status = "okay";
546	pinctrl-names = "default";
547	pinctrl-0 = <&pinctrl_uart0_default>;
548	bluetooth {
549		compatible = "ti,wl1831-st";
550		enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
551	};
552};
553
554&uart1 {
555	status = "okay";
556	pinctrl-names = "default";
557	pinctrl-0 = <&pinctrl_uart1_default>;
558};
559
560/* ULPI SMSC USB3320 */
561&usb0 {
562	status = "okay";
563	pinctrl-names = "default";
564	pinctrl-0 = <&pinctrl_usb0_default>;
565};
566
567&dwc3_0 {
568	status = "okay";
569	dr_mode = "peripheral";
570	phy-names = "usb3-phy";
571	phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
572	maximum-speed = "super-speed";
573};
574
575/* ULPI SMSC USB3320 */
576&usb1 {
577	status = "okay";
578	pinctrl-names = "default";
579	pinctrl-0 = <&pinctrl_usb1_default>;
580};
581
582&dwc3_1 {
583	status = "okay";
584	dr_mode = "host";
585	phy-names = "usb3-phy";
586	phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
587	maximum-speed = "super-speed";
588};
589
590&watchdog0 {
591	status = "okay";
592};
593
594&xilinx_ams {
595	status = "okay";
596};
597
598&ams_ps {
599	status = "okay";
600};
601
602&zynqmp_dpdma {
603	status = "okay";
604};
605
606&zynqmp_dpsub {
607	status = "okay";
608	phy-names = "dp-phy0", "dp-phy1";
609	phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
610	       <&psgtr 0 PHY_TYPE_DP 1 1>;
611};
612