1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
4  */
5 
6 #ifndef __PINCTRL_MESON_H__
7 #define __PINCTRL_MESON_H__
8 
9 #include <linux/types.h>
10 
11 struct meson_pmx_group {
12 	const char *name;
13 	const unsigned int *pins;
14 	unsigned int num_pins;
15 	const void *data;
16 };
17 
18 struct meson_pmx_func {
19 	const char *name;
20 	const char * const *groups;
21 	unsigned int num_groups;
22 };
23 
24 struct meson_pinctrl_data {
25 	const char *name;
26 	struct meson_pmx_group *groups;
27 	struct meson_pmx_func *funcs;
28 	struct meson_bank *banks;
29 	unsigned int pin_base;
30 	unsigned int num_pins;
31 	unsigned int num_groups;
32 	unsigned int num_funcs;
33 	unsigned int num_banks;
34 	const struct driver *gpio_driver;
35 	void *pmx_data;
36 };
37 
38 struct meson_pinctrl {
39 	struct meson_pinctrl_data *data;
40 	void __iomem *reg_mux;
41 	void __iomem *reg_gpio;
42 	void __iomem *reg_pull;
43 	void __iomem *reg_pullen;
44 	void __iomem *reg_ds;
45 };
46 
47 /**
48  * struct meson_reg_desc - a register descriptor
49  *
50  * @reg:	register offset in the regmap
51  * @bit:	bit index in register
52  *
53  * The structure describes the information needed to control pull,
54  * pull-enable, direction, etc. for a single pin
55  */
56 struct meson_reg_desc {
57 	unsigned int reg;
58 	unsigned int bit;
59 };
60 
61 /**
62  * enum meson_pinconf_drv - value of drive-strength supported
63  */
64 enum meson_pinconf_drv {
65 	MESON_PINCONF_DRV_500UA,
66 	MESON_PINCONF_DRV_2500UA,
67 	MESON_PINCONF_DRV_3000UA,
68 	MESON_PINCONF_DRV_4000UA,
69 };
70 
71 /**
72  * enum meson_reg_type - type of registers encoded in @meson_reg_desc
73  */
74 enum meson_reg_type {
75 	REG_PULLEN,
76 	REG_PULL,
77 	REG_DIR,
78 	REG_OUT,
79 	REG_IN,
80 	REG_DS,
81 	NUM_REG,
82 };
83 
84 /**
85  * struct meson bank
86  *
87  * @name:	bank name
88  * @first:	first pin of the bank
89  * @last:	last pin of the bank
90  * @regs:	array of register descriptors
91  *
92  * A bank represents a set of pins controlled by a contiguous set of
93  * bits in the domain registers. The structure specifies which bits in
94  * the regmap control the different functionalities. Each member of
95  * the @regs array refers to the first pin of the bank.
96  */
97 struct meson_bank {
98 	const char *name;
99 	unsigned int first;
100 	unsigned int last;
101 	struct meson_reg_desc regs[NUM_REG];
102 };
103 
104 #define PIN(x, b)	(b + x)
105 
106 #define FUNCTION(fn)							\
107 	{								\
108 		.name = #fn,						\
109 		.groups = fn ## _groups,				\
110 		.num_groups = ARRAY_SIZE(fn ## _groups),		\
111 	}
112 
113 #define BANK_DS(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
114 		dsr, dsb)                                                  \
115 	{                                                                  \
116 		.name = n,                                                 \
117 		.first = f,                                                \
118 		.last = l,                                                 \
119 		.regs = {                                                  \
120 		    [REG_PULLEN] = {per, peb},                             \
121 		    [REG_PULL] = {pr, pb},                                 \
122 		    [REG_DIR] = {dr, db},                                  \
123 		    [REG_OUT] = { or, ob},                                 \
124 		    [REG_IN] = {ir, ib},                                   \
125 		    [REG_DS] = {dsr, dsb},                                 \
126 		},                                                         \
127 	}
128 
129 #define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
130 	BANK_DS(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
131 
132 #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
133 
134 extern const struct pinctrl_ops meson_pinctrl_ops;
135 
136 int meson_pinctrl_get_groups_count(struct udevice *dev);
137 const char *meson_pinctrl_get_group_name(struct udevice *dev,
138 					 unsigned int selector);
139 int meson_pinctrl_get_pins_count(struct udevice *dev);
140 const char *meson_pinctrl_get_pin_name(struct udevice *dev,
141 				       unsigned int selector);
142 int meson_pinmux_get_functions_count(struct udevice *dev);
143 const char *meson_pinmux_get_function_name(struct udevice *dev,
144 					   unsigned int selector);
145 int meson_pinctrl_probe(struct udevice *dev);
146 
147 int meson_gpio_get(struct udevice *dev, unsigned int offset);
148 int meson_gpio_set(struct udevice *dev, unsigned int offset, int value);
149 int meson_gpio_get_direction(struct udevice *dev, unsigned int offset);
150 int meson_gpio_direction_input(struct udevice *dev, unsigned int offset);
151 int meson_gpio_direction_output(struct udevice *dev, unsigned int offset,
152 				int value);
153 int meson_gpio_probe(struct udevice *dev);
154 
155 int meson_pinconf_set(struct udevice *dev, unsigned int pin,
156 		      unsigned int param, unsigned int arg);
157 int meson_pinconf_group_set(struct udevice *dev,
158 			    unsigned int group_selector,
159 			    unsigned int param, unsigned int arg);
160 
161 #endif /* __PINCTRL_MESON_H__ */
162