1 /*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /*
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
12 * write delay. Also, there is no limit imposed on the number of bytes that can
13 * be transferred with a single read or write.
14 *
15 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
17 *
18 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
20 *
21 */
22
23 #include <common.h>
24 #include <config.h>
25 #include <command.h>
26 #include <i2c.h>
27
28 extern void eeprom_init (void);
29 extern int eeprom_read (unsigned dev_addr, unsigned offset,
30 uchar *buffer, unsigned cnt);
31 extern int eeprom_write (unsigned dev_addr, unsigned offset,
32 uchar *buffer, unsigned cnt);
33 #if defined(CONFIG_SYS_EEPROM_WREN)
34 extern int eeprom_write_enable (unsigned dev_addr, int state);
35 #endif
36
37
38 #if defined(CONFIG_SYS_EEPROM_X40430)
39 /* Maximum number of times to poll for acknowledge after write */
40 #define MAX_ACKNOWLEDGE_POLLS 10
41 #endif
42
43 /* ------------------------------------------------------------------------- */
44
45 #if defined(CONFIG_CMD_EEPROM)
do_eeprom(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])46 static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
47 {
48 const char *const fmt =
49 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
50
51 #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
52 if (argc == 6) {
53 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
54 ulong addr = simple_strtoul (argv[3], NULL, 16);
55 ulong off = simple_strtoul (argv[4], NULL, 16);
56 ulong cnt = simple_strtoul (argv[5], NULL, 16);
57 #else
58 if (argc == 5) {
59 ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
60 ulong addr = simple_strtoul (argv[2], NULL, 16);
61 ulong off = simple_strtoul (argv[3], NULL, 16);
62 ulong cnt = simple_strtoul (argv[4], NULL, 16);
63 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
64
65 # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
66 eeprom_init ();
67 # endif /* !CONFIG_SPI */
68
69 if (strcmp (argv[1], "read") == 0) {
70 int rcode;
71
72 printf (fmt, dev_addr, argv[1], addr, off, cnt);
73
74 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
75
76 puts ("done\n");
77 return rcode;
78 } else if (strcmp (argv[1], "write") == 0) {
79 int rcode;
80
81 printf (fmt, dev_addr, argv[1], addr, off, cnt);
82
83 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
84
85 puts ("done\n");
86 return rcode;
87 }
88 }
89
90 return CMD_RET_USAGE;
91 }
92 #endif
93
94 /*-----------------------------------------------------------------------
95 *
96 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
97 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
98 *
99 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
100 * 0x00000nxx for EEPROM address selectors and page number at n.
101 */
102
103 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
104 #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
105 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
106 #endif
107 #endif
108
109 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
110 {
111 unsigned end = offset + cnt;
112 unsigned blk_off;
113 int rcode = 0;
114
115 /* Read data until done or would cross a page boundary.
116 * We must write the address again when changing pages
117 * because the next page may be in a different device.
118 */
119 while (offset < end) {
120 unsigned alen, len;
121 #if !defined(CONFIG_SYS_I2C_FRAM)
122 unsigned maxlen;
123 #endif
124
125 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
126 uchar addr[2];
127
128 blk_off = offset & 0xFF; /* block offset */
129
130 addr[0] = offset >> 8; /* block number */
131 addr[1] = blk_off; /* block offset */
132 alen = 2;
133 #else
134 uchar addr[3];
135
136 blk_off = offset & 0xFF; /* block offset */
137
138 addr[0] = offset >> 16; /* block number */
139 addr[1] = offset >> 8; /* upper address octet */
140 addr[2] = blk_off; /* lower address octet */
141 alen = 3;
142 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
143
144 addr[0] |= dev_addr; /* insert device address */
145
146 len = end - offset;
147
148 /*
149 * For a FRAM device there is no limit on the number of the
150 * bytes that can be ccessed with the single read or write
151 * operation.
152 */
153 #if !defined(CONFIG_SYS_I2C_FRAM)
154 maxlen = 0x100 - blk_off;
155 if (maxlen > I2C_RXTX_LEN)
156 maxlen = I2C_RXTX_LEN;
157 if (len > maxlen)
158 len = maxlen;
159 #endif
160
161 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
162 spi_read (addr, alen, buffer, len);
163 #else
164 #if defined(CONFIG_SYS_I2C_EEPROM_BUS)
165 i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
166 #endif
167 if (i2c_read(addr[0], offset, alen - 1, buffer, len))
168 rcode = 1;
169 #endif
170 buffer += len;
171 offset += len;
172 }
173
174 return rcode;
175 }
176
177 /*-----------------------------------------------------------------------
178 *
179 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
180 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
181 *
182 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
183 * 0x00000nxx for EEPROM address selectors and page number at n.
184 */
185
186 int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
187 {
188 unsigned end = offset + cnt;
189 unsigned blk_off;
190 int rcode = 0;
191
192 #if defined(CONFIG_SYS_EEPROM_X40430)
193 uchar contr_r_addr[2];
194 uchar addr_void[2];
195 uchar contr_reg[2];
196 uchar ctrl_reg_v;
197 int i;
198 #endif
199
200 #if defined(CONFIG_SYS_EEPROM_WREN)
201 eeprom_write_enable (dev_addr,1);
202 #endif
203 /* Write data until done or would cross a write page boundary.
204 * We must write the address again when changing pages
205 * because the address counter only increments within a page.
206 */
207
208 while (offset < end) {
209 unsigned alen, len;
210 #if !defined(CONFIG_SYS_I2C_FRAM)
211 unsigned maxlen;
212 #endif
213
214 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
215 uchar addr[2];
216
217 blk_off = offset & 0xFF; /* block offset */
218
219 addr[0] = offset >> 8; /* block number */
220 addr[1] = blk_off; /* block offset */
221 alen = 2;
222 #else
223 uchar addr[3];
224
225 blk_off = offset & 0xFF; /* block offset */
226
227 addr[0] = offset >> 16; /* block number */
228 addr[1] = offset >> 8; /* upper address octet */
229 addr[2] = blk_off; /* lower address octet */
230 alen = 3;
231 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
232
233 addr[0] |= dev_addr; /* insert device address */
234
235 len = end - offset;
236
237 /*
238 * For a FRAM device there is no limit on the number of the
239 * bytes that can be accessed with the single read or write
240 * operation.
241 */
242 #if !defined(CONFIG_SYS_I2C_FRAM)
243
244 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
245
246 #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
247 #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
248
249 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
250 #else
251 maxlen = 0x100 - blk_off;
252 #endif
253 if (maxlen > I2C_RXTX_LEN)
254 maxlen = I2C_RXTX_LEN;
255
256 if (len > maxlen)
257 len = maxlen;
258 #endif
259
260 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
261 spi_write (addr, alen, buffer, len);
262 #else
263 #if defined(CONFIG_SYS_EEPROM_X40430)
264 /* Get the value of the control register.
265 * Set current address (internal pointer in the x40430)
266 * to 0x1ff.
267 */
268 contr_r_addr[0] = 9;
269 contr_r_addr[1] = 0xff;
270 addr_void[0] = 0;
271 addr_void[1] = addr[1];
272 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
273 contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
274 addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
275 #endif
276 contr_reg[0] = 0xff;
277 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
278 rcode = 1;
279 }
280 ctrl_reg_v = contr_reg[0];
281
282 /* Are any of the eeprom blocks write protected?
283 */
284 if (ctrl_reg_v & 0x18) {
285 ctrl_reg_v &= ~0x18; /* reset block protect bits */
286 ctrl_reg_v |= 0x02; /* set write enable latch */
287 ctrl_reg_v &= ~0x04; /* clear RWEL */
288
289 /* Set write enable latch.
290 */
291 contr_reg[0] = 0x02;
292 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
293 rcode = 1;
294 }
295
296 /* Set register write enable latch.
297 */
298 contr_reg[0] = 0x06;
299 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
300 rcode = 1;
301 }
302
303 /* Modify ctrl register.
304 */
305 contr_reg[0] = ctrl_reg_v;
306 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
307 rcode = 1;
308 }
309
310 /* The write (above) is an operation on NV memory.
311 * These can take some time (~5ms), and the device
312 * will not respond to further I2C messages till
313 * it's completed the write.
314 * So poll device for an I2C acknowledge.
315 * When we get one we know we can continue with other
316 * operations.
317 */
318 contr_reg[0] = 0;
319 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
320 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
321 break; /* got ack */
322 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
323 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
324 #endif
325 }
326 if (i == MAX_ACKNOWLEDGE_POLLS) {
327 puts ("EEPROM poll acknowledge failed\n");
328 rcode = 1;
329 }
330 }
331
332 /* Is the write enable latch on?.
333 */
334 else if (!(ctrl_reg_v & 0x02)) {
335 /* Set write enable latch.
336 */
337 contr_reg[0] = 0x02;
338 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
339 rcode = 1;
340 }
341 }
342 /* Write is enabled ... now write eeprom value.
343 */
344 #endif
345 #if defined(CONFIG_SYS_I2C_EEPROM_BUS)
346 i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
347 #endif
348 if (i2c_write(addr[0], offset, alen - 1, buffer, len))
349 rcode = 1;
350
351 #endif
352 buffer += len;
353 offset += len;
354
355 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
356 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
357 #endif
358 }
359 #if defined(CONFIG_SYS_EEPROM_WREN)
360 eeprom_write_enable (dev_addr,0);
361 #endif
362 return rcode;
363 }
364
365 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
366 int
367 eeprom_probe (unsigned dev_addr, unsigned offset)
368 {
369 unsigned char chip;
370
371 /* Probe the chip address
372 */
373 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
374 chip = offset >> 8; /* block number */
375 #else
376 chip = offset >> 16; /* block number */
377 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
378
379 chip |= dev_addr; /* insert device address */
380
381 return (i2c_probe (chip));
382 }
383 #endif
384
385 /*-----------------------------------------------------------------------
386 * Set default values
387 */
388 #ifndef CONFIG_SYS_I2C_SPEED
389 #define CONFIG_SYS_I2C_SPEED 50000
390 #endif
391
392 void eeprom_init (void)
393 {
394
395 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
396 spi_init_f ();
397 #endif
398 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
399 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
400 #endif
401 }
402
403 /*-----------------------------------------------------------------------
404 */
405
406 /***************************************************/
407
408 #if defined(CONFIG_CMD_EEPROM)
409
410 #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
411 U_BOOT_CMD(
412 eeprom, 6, 1, do_eeprom,
413 "EEPROM sub-system",
414 "read devaddr addr off cnt\n"
415 "eeprom write devaddr addr off cnt\n"
416 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
417 )
418 #else /* One EEPROM */
419 U_BOOT_CMD(
420 eeprom, 5, 1, do_eeprom,
421 "EEPROM sub-system",
422 "read addr off cnt\n"
423 "eeprom write addr off cnt\n"
424 " - read/write `cnt' bytes at EEPROM offset `off'"
425 )
426 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
427
428 #endif
429