1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4  */
5 #ifndef K210_PLL_H
6 #define K210_PLL_H
7 
8 #include <clk.h>
9 #include <test/export.h>
10 #include <asm/io.h>
11 
12 #define K210_PLL_CLKR GENMASK(3, 0)
13 #define K210_PLL_CLKF GENMASK(9, 4)
14 #define K210_PLL_CLKOD GENMASK(13, 10) /* Output Divider */
15 #define K210_PLL_BWADJ GENMASK(19, 14) /* BandWidth Adjust */
16 #define K210_PLL_RESET BIT(20)
17 #define K210_PLL_PWRD BIT(21) /* PoWeReD */
18 #define K210_PLL_INTFB BIT(22) /* Internal FeedBack */
19 #define K210_PLL_BYPASS BIT(23)
20 #define K210_PLL_TEST BIT(24)
21 #define K210_PLL_EN BIT(25)
22 #define K210_PLL_TEST_EN BIT(26)
23 
24 #define K210_PLL_LOCK 0
25 #define K210_PLL_CLEAR_SLIP 2
26 #define K210_PLL_TEST_OUT 3
27 
28 struct k210_pll {
29 	struct clk clk;
30 	void __iomem *reg; /* Base PLL register */
31 	void __iomem *lock; /* Common PLL lock register */
32 	u8 shift; /* Offset of bits in lock register */
33 	u8 width; /* Width of lock bits to test against */
34 };
35 
36 #define to_k210_pll(_clk) container_of(_clk, struct k210_pll, clk)
37 
38 struct k210_pll_config {
39 	u8 r;
40 	u8 f;
41 	u8 od;
42 };
43 
44 #ifdef CONFIG_UNIT_TEST
45 TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
46 				     struct k210_pll_config *best);
47 
48 #ifndef nop
49 #define nop()
50 #endif
51 
52 #endif
53 
54 extern const struct clk_ops k210_pll_ops;
55 
56 struct clk *k210_register_pll_struct(const char *name, const char *parent_name,
57 				     struct k210_pll *pll);
58 #endif /* K210_PLL_H */
59