1 /** @file
2 *
3 * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
4 *
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
9 *
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 *
13 **/
14
15 #include <Library/IoLib.h>
16 #include <Library/ArmPlatformLib.h>
17 #include <Library/DebugLib.h>
18 #include <Library/PcdLib.h>
19
20 #include <Ppi/ArmMpCoreInfo.h>
21
22 #include <ArmPlatform.h>
23
24 UINTN
25 ArmGetCpuCountPerCluster (
26 VOID
27 );
28
29 ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
30 {
31 // Cluster 0, Core 0
32 0x0, 0x0,
33
34 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
35 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
36 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
37 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
38 (UINT64)0xFFFFFFFF
39 },
40 {
41 // Cluster 0, Core 1
42 0x0, 0x1,
43
44 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
45 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
46 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
47 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
48 (UINT64)0xFFFFFFFF
49 },
50 {
51 // Cluster 0, Core 2
52 0x0, 0x2,
53
54 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
55 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
56 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
57 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
58 (UINT64)0xFFFFFFFF
59 },
60 {
61 // Cluster 0, Core 3
62 0x0, 0x3,
63
64 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
65 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
66 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
67 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
68 (UINT64)0xFFFFFFFF
69 },
70 {
71 // Cluster 1, Core 0
72 0x1, 0x0,
73
74 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
75 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
76 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
77 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
78 (UINT64)0xFFFFFFFF
79 },
80 {
81 // Cluster 1, Core 1
82 0x1, 0x1,
83
84 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
85 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
86 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
87 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
88 (UINT64)0xFFFFFFFF
89 },
90 {
91 // Cluster 1, Core 2
92 0x1, 0x2,
93
94 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
95 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
96 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
97 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
98 (UINT64)0xFFFFFFFF
99 },
100 {
101 // Cluster 1, Core 3
102 0x1, 0x3,
103
104 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
105 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
106 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
107 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
108 (UINT64)0xFFFFFFFF
109 }
110 };
111
112 /**
113 Return the current Boot Mode
114
115 This function returns the boot reason on the platform
116
117 @return Return the current Boot Mode of the platform
118
119 **/
120 EFI_BOOT_MODE
ArmPlatformGetBootMode(VOID)121 ArmPlatformGetBootMode (
122 VOID
123 )
124 {
125 return BOOT_WITH_FULL_CONFIGURATION;
126 }
127
128 /**
129 Initialize controllers that must setup in the normal world
130
131 This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
132 in the PEI phase.
133
134 **/
135 RETURN_STATUS
ArmPlatformInitialize(IN UINTN MpId)136 ArmPlatformInitialize (
137 IN UINTN MpId
138 )
139 {
140 if (!ArmPlatformIsPrimaryCore (MpId)) {
141 return RETURN_SUCCESS;
142 }
143
144 // Disable memory remapping and return to normal mapping
145 MmioOr32 (SP810_CTRL_BASE, BIT8);
146
147 return RETURN_SUCCESS;
148 }
149
150 /**
151 Initialize the system (or sometimes called permanent) memory
152
153 This memory is generally represented by the DRAM.
154
155 **/
156 VOID
ArmPlatformInitializeSystemMemory(VOID)157 ArmPlatformInitializeSystemMemory (
158 VOID
159 )
160 {
161 // Nothing to do here
162 }
163
164 EFI_STATUS
PrePeiCoreGetMpCoreInfo(OUT UINTN * CoreCount,OUT ARM_CORE_INFO ** ArmCoreTable)165 PrePeiCoreGetMpCoreInfo (
166 OUT UINTN *CoreCount,
167 OUT ARM_CORE_INFO **ArmCoreTable
168 )
169 {
170 UINT32 ProcType;
171
172 ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
173 if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
174 // Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID.
175 *CoreCount = ArmGetCpuCountPerCluster ();
176 *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
177 return EFI_SUCCESS;
178 } else {
179 return EFI_UNSUPPORTED;
180 }
181 }
182
183 // Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
184 EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
185 ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
186
187 EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
188 {
189 EFI_PEI_PPI_DESCRIPTOR_PPI,
190 &mArmMpCoreInfoPpiGuid,
191 &mMpCoreInfoPpi
192 }
193 };
194
195 VOID
ArmPlatformGetPlatformPpiList(OUT UINTN * PpiListSize,OUT EFI_PEI_PPI_DESCRIPTOR ** PpiList)196 ArmPlatformGetPlatformPpiList (
197 OUT UINTN *PpiListSize,
198 OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
199 )
200 {
201 *PpiListSize = sizeof(gPlatformPpiTable);
202 *PpiList = gPlatformPpiTable;
203 }
204