1 /** @file 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014. 3 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> 5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR> 6 This program and the accompanying materials 7 are licensed and made available under the terms and conditions of the BSD License 8 which accompanies this distribution. The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 **/ 14 15 #ifndef _ACPI_5_1_H_ 16 #define _ACPI_5_1_H_ 17 18 #include <IndustryStandard/Acpi50.h> 19 20 // 21 // Ensure proper structure formats 22 // 23 #pragma pack(1) 24 25 /// 26 /// ACPI 5.1 Generic Address Space definition 27 /// 28 typedef struct { 29 UINT8 AddressSpaceId; 30 UINT8 RegisterBitWidth; 31 UINT8 RegisterBitOffset; 32 UINT8 AccessSize; 33 UINT64 Address; 34 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE; 35 36 // 37 // Generic Address Space Address IDs 38 // 39 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0 40 #define EFI_ACPI_5_1_SYSTEM_IO 1 41 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2 42 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3 43 #define EFI_ACPI_5_1_SMBUS 4 44 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A 45 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F 46 47 // 48 // Generic Address Space Access Sizes 49 // 50 #define EFI_ACPI_5_1_UNDEFINED 0 51 #define EFI_ACPI_5_1_BYTE 1 52 #define EFI_ACPI_5_1_WORD 2 53 #define EFI_ACPI_5_1_DWORD 3 54 #define EFI_ACPI_5_1_QWORD 4 55 56 // 57 // ACPI 5.1 table structures 58 // 59 60 /// 61 /// Root System Description Pointer Structure 62 /// 63 typedef struct { 64 UINT64 Signature; 65 UINT8 Checksum; 66 UINT8 OemId[6]; 67 UINT8 Revision; 68 UINT32 RsdtAddress; 69 UINT32 Length; 70 UINT64 XsdtAddress; 71 UINT8 ExtendedChecksum; 72 UINT8 Reserved[3]; 73 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER; 74 75 /// 76 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) 77 /// 78 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2 79 80 /// 81 /// Common table header, this prefaces all ACPI tables, including FACS, but 82 /// excluding the RSD PTR structure 83 /// 84 typedef struct { 85 UINT32 Signature; 86 UINT32 Length; 87 } EFI_ACPI_5_1_COMMON_HEADER; 88 89 // 90 // Root System Description Table 91 // No definition needed as it is a common description table header, the same with 92 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 93 // 94 95 /// 96 /// RSDT Revision (as defined in ACPI 5.1 spec.) 97 /// 98 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 99 100 // 101 // Extended System Description Table 102 // No definition needed as it is a common description table header, the same with 103 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 104 // 105 106 /// 107 /// XSDT Revision (as defined in ACPI 5.1 spec.) 108 /// 109 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 110 111 /// 112 /// Fixed ACPI Description Table Structure (FADT) 113 /// 114 typedef struct { 115 EFI_ACPI_DESCRIPTION_HEADER Header; 116 UINT32 FirmwareCtrl; 117 UINT32 Dsdt; 118 UINT8 Reserved0; 119 UINT8 PreferredPmProfile; 120 UINT16 SciInt; 121 UINT32 SmiCmd; 122 UINT8 AcpiEnable; 123 UINT8 AcpiDisable; 124 UINT8 S4BiosReq; 125 UINT8 PstateCnt; 126 UINT32 Pm1aEvtBlk; 127 UINT32 Pm1bEvtBlk; 128 UINT32 Pm1aCntBlk; 129 UINT32 Pm1bCntBlk; 130 UINT32 Pm2CntBlk; 131 UINT32 PmTmrBlk; 132 UINT32 Gpe0Blk; 133 UINT32 Gpe1Blk; 134 UINT8 Pm1EvtLen; 135 UINT8 Pm1CntLen; 136 UINT8 Pm2CntLen; 137 UINT8 PmTmrLen; 138 UINT8 Gpe0BlkLen; 139 UINT8 Gpe1BlkLen; 140 UINT8 Gpe1Base; 141 UINT8 CstCnt; 142 UINT16 PLvl2Lat; 143 UINT16 PLvl3Lat; 144 UINT16 FlushSize; 145 UINT16 FlushStride; 146 UINT8 DutyOffset; 147 UINT8 DutyWidth; 148 UINT8 DayAlrm; 149 UINT8 MonAlrm; 150 UINT8 Century; 151 UINT16 IaPcBootArch; 152 UINT8 Reserved1; 153 UINT32 Flags; 154 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; 155 UINT8 ResetValue; 156 UINT16 ArmBootArch; 157 UINT8 MinorVersion; 158 UINT64 XFirmwareCtrl; 159 UINT64 XDsdt; 160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 169 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 170 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE; 171 172 /// 173 /// FADT Version (as defined in ACPI 5.1 spec.) 174 /// 175 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 176 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01 177 178 // 179 // Fixed ACPI Description Table Preferred Power Management Profile 180 // 181 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0 182 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1 183 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2 184 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3 185 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4 186 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5 187 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6 188 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7 189 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8 190 191 // 192 // Fixed ACPI Description Table Boot Architecture Flags 193 // All other bits are reserved and must be set to 0. 194 // 195 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0 196 #define EFI_ACPI_5_1_8042 BIT1 197 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2 198 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3 199 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4 200 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5 201 202 // 203 // Fixed ACPI Description Table Arm Boot Architecture Flags 204 // All other bits are reserved and must be set to 0. 205 // 206 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0 207 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1 208 209 // 210 // Fixed ACPI Description Table Fixed Feature Flags 211 // All other bits are reserved and must be set to 0. 212 // 213 #define EFI_ACPI_5_1_WBINVD BIT0 214 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1 215 #define EFI_ACPI_5_1_PROC_C1 BIT2 216 #define EFI_ACPI_5_1_P_LVL2_UP BIT3 217 #define EFI_ACPI_5_1_PWR_BUTTON BIT4 218 #define EFI_ACPI_5_1_SLP_BUTTON BIT5 219 #define EFI_ACPI_5_1_FIX_RTC BIT6 220 #define EFI_ACPI_5_1_RTC_S4 BIT7 221 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8 222 #define EFI_ACPI_5_1_DCK_CAP BIT9 223 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10 224 #define EFI_ACPI_5_1_SEALED_CASE BIT11 225 #define EFI_ACPI_5_1_HEADLESS BIT12 226 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13 227 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14 228 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15 229 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16 230 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17 231 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18 232 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 233 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20 234 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21 235 236 /// 237 /// Firmware ACPI Control Structure 238 /// 239 typedef struct { 240 UINT32 Signature; 241 UINT32 Length; 242 UINT32 HardwareSignature; 243 UINT32 FirmwareWakingVector; 244 UINT32 GlobalLock; 245 UINT32 Flags; 246 UINT64 XFirmwareWakingVector; 247 UINT8 Version; 248 UINT8 Reserved0[3]; 249 UINT32 OspmFlags; 250 UINT8 Reserved1[24]; 251 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE; 252 253 /// 254 /// FACS Version (as defined in ACPI 5.1 spec.) 255 /// 256 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 257 258 /// 259 /// Firmware Control Structure Feature Flags 260 /// All other bits are reserved and must be set to 0. 261 /// 262 #define EFI_ACPI_5_1_S4BIOS_F BIT0 263 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1 264 265 /// 266 /// OSPM Enabled Firmware Control Structure Flags 267 /// All other bits are reserved and must be set to 0. 268 /// 269 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0 270 271 // 272 // Differentiated System Description Table, 273 // Secondary System Description Table 274 // and Persistent System Description Table, 275 // no definition needed as they are common description table header, the same with 276 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 277 // 278 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 279 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 280 281 /// 282 /// Multiple APIC Description Table header definition. The rest of the table 283 /// must be defined in a platform specific manner. 284 /// 285 typedef struct { 286 EFI_ACPI_DESCRIPTION_HEADER Header; 287 UINT32 LocalApicAddress; 288 UINT32 Flags; 289 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 290 291 /// 292 /// MADT Revision (as defined in ACPI 5.1 spec.) 293 /// 294 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 295 296 /// 297 /// Multiple APIC Flags 298 /// All other bits are reserved and must be set to 0. 299 /// 300 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0 301 302 // 303 // Multiple APIC Description Table APIC structure types 304 // All other values between 0x0D and 0x7F are reserved and 305 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 306 // 307 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00 308 #define EFI_ACPI_5_1_IO_APIC 0x01 309 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02 310 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03 311 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04 312 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 313 #define EFI_ACPI_5_1_IO_SAPIC 0x06 314 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07 315 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08 316 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09 317 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A 318 #define EFI_ACPI_5_1_GIC 0x0B 319 #define EFI_ACPI_5_1_GICD 0x0C 320 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D 321 #define EFI_ACPI_5_1_GICR 0x0E 322 323 // 324 // APIC Structure Definitions 325 // 326 327 /// 328 /// Processor Local APIC Structure Definition 329 /// 330 typedef struct { 331 UINT8 Type; 332 UINT8 Length; 333 UINT8 AcpiProcessorId; 334 UINT8 ApicId; 335 UINT32 Flags; 336 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE; 337 338 /// 339 /// Local APIC Flags. All other bits are reserved and must be 0. 340 /// 341 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0 342 343 /// 344 /// IO APIC Structure 345 /// 346 typedef struct { 347 UINT8 Type; 348 UINT8 Length; 349 UINT8 IoApicId; 350 UINT8 Reserved; 351 UINT32 IoApicAddress; 352 UINT32 GlobalSystemInterruptBase; 353 } EFI_ACPI_5_1_IO_APIC_STRUCTURE; 354 355 /// 356 /// Interrupt Source Override Structure 357 /// 358 typedef struct { 359 UINT8 Type; 360 UINT8 Length; 361 UINT8 Bus; 362 UINT8 Source; 363 UINT32 GlobalSystemInterrupt; 364 UINT16 Flags; 365 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 366 367 /// 368 /// Platform Interrupt Sources Structure Definition 369 /// 370 typedef struct { 371 UINT8 Type; 372 UINT8 Length; 373 UINT16 Flags; 374 UINT8 InterruptType; 375 UINT8 ProcessorId; 376 UINT8 ProcessorEid; 377 UINT8 IoSapicVector; 378 UINT32 GlobalSystemInterrupt; 379 UINT32 PlatformInterruptSourceFlags; 380 UINT8 CpeiProcessorOverride; 381 UINT8 Reserved[31]; 382 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE; 383 384 // 385 // MPS INTI flags. 386 // All other bits are reserved and must be set to 0. 387 // 388 #define EFI_ACPI_5_1_POLARITY (3 << 0) 389 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2) 390 391 /// 392 /// Non-Maskable Interrupt Source Structure 393 /// 394 typedef struct { 395 UINT8 Type; 396 UINT8 Length; 397 UINT16 Flags; 398 UINT32 GlobalSystemInterrupt; 399 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 400 401 /// 402 /// Local APIC NMI Structure 403 /// 404 typedef struct { 405 UINT8 Type; 406 UINT8 Length; 407 UINT8 AcpiProcessorId; 408 UINT16 Flags; 409 UINT8 LocalApicLint; 410 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE; 411 412 /// 413 /// Local APIC Address Override Structure 414 /// 415 typedef struct { 416 UINT8 Type; 417 UINT8 Length; 418 UINT16 Reserved; 419 UINT64 LocalApicAddress; 420 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 421 422 /// 423 /// IO SAPIC Structure 424 /// 425 typedef struct { 426 UINT8 Type; 427 UINT8 Length; 428 UINT8 IoApicId; 429 UINT8 Reserved; 430 UINT32 GlobalSystemInterruptBase; 431 UINT64 IoSapicAddress; 432 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE; 433 434 /// 435 /// Local SAPIC Structure 436 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 437 /// 438 typedef struct { 439 UINT8 Type; 440 UINT8 Length; 441 UINT8 AcpiProcessorId; 442 UINT8 LocalSapicId; 443 UINT8 LocalSapicEid; 444 UINT8 Reserved[3]; 445 UINT32 Flags; 446 UINT32 ACPIProcessorUIDValue; 447 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 448 449 /// 450 /// Platform Interrupt Sources Structure 451 /// 452 typedef struct { 453 UINT8 Type; 454 UINT8 Length; 455 UINT16 Flags; 456 UINT8 InterruptType; 457 UINT8 ProcessorId; 458 UINT8 ProcessorEid; 459 UINT8 IoSapicVector; 460 UINT32 GlobalSystemInterrupt; 461 UINT32 PlatformInterruptSourceFlags; 462 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 463 464 /// 465 /// Platform Interrupt Source Flags. 466 /// All other bits are reserved and must be set to 0. 467 /// 468 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0 469 470 /// 471 /// Processor Local x2APIC Structure Definition 472 /// 473 typedef struct { 474 UINT8 Type; 475 UINT8 Length; 476 UINT8 Reserved[2]; 477 UINT32 X2ApicId; 478 UINT32 Flags; 479 UINT32 AcpiProcessorUid; 480 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 481 482 /// 483 /// Local x2APIC NMI Structure 484 /// 485 typedef struct { 486 UINT8 Type; 487 UINT8 Length; 488 UINT16 Flags; 489 UINT32 AcpiProcessorUid; 490 UINT8 LocalX2ApicLint; 491 UINT8 Reserved[3]; 492 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE; 493 494 /// 495 /// GIC Structure 496 /// 497 typedef struct { 498 UINT8 Type; 499 UINT8 Length; 500 UINT16 Reserved; 501 UINT32 CPUInterfaceNumber; 502 UINT32 AcpiProcessorUid; 503 UINT32 Flags; 504 UINT32 ParkingProtocolVersion; 505 UINT32 PerformanceInterruptGsiv; 506 UINT64 ParkedAddress; 507 UINT64 PhysicalBaseAddress; 508 UINT64 GICV; 509 UINT64 GICH; 510 UINT32 VGICMaintenanceInterrupt; 511 UINT64 GICRBaseAddress; 512 UINT64 MPIDR; 513 } EFI_ACPI_5_1_GIC_STRUCTURE; 514 515 /// 516 /// GIC Flags. All other bits are reserved and must be 0. 517 /// 518 #define EFI_ACPI_5_1_GIC_ENABLED BIT0 519 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1 520 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 521 522 /// 523 /// GIC Distributor Structure 524 /// 525 typedef struct { 526 UINT8 Type; 527 UINT8 Length; 528 UINT16 Reserved1; 529 UINT32 GicId; 530 UINT64 PhysicalBaseAddress; 531 UINT32 SystemVectorBase; 532 UINT32 Reserved2; 533 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE; 534 535 /// 536 /// GIC MSI Frame Structure 537 /// 538 typedef struct { 539 UINT8 Type; 540 UINT8 Length; 541 UINT16 Reserved1; 542 UINT32 GicMsiFrameId; 543 UINT64 PhysicalBaseAddress; 544 UINT32 Flags; 545 UINT16 SPICount; 546 UINT16 SPIBase; 547 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE; 548 549 /// 550 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 551 /// 552 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0 553 554 /// 555 /// GICR Structure 556 /// 557 typedef struct { 558 UINT8 Type; 559 UINT8 Length; 560 UINT16 Reserved; 561 UINT64 DiscoveryRangeBaseAddress; 562 UINT32 DiscoveryRangeLength; 563 } EFI_ACPI_5_1_GICR_STRUCTURE; 564 565 /// 566 /// Smart Battery Description Table (SBST) 567 /// 568 typedef struct { 569 EFI_ACPI_DESCRIPTION_HEADER Header; 570 UINT32 WarningEnergyLevel; 571 UINT32 LowEnergyLevel; 572 UINT32 CriticalEnergyLevel; 573 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE; 574 575 /// 576 /// SBST Version (as defined in ACPI 5.1 spec.) 577 /// 578 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 579 580 /// 581 /// Embedded Controller Boot Resources Table (ECDT) 582 /// The table is followed by a null terminated ASCII string that contains 583 /// a fully qualified reference to the name space object. 584 /// 585 typedef struct { 586 EFI_ACPI_DESCRIPTION_HEADER Header; 587 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; 588 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; 589 UINT32 Uid; 590 UINT8 GpeBit; 591 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 592 593 /// 594 /// ECDT Version (as defined in ACPI 5.1 spec.) 595 /// 596 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 597 598 /// 599 /// System Resource Affinity Table (SRAT). The rest of the table 600 /// must be defined in a platform specific manner. 601 /// 602 typedef struct { 603 EFI_ACPI_DESCRIPTION_HEADER Header; 604 UINT32 Reserved1; ///< Must be set to 1 605 UINT64 Reserved2; 606 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 607 608 /// 609 /// SRAT Version (as defined in ACPI 5.1 spec.) 610 /// 611 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 612 613 // 614 // SRAT structure types. 615 // All other values between 0x04 an 0xFF are reserved and 616 // will be ignored by OSPM. 617 // 618 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 619 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01 620 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 621 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03 622 623 /// 624 /// Processor Local APIC/SAPIC Affinity Structure Definition 625 /// 626 typedef struct { 627 UINT8 Type; 628 UINT8 Length; 629 UINT8 ProximityDomain7To0; 630 UINT8 ApicId; 631 UINT32 Flags; 632 UINT8 LocalSapicEid; 633 UINT8 ProximityDomain31To8[3]; 634 UINT32 ClockDomain; 635 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 636 637 /// 638 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 639 /// 640 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 641 642 /// 643 /// Memory Affinity Structure Definition 644 /// 645 typedef struct { 646 UINT8 Type; 647 UINT8 Length; 648 UINT32 ProximityDomain; 649 UINT16 Reserved1; 650 UINT32 AddressBaseLow; 651 UINT32 AddressBaseHigh; 652 UINT32 LengthLow; 653 UINT32 LengthHigh; 654 UINT32 Reserved2; 655 UINT32 Flags; 656 UINT64 Reserved3; 657 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE; 658 659 // 660 // Memory Flags. All other bits are reserved and must be 0. 661 // 662 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0) 663 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1) 664 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2) 665 666 /// 667 /// Processor Local x2APIC Affinity Structure Definition 668 /// 669 typedef struct { 670 UINT8 Type; 671 UINT8 Length; 672 UINT8 Reserved1[2]; 673 UINT32 ProximityDomain; 674 UINT32 X2ApicId; 675 UINT32 Flags; 676 UINT32 ClockDomain; 677 UINT8 Reserved2[4]; 678 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 679 680 /// 681 /// GICC Affinity Structure Definition 682 /// 683 typedef struct { 684 UINT8 Type; 685 UINT8 Length; 686 UINT32 ProximityDomain; 687 UINT32 AcpiProcessorUid; 688 UINT32 Flags; 689 UINT32 ClockDomain; 690 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE; 691 692 /// 693 /// GICC Flags. All other bits are reserved and must be 0. 694 /// 695 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0) 696 697 /// 698 /// System Locality Distance Information Table (SLIT). 699 /// The rest of the table is a matrix. 700 /// 701 typedef struct { 702 EFI_ACPI_DESCRIPTION_HEADER Header; 703 UINT64 NumberOfSystemLocalities; 704 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 705 706 /// 707 /// SLIT Version (as defined in ACPI 5.1 spec.) 708 /// 709 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 710 711 /// 712 /// Corrected Platform Error Polling Table (CPEP) 713 /// 714 typedef struct { 715 EFI_ACPI_DESCRIPTION_HEADER Header; 716 UINT8 Reserved[8]; 717 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 718 719 /// 720 /// CPEP Version (as defined in ACPI 5.1 spec.) 721 /// 722 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 723 724 // 725 // CPEP processor structure types. 726 // 727 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00 728 729 /// 730 /// Corrected Platform Error Polling Processor Structure Definition 731 /// 732 typedef struct { 733 UINT8 Type; 734 UINT8 Length; 735 UINT8 ProcessorId; 736 UINT8 ProcessorEid; 737 UINT32 PollingInterval; 738 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 739 740 /// 741 /// Maximum System Characteristics Table (MSCT) 742 /// 743 typedef struct { 744 EFI_ACPI_DESCRIPTION_HEADER Header; 745 UINT32 OffsetProxDomInfo; 746 UINT32 MaximumNumberOfProximityDomains; 747 UINT32 MaximumNumberOfClockDomains; 748 UINT64 MaximumPhysicalAddress; 749 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 750 751 /// 752 /// MSCT Version (as defined in ACPI 5.1 spec.) 753 /// 754 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 755 756 /// 757 /// Maximum Proximity Domain Information Structure Definition 758 /// 759 typedef struct { 760 UINT8 Revision; 761 UINT8 Length; 762 UINT32 ProximityDomainRangeLow; 763 UINT32 ProximityDomainRangeHigh; 764 UINT32 MaximumProcessorCapacity; 765 UINT64 MaximumMemoryCapacity; 766 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 767 768 /// 769 /// ACPI RAS Feature Table definition. 770 /// 771 typedef struct { 772 EFI_ACPI_DESCRIPTION_HEADER Header; 773 UINT8 PlatformCommunicationChannelIdentifier[12]; 774 } EFI_ACPI_5_1_RAS_FEATURE_TABLE; 775 776 /// 777 /// RASF Version (as defined in ACPI 5.1 spec.) 778 /// 779 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01 780 781 /// 782 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 783 /// 784 typedef struct { 785 UINT32 Signature; 786 UINT16 Command; 787 UINT16 Status; 788 UINT16 Version; 789 UINT8 RASCapabilities[16]; 790 UINT8 SetRASCapabilities[16]; 791 UINT16 NumberOfRASFParameterBlocks; 792 UINT32 SetRASCapabilitiesStatus; 793 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 794 795 /// 796 /// ACPI RASF PCC command code 797 /// 798 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 799 800 /// 801 /// ACPI RASF Platform RAS Capabilities 802 /// 803 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 804 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 805 806 /// 807 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 808 /// 809 typedef struct { 810 UINT16 Type; 811 UINT16 Version; 812 UINT16 Length; 813 UINT16 PatrolScrubCommand; 814 UINT64 RequestedAddressRange[2]; 815 UINT64 ActualAddressRange[2]; 816 UINT16 Flags; 817 UINT8 RequestedSpeed; 818 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 819 820 /// 821 /// ACPI RASF Patrol Scrub command 822 /// 823 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 824 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 825 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 826 827 /// 828 /// Memory Power State Table definition. 829 /// 830 typedef struct { 831 EFI_ACPI_DESCRIPTION_HEADER Header; 832 UINT8 PlatformCommunicationChannelIdentifier; 833 UINT8 Reserved[3]; 834 // Memory Power Node Structure 835 // Memory Power State Characteristics 836 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE; 837 838 /// 839 /// MPST Version (as defined in ACPI 5.1 spec.) 840 /// 841 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01 842 843 /// 844 /// MPST Platform Communication Channel Shared Memory Region definition. 845 /// 846 typedef struct { 847 UINT32 Signature; 848 UINT16 Command; 849 UINT16 Status; 850 UINT32 MemoryPowerCommandRegister; 851 UINT32 MemoryPowerStatusRegister; 852 UINT32 PowerStateId; 853 UINT32 MemoryPowerNodeId; 854 UINT64 MemoryEnergyConsumed; 855 UINT64 ExpectedAveragePowerComsuned; 856 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 857 858 /// 859 /// ACPI MPST PCC command code 860 /// 861 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 862 863 /// 864 /// ACPI MPST Memory Power command 865 /// 866 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 867 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 868 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 869 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 870 871 /// 872 /// MPST Memory Power Node Table 873 /// 874 typedef struct { 875 UINT8 PowerStateValue; 876 UINT8 PowerStateInformationIndex; 877 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE; 878 879 typedef struct { 880 UINT8 Flag; 881 UINT8 Reserved; 882 UINT16 MemoryPowerNodeId; 883 UINT32 Length; 884 UINT64 AddressBase; 885 UINT64 AddressLength; 886 UINT32 NumberOfPowerStates; 887 UINT32 NumberOfPhysicalComponents; 888 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 889 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 890 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE; 891 892 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 893 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 894 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 895 896 typedef struct { 897 UINT16 MemoryPowerNodeCount; 898 UINT8 Reserved[2]; 899 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE; 900 901 /// 902 /// MPST Memory Power State Characteristics Table 903 /// 904 typedef struct { 905 UINT8 PowerStateStructureID; 906 UINT8 Flag; 907 UINT16 Reserved; 908 UINT32 AveragePowerConsumedInMPS0; 909 UINT32 RelativePowerSavingToMPS0; 910 UINT64 ExitLatencyToMPS0; 911 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 912 913 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 914 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 915 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 916 917 typedef struct { 918 UINT16 MemoryPowerStateCharacteristicsCount; 919 UINT8 Reserved[2]; 920 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 921 922 /// 923 /// Memory Topology Table definition. 924 /// 925 typedef struct { 926 EFI_ACPI_DESCRIPTION_HEADER Header; 927 UINT32 Reserved; 928 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE; 929 930 /// 931 /// PMTT Version (as defined in ACPI 5.1 spec.) 932 /// 933 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 934 935 /// 936 /// Common Memory Aggregator Device Structure. 937 /// 938 typedef struct { 939 UINT8 Type; 940 UINT8 Reserved; 941 UINT16 Length; 942 UINT16 Flags; 943 UINT16 Reserved1; 944 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 945 946 /// 947 /// Memory Aggregator Device Type 948 /// 949 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1 950 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2 951 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3 952 953 /// 954 /// Socket Memory Aggregator Device Structure. 955 /// 956 typedef struct { 957 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 958 UINT16 SocketIdentifier; 959 UINT16 Reserved; 960 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 961 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 962 963 /// 964 /// MemoryController Memory Aggregator Device Structure. 965 /// 966 typedef struct { 967 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 968 UINT32 ReadLatency; 969 UINT32 WriteLatency; 970 UINT32 ReadBandwidth; 971 UINT32 WriteBandwidth; 972 UINT16 OptimalAccessUnit; 973 UINT16 OptimalAccessAlignment; 974 UINT16 Reserved; 975 UINT16 NumberOfProximityDomains; 976 //UINT32 ProximityDomain[NumberOfProximityDomains]; 977 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 978 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 979 980 /// 981 /// DIMM Memory Aggregator Device Structure. 982 /// 983 typedef struct { 984 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 985 UINT16 PhysicalComponentIdentifier; 986 UINT16 Reserved; 987 UINT32 SizeOfDimm; 988 UINT32 SmbiosHandle; 989 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 990 991 /// 992 /// Boot Graphics Resource Table definition. 993 /// 994 typedef struct { 995 EFI_ACPI_DESCRIPTION_HEADER Header; 996 /// 997 /// 2-bytes (16 bit) version ID. This value must be 1. 998 /// 999 UINT16 Version; 1000 /// 1001 /// 1-byte status field indicating current status about the table. 1002 /// Bits[7:1] = Reserved (must be zero) 1003 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1004 /// 1005 UINT8 Status; 1006 /// 1007 /// 1-byte enumerated type field indicating format of the image. 1008 /// 0 = Bitmap 1009 /// 1 - 255 Reserved (for future use) 1010 /// 1011 UINT8 ImageType; 1012 /// 1013 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1014 /// of the image bitmap. 1015 /// 1016 UINT64 ImageAddress; 1017 /// 1018 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1019 /// (X, Y) display offset of the top left corner of the boot image. 1020 /// The top left corner of the display is at offset (0, 0). 1021 /// 1022 UINT32 ImageOffsetX; 1023 /// 1024 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1025 /// (X, Y) display offset of the top left corner of the boot image. 1026 /// The top left corner of the display is at offset (0, 0). 1027 /// 1028 UINT32 ImageOffsetY; 1029 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE; 1030 1031 /// 1032 /// BGRT Revision 1033 /// 1034 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1035 1036 /// 1037 /// BGRT Version 1038 /// 1039 #define EFI_ACPI_5_1_BGRT_VERSION 0x01 1040 1041 /// 1042 /// BGRT Status 1043 /// 1044 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00 1045 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01 1046 1047 /// 1048 /// BGRT Image Type 1049 /// 1050 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00 1051 1052 /// 1053 /// FPDT Version (as defined in ACPI 5.1 spec.) 1054 /// 1055 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1056 1057 /// 1058 /// FPDT Performance Record Types 1059 /// 1060 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1061 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1062 1063 /// 1064 /// FPDT Performance Record Revision 1065 /// 1066 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1067 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1068 1069 /// 1070 /// FPDT Runtime Performance Record Types 1071 /// 1072 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1073 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1074 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1075 1076 /// 1077 /// FPDT Runtime Performance Record Revision 1078 /// 1079 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1080 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1081 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1082 1083 /// 1084 /// FPDT Performance Record header 1085 /// 1086 typedef struct { 1087 UINT16 Type; 1088 UINT8 Length; 1089 UINT8 Revision; 1090 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER; 1091 1092 /// 1093 /// FPDT Performance Table header 1094 /// 1095 typedef struct { 1096 UINT32 Signature; 1097 UINT32 Length; 1098 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER; 1099 1100 /// 1101 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1102 /// 1103 typedef struct { 1104 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1105 UINT32 Reserved; 1106 /// 1107 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1108 /// 1109 UINT64 BootPerformanceTablePointer; 1110 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1111 1112 /// 1113 /// FPDT S3 Performance Table Pointer Record Structure 1114 /// 1115 typedef struct { 1116 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1117 UINT32 Reserved; 1118 /// 1119 /// 64-bit processor-relative physical address of the S3 Performance Table. 1120 /// 1121 UINT64 S3PerformanceTablePointer; 1122 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1123 1124 /// 1125 /// FPDT Firmware Basic Boot Performance Record Structure 1126 /// 1127 typedef struct { 1128 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1129 UINT32 Reserved; 1130 /// 1131 /// Timer value logged at the beginning of firmware image execution. 1132 /// This may not always be zero or near zero. 1133 /// 1134 UINT64 ResetEnd; 1135 /// 1136 /// Timer value logged just prior to loading the OS boot loader into memory. 1137 /// For non-UEFI compatible boots, this field must be zero. 1138 /// 1139 UINT64 OsLoaderLoadImageStart; 1140 /// 1141 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1142 /// For non-UEFI compatible boots, the timer value logged will be just prior 1143 /// to the INT 19h handler invocation. 1144 /// 1145 UINT64 OsLoaderStartImageStart; 1146 /// 1147 /// Timer value logged at the point when the OS loader calls the 1148 /// ExitBootServices function for UEFI compatible firmware. 1149 /// For non-UEFI compatible boots, this field must be zero. 1150 /// 1151 UINT64 ExitBootServicesEntry; 1152 /// 1153 /// Timer value logged at the point just prior towhen the OS loader gaining 1154 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1155 /// For non-UEFI compatible boots, this field must be zero. 1156 /// 1157 UINT64 ExitBootServicesExit; 1158 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1159 1160 /// 1161 /// FPDT Firmware Basic Boot Performance Table signature 1162 /// 1163 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1164 1165 // 1166 // FPDT Firmware Basic Boot Performance Table 1167 // 1168 typedef struct { 1169 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1170 // 1171 // one or more Performance Records. 1172 // 1173 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1174 1175 /// 1176 /// FPDT "S3PT" S3 Performance Table 1177 /// 1178 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1179 1180 // 1181 // FPDT Firmware S3 Boot Performance Table 1182 // 1183 typedef struct { 1184 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 1185 // 1186 // one or more Performance Records. 1187 // 1188 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE; 1189 1190 /// 1191 /// FPDT Basic S3 Resume Performance Record 1192 /// 1193 typedef struct { 1194 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1195 /// 1196 /// A count of the number of S3 resume cycles since the last full boot sequence. 1197 /// 1198 UINT32 ResumeCount; 1199 /// 1200 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1201 /// OS waking vector. Only the most recent resume cycle's time is retained. 1202 /// 1203 UINT64 FullResume; 1204 /// 1205 /// Average timer value of all resume cycles logged since the last full boot 1206 /// sequence, including the most recent resume. Note that the entire log of 1207 /// timer values does not need to be retained in order to calculate this average. 1208 /// 1209 UINT64 AverageResume; 1210 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD; 1211 1212 /// 1213 /// FPDT Basic S3 Suspend Performance Record 1214 /// 1215 typedef struct { 1216 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 1217 /// 1218 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1219 /// Only the most recent suspend cycle's timer value is retained. 1220 /// 1221 UINT64 SuspendStart; 1222 /// 1223 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1224 /// mechanism) used to trigger hardware entry to S3. 1225 /// Only the most recent suspend cycle's timer value is retained. 1226 /// 1227 UINT64 SuspendEnd; 1228 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD; 1229 1230 /// 1231 /// Firmware Performance Record Table definition. 1232 /// 1233 typedef struct { 1234 EFI_ACPI_DESCRIPTION_HEADER Header; 1235 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1236 1237 /// 1238 /// Generic Timer Description Table definition. 1239 /// 1240 typedef struct { 1241 EFI_ACPI_DESCRIPTION_HEADER Header; 1242 UINT64 CntControlBasePhysicalAddress; 1243 UINT32 Reserved; 1244 UINT32 SecurePL1TimerGSIV; 1245 UINT32 SecurePL1TimerFlags; 1246 UINT32 NonSecurePL1TimerGSIV; 1247 UINT32 NonSecurePL1TimerFlags; 1248 UINT32 VirtualTimerGSIV; 1249 UINT32 VirtualTimerFlags; 1250 UINT32 NonSecurePL2TimerGSIV; 1251 UINT32 NonSecurePL2TimerFlags; 1252 UINT64 CntReadBasePhysicalAddress; 1253 UINT32 PlatformTimerCount; 1254 UINT32 PlatformTimerOffset; 1255 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE; 1256 1257 /// 1258 /// GTDT Version (as defined in ACPI 5.1 spec.) 1259 /// 1260 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 1261 1262 /// 1263 /// Timer Flags. All other bits are reserved and must be 0. 1264 /// 1265 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1266 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1267 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1268 1269 /// 1270 /// Platform Timer Type 1271 /// 1272 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0 1273 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1 1274 1275 /// 1276 /// GT Block Structure 1277 /// 1278 typedef struct { 1279 UINT8 Type; 1280 UINT16 Length; 1281 UINT8 Reserved; 1282 UINT64 CntCtlBase; 1283 UINT32 GTBlockTimerCount; 1284 UINT32 GTBlockTimerOffset; 1285 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE; 1286 1287 /// 1288 /// GT Block Timer Structure 1289 /// 1290 typedef struct { 1291 UINT8 GTFrameNumber; 1292 UINT8 Reserved[3]; 1293 UINT64 CntBaseX; 1294 UINT64 CntEL0BaseX; 1295 UINT32 GTxPhysicalTimerGSIV; 1296 UINT32 GTxPhysicalTimerFlags; 1297 UINT32 GTxVirtualTimerGSIV; 1298 UINT32 GTxVirtualTimerFlags; 1299 UINT32 GTxCommonFlags; 1300 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1301 1302 /// 1303 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1304 /// 1305 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1306 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1307 1308 /// 1309 /// Common Flags Flags. All other bits are reserved and must be 0. 1310 /// 1311 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1312 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1313 1314 /// 1315 /// SBSA Generic Watchdog Structure 1316 /// 1317 typedef struct { 1318 UINT8 Type; 1319 UINT16 Length; 1320 UINT8 Reserved; 1321 UINT64 RefreshFramePhysicalAddress; 1322 UINT64 WatchdogControlFramePhysicalAddress; 1323 UINT32 WatchdogTimerGSIV; 1324 UINT32 WatchdogTimerFlags; 1325 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1326 1327 /// 1328 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1329 /// 1330 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1331 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1332 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1333 1334 /// 1335 /// Boot Error Record Table (BERT) 1336 /// 1337 typedef struct { 1338 EFI_ACPI_DESCRIPTION_HEADER Header; 1339 UINT32 BootErrorRegionLength; 1340 UINT64 BootErrorRegion; 1341 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER; 1342 1343 /// 1344 /// BERT Version (as defined in ACPI 5.1 spec.) 1345 /// 1346 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1347 1348 /// 1349 /// Boot Error Region Block Status Definition 1350 /// 1351 typedef struct { 1352 UINT32 UncorrectableErrorValid:1; 1353 UINT32 CorrectableErrorValid:1; 1354 UINT32 MultipleUncorrectableErrors:1; 1355 UINT32 MultipleCorrectableErrors:1; 1356 UINT32 ErrorDataEntryCount:10; 1357 UINT32 Reserved:18; 1358 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS; 1359 1360 /// 1361 /// Boot Error Region Definition 1362 /// 1363 typedef struct { 1364 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1365 UINT32 RawDataOffset; 1366 UINT32 RawDataLength; 1367 UINT32 DataLength; 1368 UINT32 ErrorSeverity; 1369 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE; 1370 1371 // 1372 // Boot Error Severity types 1373 // 1374 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00 1375 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01 1376 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02 1377 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03 1378 1379 /// 1380 /// Generic Error Data Entry Definition 1381 /// 1382 typedef struct { 1383 UINT8 SectionType[16]; 1384 UINT32 ErrorSeverity; 1385 UINT16 Revision; 1386 UINT8 ValidationBits; 1387 UINT8 Flags; 1388 UINT32 ErrorDataLength; 1389 UINT8 FruId[16]; 1390 UINT8 FruText[20]; 1391 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1392 1393 /// 1394 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) 1395 /// 1396 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 1397 1398 /// 1399 /// HEST - Hardware Error Source Table 1400 /// 1401 typedef struct { 1402 EFI_ACPI_DESCRIPTION_HEADER Header; 1403 UINT32 ErrorSourceCount; 1404 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1405 1406 /// 1407 /// HEST Version (as defined in ACPI 5.1 spec.) 1408 /// 1409 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1410 1411 // 1412 // Error Source structure types. 1413 // 1414 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1415 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1416 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02 1417 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06 1418 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07 1419 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08 1420 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09 1421 1422 // 1423 // Error Source structure flags. 1424 // 1425 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1426 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1427 1428 /// 1429 /// IA-32 Architecture Machine Check Exception Structure Definition 1430 /// 1431 typedef struct { 1432 UINT16 Type; 1433 UINT16 SourceId; 1434 UINT8 Reserved0[2]; 1435 UINT8 Flags; 1436 UINT8 Enabled; 1437 UINT32 NumberOfRecordsToPreAllocate; 1438 UINT32 MaxSectionsPerRecord; 1439 UINT64 GlobalCapabilityInitData; 1440 UINT64 GlobalControlInitData; 1441 UINT8 NumberOfHardwareBanks; 1442 UINT8 Reserved1[7]; 1443 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1444 1445 /// 1446 /// IA-32 Architecture Machine Check Bank Structure Definition 1447 /// 1448 typedef struct { 1449 UINT8 BankNumber; 1450 UINT8 ClearStatusOnInitialization; 1451 UINT8 StatusDataFormat; 1452 UINT8 Reserved0; 1453 UINT32 ControlRegisterMsrAddress; 1454 UINT64 ControlInitData; 1455 UINT32 StatusRegisterMsrAddress; 1456 UINT32 AddressRegisterMsrAddress; 1457 UINT32 MiscRegisterMsrAddress; 1458 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1459 1460 /// 1461 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1462 /// 1463 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1464 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1465 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1466 1467 // 1468 // Hardware Error Notification types. All other values are reserved 1469 // 1470 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1471 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1472 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1473 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1474 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1475 1476 /// 1477 /// Hardware Error Notification Configuration Write Enable Structure Definition 1478 /// 1479 typedef struct { 1480 UINT16 Type:1; 1481 UINT16 PollInterval:1; 1482 UINT16 SwitchToPollingThresholdValue:1; 1483 UINT16 SwitchToPollingThresholdWindow:1; 1484 UINT16 ErrorThresholdValue:1; 1485 UINT16 ErrorThresholdWindow:1; 1486 UINT16 Reserved:10; 1487 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1488 1489 /// 1490 /// Hardware Error Notification Structure Definition 1491 /// 1492 typedef struct { 1493 UINT8 Type; 1494 UINT8 Length; 1495 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1496 UINT32 PollInterval; 1497 UINT32 Vector; 1498 UINT32 SwitchToPollingThresholdValue; 1499 UINT32 SwitchToPollingThresholdWindow; 1500 UINT32 ErrorThresholdValue; 1501 UINT32 ErrorThresholdWindow; 1502 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1503 1504 /// 1505 /// IA-32 Architecture Corrected Machine Check Structure Definition 1506 /// 1507 typedef struct { 1508 UINT16 Type; 1509 UINT16 SourceId; 1510 UINT8 Reserved0[2]; 1511 UINT8 Flags; 1512 UINT8 Enabled; 1513 UINT32 NumberOfRecordsToPreAllocate; 1514 UINT32 MaxSectionsPerRecord; 1515 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1516 UINT8 NumberOfHardwareBanks; 1517 UINT8 Reserved1[3]; 1518 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1519 1520 /// 1521 /// IA-32 Architecture NMI Error Structure Definition 1522 /// 1523 typedef struct { 1524 UINT16 Type; 1525 UINT16 SourceId; 1526 UINT8 Reserved0[2]; 1527 UINT32 NumberOfRecordsToPreAllocate; 1528 UINT32 MaxSectionsPerRecord; 1529 UINT32 MaxRawDataLength; 1530 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1531 1532 /// 1533 /// PCI Express Root Port AER Structure Definition 1534 /// 1535 typedef struct { 1536 UINT16 Type; 1537 UINT16 SourceId; 1538 UINT8 Reserved0[2]; 1539 UINT8 Flags; 1540 UINT8 Enabled; 1541 UINT32 NumberOfRecordsToPreAllocate; 1542 UINT32 MaxSectionsPerRecord; 1543 UINT32 Bus; 1544 UINT16 Device; 1545 UINT16 Function; 1546 UINT16 DeviceControl; 1547 UINT8 Reserved1[2]; 1548 UINT32 UncorrectableErrorMask; 1549 UINT32 UncorrectableErrorSeverity; 1550 UINT32 CorrectableErrorMask; 1551 UINT32 AdvancedErrorCapabilitiesAndControl; 1552 UINT32 RootErrorCommand; 1553 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1554 1555 /// 1556 /// PCI Express Device AER Structure Definition 1557 /// 1558 typedef struct { 1559 UINT16 Type; 1560 UINT16 SourceId; 1561 UINT8 Reserved0[2]; 1562 UINT8 Flags; 1563 UINT8 Enabled; 1564 UINT32 NumberOfRecordsToPreAllocate; 1565 UINT32 MaxSectionsPerRecord; 1566 UINT32 Bus; 1567 UINT16 Device; 1568 UINT16 Function; 1569 UINT16 DeviceControl; 1570 UINT8 Reserved1[2]; 1571 UINT32 UncorrectableErrorMask; 1572 UINT32 UncorrectableErrorSeverity; 1573 UINT32 CorrectableErrorMask; 1574 UINT32 AdvancedErrorCapabilitiesAndControl; 1575 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1576 1577 /// 1578 /// PCI Express Bridge AER Structure Definition 1579 /// 1580 typedef struct { 1581 UINT16 Type; 1582 UINT16 SourceId; 1583 UINT8 Reserved0[2]; 1584 UINT8 Flags; 1585 UINT8 Enabled; 1586 UINT32 NumberOfRecordsToPreAllocate; 1587 UINT32 MaxSectionsPerRecord; 1588 UINT32 Bus; 1589 UINT16 Device; 1590 UINT16 Function; 1591 UINT16 DeviceControl; 1592 UINT8 Reserved1[2]; 1593 UINT32 UncorrectableErrorMask; 1594 UINT32 UncorrectableErrorSeverity; 1595 UINT32 CorrectableErrorMask; 1596 UINT32 AdvancedErrorCapabilitiesAndControl; 1597 UINT32 SecondaryUncorrectableErrorMask; 1598 UINT32 SecondaryUncorrectableErrorSeverity; 1599 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1600 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1601 1602 /// 1603 /// Generic Hardware Error Source Structure Definition 1604 /// 1605 typedef struct { 1606 UINT16 Type; 1607 UINT16 SourceId; 1608 UINT16 RelatedSourceId; 1609 UINT8 Flags; 1610 UINT8 Enabled; 1611 UINT32 NumberOfRecordsToPreAllocate; 1612 UINT32 MaxSectionsPerRecord; 1613 UINT32 MaxRawDataLength; 1614 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1615 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1616 UINT32 ErrorStatusBlockLength; 1617 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1618 1619 /// 1620 /// Generic Error Status Definition 1621 /// 1622 typedef struct { 1623 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1624 UINT32 RawDataOffset; 1625 UINT32 RawDataLength; 1626 UINT32 DataLength; 1627 UINT32 ErrorSeverity; 1628 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE; 1629 1630 /// 1631 /// ERST - Error Record Serialization Table 1632 /// 1633 typedef struct { 1634 EFI_ACPI_DESCRIPTION_HEADER Header; 1635 UINT32 SerializationHeaderSize; 1636 UINT8 Reserved0[4]; 1637 UINT32 InstructionEntryCount; 1638 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 1639 1640 /// 1641 /// ERST Version (as defined in ACPI 5.1 spec.) 1642 /// 1643 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 1644 1645 /// 1646 /// ERST Serialization Actions 1647 /// 1648 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00 1649 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01 1650 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02 1651 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03 1652 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04 1653 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05 1654 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06 1655 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07 1656 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08 1657 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09 1658 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A 1659 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 1660 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 1661 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 1662 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 1663 1664 /// 1665 /// ERST Action Command Status 1666 /// 1667 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00 1668 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 1669 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 1670 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03 1671 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04 1672 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05 1673 1674 /// 1675 /// ERST Serialization Instructions 1676 /// 1677 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00 1678 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01 1679 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02 1680 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03 1681 #define EFI_ACPI_5_1_ERST_NOOP 0x04 1682 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05 1683 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06 1684 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07 1685 #define EFI_ACPI_5_1_ERST_ADD 0x08 1686 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09 1687 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A 1688 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B 1689 #define EFI_ACPI_5_1_ERST_STALL 0x0C 1690 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D 1691 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1692 #define EFI_ACPI_5_1_ERST_GOTO 0x0F 1693 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10 1694 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11 1695 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12 1696 1697 /// 1698 /// ERST Instruction Flags 1699 /// 1700 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01 1701 1702 /// 1703 /// ERST Serialization Instruction Entry 1704 /// 1705 typedef struct { 1706 UINT8 SerializationAction; 1707 UINT8 Instruction; 1708 UINT8 Flags; 1709 UINT8 Reserved0; 1710 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1711 UINT64 Value; 1712 UINT64 Mask; 1713 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1714 1715 /// 1716 /// EINJ - Error Injection Table 1717 /// 1718 typedef struct { 1719 EFI_ACPI_DESCRIPTION_HEADER Header; 1720 UINT32 InjectionHeaderSize; 1721 UINT8 InjectionFlags; 1722 UINT8 Reserved0[3]; 1723 UINT32 InjectionEntryCount; 1724 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER; 1725 1726 /// 1727 /// EINJ Version (as defined in ACPI 5.1 spec.) 1728 /// 1729 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01 1730 1731 /// 1732 /// EINJ Error Injection Actions 1733 /// 1734 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00 1735 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1736 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02 1737 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03 1738 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04 1739 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05 1740 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06 1741 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07 1742 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF 1743 1744 /// 1745 /// EINJ Action Command Status 1746 /// 1747 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00 1748 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1749 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02 1750 1751 /// 1752 /// EINJ Error Type Definition 1753 /// 1754 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1755 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1756 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1757 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1758 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1759 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1760 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1761 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1762 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1763 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1764 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1765 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1766 1767 /// 1768 /// EINJ Injection Instructions 1769 /// 1770 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00 1771 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01 1772 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02 1773 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03 1774 #define EFI_ACPI_5_1_EINJ_NOOP 0x04 1775 1776 /// 1777 /// EINJ Instruction Flags 1778 /// 1779 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01 1780 1781 /// 1782 /// EINJ Injection Instruction Entry 1783 /// 1784 typedef struct { 1785 UINT8 InjectionAction; 1786 UINT8 Instruction; 1787 UINT8 Flags; 1788 UINT8 Reserved0; 1789 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1790 UINT64 Value; 1791 UINT64 Mask; 1792 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY; 1793 1794 /// 1795 /// EINJ Trigger Action Table 1796 /// 1797 typedef struct { 1798 UINT32 HeaderSize; 1799 UINT32 Revision; 1800 UINT32 TableSize; 1801 UINT32 EntryCount; 1802 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE; 1803 1804 /// 1805 /// Platform Communications Channel Table (PCCT) 1806 /// 1807 typedef struct { 1808 EFI_ACPI_DESCRIPTION_HEADER Header; 1809 UINT32 Flags; 1810 UINT64 Reserved; 1811 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 1812 1813 /// 1814 /// PCCT Version (as defined in ACPI 5.1 spec.) 1815 /// 1816 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 1817 1818 /// 1819 /// PCCT Global Flags 1820 /// 1821 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0 1822 1823 // 1824 // PCCT Subspace type 1825 // 1826 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00 1827 1828 /// 1829 /// PCC Subspace Structure Header 1830 /// 1831 typedef struct { 1832 UINT8 Type; 1833 UINT8 Length; 1834 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER; 1835 1836 /// 1837 /// Generic Communications Subspace Structure 1838 /// 1839 typedef struct { 1840 UINT8 Type; 1841 UINT8 Length; 1842 UINT8 Reserved[6]; 1843 UINT64 BaseAddress; 1844 UINT64 AddressLength; 1845 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1846 UINT64 DoorbellPreserve; 1847 UINT64 DoorbellWrite; 1848 UINT32 NominalLatency; 1849 UINT32 MaximumPeriodicAccessRate; 1850 UINT16 MinimumRequestTurnaroundTime; 1851 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC; 1852 1853 /// 1854 /// Generic Communications Channel Shared Memory Region 1855 /// 1856 1857 typedef struct { 1858 UINT8 Command; 1859 UINT8 Reserved:7; 1860 UINT8 GenerateSci:1; 1861 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 1862 1863 typedef struct { 1864 UINT8 CommandComplete:1; 1865 UINT8 SciDoorbell:1; 1866 UINT8 Error:1; 1867 UINT8 PlatformNotification:1; 1868 UINT8 Reserved:4; 1869 UINT8 Reserved1; 1870 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 1871 1872 typedef struct { 1873 UINT32 Signature; 1874 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1875 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1876 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 1877 1878 // 1879 // Known table signatures 1880 // 1881 1882 /// 1883 /// "RSD PTR " Root System Description Pointer 1884 /// 1885 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1886 1887 /// 1888 /// "APIC" Multiple APIC Description Table 1889 /// 1890 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1891 1892 /// 1893 /// "BERT" Boot Error Record Table 1894 /// 1895 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1896 1897 /// 1898 /// "BGRT" Boot Graphics Resource Table 1899 /// 1900 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 1901 1902 /// 1903 /// "CPEP" Corrected Platform Error Polling Table 1904 /// 1905 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1906 1907 /// 1908 /// "DSDT" Differentiated System Description Table 1909 /// 1910 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1911 1912 /// 1913 /// "ECDT" Embedded Controller Boot Resources Table 1914 /// 1915 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1916 1917 /// 1918 /// "EINJ" Error Injection Table 1919 /// 1920 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1921 1922 /// 1923 /// "ERST" Error Record Serialization Table 1924 /// 1925 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1926 1927 /// 1928 /// "FACP" Fixed ACPI Description Table 1929 /// 1930 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1931 1932 /// 1933 /// "FACS" Firmware ACPI Control Structure 1934 /// 1935 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1936 1937 /// 1938 /// "FPDT" Firmware Performance Data Table 1939 /// 1940 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 1941 1942 /// 1943 /// "GTDT" Generic Timer Description Table 1944 /// 1945 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 1946 1947 /// 1948 /// "HEST" Hardware Error Source Table 1949 /// 1950 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1951 1952 /// 1953 /// "MPST" Memory Power State Table 1954 /// 1955 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 1956 1957 /// 1958 /// "MSCT" Maximum System Characteristics Table 1959 /// 1960 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1961 1962 /// 1963 /// "PMTT" Platform Memory Topology Table 1964 /// 1965 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 1966 1967 /// 1968 /// "PSDT" Persistent System Description Table 1969 /// 1970 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1971 1972 /// 1973 /// "RASF" ACPI RAS Feature Table 1974 /// 1975 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 1976 1977 /// 1978 /// "RSDT" Root System Description Table 1979 /// 1980 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 1981 1982 /// 1983 /// "SBST" Smart Battery Specification Table 1984 /// 1985 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 1986 1987 /// 1988 /// "SLIT" System Locality Information Table 1989 /// 1990 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 1991 1992 /// 1993 /// "SRAT" System Resource Affinity Table 1994 /// 1995 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 1996 1997 /// 1998 /// "SSDT" Secondary System Description Table 1999 /// 2000 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2001 2002 /// 2003 /// "XSDT" Extended System Description Table 2004 /// 2005 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2006 2007 /// 2008 /// "BOOT" MS Simple Boot Spec 2009 /// 2010 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2011 2012 /// 2013 /// "CSRT" MS Core System Resource Table 2014 /// 2015 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2016 2017 /// 2018 /// "DBG2" MS Debug Port 2 Spec 2019 /// 2020 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2021 2022 /// 2023 /// "DBGP" MS Debug Port Spec 2024 /// 2025 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2026 2027 /// 2028 /// "DMAR" DMA Remapping Table 2029 /// 2030 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2031 2032 /// 2033 /// "DRTM" Dynamic Root of Trust for Measurement Table 2034 /// 2035 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2036 2037 /// 2038 /// "ETDT" Event Timer Description Table 2039 /// 2040 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2041 2042 /// 2043 /// "HPET" IA-PC High Precision Event Timer Table 2044 /// 2045 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2046 2047 /// 2048 /// "iBFT" iSCSI Boot Firmware Table 2049 /// 2050 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2051 2052 /// 2053 /// "IVRS" I/O Virtualization Reporting Structure 2054 /// 2055 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2056 2057 /// 2058 /// "LPIT" Low Power Idle Table 2059 /// 2060 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2061 2062 /// 2063 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2064 /// 2065 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2066 2067 /// 2068 /// "MCHI" Management Controller Host Interface Table 2069 /// 2070 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2071 2072 /// 2073 /// "MSDM" MS Data Management Table 2074 /// 2075 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2076 2077 /// 2078 /// "SLIC" MS Software Licensing Table Specification 2079 /// 2080 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2081 2082 /// 2083 /// "SPCR" Serial Port Concole Redirection Table 2084 /// 2085 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2086 2087 /// 2088 /// "SPMI" Server Platform Management Interface Table 2089 /// 2090 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2091 2092 /// 2093 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2094 /// 2095 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2096 2097 /// 2098 /// "TPM2" Trusted Computing Platform 1 Table 2099 /// 2100 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2101 2102 /// 2103 /// "UEFI" UEFI ACPI Data Table 2104 /// 2105 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2106 2107 /// 2108 /// "WAET" Windows ACPI Emulated Devices Table 2109 /// 2110 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2111 2112 /// 2113 /// "WDAT" Watchdog Action Table 2114 /// 2115 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2116 2117 /// 2118 /// "WDRT" Watchdog Resource Table 2119 /// 2120 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2121 2122 /// 2123 /// "WPBT" MS Platform Binary Table 2124 /// 2125 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2126 2127 #pragma pack() 2128 2129 #endif 2130