1; binary emission of 64-bit code. 2test binemit 3set opt_level=speed_and_size 4set is_pic 5target x86_64 haswell 6 7; The binary encodings can be verified with the command: 8; 9; sed -ne 's/^ *; asm: *//p' filetests/isa/x86/binary64-pic.clif | llvm-mc -show-encoding -triple=x86_64 10; 11 12; Tests for i64 instructions. 13function %I64() { 14 sig0 = () 15 fn0 = %foo() 16 fn1 = colocated %bar() 17 18 gv0 = symbol %some_gv 19 gv1 = symbol colocated %some_gv 20 21 ; Use incoming_arg stack slots because they won't be relocated by the frame 22 ; layout. 23 ss0 = incoming_arg 8, offset 0 24 ss1 = incoming_arg 1024, offset -1024 25 ss2 = incoming_arg 1024, offset -2048 26 ss3 = incoming_arg 8, offset -2056 27 28block0: 29 30 ; Colocated functions. 31 32 ; asm: call foo 33 call fn1() ; bin: stk_ovf e8 CallPCRel4(%bar-4) 00000000 34 35 ; asm: lea 0x0(%rip), %rax 36 [-,%rax] v0 = func_addr.i64 fn1 ; bin: 48 8d 05 PCRel4(%bar-4) 00000000 37 ; asm: lea 0x0(%rip), %rsi 38 [-,%rsi] v1 = func_addr.i64 fn1 ; bin: 48 8d 35 PCRel4(%bar-4) 00000000 39 ; asm: lea 0x0(%rip), %r10 40 [-,%r10] v2 = func_addr.i64 fn1 ; bin: 4c 8d 15 PCRel4(%bar-4) 00000000 41 42 ; asm: call *%rax 43 call_indirect sig0, v0() ; bin: stk_ovf ff d0 44 ; asm: call *%rsi 45 call_indirect sig0, v1() ; bin: stk_ovf ff d6 46 ; asm: call *%r10 47 call_indirect sig0, v2() ; bin: stk_ovf 41 ff d2 48 49 ; Non-colocated functions. 50 51 ; asm: call foo@PLT 52 call fn0() ; bin: stk_ovf e8 CallPLTRel4(%foo-4) 00000000 53 54 ; asm: mov 0x0(%rip), %rax 55 [-,%rax] v100 = func_addr.i64 fn0 ; bin: 48 8b 05 GOTPCRel4(%foo-4) 00000000 56 ; asm: mov 0x0(%rip), %rsi 57 [-,%rsi] v101 = func_addr.i64 fn0 ; bin: 48 8b 35 GOTPCRel4(%foo-4) 00000000 58 ; asm: mov 0x0(%rip), %r10 59 [-,%r10] v102 = func_addr.i64 fn0 ; bin: 4c 8b 15 GOTPCRel4(%foo-4) 00000000 60 61 ; asm: call *%rax 62 call_indirect sig0, v100() ; bin: stk_ovf ff d0 63 ; asm: call *%rsi 64 call_indirect sig0, v101() ; bin: stk_ovf ff d6 65 ; asm: call *%r10 66 call_indirect sig0, v102() ; bin: stk_ovf 41 ff d2 67 68 ; asm: mov 0x0(%rip), %rcx 69 [-,%rcx] v3 = symbol_value.i64 gv0 ; bin: 48 8b 0d GOTPCRel4(%some_gv-4) 00000000 70 ; asm: mov 0x0(%rip), %rsi 71 [-,%rsi] v4 = symbol_value.i64 gv0 ; bin: 48 8b 35 GOTPCRel4(%some_gv-4) 00000000 72 ; asm: mov 0x0(%rip), %r10 73 [-,%r10] v5 = symbol_value.i64 gv0 ; bin: 4c 8b 15 GOTPCRel4(%some_gv-4) 00000000 74 75 ; asm: lea 0x0(%rip), %rcx 76 [-,%rcx] v6 = symbol_value.i64 gv1 ; bin: 48 8d 0d PCRel4(%some_gv-4) 00000000 77 ; asm: lea 0x0(%rip), %rsi 78 [-,%rsi] v7 = symbol_value.i64 gv1 ; bin: 48 8d 35 PCRel4(%some_gv-4) 00000000 79 ; asm: lea 0x0(%rip), %r10 80 [-,%r10] v8 = symbol_value.i64 gv1 ; bin: 4c 8d 15 PCRel4(%some_gv-4) 00000000 81 82 return 83} 84