1 /*
2  *  Copyright (c) 2017 The WebM project authors. All Rights Reserved.
3  *
4  *  Use of this source code is governed by a BSD-style license
5  *  that can be found in the LICENSE file in the root of the source
6  *  tree. An additional intellectual property rights grant can be found
7  *  in the file PATENTS.  All contributing project authors may
8  *  be found in the AUTHORS file in the root of the source tree.
9  */
10 
11 #ifndef VPX_VPX_PORTS_ASMDEFS_MMI_H_
12 #define VPX_VPX_PORTS_ASMDEFS_MMI_H_
13 
14 #include "./vpx_config.h"
15 #include "vpx/vpx_integer.h"
16 
17 #if HAVE_MMI
18 
19 #if HAVE_MIPS64
20 #define mips_reg int64_t
21 #define MMI_ADDU(reg1, reg2, reg3) \
22   "daddu       " #reg1 ",       " #reg2 ",       " #reg3 "         \n\t"
23 
24 #define MMI_ADDIU(reg1, reg2, immediate) \
25   "daddiu      " #reg1 ",       " #reg2 ",       " #immediate "    \n\t"
26 
27 #define MMI_ADDI(reg1, reg2, immediate) \
28   "daddi       " #reg1 ",       " #reg2 ",       " #immediate "    \n\t"
29 
30 #define MMI_SUBU(reg1, reg2, reg3) \
31   "dsubu       " #reg1 ",       " #reg2 ",       " #reg3 "         \n\t"
32 
33 #define MMI_L(reg, addr, bias) \
34   "ld          " #reg ",        " #bias "(" #addr ")               \n\t"
35 
36 #define MMI_SRL(reg1, reg2, shift) \
37   "ssrld       " #reg1 ",       " #reg2 ",       " #shift "        \n\t"
38 
39 #define MMI_SLL(reg1, reg2, shift) \
40   "dsll        " #reg1 ",       " #reg2 ",       " #shift "        \n\t"
41 
42 #define MMI_MTC1(reg, fp) \
43   "dmtc1       " #reg ",        " #fp "                            \n\t"
44 
45 #define MMI_LI(reg, immediate) \
46   "dli         " #reg ",        " #immediate "                     \n\t"
47 
48 #else
49 #define mips_reg int32_t
50 #define MMI_ADDU(reg1, reg2, reg3) \
51   "addu        " #reg1 ",       " #reg2 ",       " #reg3 "         \n\t"
52 
53 #define MMI_ADDIU(reg1, reg2, immediate) \
54   "addiu       " #reg1 ",       " #reg2 ",       " #immediate "    \n\t"
55 
56 #define MMI_ADDI(reg1, reg2, immediate) \
57   "addi        " #reg1 ",       " #reg2 ",       " #immediate "    \n\t"
58 
59 #define MMI_SUBU(reg1, reg2, reg3) \
60   "subu        " #reg1 ",       " #reg2 ",       " #reg3 "         \n\t"
61 
62 #define MMI_L(reg, addr, bias) \
63   "lw          " #reg ",        " #bias "(" #addr ")               \n\t"
64 
65 #define MMI_SRL(reg1, reg2, shift) \
66   "ssrlw       " #reg1 ",       " #reg2 ",       " #shift "        \n\t"
67 
68 #define MMI_SLL(reg1, reg2, shift) \
69   "sll         " #reg1 ",       " #reg2 ",       " #shift "        \n\t"
70 
71 #define MMI_MTC1(reg, fp) \
72   "mtc1        " #reg ",        " #fp "                            \n\t"
73 
74 #define MMI_LI(reg, immediate) \
75   "li          " #reg ",        " #immediate "                     \n\t"
76 
77 #endif /* HAVE_MIPS64 */
78 
79 #endif /* HAVE_MMI */
80 
81 #endif  // VPX_VPX_PORTS_ASMDEFS_MMI_H_
82