1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
5 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
6
7 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
8 // ASM-NOT: warning
9 #include <arm_sve.h>
10
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
14 #else
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
16 #endif
17
test_svcadd_f16_z(svbool_t pg,svfloat16_t op1,svfloat16_t op2)18 svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
19 {
20 // CHECK-LABEL: test_svcadd_f16_z
21 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
22 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
23 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 90)
24 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
25 return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 90);
26 }
27
test_svcadd_f16_z_1(svbool_t pg,svfloat16_t op1,svfloat16_t op2)28 svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
29 {
30 // CHECK-LABEL: test_svcadd_f16_z_1
31 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
32 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
33 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 270)
34 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
35 return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 270);
36 }
37
test_svcadd_f32_z(svbool_t pg,svfloat32_t op1,svfloat32_t op2)38 svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
39 {
40 // CHECK-LABEL: test_svcadd_f32_z
41 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
42 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
43 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2, i32 90)
44 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
45 return SVE_ACLE_FUNC(svcadd,_f32,_z,)(pg, op1, op2, 90);
46 }
47
test_svcadd_f64_z(svbool_t pg,svfloat64_t op1,svfloat64_t op2)48 svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
49 {
50 // CHECK-LABEL: test_svcadd_f64_z
51 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
52 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
53 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2, i32 90)
54 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
55 return SVE_ACLE_FUNC(svcadd,_f64,_z,)(pg, op1, op2, 90);
56 }
57
test_svcadd_f16_m(svbool_t pg,svfloat16_t op1,svfloat16_t op2)58 svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
59 {
60 // CHECK-LABEL: test_svcadd_f16_m
61 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
62 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
63 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
64 return SVE_ACLE_FUNC(svcadd,_f16,_m,)(pg, op1, op2, 90);
65 }
66
test_svcadd_f32_m(svbool_t pg,svfloat32_t op1,svfloat32_t op2)67 svfloat32_t test_svcadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
68 {
69 // CHECK-LABEL: test_svcadd_f32_m
70 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
71 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
72 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
73 return SVE_ACLE_FUNC(svcadd,_f32,_m,)(pg, op1, op2, 90);
74 }
75
test_svcadd_f64_m(svbool_t pg,svfloat64_t op1,svfloat64_t op2)76 svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
77 {
78 // CHECK-LABEL: test_svcadd_f64_m
79 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
80 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
81 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
82 return SVE_ACLE_FUNC(svcadd,_f64,_m,)(pg, op1, op2, 90);
83 }
84
test_svcadd_f16_x(svbool_t pg,svfloat16_t op1,svfloat16_t op2)85 svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
86 {
87 // CHECK-LABEL: test_svcadd_f16_x
88 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
89 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
90 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
91 return SVE_ACLE_FUNC(svcadd,_f16,_x,)(pg, op1, op2, 90);
92 }
93
test_svcadd_f32_x(svbool_t pg,svfloat32_t op1,svfloat32_t op2)94 svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
95 {
96 // CHECK-LABEL: test_svcadd_f32_x
97 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
98 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
99 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
100 return SVE_ACLE_FUNC(svcadd,_f32,_x,)(pg, op1, op2, 90);
101 }
102
test_svcadd_f64_x(svbool_t pg,svfloat64_t op1,svfloat64_t op2)103 svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
104 {
105 // CHECK-LABEL: test_svcadd_f64_x
106 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
107 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
108 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
109 return SVE_ACLE_FUNC(svcadd,_f64,_x,)(pg, op1, op2, 90);
110 }
111