1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null 2>%t
5 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
6
7 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
8 // ASM-NOT: warning
9 #include <arm_sve.h>
10
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
14 #else
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
16 #endif
17
test_svld1uw_s64(svbool_t pg,const uint32_t * base)18 svint64_t test_svld1uw_s64(svbool_t pg, const uint32_t *base)
19 {
20 // CHECK-LABEL: test_svld1uw_s64
21 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
22 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
23 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
24 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
25 return svld1uw_s64(pg, base);
26 }
27
test_svld1uw_u64(svbool_t pg,const uint32_t * base)28 svuint64_t test_svld1uw_u64(svbool_t pg, const uint32_t *base)
29 {
30 // CHECK-LABEL: test_svld1uw_u64
31 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
32 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
33 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
34 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
35 return svld1uw_u64(pg, base);
36 }
37
test_svld1uw_vnum_s64(svbool_t pg,const uint32_t * base,int64_t vnum)38 svint64_t test_svld1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum)
39 {
40 // CHECK-LABEL: test_svld1uw_vnum_s64
41 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
42 // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
43 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BASE]], i64 %vnum, i64 0
44 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
45 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
46 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
47 return svld1uw_vnum_s64(pg, base, vnum);
48 }
49
test_svld1uw_vnum_u64(svbool_t pg,const uint32_t * base,int64_t vnum)50 svuint64_t test_svld1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum)
51 {
52 // CHECK-LABEL: test_svld1uw_vnum_u64
53 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
54 // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
55 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BASE]], i64 %vnum, i64 0
56 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
57 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
58 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
59 return svld1uw_vnum_u64(pg, base, vnum);
60 }
61
test_svld1uw_gather_u64base_s64(svbool_t pg,svuint64_t bases)62 svint64_t test_svld1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
63 // CHECK-LABEL: test_svld1uw_gather_u64base_s64
64 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
65 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
66 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
67 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
68 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _s64, )(pg, bases);
69 }
70
test_svld1uw_gather_u64base_u64(svbool_t pg,svuint64_t bases)71 svuint64_t test_svld1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
72 // CHECK-LABEL: test_svld1uw_gather_u64base_u64
73 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
74 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
75 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
76 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
77 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _u64, )(pg, bases);
78 }
79
test_svld1uw_gather_s64offset_s64(svbool_t pg,const uint32_t * base,svint64_t offsets)80 svint64_t test_svld1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
81 // CHECK-LABEL: test_svld1uw_gather_s64offset_s64
82 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
83 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
84 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
85 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
86 return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_s64, )(pg, base, offsets);
87 }
88
test_svld1uw_gather_s64offset_u64(svbool_t pg,const uint32_t * base,svint64_t offsets)89 svuint64_t test_svld1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
90 // CHECK-LABEL: test_svld1uw_gather_s64offset_u64
91 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
92 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
93 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
94 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
95 return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_u64, )(pg, base, offsets);
96 }
97
test_svld1uw_gather_u64offset_s64(svbool_t pg,const uint32_t * base,svuint64_t offsets)98 svint64_t test_svld1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
99 // CHECK-LABEL: test_svld1uw_gather_u64offset_s64
100 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
101 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
102 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
103 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
104 return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_s64, )(pg, base, offsets);
105 }
106
test_svld1uw_gather_u64offset_u64(svbool_t pg,const uint32_t * base,svuint64_t offsets)107 svuint64_t test_svld1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
108 // CHECK-LABEL: test_svld1uw_gather_u64offset_u64
109 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
110 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
111 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
112 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
113 return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_u64, )(pg, base, offsets);
114 }
115
test_svld1uw_gather_u64base_offset_s64(svbool_t pg,svuint64_t bases,int64_t offset)116 svint64_t test_svld1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
117 // CHECK-LABEL: test_svld1uw_gather_u64base_offset_s64
118 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
119 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
120 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
121 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
122 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_s64, )(pg, bases, offset);
123 }
124
test_svld1uw_gather_u64base_offset_u64(svbool_t pg,svuint64_t bases,int64_t offset)125 svuint64_t test_svld1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
126 // CHECK-LABEL: test_svld1uw_gather_u64base_offset_u64
127 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
128 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
129 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
130 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
131 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_u64, )(pg, bases, offset);
132 }
133
test_svld1uw_gather_s64index_s64(svbool_t pg,const uint32_t * base,svint64_t indices)134 svint64_t test_svld1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) {
135 // CHECK-LABEL: test_svld1uw_gather_s64index_s64
136 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
137 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
138 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %1 to <vscale x 2 x i64>
139 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
140 return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_s64, )(pg, base, indices);
141 }
142
test_svld1uw_gather_s64index_u64(svbool_t pg,const uint32_t * base,svint64_t indices)143 svuint64_t test_svld1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) {
144 // CHECK-LABEL: test_svld1uw_gather_s64index_u64
145 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
146 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
147 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %1 to <vscale x 2 x i64>
148 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
149 return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_u64, )(pg, base, indices);
150 }
151
test_svld1uw_gather_u64index_s64(svbool_t pg,const uint32_t * base,svuint64_t indices)152 svint64_t test_svld1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
153 // CHECK-LABEL: test_svld1uw_gather_u64index_s64
154 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
155 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
156 // CHECK: %[[ZEXT]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
157 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
158 return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_s64, )(pg, base, indices);
159 }
160
test_svld1uw_gather_u64index_u64(svbool_t pg,const uint32_t * base,svuint64_t indices)161 svuint64_t test_svld1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
162 // CHECK-LABEL: test_svld1uw_gather_u64index_u64
163 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
164 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
165 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
166 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
167 return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_u64, )(pg, base, indices);
168 }
169
test_svld1uw_gather_u64base_index_s64(svbool_t pg,svuint64_t bases,int64_t index)170 svint64_t test_svld1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
171 // CHECK-LABEL: test_svld1uw_gather_u64base_index_s64
172 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
173 // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
174 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
175 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
176 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
177 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_s64, )(pg, bases, index);
178 }
179
test_svld1uw_gather_u64base_index_u64(svbool_t pg,svuint64_t bases,int64_t index)180 svuint64_t test_svld1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
181 // CHECK-LABEL: test_svld1uw_gather_u64base_index_u64
182 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
183 // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
184 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
185 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
186 // CHECK: <vscale x 2 x i64> %[[ZEXT]]
187 return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_u64, )(pg, bases, index);
188 }
189