1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null 2>%t
4 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
5
6 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
7 // ASM-NOT: warning
8 #include <arm_sve.h>
9
test_svldnf1sb_s16(svbool_t pg,const int8_t * base)10 svint16_t test_svldnf1sb_s16(svbool_t pg, const int8_t *base)
11 {
12 // CHECK-LABEL: test_svldnf1sb_s16
13 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
14 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base)
15 // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
16 // CHECK: ret <vscale x 8 x i16> %[[SEXT]]
17 return svldnf1sb_s16(pg, base);
18 }
19
test_svldnf1sb_s32(svbool_t pg,const int8_t * base)20 svint32_t test_svldnf1sb_s32(svbool_t pg, const int8_t *base)
21 {
22 // CHECK-LABEL: test_svldnf1sb_s32
23 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
24 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base)
25 // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
26 // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
27 return svldnf1sb_s32(pg, base);
28 }
29
test_svldnf1sb_s64(svbool_t pg,const int8_t * base)30 svint64_t test_svldnf1sb_s64(svbool_t pg, const int8_t *base)
31 {
32 // CHECK-LABEL: test_svldnf1sb_s64
33 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
34 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base)
35 // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
36 // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
37 return svldnf1sb_s64(pg, base);
38 }
39
test_svldnf1sb_u16(svbool_t pg,const int8_t * base)40 svuint16_t test_svldnf1sb_u16(svbool_t pg, const int8_t *base)
41 {
42 // CHECK-LABEL: test_svldnf1sb_u16
43 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
44 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base)
45 // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
46 // CHECK: ret <vscale x 8 x i16> %[[SEXT]]
47 return svldnf1sb_u16(pg, base);
48 }
49
test_svldnf1sb_u32(svbool_t pg,const int8_t * base)50 svuint32_t test_svldnf1sb_u32(svbool_t pg, const int8_t *base)
51 {
52 // CHECK-LABEL: test_svldnf1sb_u32
53 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
54 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base)
55 // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
56 // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
57 return svldnf1sb_u32(pg, base);
58 }
59
test_svldnf1sb_u64(svbool_t pg,const int8_t * base)60 svuint64_t test_svldnf1sb_u64(svbool_t pg, const int8_t *base)
61 {
62 // CHECK-LABEL: test_svldnf1sb_u64
63 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
64 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base)
65 // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
66 // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
67 return svldnf1sb_u64(pg, base);
68 }
69
test_svldnf1sb_vnum_s16(svbool_t pg,const int8_t * base,int64_t vnum)70 svint16_t test_svldnf1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum)
71 {
72 // CHECK-LABEL: test_svldnf1sb_vnum_s16
73 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
74 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>*
75 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0
76 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]])
77 // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
78 // CHECK: ret <vscale x 8 x i16> %[[SEXT]]
79 return svldnf1sb_vnum_s16(pg, base, vnum);
80 }
81
test_svldnf1sb_vnum_s32(svbool_t pg,const int8_t * base,int64_t vnum)82 svint32_t test_svldnf1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum)
83 {
84 // CHECK-LABEL: test_svldnf1sb_vnum_s32
85 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
86 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>*
87 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0
88 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]])
89 // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
90 // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
91 return svldnf1sb_vnum_s32(pg, base, vnum);
92 }
93
test_svldnf1sb_vnum_s64(svbool_t pg,const int8_t * base,int64_t vnum)94 svint64_t test_svldnf1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum)
95 {
96 // CHECK-LABEL: test_svldnf1sb_vnum_s64
97 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
98 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
99 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
100 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
101 // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
102 // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
103 return svldnf1sb_vnum_s64(pg, base, vnum);
104 }
105
test_svldnf1sb_vnum_u16(svbool_t pg,const int8_t * base,int64_t vnum)106 svuint16_t test_svldnf1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum)
107 {
108 // CHECK-LABEL: test_svldnf1sb_vnum_u16
109 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
110 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>*
111 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0
112 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]])
113 // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
114 // CHECK: ret <vscale x 8 x i16> %[[SEXT]]
115 return svldnf1sb_vnum_u16(pg, base, vnum);
116 }
117
test_svldnf1sb_vnum_u32(svbool_t pg,const int8_t * base,int64_t vnum)118 svuint32_t test_svldnf1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum)
119 {
120 // CHECK-LABEL: test_svldnf1sb_vnum_u32
121 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
122 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>*
123 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0
124 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]])
125 // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
126 // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
127 return svldnf1sb_vnum_u32(pg, base, vnum);
128 }
129
test_svldnf1sb_vnum_u64(svbool_t pg,const int8_t * base,int64_t vnum)130 svuint64_t test_svldnf1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum)
131 {
132 // CHECK-LABEL: test_svldnf1sb_vnum_u64
133 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
134 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
135 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
136 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
137 // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
138 // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
139 return svldnf1sb_vnum_u64(pg, base, vnum);
140 }
141