1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name:            add_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: add_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
24    ; GFX9-LABEL: name: add_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
32    ; GFX10-LABEL: name: add_s32_sgpr_sgpr_sgpr
33    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
34    ; GFX10: $vcc_hi = IMPLICIT_DEF
35    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
36    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
37    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
38    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
39    ; GFX10: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
40    ; GFX10: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
41    %0:sgpr(s32) = COPY $sgpr0
42    %1:sgpr(s32) = COPY $sgpr1
43    %2:sgpr(s32) = COPY $sgpr2
44    %3:sgpr(s32) = G_ADD %0, %1
45    %4:sgpr(s32) = G_ADD %3, %2
46    S_ENDPGM 0, implicit %4
47...
48
49---
50
51name:            add_s32_vgpr_vgpr_vgpr
52legalized:       true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $vgpr0, $vgpr1, $vgpr2
59    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr
60    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
65    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
66    ; GFX8: S_ENDPGM 0, implicit %4
67    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr
68    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
69    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
70    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
71    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
72    ; GFX9: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
73    ; GFX9: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
74    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr
75    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
76    ; GFX10: $vcc_hi = IMPLICIT_DEF
77    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
78    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
79    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
80    ; GFX10: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
81    ; GFX10: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
82    %0:vgpr(s32) = COPY $vgpr0
83    %1:vgpr(s32) = COPY $vgpr1
84    %2:vgpr(s32) = COPY $vgpr2
85    %3:vgpr(s32) = G_ADD %0, %1
86    %4:vgpr(s32) = G_ADD %3, %2
87    S_ENDPGM 0, implicit %4
88...
89
90---
91
92name:            add_s32_vgpr_vgpr_vgpr_multi_use
93legalized:       true
94regBankSelected: true
95tracksRegLiveness: true
96
97body: |
98  bb.0:
99    liveins: $vgpr0, $vgpr1, $vgpr2
100    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
101    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
102    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
103    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
104    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
105    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
106    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
107    ; GFX8: S_ENDPGM 0, implicit %4, implicit %3
108    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
109    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
110    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
111    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
112    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
113    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
114    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
115    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
116    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
117    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
118    ; GFX10: $vcc_hi = IMPLICIT_DEF
119    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
120    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
121    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
122    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
123    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
124    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
125    %0:vgpr(s32) = COPY $vgpr0
126    %1:vgpr(s32) = COPY $vgpr1
127    %2:vgpr(s32) = COPY $vgpr2
128    %3:vgpr(s32) = G_ADD %0, %1
129    %4:vgpr(s32) = G_ADD %3, %2
130    S_ENDPGM 0, implicit %4, implicit %3
131...
132
133---
134
135name:            add_p3_vgpr_vgpr_vgpr
136legalized:       true
137regBankSelected: true
138tracksRegLiveness: true
139
140body: |
141  bb.0:
142    liveins: $vgpr0, $vgpr1, $vgpr2
143
144    ; GFX8-LABEL: name: add_p3_vgpr_vgpr_vgpr
145    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
146    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
147    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
148    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
149    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
150    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
151    ; GFX8: S_ENDPGM 0, implicit %4
152    ; GFX9-LABEL: name: add_p3_vgpr_vgpr_vgpr
153    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
154    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
155    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
156    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
157    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
158    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
159    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
160    ; GFX10-LABEL: name: add_p3_vgpr_vgpr_vgpr
161    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
162    ; GFX10: $vcc_hi = IMPLICIT_DEF
163    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
164    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
165    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
166    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
167    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
168    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
169    %0:vgpr(p3) = COPY $vgpr0
170    %1:vgpr(s32) = COPY $vgpr1
171    %2:vgpr(s32) = COPY $vgpr2
172    %3:vgpr(p3) = G_PTR_ADD %0, %1
173    %4:vgpr(p3) = G_PTR_ADD %3, %2
174    S_ENDPGM 0, implicit %4
175...
176
177---
178
179name:            add_p5_vgpr_vgpr_vgpr
180legalized:       true
181regBankSelected: true
182tracksRegLiveness: true
183
184body: |
185  bb.0:
186    liveins: $vgpr0, $vgpr1, $vgpr2
187
188    ; GFX8-LABEL: name: add_p5_vgpr_vgpr_vgpr
189    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
190    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
191    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
192    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
193    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
194    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
195    ; GFX8: S_ENDPGM 0, implicit %4
196    ; GFX9-LABEL: name: add_p5_vgpr_vgpr_vgpr
197    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
198    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
199    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
200    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
201    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
202    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
203    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
204    ; GFX10-LABEL: name: add_p5_vgpr_vgpr_vgpr
205    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
206    ; GFX10: $vcc_hi = IMPLICIT_DEF
207    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
208    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
209    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
210    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
211    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
212    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
213    %0:vgpr(p5) = COPY $vgpr0
214    %1:vgpr(s32) = COPY $vgpr1
215    %2:vgpr(s32) = COPY $vgpr2
216    %3:vgpr(p5) = G_PTR_ADD %0, %1
217    %4:vgpr(p5) = G_PTR_ADD %3, %2
218    S_ENDPGM 0, implicit %4
219...
220
221---
222
223name:            add_p3_s32_vgpr_vgpr_vgpr
224legalized:       true
225regBankSelected: true
226tracksRegLiveness: true
227
228body: |
229  bb.0:
230    liveins: $vgpr0, $vgpr1, $vgpr2
231
232    ; GFX8-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
233    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
234    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
235    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
236    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
237    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
238    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
239    ; GFX8: S_ENDPGM 0, implicit %4
240    ; GFX9-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
241    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
242    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
243    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
244    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
245    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
246    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
247    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
248    ; GFX10-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
249    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
250    ; GFX10: $vcc_hi = IMPLICIT_DEF
251    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
252    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
253    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
254    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
255    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
256    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
257    %0:vgpr(s32) = COPY $vgpr0
258    %1:vgpr(s32) = COPY $vgpr1
259    %2:vgpr(p3) = COPY $vgpr2
260    %3:vgpr(s32) = G_ADD %0, %1
261    %4:vgpr(p3) = G_PTR_ADD %2, %3
262    S_ENDPGM 0, implicit %4
263...
264
265---
266
267name:            add_p5_s32_vgpr_vgpr_vgpr
268legalized:       true
269regBankSelected: true
270tracksRegLiveness: true
271
272body: |
273  bb.0:
274    liveins: $vgpr0, $vgpr1, $vgpr2
275
276    ; GFX8-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
277    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
278    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
279    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
280    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
281    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
282    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
283    ; GFX8: S_ENDPGM 0, implicit %4
284    ; GFX9-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
285    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
286    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
287    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
288    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
289    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
290    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
291    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
292    ; GFX10-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
293    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
294    ; GFX10: $vcc_hi = IMPLICIT_DEF
295    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
296    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
297    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
298    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
299    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
300    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
301    %0:vgpr(s32) = COPY $vgpr0
302    %1:vgpr(s32) = COPY $vgpr1
303    %2:vgpr(p5) = COPY $vgpr2
304    %3:vgpr(s32) = G_ADD %0, %1
305    %4:vgpr(p5) = G_PTR_ADD %2, %3
306    S_ENDPGM 0, implicit %4
307...
308