1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s 3 4--- 5name: test_xor_s32 6body: | 7 bb.0: 8 liveins: $vgpr0, $vgpr1 9 10 ; CHECK-LABEL: name: test_xor_s32 11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 12 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 13 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]] 14 ; CHECK: $vgpr0 = COPY [[XOR]](s32) 15 %0:_(s32) = COPY $vgpr0 16 %1:_(s32) = COPY $vgpr1 17 %2:_(s32) = G_XOR %0, %1 18 $vgpr0 = COPY %2 19... 20 21--- 22name: test_xor_s1 23body: | 24 bb.0: 25 liveins: $vgpr0, $vgpr1 26 27 ; CHECK-LABEL: name: test_xor_s1 28 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 29 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 30 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]] 31 ; CHECK: S_NOP 0, implicit [[XOR]](s32) 32 %0:_(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr1 34 %2:_(s32) = G_CONSTANT i32 0 35 %3:_(s1) = G_ICMP intpred(ne), %0, %2 36 %4:_(s1) = G_ICMP intpred(ne), %1, %2 37 %5:_(s32) = G_XOR %0, %1 38 S_NOP 0, implicit %5 39... 40 41--- 42name: test_xor_v2s1 43body: | 44 bb.0: 45 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5 46 47 ; CHECK-LABEL: name: test_xor_v2s1 48 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 49 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 50 ; CHECK: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 51 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 52 ; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 53 ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV2]] 54 ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV3]] 55 ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 56 ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>) 57 ; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV4]](s32), [[UV6]] 58 ; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV5]](s32), [[UV7]] 59 ; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[ICMP2]] 60 ; CHECK: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP1]], [[ICMP3]] 61 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1) 62 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR1]](s1) 63 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32) 64 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32) 65 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 66 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 67 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 68 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 69 %2:_(<2 x s32>) = COPY $vgpr4_vgpr5 70 %3:_(<2 x s1>) = G_ICMP intpred(ne), %0, %1 71 %4:_(<2 x s1>) = G_ICMP intpred(ne), %0, %2 72 %5:_(<2 x s1>) = G_XOR %3, %4 73 %6:_(<2 x s32>) = G_ANYEXT %5 74 $vgpr0_vgpr1 = COPY %6 75... 76 77--- 78name: test_xor_v3s1 79body: | 80 bb.0: 81 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5, $vgpr6_vgpr7_vgpr8 82 83 ; CHECK-LABEL: name: test_xor_v3s1 84 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 85 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 86 ; CHECK: [[COPY2:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr8 87 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 88 ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 89 ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV3]] 90 ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV4]] 91 ; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV2]](s32), [[UV5]] 92 ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 93 ; CHECK: [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<3 x s32>) 94 ; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV6]](s32), [[UV9]] 95 ; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV7]](s32), [[UV10]] 96 ; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV8]](s32), [[UV11]] 97 ; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[ICMP3]] 98 ; CHECK: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP1]], [[ICMP4]] 99 ; CHECK: [[XOR2:%[0-9]+]]:_(s1) = G_XOR [[ICMP2]], [[ICMP5]] 100 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1) 101 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR1]](s1) 102 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR2]](s1) 103 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32) 104 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32) 105 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32) 106 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32) 107 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 108 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 109 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 110 %2:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr8 111 %3:_(<3 x s1>) = G_ICMP intpred(ne), %0, %1 112 %4:_(<3 x s1>) = G_ICMP intpred(ne), %0, %2 113 %5:_(<3 x s1>) = G_XOR %3, %4 114 %6:_(<3 x s32>) = G_ANYEXT %5 115 $vgpr0_vgpr1_vgpr2 = COPY %6 116... 117 118--- 119name: test_xor_s64 120body: | 121 bb.0: 122 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 123 124 ; CHECK-LABEL: name: test_xor_s64 125 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 126 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 127 ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]] 128 ; CHECK: $vgpr0_vgpr1 = COPY [[XOR]](s64) 129 %0:_(s64) = COPY $vgpr0_vgpr1 130 %1:_(s64) = COPY $vgpr2_vgpr3 131 %2:_(s64) = G_XOR %0, %1 132 $vgpr0_vgpr1 = COPY %2 133... 134 135--- 136name: test_xor_s96 137body: | 138 bb.0: 139 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 140 141 ; CHECK-LABEL: name: test_xor_s96 142 ; CHECK: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 143 ; CHECK: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr3_vgpr4_vgpr5 144 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY]](s96), 0 145 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s96), 64 146 ; CHECK: [[EXTRACT2:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY1]](s96), 0 147 ; CHECK: [[EXTRACT3:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](s96), 64 148 ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[EXTRACT]], [[EXTRACT2]] 149 ; CHECK: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[EXTRACT1]], [[EXTRACT3]] 150 ; CHECK: [[DEF:%[0-9]+]]:_(s96) = G_IMPLICIT_DEF 151 ; CHECK: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[DEF]], [[XOR]](s64), 0 152 ; CHECK: [[INSERT1:%[0-9]+]]:_(s96) = G_INSERT [[INSERT]], [[XOR1]](s32), 64 153 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](s96) 154 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 155 %1:_(s96) = COPY $vgpr3_vgpr4_vgpr5 156 %2:_(s96) = G_XOR %0, %1 157 $vgpr0_vgpr1_vgpr2 = COPY %2 158... 159 160--- 161name: test_xor_128 162body: | 163 bb.0: 164 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 165 166 ; CHECK-LABEL: name: test_xor_128 167 ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 168 ; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 169 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) 170 ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](s128) 171 ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[UV]], [[UV2]] 172 ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[UV1]], [[UV3]] 173 ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[XOR]](s64), [[XOR1]](s64) 174 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128) 175 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 176 %1:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 177 %2:_(s128) = G_XOR %0, %1 178 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 179... 180 181--- 182name: test_xor_s7 183body: | 184 bb.0: 185 liveins: $vgpr0, $vgpr1 186 187 ; CHECK-LABEL: name: test_xor_s7 188 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 189 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 190 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 191 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 192 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 193 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 194 ; CHECK: $vgpr0 = COPY [[COPY4]](s32) 195 %0:_(s32) = COPY $vgpr0 196 %1:_(s32) = COPY $vgpr1 197 %2:_(s7) = G_TRUNC %0 198 %3:_(s7) = G_TRUNC %1 199 %4:_(s7) = G_XOR %2, %3 200 %5:_(s32) = G_ANYEXT %4 201 $vgpr0 = COPY %5 202... 203 204--- 205name: test_xor_s8 206body: | 207 bb.0: 208 liveins: $vgpr0, $vgpr1 209 210 ; CHECK-LABEL: name: test_xor_s8 211 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 212 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 213 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 214 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 215 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 216 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 217 ; CHECK: $vgpr0 = COPY [[COPY4]](s32) 218 %0:_(s32) = COPY $vgpr0 219 %1:_(s32) = COPY $vgpr1 220 %2:_(s8) = G_TRUNC %0 221 %3:_(s8) = G_TRUNC %1 222 %4:_(s8) = G_XOR %2, %3 223 %5:_(s32) = G_ANYEXT %4 224 $vgpr0 = COPY %5 225... 226 227--- 228name: test_xor_s16 229body: | 230 bb.0: 231 liveins: $vgpr0, $vgpr1 232 233 ; CHECK-LABEL: name: test_xor_s16 234 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 235 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 236 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 237 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 238 ; CHECK: [[XOR:%[0-9]+]]:_(s16) = G_XOR [[TRUNC]], [[TRUNC1]] 239 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s16) 240 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 241 %0:_(s32) = COPY $vgpr0 242 %1:_(s32) = COPY $vgpr1 243 %2:_(s16) = G_TRUNC %0 244 %3:_(s16) = G_TRUNC %1 245 %4:_(s16) = G_XOR %2, %3 246 %5:_(s32) = G_ANYEXT %4 247 $vgpr0 = COPY %5 248... 249 250--- 251name: test_xor_s24 252body: | 253 bb.0: 254 liveins: $vgpr0, $vgpr1 255 256 ; CHECK-LABEL: name: test_xor_s24 257 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 258 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 259 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 260 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 261 ; CHECK: [[XOR:%[0-9]+]]:_(s16) = G_XOR [[TRUNC]], [[TRUNC1]] 262 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s16) 263 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 264 %0:_(s32) = COPY $vgpr0 265 %1:_(s32) = COPY $vgpr1 266 %2:_(s16) = G_TRUNC %0 267 %3:_(s16) = G_TRUNC %1 268 %4:_(s16) = G_XOR %2, %3 269 %5:_(s32) = G_ANYEXT %4 270 $vgpr0 = COPY %5 271... 272 273--- 274name: test_xor_s48 275body: | 276 bb.0: 277 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 278 279 ; CHECK-LABEL: name: test_xor_s48 280 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 281 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 282 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY]](s64) 283 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[COPY1]](s64) 284 ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY2]], [[COPY3]] 285 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[XOR]](s64) 286 ; CHECK: $vgpr0_vgpr1 = COPY [[COPY4]](s64) 287 %0:_(s64) = COPY $vgpr0_vgpr1 288 %1:_(s64) = COPY $vgpr2_vgpr3 289 %2:_(s48) = G_TRUNC %0 290 %3:_(s48) = G_TRUNC %1 291 %4:_(s48) = G_XOR %2, %3 292 %5:_(s64) = G_ANYEXT %4 293 $vgpr0_vgpr1 = COPY %5 294... 295 296--- 297name: test_xor_v2s32 298body: | 299 bb.0: 300 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 301 302 ; CHECK-LABEL: name: test_xor_v2s32 303 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 304 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 305 ; CHECK: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[COPY]], [[COPY1]] 306 ; CHECK: $vgpr0_vgpr1 = COPY [[XOR]](<2 x s32>) 307 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 308 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 309 %2:_(<2 x s32>) = G_XOR %0, %1 310 $vgpr0_vgpr1 = COPY %2 311... 312 313--- 314name: test_xor_v3s32 315body: | 316 bb.0: 317 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 318 319 ; CHECK-LABEL: name: test_xor_v3s32 320 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 321 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 322 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 323 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 324 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32) 325 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV2]](s32), [[DEF]](s32) 326 ; CHECK: [[DEF1:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF 327 ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 328 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV3]](s32), [[UV4]](s32) 329 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV5]](s32), [[DEF]](s32) 330 ; CHECK: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR]], [[BUILD_VECTOR2]] 331 ; CHECK: [[XOR1:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR1]], [[BUILD_VECTOR3]] 332 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s32>) = G_CONCAT_VECTORS [[XOR]](<2 x s32>), [[XOR1]](<2 x s32>), [[DEF1]](<2 x s32>) 333 ; CHECK: [[UV6:%[0-9]+]]:_(<3 x s32>), [[UV7:%[0-9]+]]:_(<3 x s32>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s32>) 334 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[UV6]](<3 x s32>) 335 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 336 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 337 %2:_(<3 x s32>) = G_XOR %0, %1 338 $vgpr0_vgpr1_vgpr2 = COPY %2 339... 340 341--- 342name: test_xor_v4s32 343body: | 344 bb.0: 345 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 346 347 ; CHECK-LABEL: name: test_xor_v4s32 348 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 349 ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 350 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 351 ; CHECK: [[UV2:%[0-9]+]]:_(<2 x s32>), [[UV3:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY1]](<4 x s32>) 352 ; CHECK: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[UV]], [[UV2]] 353 ; CHECK: [[XOR1:%[0-9]+]]:_(<2 x s32>) = G_XOR [[UV1]], [[UV3]] 354 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[XOR]](<2 x s32>), [[XOR1]](<2 x s32>) 355 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 356 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 357 %1:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 358 %2:_(<4 x s32>) = G_XOR %0, %1 359 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 360... 361 362--- 363name: test_xor_v5s32 364body: | 365 bb.0: 366 367 ; CHECK-LABEL: name: test_xor_v5s32 368 ; CHECK: [[DEF:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF 369 ; CHECK: [[DEF1:%[0-9]+]]:_(<5 x s32>) = G_IMPLICIT_DEF 370 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<5 x s32>) 371 ; CHECK: [[DEF2:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 372 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32) 373 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV2]](s32), [[UV3]](s32) 374 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[DEF2]](s32) 375 ; CHECK: [[DEF3:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF 376 ; CHECK: [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](<5 x s32>) 377 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV5]](s32), [[UV6]](s32) 378 ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV7]](s32), [[UV8]](s32) 379 ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV9]](s32), [[DEF2]](s32) 380 ; CHECK: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR]], [[BUILD_VECTOR3]] 381 ; CHECK: [[XOR1:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR1]], [[BUILD_VECTOR4]] 382 ; CHECK: [[XOR2:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR2]], [[BUILD_VECTOR5]] 383 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<10 x s32>) = G_CONCAT_VECTORS [[XOR]](<2 x s32>), [[XOR1]](<2 x s32>), [[XOR2]](<2 x s32>), [[DEF3]](<2 x s32>), [[DEF3]](<2 x s32>) 384 ; CHECK: [[UV10:%[0-9]+]]:_(<5 x s32>), [[UV11:%[0-9]+]]:_(<5 x s32>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<10 x s32>) 385 ; CHECK: [[DEF4:%[0-9]+]]:_(<8 x s32>) = G_IMPLICIT_DEF 386 ; CHECK: [[INSERT:%[0-9]+]]:_(<8 x s32>) = G_INSERT [[DEF4]], [[UV10]](<5 x s32>), 0 387 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<8 x s32>) 388 %0:_(<5 x s32>) = G_IMPLICIT_DEF 389 %1:_(<5 x s32>) = G_IMPLICIT_DEF 390 %2:_(<5 x s32>) = G_XOR %0, %1 391 %3:_(<8 x s32>) = G_IMPLICIT_DEF 392 %4:_(<8 x s32>) = G_INSERT %3, %2, 0 393 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4 394... 395 396--- 397name: test_xor_v2s64 398body: | 399 bb.0: 400 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7 401 402 ; CHECK-LABEL: name: test_xor_v2s64 403 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 404 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 405 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) 406 ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>) 407 ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[UV]], [[UV2]] 408 ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[UV1]], [[UV3]] 409 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[XOR]](s64), [[XOR1]](s64) 410 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 411 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 412 %1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7 413 %2:_(<2 x s64>) = G_XOR %0, %1 414 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 415... 416 417--- 418name: test_xor_v2s16 419body: | 420 bb.0: 421 liveins: $vgpr0, $vgpr1 422 423 ; CHECK-LABEL: name: test_xor_v2s16 424 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 425 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 426 ; CHECK: [[XOR:%[0-9]+]]:_(<2 x s16>) = G_XOR [[COPY]], [[COPY1]] 427 ; CHECK: $vgpr0 = COPY [[XOR]](<2 x s16>) 428 %0:_(<2 x s16>) = COPY $vgpr0 429 %1:_(<2 x s16>) = COPY $vgpr1 430 %2:_(<2 x s16>) = G_XOR %0, %1 431 $vgpr0 = COPY %2 432... 433 434--- 435name: test_xor_v3s16 436body: | 437 bb.0: 438 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 439 ; CHECK-LABEL: name: test_xor_v3s16 440 ; CHECK: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2 441 ; CHECK: [[COPY1:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5 442 ; CHECK: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>) 443 ; CHECK: [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[COPY1]](<6 x s16>) 444 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 445 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 446 ; CHECK: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV2]](<3 x s16>), 0 447 ; CHECK: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[INSERT]], [[INSERT1]] 448 ; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 449 ; CHECK: [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR]](<4 x s16>) 450 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV4]](<2 x s16>) 451 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 452 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 453 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV5]](<2 x s16>) 454 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 455 ; CHECK: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF1]](<4 x s16>) 456 ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>) 457 ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 458 ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV7]](<2 x s16>) 459 ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 460 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 461 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 462 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 463 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 464 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 465 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 466 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 467 ; CHECK: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 468 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 469 ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 470 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 471 ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 472 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32) 473 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 474 ; CHECK: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 475 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 476 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 477 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) 478 ; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 479 ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C]](s32) 480 ; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 481 ; CHECK: [[BITCAST6:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 482 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>), [[BITCAST6]](<2 x s16>) 483 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS]](<6 x s16>) 484 %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2 485 %1:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5 486 %2:_(<3 x s16>), %3:_(<3 x s16>) = G_UNMERGE_VALUES %0 487 %4:_(<3 x s16>), %5:_(<3 x s16>) = G_UNMERGE_VALUES %1 488 %6:_(<3 x s16>) = G_XOR %2, %4 489 %7:_(<3 x s16>) = G_IMPLICIT_DEF 490 %8:_(<6 x s16>) = G_CONCAT_VECTORS %6, %7 491 $vgpr0_vgpr1_vgpr2 = COPY %8 492... 493 494--- 495name: test_xor_v4s16 496body: | 497 bb.0: 498 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 499 500 ; CHECK-LABEL: name: test_xor_v4s16 501 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 502 ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 503 ; CHECK: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[COPY]], [[COPY1]] 504 ; CHECK: $vgpr0_vgpr1 = COPY [[XOR]](<4 x s16>) 505 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 506 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 507 %2:_(<4 x s16>) = G_XOR %0, %1 508 $vgpr0_vgpr1 = COPY %2 509... 510 511--- 512name: test_xor_v5s16 513body: | 514 bb.0: 515 516 ; CHECK-LABEL: name: test_xor_v5s16 517 ; CHECK: [[DEF:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF 518 ; CHECK: [[DEF1:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF 519 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<30 x s16>) = G_CONCAT_VECTORS [[DEF]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>) 520 ; CHECK: [[UV:%[0-9]+]]:_(<5 x s16>), [[UV1:%[0-9]+]]:_(<5 x s16>), [[UV2:%[0-9]+]]:_(<5 x s16>), [[UV3:%[0-9]+]]:_(<5 x s16>), [[UV4:%[0-9]+]]:_(<5 x s16>), [[UV5:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<30 x s16>) 521 ; CHECK: [[DEF2:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF 522 ; CHECK: [[CONCAT_VECTORS1:%[0-9]+]]:_(<30 x s16>) = G_CONCAT_VECTORS [[DEF2]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>) 523 ; CHECK: [[UV6:%[0-9]+]]:_(<5 x s16>), [[UV7:%[0-9]+]]:_(<5 x s16>), [[UV8:%[0-9]+]]:_(<5 x s16>), [[UV9:%[0-9]+]]:_(<5 x s16>), [[UV10:%[0-9]+]]:_(<5 x s16>), [[UV11:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<30 x s16>) 524 ; CHECK: [[INSERT:%[0-9]+]]:_(<6 x s16>) = G_INSERT [[DEF1]], [[UV]](<5 x s16>), 0 525 ; CHECK: [[INSERT1:%[0-9]+]]:_(<6 x s16>) = G_INSERT [[DEF1]], [[UV6]](<5 x s16>), 0 526 ; CHECK: [[UV12:%[0-9]+]]:_(<3 x s16>), [[UV13:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[INSERT]](<6 x s16>) 527 ; CHECK: [[UV14:%[0-9]+]]:_(<3 x s16>), [[UV15:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<6 x s16>) 528 ; CHECK: [[DEF3:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 529 ; CHECK: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[UV12]](<3 x s16>), 0 530 ; CHECK: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[UV14]](<3 x s16>), 0 531 ; CHECK: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[INSERT2]], [[INSERT3]] 532 ; CHECK: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[UV13]](<3 x s16>), 0 533 ; CHECK: [[INSERT5:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[UV15]](<3 x s16>), 0 534 ; CHECK: [[XOR1:%[0-9]+]]:_(<4 x s16>) = G_XOR [[INSERT4]], [[INSERT5]] 535 ; CHECK: [[UV16:%[0-9]+]]:_(<2 x s16>), [[UV17:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR]](<4 x s16>) 536 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV16]](<2 x s16>) 537 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 538 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 539 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV17]](<2 x s16>) 540 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 541 ; CHECK: [[UV18:%[0-9]+]]:_(<2 x s16>), [[UV19:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR1]](<4 x s16>) 542 ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV18]](<2 x s16>) 543 ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 544 ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV19]](<2 x s16>) 545 ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 546 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 547 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 548 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]] 549 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 550 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 551 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 552 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 553 ; CHECK: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 554 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 555 ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 556 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 557 ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 558 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32) 559 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 560 ; CHECK: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 561 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 562 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 563 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) 564 ; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 565 ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C]](s32) 566 ; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 567 ; CHECK: [[BITCAST6:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 568 ; CHECK: [[CONCAT_VECTORS2:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>), [[BITCAST6]](<2 x s16>) 569 ; CHECK: [[CONCAT_VECTORS3:%[0-9]+]]:_(<30 x s16>) = G_CONCAT_VECTORS [[CONCAT_VECTORS2]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>), [[DEF1]](<6 x s16>) 570 ; CHECK: [[UV20:%[0-9]+]]:_(<5 x s16>), [[UV21:%[0-9]+]]:_(<5 x s16>), [[UV22:%[0-9]+]]:_(<5 x s16>), [[UV23:%[0-9]+]]:_(<5 x s16>), [[UV24:%[0-9]+]]:_(<5 x s16>), [[UV25:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS3]](<30 x s16>) 571 ; CHECK: [[DEF4:%[0-9]+]]:_(<8 x s16>) = G_IMPLICIT_DEF 572 ; CHECK: [[INSERT6:%[0-9]+]]:_(<8 x s16>) = G_INSERT [[DEF4]], [[UV20]](<5 x s16>), 0 573 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT6]](<8 x s16>) 574 %0:_(<5 x s16>) = G_IMPLICIT_DEF 575 %1:_(<5 x s16>) = G_IMPLICIT_DEF 576 %2:_(<5 x s16>) = G_XOR %0, %1 577 %4:_(<8 x s16>) = G_IMPLICIT_DEF 578 %5:_(<8 x s16>) = G_INSERT %4, %2, 0 579 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5 580... 581 582--- 583name: test_xor_v3s8 584body: | 585 bb.0: 586 587 ; CHECK-LABEL: name: test_xor_v3s8 588 ; CHECK: [[DEF:%[0-9]+]]:_(<3 x s8>) = G_IMPLICIT_DEF 589 ; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s8>) = G_IMPLICIT_DEF 590 ; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 591 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF2]], [[DEF]](<3 x s8>), 0 592 ; CHECK: [[INSERT1:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF2]], [[DEF1]](<3 x s8>), 0 593 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[INSERT]](<4 x s8>) 594 ; CHECK: [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[INSERT1]](<4 x s8>) 595 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s8) 596 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s8) 597 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT]], [[ANYEXT1]] 598 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[XOR]](s32) 599 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s8) 600 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s8) 601 ; CHECK: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT2]], [[ANYEXT3]] 602 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[XOR1]](s32) 603 ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s8) 604 ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV6]](s8) 605 ; CHECK: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT4]], [[ANYEXT5]] 606 ; CHECK: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[XOR2]](s32) 607 ; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s8) 608 ; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[UV7]](s8) 609 ; CHECK: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT6]], [[ANYEXT7]] 610 ; CHECK: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[XOR3]](s32) 611 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s8>) = G_BUILD_VECTOR [[TRUNC]](s8), [[TRUNC1]](s8), [[TRUNC2]](s8), [[TRUNC3]](s8) 612 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s8>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<4 x s8>), [[DEF2]](<4 x s8>), [[DEF2]](<4 x s8>) 613 ; CHECK: [[UV8:%[0-9]+]]:_(<3 x s8>), [[UV9:%[0-9]+]]:_(<3 x s8>), [[UV10:%[0-9]+]]:_(<3 x s8>), [[UV11:%[0-9]+]]:_(<3 x s8>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s8>) 614 ; CHECK: [[ANYEXT8:%[0-9]+]]:_(<3 x s32>) = G_ANYEXT [[UV8]](<3 x s8>) 615 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[ANYEXT8]](<3 x s32>) 616 %0:_(<3 x s8>) = G_IMPLICIT_DEF 617 %1:_(<3 x s8>) = G_IMPLICIT_DEF 618 %2:_(<3 x s8>) = G_XOR %0, %1 619 %3:_(<3 x s32>) = G_ANYEXT %2 620 $vgpr0_vgpr1_vgpr2 = COPY %3 621... 622 623--- 624name: test_xor_v4s8 625body: | 626 bb.0: 627 628 ; CHECK-LABEL: name: test_xor_v4s8 629 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF 630 ; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF 631 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<4 x s32>) 632 ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](<4 x s32>) 633 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 634 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV4]](s32) 635 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]] 636 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 637 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV5]](s32) 638 ; CHECK: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]] 639 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[UV2]](s32) 640 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV6]](s32) 641 ; CHECK: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[COPY4]], [[COPY5]] 642 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV3]](s32) 643 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[UV7]](s32) 644 ; CHECK: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[COPY6]], [[COPY7]] 645 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[XOR]](s32) 646 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[XOR1]](s32) 647 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[XOR2]](s32) 648 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[XOR3]](s32) 649 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[COPY8]](s32) 650 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY9]](s32) 651 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY10]](s32) 652 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY11]](s32) 653 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32) 654 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 655 %0:_(<4 x s8>) = G_IMPLICIT_DEF 656 %1:_(<4 x s8>) = G_IMPLICIT_DEF 657 %2:_(<4 x s8>) = G_XOR %0, %1 658 %3:_(<4 x s32>) = G_ANYEXT %2 659 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 660... 661