1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=1 -mtriple=amdgcn-amd-amdpal -denormal-fp-math-f32=preserve-sign -mattr=+mad-mac-f32-insts < %s | FileCheck -check-prefixes=CHECK,GISEL %s 3; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=0 -mtriple=amdgcn-amd-amdpal -denormal-fp-math-f32=preserve-sign -mattr=+mad-mac-f32-insts < %s | FileCheck -check-prefixes=CHECK,CGP %s 4 5; The same 32-bit expansion is implemented in the legalizer and in AMDGPUCodeGenPrepare. 6 7define i64 @v_udiv_i64(i64 %num, i64 %den) { 8; CHECK-LABEL: v_udiv_i64: 9; CHECK: ; %bb.0: 10; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 11; CHECK-NEXT: v_or_b32_e32 v5, v1, v3 12; CHECK-NEXT: v_mov_b32_e32 v4, 0 13; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 14; CHECK-NEXT: ; implicit-def: $vgpr4_vgpr5 15; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 16; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 17; CHECK-NEXT: s_cbranch_execz BB0_2 18; CHECK-NEXT: ; %bb.1: 19; CHECK-NEXT: v_cvt_f32_u32_e32 v4, v2 20; CHECK-NEXT: v_cvt_f32_u32_e32 v5, v3 21; CHECK-NEXT: v_sub_i32_e32 v6, vcc, 0, v2 22; CHECK-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc 23; CHECK-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 24; CHECK-NEXT: v_rcp_iflag_f32_e32 v4, v4 25; CHECK-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 26; CHECK-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 27; CHECK-NEXT: v_trunc_f32_e32 v5, v5 28; CHECK-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 29; CHECK-NEXT: v_cvt_u32_f32_e32 v5, v5 30; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 31; CHECK-NEXT: v_mul_lo_u32 v8, v6, v5 32; CHECK-NEXT: v_mul_lo_u32 v9, v6, v4 33; CHECK-NEXT: v_mul_lo_u32 v10, v7, v4 34; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4 35; CHECK-NEXT: v_add_i32_e32 v8, vcc, v10, v8 36; CHECK-NEXT: v_mul_lo_u32 v10, v5, v9 37; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9 38; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9 39; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v11 40; CHECK-NEXT: v_mul_lo_u32 v11, v4, v8 41; CHECK-NEXT: v_mul_lo_u32 v13, v5, v8 42; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8 43; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8 44; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v11 45; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 46; CHECK-NEXT: v_add_i32_e32 v9, vcc, v13, v9 47; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 48; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v12 49; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 50; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v14 51; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 52; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 53; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v12 54; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 55; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 56; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 57; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v10 58; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v9 59; CHECK-NEXT: v_addc_u32_e64 v9, s[4:5], v5, v8, vcc 60; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v5, v8 61; CHECK-NEXT: v_mul_lo_u32 v8, v6, v4 62; CHECK-NEXT: v_mul_lo_u32 v7, v7, v4 63; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4 64; CHECK-NEXT: v_mul_lo_u32 v6, v6, v9 65; CHECK-NEXT: v_mul_lo_u32 v11, v9, v8 66; CHECK-NEXT: v_mul_hi_u32 v12, v4, v8 67; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8 68; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 69; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 70; CHECK-NEXT: v_mul_lo_u32 v7, v4, v6 71; CHECK-NEXT: v_mul_lo_u32 v10, v9, v6 72; CHECK-NEXT: v_mul_hi_u32 v13, v4, v6 73; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6 74; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v11, v7 75; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 76; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v10, v8 77; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 78; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v12 79; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 80; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v13 81; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 82; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v7 83; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v10, v11 84; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 85; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 86; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 87; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 88; CHECK-NEXT: v_addc_u32_e32 v5, vcc, v5, v6, vcc 89; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 90; CHECK-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 91; CHECK-NEXT: v_mul_lo_u32 v6, v1, v4 92; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4 93; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 94; CHECK-NEXT: v_mul_lo_u32 v8, v0, v5 95; CHECK-NEXT: v_mul_lo_u32 v9, v1, v5 96; CHECK-NEXT: v_mul_hi_u32 v10, v0, v5 97; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5 98; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 99; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 100; CHECK-NEXT: v_add_i32_e32 v4, vcc, v9, v4 101; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 102; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 103; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 104; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v10 105; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 106; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 107; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 108; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 109; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 110; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 111; CHECK-NEXT: v_mul_lo_u32 v7, v2, v4 112; CHECK-NEXT: v_mul_lo_u32 v8, v3, v4 113; CHECK-NEXT: v_mul_hi_u32 v9, v2, v4 114; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 115; CHECK-NEXT: v_mul_lo_u32 v6, v2, v5 116; CHECK-NEXT: v_add_i32_e32 v10, vcc, 1, v4 117; CHECK-NEXT: v_addc_u32_e32 v11, vcc, 0, v5, vcc 118; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 119; CHECK-NEXT: v_add_i32_e32 v8, vcc, 1, v10 120; CHECK-NEXT: v_addc_u32_e32 v12, vcc, 0, v11, vcc 121; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 122; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v0, v7 123; CHECK-NEXT: v_subb_u32_e64 v9, s[4:5], v1, v6, vcc 124; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v6 125; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v2 126; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 127; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v3 128; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 129; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc 130; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, v9, v3 131; CHECK-NEXT: v_cndmask_b32_e32 v6, v13, v6, vcc 132; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v7, v2 133; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 134; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v7, v2 135; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 136; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3 137; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc 138; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 139; CHECK-NEXT: v_cndmask_b32_e32 v1, v9, v7, vcc 140; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 141; CHECK-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc 142; CHECK-NEXT: v_cndmask_b32_e32 v3, v11, v12, vcc 143; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 144; CHECK-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc 145; CHECK-NEXT: v_cndmask_b32_e32 v5, v5, v3, vcc 146; CHECK-NEXT: BB0_2: ; %Flow 147; CHECK-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 148; CHECK-NEXT: s_xor_b64 exec, exec, s[6:7] 149; CHECK-NEXT: s_cbranch_execz BB0_4 150; CHECK-NEXT: ; %bb.3: 151; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v2 152; CHECK-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 153; CHECK-NEXT: v_rcp_iflag_f32_e32 v1, v1 154; CHECK-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1 155; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 156; CHECK-NEXT: v_mul_lo_u32 v3, v3, v1 157; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 158; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v3 159; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 160; CHECK-NEXT: v_mul_lo_u32 v3, v1, v2 161; CHECK-NEXT: v_add_i32_e32 v4, vcc, 1, v1 162; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 163; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 164; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc 165; CHECK-NEXT: v_sub_i32_e64 v3, s[4:5], v0, v2 166; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc 167; CHECK-NEXT: v_add_i32_e32 v3, vcc, 1, v1 168; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 169; CHECK-NEXT: v_cndmask_b32_e32 v4, v1, v3, vcc 170; CHECK-NEXT: v_mov_b32_e32 v5, 0 171; CHECK-NEXT: BB0_4: 172; CHECK-NEXT: s_or_b64 exec, exec, s[6:7] 173; CHECK-NEXT: v_mov_b32_e32 v0, v4 174; CHECK-NEXT: v_mov_b32_e32 v1, v5 175; CHECK-NEXT: s_setpc_b64 s[30:31] 176 %result = udiv i64 %num, %den 177 ret i64 %result 178} 179 180; FIXME: This is a workaround for not handling uniform VGPR case. 181declare i32 @llvm.amdgcn.readfirstlane(i32) 182 183define amdgpu_ps i64 @s_udiv_i64(i64 inreg %num, i64 inreg %den) { 184; CHECK-LABEL: s_udiv_i64: 185; CHECK: ; %bb.0: 186; CHECK-NEXT: s_or_b64 s[6:7], s[0:1], s[2:3] 187; CHECK-NEXT: s_mov_b32 s4, 0 188; CHECK-NEXT: s_mov_b32 s5, -1 189; CHECK-NEXT: s_and_b64 s[6:7], s[6:7], s[4:5] 190; CHECK-NEXT: v_cmp_ne_u64_e64 vcc, s[6:7], 0 191; CHECK-NEXT: s_cbranch_vccz BB1_2 192; CHECK-NEXT: ; %bb.1: 193; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s2 194; CHECK-NEXT: v_mov_b32_e32 v1, s3 195; CHECK-NEXT: v_cvt_f32_u32_e32 v2, s3 196; CHECK-NEXT: s_sub_u32 s6, 0, s2 197; CHECK-NEXT: s_cselect_b32 s4, 1, 0 198; CHECK-NEXT: v_mov_b32_e32 v3, s1 199; CHECK-NEXT: v_mac_f32_e32 v0, 0x4f800000, v2 200; CHECK-NEXT: s_and_b32 s4, s4, 1 201; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 202; CHECK-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 203; CHECK-NEXT: s_cmp_lg_u32 s4, 0 204; CHECK-NEXT: s_subb_u32 s7, 0, s3 205; CHECK-NEXT: v_mul_f32_e32 v2, 0x2f800000, v0 206; CHECK-NEXT: v_trunc_f32_e32 v2, v2 207; CHECK-NEXT: v_mac_f32_e32 v0, 0xcf800000, v2 208; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 209; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 210; CHECK-NEXT: v_mul_lo_u32 v4, s6, v2 211; CHECK-NEXT: v_mul_lo_u32 v5, s6, v0 212; CHECK-NEXT: v_mul_lo_u32 v6, s7, v0 213; CHECK-NEXT: v_mul_hi_u32 v7, s6, v0 214; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 215; CHECK-NEXT: v_mul_lo_u32 v6, v2, v5 216; CHECK-NEXT: v_mul_hi_u32 v8, v0, v5 217; CHECK-NEXT: v_mul_hi_u32 v5, v2, v5 218; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 219; CHECK-NEXT: v_mul_lo_u32 v7, v0, v4 220; CHECK-NEXT: v_mul_lo_u32 v9, v2, v4 221; CHECK-NEXT: v_mul_hi_u32 v10, v0, v4 222; CHECK-NEXT: v_mul_hi_u32 v4, v2, v4 223; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 224; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 225; CHECK-NEXT: v_add_i32_e32 v5, vcc, v9, v5 226; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 227; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 228; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 229; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10 230; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 231; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 232; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v8 233; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 234; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 235; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 236; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 237; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v5 238; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v2, v4, vcc 239; CHECK-NEXT: v_add_i32_e64 v2, s[4:5], v2, v4 240; CHECK-NEXT: v_mul_lo_u32 v4, s6, v0 241; CHECK-NEXT: v_mul_lo_u32 v6, s7, v0 242; CHECK-NEXT: v_mul_hi_u32 v7, s6, v0 243; CHECK-NEXT: v_mul_lo_u32 v8, s6, v5 244; CHECK-NEXT: v_mul_lo_u32 v9, v5, v4 245; CHECK-NEXT: v_mul_hi_u32 v10, v0, v4 246; CHECK-NEXT: v_mul_hi_u32 v4, v5, v4 247; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 248; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 249; CHECK-NEXT: v_mul_lo_u32 v7, v0, v6 250; CHECK-NEXT: v_mul_lo_u32 v8, v5, v6 251; CHECK-NEXT: v_mul_hi_u32 v11, v0, v6 252; CHECK-NEXT: v_mul_hi_u32 v5, v5, v6 253; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v9, v7 254; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 255; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v8, v4 256; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 257; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 258; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 259; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v11 260; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 261; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 262; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v9 263; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v6 264; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 265; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 266; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v5, v6 267; CHECK-NEXT: v_addc_u32_e32 v2, vcc, v2, v5, vcc 268; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v4 269; CHECK-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc 270; CHECK-NEXT: v_mul_lo_u32 v4, s1, v0 271; CHECK-NEXT: v_mul_hi_u32 v5, s0, v0 272; CHECK-NEXT: v_mul_hi_u32 v0, s1, v0 273; CHECK-NEXT: v_mul_lo_u32 v6, s0, v2 274; CHECK-NEXT: v_mul_lo_u32 v7, s1, v2 275; CHECK-NEXT: v_mul_hi_u32 v8, s0, v2 276; CHECK-NEXT: v_mul_hi_u32 v2, s1, v2 277; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 278; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 279; CHECK-NEXT: v_add_i32_e32 v0, vcc, v7, v0 280; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 281; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 282; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 283; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v8 284; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 285; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 286; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5 287; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v4 288; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 289; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 290; CHECK-NEXT: v_mul_lo_u32 v5, s2, v0 291; CHECK-NEXT: v_mul_lo_u32 v6, s3, v0 292; CHECK-NEXT: v_mul_hi_u32 v7, s2, v0 293; CHECK-NEXT: v_add_i32_e32 v8, vcc, 1, v0 294; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 295; CHECK-NEXT: v_add_i32_e32 v4, vcc, 1, v8 296; CHECK-NEXT: v_mul_lo_u32 v2, s2, v2 297; CHECK-NEXT: v_add_i32_e32 v2, vcc, v6, v2 298; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v7 299; CHECK-NEXT: v_sub_i32_e32 v5, vcc, s0, v5 300; CHECK-NEXT: v_subb_u32_e64 v3, s[4:5], v3, v2, vcc 301; CHECK-NEXT: v_sub_i32_e64 v2, s[4:5], s1, v2 302; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s2, v5 303; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 304; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s3, v3 305; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 306; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v2, v1, vcc 307; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, s3, v3 308; CHECK-NEXT: v_cndmask_b32_e32 v2, v7, v6, vcc 309; CHECK-NEXT: v_subrev_i32_e32 v3, vcc, s2, v5 310; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 311; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s2, v3 312; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc 313; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s3, v1 314; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 315; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 316; CHECK-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc 317; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 318; CHECK-NEXT: v_cndmask_b32_e32 v1, v8, v4, vcc 319; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 320; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 321; CHECK-NEXT: s_mov_b32 s5, 0 322; CHECK-NEXT: s_branch BB1_3 323; CHECK-NEXT: BB1_2: 324; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 325; CHECK-NEXT: BB1_3: ; %Flow 326; CHECK-NEXT: s_xor_b32 s1, s5, -1 327; CHECK-NEXT: s_and_b32 s1, s1, 1 328; CHECK-NEXT: s_cmp_lg_u32 s1, 0 329; CHECK-NEXT: s_cbranch_scc1 BB1_5 330; CHECK-NEXT: ; %bb.4: 331; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s2 332; CHECK-NEXT: s_sub_i32 s1, 0, s2 333; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 334; CHECK-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 335; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 336; CHECK-NEXT: v_mul_lo_u32 v1, s1, v0 337; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 338; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 339; CHECK-NEXT: v_mul_hi_u32 v0, s0, v0 340; CHECK-NEXT: v_mul_lo_u32 v1, v0, s2 341; CHECK-NEXT: v_add_i32_e32 v2, vcc, 1, v0 342; CHECK-NEXT: v_sub_i32_e32 v1, vcc, s0, v1 343; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s2, v1 344; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 345; CHECK-NEXT: v_subrev_i32_e64 v2, s[0:1], s2, v1 346; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc 347; CHECK-NEXT: v_add_i32_e32 v2, vcc, 1, v0 348; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s2, v1 349; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 350; CHECK-NEXT: BB1_5: 351; CHECK-NEXT: v_readfirstlane_b32 s0, v0 352; CHECK-NEXT: s_mov_b32 s1, s0 353; CHECK-NEXT: ; return to shader part epilog 354 %result = udiv i64 %num, %den 355 %cast = bitcast i64 %result to <2 x i32> 356 %elt.0 = extractelement <2 x i32> %cast, i32 0 357 %elt.1 = extractelement <2 x i32> %cast, i32 1 358 %res.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.0) 359 %res.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.1) 360 %ins.0 = insertelement <2 x i32> undef, i32 %res.0, i32 0 361 %ins.1 = insertelement <2 x i32> %ins.0, i32 %res.0, i32 1 362 %cast.back = bitcast <2 x i32> %ins.1 to i64 363 ret i64 %cast.back 364} 365 366define <2 x i64> @v_udiv_v2i64(<2 x i64> %num, <2 x i64> %den) { 367; GISEL-LABEL: v_udiv_v2i64: 368; GISEL: ; %bb.0: 369; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 370; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v4 371; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v5 372; GISEL-NEXT: v_mac_f32_e32 v8, 0x4f800000, v9 373; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v8 374; GISEL-NEXT: v_mul_f32_e32 v8, 0x5f7ffffc, v8 375; GISEL-NEXT: v_mul_f32_e32 v9, 0x2f800000, v8 376; GISEL-NEXT: v_trunc_f32_e32 v9, v9 377; GISEL-NEXT: v_mac_f32_e32 v8, 0xcf800000, v9 378; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 379; GISEL-NEXT: v_cvt_u32_f32_e32 v9, v9 380; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v4 381; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 382; GISEL-NEXT: v_mul_lo_u32 v12, v10, v8 383; GISEL-NEXT: v_mul_lo_u32 v13, v11, v8 384; GISEL-NEXT: v_mul_lo_u32 v14, v10, v9 385; GISEL-NEXT: v_mul_hi_u32 v15, v10, v8 386; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 387; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 388; GISEL-NEXT: v_mul_lo_u32 v14, v9, v12 389; GISEL-NEXT: v_mul_lo_u32 v15, v8, v13 390; GISEL-NEXT: v_mul_hi_u32 v16, v8, v12 391; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 392; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 393; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v16 394; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 395; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 396; GISEL-NEXT: v_mul_lo_u32 v15, v9, v13 397; GISEL-NEXT: v_mul_hi_u32 v12, v9, v12 398; GISEL-NEXT: v_mul_hi_u32 v16, v8, v13 399; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v12 400; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 401; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v16 402; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 403; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v16 404; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 405; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 406; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 407; GISEL-NEXT: v_mul_hi_u32 v13, v9, v13 408; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 409; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 410; GISEL-NEXT: v_addc_u32_e64 v12, s[4:5], v9, v13, vcc 411; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 412; GISEL-NEXT: v_mul_lo_u32 v13, v10, v8 413; GISEL-NEXT: v_mul_lo_u32 v11, v11, v8 414; GISEL-NEXT: v_mul_lo_u32 v14, v10, v12 415; GISEL-NEXT: v_mul_hi_u32 v10, v10, v8 416; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 417; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 418; GISEL-NEXT: v_mul_lo_u32 v11, v12, v13 419; GISEL-NEXT: v_mul_lo_u32 v14, v8, v10 420; GISEL-NEXT: v_mul_hi_u32 v15, v8, v13 421; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 422; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 423; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v15 424; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 425; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 426; GISEL-NEXT: v_mul_lo_u32 v14, v12, v10 427; GISEL-NEXT: v_mul_hi_u32 v13, v12, v13 428; GISEL-NEXT: v_mul_hi_u32 v15, v8, v10 429; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 430; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 431; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 432; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 433; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v14, v15 434; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 435; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 436; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 437; GISEL-NEXT: v_mul_hi_u32 v10, v12, v10 438; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 439; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 440; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v9, v10, vcc 441; GISEL-NEXT: v_addc_u32_e64 v9, vcc, 0, v9, s[4:5] 442; GISEL-NEXT: v_mul_lo_u32 v10, v1, v8 443; GISEL-NEXT: v_mul_lo_u32 v11, v0, v9 444; GISEL-NEXT: v_mul_hi_u32 v12, v0, v8 445; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 446; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 447; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 448; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 449; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 450; GISEL-NEXT: v_mul_lo_u32 v11, v1, v9 451; GISEL-NEXT: v_mul_hi_u32 v8, v1, v8 452; GISEL-NEXT: v_mul_hi_u32 v12, v0, v9 453; GISEL-NEXT: v_add_i32_e32 v8, vcc, v11, v8 454; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 455; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 456; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 457; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 458; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 459; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 460; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 461; GISEL-NEXT: v_mul_hi_u32 v9, v1, v9 462; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 463; GISEL-NEXT: v_mul_lo_u32 v10, v4, v8 464; GISEL-NEXT: v_mul_lo_u32 v11, v5, v8 465; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 466; GISEL-NEXT: v_mul_hi_u32 v13, v4, v8 467; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 468; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 469; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 470; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], v1, v11, vcc 471; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v11 472; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v5 473; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 474; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v4 475; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 476; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v5 477; GISEL-NEXT: v_cndmask_b32_e64 v10, v11, v12, s[4:5] 478; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v4 479; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 480; GISEL-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 481; GISEL-NEXT: v_add_i32_e32 v11, vcc, 1, v8 482; GISEL-NEXT: v_addc_u32_e32 v12, vcc, 0, v9, vcc 483; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5 484; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, vcc 485; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 486; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 487; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v5 488; GISEL-NEXT: v_cndmask_b32_e32 v0, v13, v0, vcc 489; GISEL-NEXT: v_add_i32_e32 v1, vcc, 1, v11 490; GISEL-NEXT: v_addc_u32_e32 v4, vcc, 0, v12, vcc 491; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 492; GISEL-NEXT: v_cndmask_b32_e32 v0, v11, v1, vcc 493; GISEL-NEXT: v_cndmask_b32_e32 v1, v12, v4, vcc 494; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 495; GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc 496; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc 497; GISEL-NEXT: v_cvt_f32_u32_e32 v4, v6 498; GISEL-NEXT: v_cvt_f32_u32_e32 v5, v7 499; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 500; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 501; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 502; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 503; GISEL-NEXT: v_trunc_f32_e32 v5, v5 504; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 505; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 506; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 507; GISEL-NEXT: v_sub_i32_e32 v8, vcc, 0, v6 508; GISEL-NEXT: v_subb_u32_e32 v9, vcc, 0, v7, vcc 509; GISEL-NEXT: v_mul_lo_u32 v10, v8, v4 510; GISEL-NEXT: v_mul_lo_u32 v11, v9, v4 511; GISEL-NEXT: v_mul_lo_u32 v12, v8, v5 512; GISEL-NEXT: v_mul_hi_u32 v13, v8, v4 513; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 514; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 515; GISEL-NEXT: v_mul_lo_u32 v12, v5, v10 516; GISEL-NEXT: v_mul_lo_u32 v13, v4, v11 517; GISEL-NEXT: v_mul_hi_u32 v14, v4, v10 518; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 519; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 520; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 521; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 522; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 523; GISEL-NEXT: v_mul_lo_u32 v13, v5, v11 524; GISEL-NEXT: v_mul_hi_u32 v10, v5, v10 525; GISEL-NEXT: v_mul_hi_u32 v14, v4, v11 526; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 527; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 528; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v14 529; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 530; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 531; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 532; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 533; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 534; GISEL-NEXT: v_mul_hi_u32 v11, v5, v11 535; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 536; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 537; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v11, vcc 538; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v11 539; GISEL-NEXT: v_mul_lo_u32 v11, v8, v4 540; GISEL-NEXT: v_mul_lo_u32 v9, v9, v4 541; GISEL-NEXT: v_mul_lo_u32 v12, v8, v10 542; GISEL-NEXT: v_mul_hi_u32 v8, v8, v4 543; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 544; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 545; GISEL-NEXT: v_mul_lo_u32 v9, v10, v11 546; GISEL-NEXT: v_mul_lo_u32 v12, v4, v8 547; GISEL-NEXT: v_mul_hi_u32 v13, v4, v11 548; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 549; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 550; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 551; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 552; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 553; GISEL-NEXT: v_mul_lo_u32 v12, v10, v8 554; GISEL-NEXT: v_mul_hi_u32 v11, v10, v11 555; GISEL-NEXT: v_mul_hi_u32 v13, v4, v8 556; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 557; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 558; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 559; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 560; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 561; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 562; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 563; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 564; GISEL-NEXT: v_mul_hi_u32 v8, v10, v8 565; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 566; GISEL-NEXT: v_add_i32_e64 v4, s[4:5], v4, v9 567; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 568; GISEL-NEXT: v_addc_u32_e64 v5, vcc, 0, v5, s[4:5] 569; GISEL-NEXT: v_mul_lo_u32 v8, v3, v4 570; GISEL-NEXT: v_mul_lo_u32 v9, v2, v5 571; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 572; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 573; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 574; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 575; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 576; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 577; GISEL-NEXT: v_mul_lo_u32 v9, v3, v5 578; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 579; GISEL-NEXT: v_mul_hi_u32 v10, v2, v5 580; GISEL-NEXT: v_add_i32_e32 v4, vcc, v9, v4 581; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 582; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 583; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 584; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 585; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 586; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 587; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 588; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 589; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 590; GISEL-NEXT: v_mul_lo_u32 v8, v6, v4 591; GISEL-NEXT: v_mul_lo_u32 v9, v7, v4 592; GISEL-NEXT: v_mul_lo_u32 v10, v6, v5 593; GISEL-NEXT: v_mul_hi_u32 v11, v6, v4 594; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 595; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 596; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 597; GISEL-NEXT: v_subb_u32_e64 v8, s[4:5], v3, v9, vcc 598; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v9 599; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v7 600; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 601; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6 602; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 603; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v7 604; GISEL-NEXT: v_cndmask_b32_e64 v8, v9, v10, s[4:5] 605; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v2, v6 606; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v7, vcc 607; GISEL-NEXT: v_subbrev_u32_e64 v3, vcc, 0, v3, s[4:5] 608; GISEL-NEXT: v_add_i32_e32 v9, vcc, 1, v4 609; GISEL-NEXT: v_addc_u32_e32 v10, vcc, 0, v5, vcc 610; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7 611; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 612; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 613; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 614; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v7 615; GISEL-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 616; GISEL-NEXT: v_add_i32_e32 v3, vcc, 1, v9 617; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v10, vcc 618; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 619; GISEL-NEXT: v_cndmask_b32_e32 v2, v9, v3, vcc 620; GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v6, vcc 621; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 622; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc 623; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 624; GISEL-NEXT: s_setpc_b64 s[30:31] 625; 626; CGP-LABEL: v_udiv_v2i64: 627; CGP: ; %bb.0: 628; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 629; CGP-NEXT: v_mov_b32_e32 v8, v0 630; CGP-NEXT: v_mov_b32_e32 v9, v1 631; CGP-NEXT: v_or_b32_e32 v1, v9, v5 632; CGP-NEXT: v_mov_b32_e32 v0, 0 633; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 634; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 635; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 636; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 637; CGP-NEXT: s_cbranch_execz BB2_2 638; CGP-NEXT: ; %bb.1: 639; CGP-NEXT: v_cvt_f32_u32_e32 v0, v4 640; CGP-NEXT: v_cvt_f32_u32_e32 v1, v5 641; CGP-NEXT: v_sub_i32_e32 v10, vcc, 0, v4 642; CGP-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 643; CGP-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 644; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 645; CGP-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 646; CGP-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 647; CGP-NEXT: v_trunc_f32_e32 v1, v1 648; CGP-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 649; CGP-NEXT: v_cvt_u32_f32_e32 v1, v1 650; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 651; CGP-NEXT: v_mul_lo_u32 v12, v10, v1 652; CGP-NEXT: v_mul_lo_u32 v13, v10, v0 653; CGP-NEXT: v_mul_lo_u32 v14, v11, v0 654; CGP-NEXT: v_mul_hi_u32 v15, v10, v0 655; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v12 656; CGP-NEXT: v_mul_lo_u32 v14, v1, v13 657; CGP-NEXT: v_mul_hi_u32 v16, v0, v13 658; CGP-NEXT: v_mul_hi_u32 v13, v1, v13 659; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 660; CGP-NEXT: v_mul_lo_u32 v15, v0, v12 661; CGP-NEXT: v_mul_lo_u32 v17, v1, v12 662; CGP-NEXT: v_mul_hi_u32 v18, v0, v12 663; CGP-NEXT: v_mul_hi_u32 v12, v1, v12 664; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v15 665; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 666; CGP-NEXT: v_add_i32_e32 v13, vcc, v17, v13 667; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 668; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 669; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 670; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v18 671; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 672; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 673; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v16 674; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 675; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 676; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 677; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 678; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v13 679; CGP-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc 680; CGP-NEXT: v_add_i32_e64 v1, s[4:5], v1, v12 681; CGP-NEXT: v_mul_lo_u32 v12, v10, v0 682; CGP-NEXT: v_mul_lo_u32 v11, v11, v0 683; CGP-NEXT: v_mul_hi_u32 v14, v10, v0 684; CGP-NEXT: v_mul_lo_u32 v10, v10, v13 685; CGP-NEXT: v_mul_lo_u32 v15, v13, v12 686; CGP-NEXT: v_mul_hi_u32 v16, v0, v12 687; CGP-NEXT: v_mul_hi_u32 v12, v13, v12 688; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 689; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v14 690; CGP-NEXT: v_mul_lo_u32 v11, v0, v10 691; CGP-NEXT: v_mul_lo_u32 v14, v13, v10 692; CGP-NEXT: v_mul_hi_u32 v17, v0, v10 693; CGP-NEXT: v_mul_hi_u32 v10, v13, v10 694; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v15, v11 695; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 696; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 697; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 698; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16 699; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 700; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v17 701; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 702; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 703; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v15 704; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 705; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 706; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 707; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 708; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v10, vcc 709; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v11 710; CGP-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 711; CGP-NEXT: v_mul_lo_u32 v10, v9, v0 712; CGP-NEXT: v_mul_hi_u32 v11, v8, v0 713; CGP-NEXT: v_mul_hi_u32 v0, v9, v0 714; CGP-NEXT: v_mul_lo_u32 v12, v8, v1 715; CGP-NEXT: v_mul_lo_u32 v13, v9, v1 716; CGP-NEXT: v_mul_hi_u32 v14, v8, v1 717; CGP-NEXT: v_mul_hi_u32 v1, v9, v1 718; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 719; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 720; CGP-NEXT: v_add_i32_e32 v0, vcc, v13, v0 721; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 722; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 723; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 724; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v14 725; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 726; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 727; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 728; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v10 729; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 730; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 731; CGP-NEXT: v_mul_lo_u32 v11, v4, v0 732; CGP-NEXT: v_mul_lo_u32 v12, v5, v0 733; CGP-NEXT: v_mul_hi_u32 v13, v4, v0 734; CGP-NEXT: v_add_i32_e32 v1, vcc, v1, v10 735; CGP-NEXT: v_mul_lo_u32 v10, v4, v1 736; CGP-NEXT: v_add_i32_e32 v14, vcc, 1, v0 737; CGP-NEXT: v_addc_u32_e32 v15, vcc, 0, v1, vcc 738; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 739; CGP-NEXT: v_add_i32_e32 v12, vcc, 1, v14 740; CGP-NEXT: v_addc_u32_e32 v16, vcc, 0, v15, vcc 741; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 742; CGP-NEXT: v_sub_i32_e32 v11, vcc, v8, v11 743; CGP-NEXT: v_subb_u32_e64 v13, s[4:5], v9, v10, vcc 744; CGP-NEXT: v_sub_i32_e64 v9, s[4:5], v9, v10 745; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v4 746; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 747; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v13, v5 748; CGP-NEXT: v_cndmask_b32_e64 v17, 0, -1, s[4:5] 749; CGP-NEXT: v_subb_u32_e32 v9, vcc, v9, v5, vcc 750; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v13, v5 751; CGP-NEXT: v_cndmask_b32_e32 v10, v17, v10, vcc 752; CGP-NEXT: v_sub_i32_e32 v11, vcc, v11, v4 753; CGP-NEXT: v_subbrev_u32_e32 v9, vcc, 0, v9, vcc 754; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v11, v4 755; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 756; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v9, v5 757; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, vcc 758; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v9, v5 759; CGP-NEXT: v_cndmask_b32_e32 v5, v13, v11, vcc 760; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 761; CGP-NEXT: v_cndmask_b32_e32 v5, v14, v12, vcc 762; CGP-NEXT: v_cndmask_b32_e32 v9, v15, v16, vcc 763; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 764; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 765; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc 766; CGP-NEXT: BB2_2: ; %Flow2 767; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 768; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] 769; CGP-NEXT: s_cbranch_execz BB2_4 770; CGP-NEXT: ; %bb.3: 771; CGP-NEXT: v_cvt_f32_u32_e32 v0, v4 772; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v4 773; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 774; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 775; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 776; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 777; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 778; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 779; CGP-NEXT: v_mul_hi_u32 v0, v8, v0 780; CGP-NEXT: v_mul_lo_u32 v1, v0, v4 781; CGP-NEXT: v_add_i32_e32 v5, vcc, 1, v0 782; CGP-NEXT: v_sub_i32_e32 v1, vcc, v8, v1 783; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v1, v4 784; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 785; CGP-NEXT: v_sub_i32_e64 v5, s[4:5], v1, v4 786; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc 787; CGP-NEXT: v_add_i32_e32 v5, vcc, 1, v0 788; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v1, v4 789; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 790; CGP-NEXT: v_mov_b32_e32 v1, 0 791; CGP-NEXT: BB2_4: 792; CGP-NEXT: s_or_b64 exec, exec, s[6:7] 793; CGP-NEXT: v_or_b32_e32 v5, v3, v7 794; CGP-NEXT: v_mov_b32_e32 v4, 0 795; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 796; CGP-NEXT: ; implicit-def: $vgpr4_vgpr5 797; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 798; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 799; CGP-NEXT: s_cbranch_execz BB2_6 800; CGP-NEXT: ; %bb.5: 801; CGP-NEXT: v_cvt_f32_u32_e32 v4, v6 802; CGP-NEXT: v_cvt_f32_u32_e32 v5, v7 803; CGP-NEXT: v_sub_i32_e32 v8, vcc, 0, v6 804; CGP-NEXT: v_subb_u32_e32 v9, vcc, 0, v7, vcc 805; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 806; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 807; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 808; CGP-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 809; CGP-NEXT: v_trunc_f32_e32 v5, v5 810; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 811; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 812; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 813; CGP-NEXT: v_mul_lo_u32 v10, v8, v5 814; CGP-NEXT: v_mul_lo_u32 v11, v8, v4 815; CGP-NEXT: v_mul_lo_u32 v12, v9, v4 816; CGP-NEXT: v_mul_hi_u32 v13, v8, v4 817; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 818; CGP-NEXT: v_mul_lo_u32 v12, v5, v11 819; CGP-NEXT: v_mul_hi_u32 v14, v4, v11 820; CGP-NEXT: v_mul_hi_u32 v11, v5, v11 821; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 822; CGP-NEXT: v_mul_lo_u32 v13, v4, v10 823; CGP-NEXT: v_mul_lo_u32 v15, v5, v10 824; CGP-NEXT: v_mul_hi_u32 v16, v4, v10 825; CGP-NEXT: v_mul_hi_u32 v10, v5, v10 826; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v13 827; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 828; CGP-NEXT: v_add_i32_e32 v11, vcc, v15, v11 829; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 830; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 831; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 832; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v16 833; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 834; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 835; CGP-NEXT: v_add_i32_e32 v13, vcc, v15, v14 836; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 837; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 838; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 839; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 840; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v11 841; CGP-NEXT: v_addc_u32_e64 v11, s[4:5], v5, v10, vcc 842; CGP-NEXT: v_add_i32_e64 v5, s[4:5], v5, v10 843; CGP-NEXT: v_mul_lo_u32 v10, v8, v4 844; CGP-NEXT: v_mul_lo_u32 v9, v9, v4 845; CGP-NEXT: v_mul_hi_u32 v12, v8, v4 846; CGP-NEXT: v_mul_lo_u32 v8, v8, v11 847; CGP-NEXT: v_mul_lo_u32 v13, v11, v10 848; CGP-NEXT: v_mul_hi_u32 v14, v4, v10 849; CGP-NEXT: v_mul_hi_u32 v10, v11, v10 850; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 851; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v12 852; CGP-NEXT: v_mul_lo_u32 v9, v4, v8 853; CGP-NEXT: v_mul_lo_u32 v12, v11, v8 854; CGP-NEXT: v_mul_hi_u32 v15, v4, v8 855; CGP-NEXT: v_mul_hi_u32 v8, v11, v8 856; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v13, v9 857; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 858; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v10 859; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 860; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v14 861; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 862; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v15 863; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 864; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 865; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v13 866; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v10, v9 867; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 868; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 869; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 870; CGP-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 871; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 872; CGP-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 873; CGP-NEXT: v_mul_lo_u32 v8, v3, v4 874; CGP-NEXT: v_mul_hi_u32 v9, v2, v4 875; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 876; CGP-NEXT: v_mul_lo_u32 v10, v2, v5 877; CGP-NEXT: v_mul_lo_u32 v11, v3, v5 878; CGP-NEXT: v_mul_hi_u32 v12, v2, v5 879; CGP-NEXT: v_mul_hi_u32 v5, v3, v5 880; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 881; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 882; CGP-NEXT: v_add_i32_e32 v4, vcc, v11, v4 883; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 884; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 885; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 886; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v12 887; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 888; CGP-NEXT: v_add_i32_e32 v8, vcc, v10, v8 889; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 890; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 891; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 892; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 893; CGP-NEXT: v_mul_lo_u32 v9, v6, v4 894; CGP-NEXT: v_mul_lo_u32 v10, v7, v4 895; CGP-NEXT: v_mul_hi_u32 v11, v6, v4 896; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v8 897; CGP-NEXT: v_mul_lo_u32 v8, v6, v5 898; CGP-NEXT: v_add_i32_e32 v12, vcc, 1, v4 899; CGP-NEXT: v_addc_u32_e32 v13, vcc, 0, v5, vcc 900; CGP-NEXT: v_add_i32_e32 v8, vcc, v10, v8 901; CGP-NEXT: v_add_i32_e32 v10, vcc, 1, v12 902; CGP-NEXT: v_addc_u32_e32 v14, vcc, 0, v13, vcc 903; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 904; CGP-NEXT: v_sub_i32_e32 v9, vcc, v2, v9 905; CGP-NEXT: v_subb_u32_e64 v11, s[4:5], v3, v8, vcc 906; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v8 907; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v6 908; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 909; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v7 910; CGP-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] 911; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v7, vcc 912; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v11, v7 913; CGP-NEXT: v_cndmask_b32_e32 v8, v15, v8, vcc 914; CGP-NEXT: v_sub_i32_e32 v9, vcc, v9, v6 915; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 916; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v9, v6 917; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc 918; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7 919; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 920; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v3, v7 921; CGP-NEXT: v_cndmask_b32_e32 v3, v11, v9, vcc 922; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 923; CGP-NEXT: v_cndmask_b32_e32 v3, v12, v10, vcc 924; CGP-NEXT: v_cndmask_b32_e32 v7, v13, v14, vcc 925; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 926; CGP-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc 927; CGP-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 928; CGP-NEXT: BB2_6: ; %Flow 929; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 930; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] 931; CGP-NEXT: s_cbranch_execz BB2_8 932; CGP-NEXT: ; %bb.7: 933; CGP-NEXT: v_cvt_f32_u32_e32 v3, v6 934; CGP-NEXT: v_sub_i32_e32 v4, vcc, 0, v6 935; CGP-NEXT: v_rcp_iflag_f32_e32 v3, v3 936; CGP-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3 937; CGP-NEXT: v_cvt_u32_f32_e32 v3, v3 938; CGP-NEXT: v_mul_lo_u32 v4, v4, v3 939; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 940; CGP-NEXT: v_add_i32_e32 v3, vcc, v3, v4 941; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 942; CGP-NEXT: v_mul_lo_u32 v4, v3, v6 943; CGP-NEXT: v_add_i32_e32 v5, vcc, 1, v3 944; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 945; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 946; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc 947; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v2, v6 948; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc 949; CGP-NEXT: v_add_i32_e32 v4, vcc, 1, v3 950; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 951; CGP-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc 952; CGP-NEXT: v_mov_b32_e32 v5, 0 953; CGP-NEXT: BB2_8: 954; CGP-NEXT: s_or_b64 exec, exec, s[6:7] 955; CGP-NEXT: v_mov_b32_e32 v2, v4 956; CGP-NEXT: v_mov_b32_e32 v3, v5 957; CGP-NEXT: s_setpc_b64 s[30:31] 958 %result = udiv <2 x i64> %num, %den 959 ret <2 x i64> %result 960} 961 962define i64 @v_udiv_i64_pow2k_denom(i64 %num) { 963; CHECK-LABEL: v_udiv_i64_pow2k_denom: 964; CHECK: ; %bb.0: 965; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 966; CHECK-NEXT: v_cvt_f32_u32_e32 v2, 0x1000 967; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v3, 0 968; CHECK-NEXT: s_movk_i32 s6, 0xf000 969; CHECK-NEXT: s_movk_i32 s7, 0x1000 970; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 971; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 972; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 973; CHECK-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 974; CHECK-NEXT: v_trunc_f32_e32 v3, v3 975; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 976; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3 977; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 978; CHECK-NEXT: v_mul_lo_u32 v4, s6, v3 979; CHECK-NEXT: v_mul_lo_u32 v5, s6, v2 980; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2 981; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2 982; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 983; CHECK-NEXT: v_mul_lo_u32 v6, v3, v5 984; CHECK-NEXT: v_mul_hi_u32 v8, v2, v5 985; CHECK-NEXT: v_mul_hi_u32 v5, v3, v5 986; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 987; CHECK-NEXT: v_mul_lo_u32 v7, v2, v4 988; CHECK-NEXT: v_mul_lo_u32 v9, v3, v4 989; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4 990; CHECK-NEXT: v_mul_hi_u32 v4, v3, v4 991; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 992; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 993; CHECK-NEXT: v_add_i32_e32 v5, vcc, v9, v5 994; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 995; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 996; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 997; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10 998; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 999; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1000; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v8 1001; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1002; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1003; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1004; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 1005; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1006; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v3, v4, vcc 1007; CHECK-NEXT: v_add_i32_e64 v3, s[4:5], v3, v4 1008; CHECK-NEXT: v_mul_lo_u32 v4, s6, v2 1009; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2 1010; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2 1011; CHECK-NEXT: v_mul_lo_u32 v8, s6, v5 1012; CHECK-NEXT: v_mul_lo_u32 v9, v5, v4 1013; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4 1014; CHECK-NEXT: v_mul_hi_u32 v4, v5, v4 1015; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 1016; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1017; CHECK-NEXT: v_mul_lo_u32 v7, v2, v6 1018; CHECK-NEXT: v_mul_lo_u32 v8, v5, v6 1019; CHECK-NEXT: v_mul_hi_u32 v11, v2, v6 1020; CHECK-NEXT: v_mul_hi_u32 v5, v5, v6 1021; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v9, v7 1022; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1023; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v8, v4 1024; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1025; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 1026; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 1027; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v11 1028; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1029; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 1030; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v9 1031; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v6 1032; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 1033; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 1034; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v5, v6 1035; CHECK-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc 1036; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 1037; CHECK-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 1038; CHECK-NEXT: v_mul_lo_u32 v4, v1, v2 1039; CHECK-NEXT: v_mul_hi_u32 v5, v0, v2 1040; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 1041; CHECK-NEXT: v_mul_lo_u32 v6, v0, v3 1042; CHECK-NEXT: v_mul_lo_u32 v7, v1, v3 1043; CHECK-NEXT: v_mul_hi_u32 v8, v0, v3 1044; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 1045; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 1046; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1047; CHECK-NEXT: v_add_i32_e32 v2, vcc, v7, v2 1048; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1049; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1050; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1051; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 1052; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1053; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 1054; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1055; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 1056; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1057; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1058; CHECK-NEXT: v_mul_lo_u32 v5, s7, v2 1059; CHECK-NEXT: v_mul_lo_u32 v6, 0, v2 1060; CHECK-NEXT: v_mul_hi_u32 v7, s7, v2 1061; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v4 1062; CHECK-NEXT: v_mul_lo_u32 v4, s7, v3 1063; CHECK-NEXT: v_add_i32_e32 v8, vcc, 1, v2 1064; CHECK-NEXT: v_addc_u32_e32 v9, vcc, 0, v3, vcc 1065; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 1066; CHECK-NEXT: v_add_i32_e32 v6, vcc, 1, v8 1067; CHECK-NEXT: v_addc_u32_e32 v10, vcc, 0, v9, vcc 1068; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1069; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v5 1070; CHECK-NEXT: v_subb_u32_e64 v5, s[4:5], v1, v4, vcc 1071; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v4 1072; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 1073; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1074; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v5 1075; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1076; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1077; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v5 1078; CHECK-NEXT: v_cndmask_b32_e32 v4, v7, v4, vcc 1079; CHECK-NEXT: v_subrev_i32_e32 v0, vcc, s7, v0 1080; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1081; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s7, v0 1082; CHECK-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 1083; CHECK-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1084; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 1085; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1086; CHECK-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc 1087; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 1088; CHECK-NEXT: v_cndmask_b32_e32 v0, v8, v6, vcc 1089; CHECK-NEXT: v_cndmask_b32_e32 v1, v9, v10, vcc 1090; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1091; CHECK-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc 1092; CHECK-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc 1093; CHECK-NEXT: s_setpc_b64 s[30:31] 1094 %result = udiv i64 %num, 4096 1095 ret i64 %result 1096} 1097 1098define <2 x i64> @v_udiv_v2i64_pow2k_denom(<2 x i64> %num) { 1099; GISEL-LABEL: v_udiv_v2i64_pow2k_denom: 1100; GISEL: ; %bb.0: 1101; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1102; GISEL-NEXT: s_movk_i32 s10, 0x1000 1103; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s10 1104; GISEL-NEXT: s_sub_u32 s8, 0, s10 1105; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1106; GISEL-NEXT: v_cvt_f32_ubyte0_e32 v5, 0 1107; GISEL-NEXT: v_mov_b32_e32 v6, v4 1108; GISEL-NEXT: s_and_b32 s4, s4, 1 1109; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1110; GISEL-NEXT: v_mac_f32_e32 v6, 0x4f800000, v5 1111; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 1112; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v6 1113; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1114; GISEL-NEXT: s_subb_u32 s9, 0, 0 1115; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1116; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1117; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v4 1118; GISEL-NEXT: s_sub_u32 s11, 0, s10 1119; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1120; GISEL-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 1121; GISEL-NEXT: v_trunc_f32_e32 v6, v6 1122; GISEL-NEXT: s_and_b32 s4, s4, 1 1123; GISEL-NEXT: v_trunc_f32_e32 v7, v7 1124; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v6 1125; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 1126; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 1127; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 1128; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 1129; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1130; GISEL-NEXT: s_subb_u32 s6, 0, 0 1131; GISEL-NEXT: v_mul_lo_u32 v8, s11, v6 1132; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1133; GISEL-NEXT: v_mul_lo_u32 v9, s8, v7 1134; GISEL-NEXT: v_mul_lo_u32 v10, s11, v4 1135; GISEL-NEXT: v_mul_lo_u32 v11, s6, v4 1136; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1137; GISEL-NEXT: v_mul_lo_u32 v13, s8, v5 1138; GISEL-NEXT: v_mul_lo_u32 v14, s9, v5 1139; GISEL-NEXT: v_mul_hi_u32 v15, s8, v5 1140; GISEL-NEXT: v_add_i32_e32 v8, vcc, v11, v8 1141; GISEL-NEXT: v_mul_lo_u32 v11, v6, v10 1142; GISEL-NEXT: v_mul_hi_u32 v16, v4, v10 1143; GISEL-NEXT: v_mul_hi_u32 v10, v6, v10 1144; GISEL-NEXT: v_add_i32_e32 v9, vcc, v14, v9 1145; GISEL-NEXT: v_mul_lo_u32 v14, v7, v13 1146; GISEL-NEXT: v_mul_hi_u32 v17, v5, v13 1147; GISEL-NEXT: v_mul_hi_u32 v13, v7, v13 1148; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1149; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1150; GISEL-NEXT: v_mul_lo_u32 v12, v4, v8 1151; GISEL-NEXT: v_mul_lo_u32 v15, v6, v8 1152; GISEL-NEXT: v_mul_hi_u32 v18, v4, v8 1153; GISEL-NEXT: v_mul_hi_u32 v8, v6, v8 1154; GISEL-NEXT: v_mul_lo_u32 v19, v5, v9 1155; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v19 1156; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 1157; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1158; GISEL-NEXT: v_mul_lo_u32 v14, v7, v9 1159; GISEL-NEXT: v_mul_hi_u32 v17, v5, v9 1160; GISEL-NEXT: v_mul_hi_u32 v9, v7, v9 1161; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1162; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1163; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v15, v10 1164; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 1165; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 1166; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1167; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16 1168; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1169; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v18 1170; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 1171; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 1172; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v17 1173; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 1174; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1175; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v16 1176; GISEL-NEXT: v_add_i32_e32 v15, vcc, v19, v18 1177; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1178; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 1179; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1180; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 1181; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1182; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1183; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v15 1184; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1185; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1186; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 1187; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc 1188; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 1189; GISEL-NEXT: v_mul_lo_u32 v8, s11, v4 1190; GISEL-NEXT: v_mul_lo_u32 v11, s6, v4 1191; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1192; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v13 1193; GISEL-NEXT: v_addc_u32_e64 v13, s[6:7], v7, v9, s[4:5] 1194; GISEL-NEXT: v_add_i32_e64 v7, s[6:7], v7, v9 1195; GISEL-NEXT: v_mul_lo_u32 v9, s8, v5 1196; GISEL-NEXT: v_mul_lo_u32 v14, s9, v5 1197; GISEL-NEXT: v_mul_hi_u32 v15, s8, v5 1198; GISEL-NEXT: v_mul_lo_u32 v16, s11, v10 1199; GISEL-NEXT: v_mul_lo_u32 v17, v10, v8 1200; GISEL-NEXT: v_mul_hi_u32 v18, v4, v8 1201; GISEL-NEXT: v_mul_hi_u32 v8, v10, v8 1202; GISEL-NEXT: v_mul_lo_u32 v19, s8, v13 1203; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v16 1204; GISEL-NEXT: v_mul_lo_u32 v16, v13, v9 1205; GISEL-NEXT: v_add_i32_e64 v14, s[6:7], v14, v19 1206; GISEL-NEXT: v_mul_hi_u32 v19, v5, v9 1207; GISEL-NEXT: v_mul_hi_u32 v9, v13, v9 1208; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1209; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v14, v15 1210; GISEL-NEXT: v_mul_lo_u32 v14, v4, v11 1211; GISEL-NEXT: v_mul_lo_u32 v15, v5, v12 1212; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v16, v15 1213; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[6:7] 1214; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v15, v19 1215; GISEL-NEXT: v_mul_lo_u32 v15, v10, v11 1216; GISEL-NEXT: v_mul_hi_u32 v19, v4, v11 1217; GISEL-NEXT: v_mul_hi_u32 v10, v10, v11 1218; GISEL-NEXT: v_mul_lo_u32 v11, v13, v12 1219; GISEL-NEXT: v_mul_hi_u32 v13, v13, v12 1220; GISEL-NEXT: v_mul_hi_u32 v12, v5, v12 1221; GISEL-NEXT: v_add_i32_e64 v14, s[8:9], v17, v14 1222; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[8:9] 1223; GISEL-NEXT: v_add_i32_e64 v8, s[8:9], v15, v8 1224; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9] 1225; GISEL-NEXT: v_add_i32_e64 v9, s[8:9], v11, v9 1226; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[8:9] 1227; GISEL-NEXT: v_add_i32_e64 v14, s[8:9], v14, v18 1228; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9] 1229; GISEL-NEXT: v_add_i32_e64 v8, s[8:9], v8, v19 1230; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9] 1231; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7] 1232; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12 1233; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1234; GISEL-NEXT: v_add_i32_e64 v14, s[6:7], v17, v14 1235; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v15, v18 1236; GISEL-NEXT: v_add_i32_e64 v16, s[6:7], v16, v19 1237; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1238; GISEL-NEXT: v_add_i32_e64 v8, s[6:7], v8, v14 1239; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1240; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v16 1241; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7] 1242; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v15, v12 1243; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v14 1244; GISEL-NEXT: v_add_i32_e64 v10, s[6:7], v10, v12 1245; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v13, v11 1246; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v10, vcc 1247; GISEL-NEXT: v_addc_u32_e64 v7, vcc, v7, v11, s[4:5] 1248; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1249; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1250; GISEL-NEXT: v_mul_lo_u32 v8, v3, v4 1251; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 1252; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 1253; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1254; GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 1255; GISEL-NEXT: v_mul_lo_u32 v9, v1, v5 1256; GISEL-NEXT: v_mul_hi_u32 v11, v0, v5 1257; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 1258; GISEL-NEXT: v_mul_lo_u32 v12, v2, v6 1259; GISEL-NEXT: v_mul_lo_u32 v13, v3, v6 1260; GISEL-NEXT: v_mul_hi_u32 v14, v2, v6 1261; GISEL-NEXT: v_mul_hi_u32 v6, v3, v6 1262; GISEL-NEXT: v_mul_lo_u32 v15, v0, v7 1263; GISEL-NEXT: v_mul_lo_u32 v16, v1, v7 1264; GISEL-NEXT: v_mul_hi_u32 v17, v0, v7 1265; GISEL-NEXT: v_mul_hi_u32 v7, v1, v7 1266; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1267; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1268; GISEL-NEXT: v_add_i32_e32 v4, vcc, v13, v4 1269; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 1270; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1271; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1272; GISEL-NEXT: v_add_i32_e32 v5, vcc, v16, v5 1273; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 1274; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1275; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1276; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v14 1277; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1278; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1279; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1280; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v17 1281; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1282; GISEL-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1283; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 1284; GISEL-NEXT: v_add_i32_e32 v9, vcc, v15, v9 1285; GISEL-NEXT: v_add_i32_e32 v11, vcc, v16, v11 1286; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1287; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1288; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1289; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1290; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1291; GISEL-NEXT: v_mul_lo_u32 v10, s10, v4 1292; GISEL-NEXT: v_mul_lo_u32 v12, 0, v4 1293; GISEL-NEXT: v_mul_hi_u32 v13, s10, v4 1294; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1295; GISEL-NEXT: v_mul_lo_u32 v11, s10, v5 1296; GISEL-NEXT: v_mul_lo_u32 v14, 0, v5 1297; GISEL-NEXT: v_mul_hi_u32 v15, s10, v5 1298; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1299; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1300; GISEL-NEXT: v_mul_lo_u32 v8, s10, v6 1301; GISEL-NEXT: v_add_i32_e32 v9, vcc, 1, v4 1302; GISEL-NEXT: v_addc_u32_e32 v16, vcc, 0, v6, vcc 1303; GISEL-NEXT: v_mul_lo_u32 v17, s10, v7 1304; GISEL-NEXT: v_add_i32_e32 v18, vcc, 1, v5 1305; GISEL-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc 1306; GISEL-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1307; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v17 1308; GISEL-NEXT: v_add_i32_e32 v14, vcc, 1, v9 1309; GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v16, vcc 1310; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v13 1311; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 1312; GISEL-NEXT: v_add_i32_e32 v13, vcc, 1, v18 1313; GISEL-NEXT: v_addc_u32_e32 v15, vcc, 0, v19, vcc 1314; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 1315; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v8, vcc 1316; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v8 1317; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s10, v2 1318; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 1319; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v11 1320; GISEL-NEXT: v_subb_u32_e64 v11, s[6:7], v1, v12, s[4:5] 1321; GISEL-NEXT: v_sub_i32_e64 v1, s[6:7], v1, v12 1322; GISEL-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v10 1323; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[6:7] 1324; GISEL-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v10 1325; GISEL-NEXT: v_cmp_le_u32_e64 s[8:9], s10, v0 1326; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[8:9] 1327; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1328; GISEL-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[6:7] 1329; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v11 1330; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 1331; GISEL-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 1332; GISEL-NEXT: v_subrev_i32_e32 v2, vcc, s10, v2 1333; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1334; GISEL-NEXT: v_cmp_le_u32_e32 vcc, s10, v2 1335; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 1336; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 1337; GISEL-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc 1338; GISEL-NEXT: v_subrev_i32_e32 v0, vcc, s10, v0 1339; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1340; GISEL-NEXT: v_cmp_le_u32_e32 vcc, s10, v0 1341; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 1342; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 1343; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 1344; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1345; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 1346; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 1347; GISEL-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 1348; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1349; GISEL-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 1350; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 1351; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v14, vcc 1352; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0 1353; GISEL-NEXT: v_cndmask_b32_e64 v0, v18, v13, s[4:5] 1354; GISEL-NEXT: v_cndmask_b32_e32 v3, v16, v17, vcc 1355; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 1356; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v1, vcc 1357; GISEL-NEXT: v_cndmask_b32_e64 v1, v19, v15, s[4:5] 1358; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v10 1359; GISEL-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[4:5] 1360; GISEL-NEXT: v_cndmask_b32_e64 v1, v7, v1, s[4:5] 1361; GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 1362; GISEL-NEXT: s_setpc_b64 s[30:31] 1363; 1364; CGP-LABEL: v_udiv_v2i64_pow2k_denom: 1365; CGP: ; %bb.0: 1366; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1367; CGP-NEXT: v_cvt_f32_u32_e32 v4, 0x1000 1368; CGP-NEXT: v_cvt_f32_ubyte0_e32 v5, 0 1369; CGP-NEXT: s_movk_i32 s8, 0xf000 1370; CGP-NEXT: s_movk_i32 s10, 0x1000 1371; CGP-NEXT: v_mov_b32_e32 v6, v4 1372; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1373; CGP-NEXT: v_mac_f32_e32 v6, 0x4f800000, v5 1374; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 1375; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v6 1376; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1377; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1378; CGP-NEXT: v_mul_f32_e32 v6, 0x2f800000, v4 1379; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 1380; CGP-NEXT: v_trunc_f32_e32 v6, v6 1381; CGP-NEXT: v_trunc_f32_e32 v7, v7 1382; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v6 1383; CGP-NEXT: v_cvt_u32_f32_e32 v6, v6 1384; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 1385; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 1386; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 1387; CGP-NEXT: v_mul_lo_u32 v8, s8, v6 1388; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 1389; CGP-NEXT: v_mul_lo_u32 v9, s8, v7 1390; CGP-NEXT: v_mul_lo_u32 v10, s8, v4 1391; CGP-NEXT: v_mul_lo_u32 v11, -1, v4 1392; CGP-NEXT: v_mul_hi_u32 v12, s8, v4 1393; CGP-NEXT: v_mul_lo_u32 v13, s8, v5 1394; CGP-NEXT: v_mul_lo_u32 v14, -1, v5 1395; CGP-NEXT: v_mul_hi_u32 v15, s8, v5 1396; CGP-NEXT: v_add_i32_e32 v8, vcc, v11, v8 1397; CGP-NEXT: v_mul_lo_u32 v11, v6, v10 1398; CGP-NEXT: v_mul_hi_u32 v16, v4, v10 1399; CGP-NEXT: v_mul_hi_u32 v10, v6, v10 1400; CGP-NEXT: v_add_i32_e32 v9, vcc, v14, v9 1401; CGP-NEXT: v_mul_lo_u32 v14, v7, v13 1402; CGP-NEXT: v_mul_hi_u32 v17, v5, v13 1403; CGP-NEXT: v_mul_hi_u32 v13, v7, v13 1404; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1405; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1406; CGP-NEXT: v_mul_lo_u32 v12, v4, v8 1407; CGP-NEXT: v_mul_lo_u32 v15, v6, v8 1408; CGP-NEXT: v_mul_hi_u32 v18, v4, v8 1409; CGP-NEXT: v_mul_hi_u32 v8, v6, v8 1410; CGP-NEXT: v_mul_lo_u32 v19, v5, v9 1411; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v19 1412; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 1413; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1414; CGP-NEXT: v_mul_lo_u32 v14, v7, v9 1415; CGP-NEXT: v_mul_hi_u32 v17, v5, v9 1416; CGP-NEXT: v_mul_hi_u32 v9, v7, v9 1417; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1418; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1419; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v15, v10 1420; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 1421; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 1422; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1423; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16 1424; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1425; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v18 1426; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 1427; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 1428; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v17 1429; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 1430; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1431; CGP-NEXT: v_add_i32_e32 v12, vcc, v15, v16 1432; CGP-NEXT: v_add_i32_e32 v15, vcc, v19, v18 1433; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1434; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 1435; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1436; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 1437; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1438; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1439; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v15 1440; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1441; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1442; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 1443; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc 1444; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 1445; CGP-NEXT: v_mul_lo_u32 v8, s8, v4 1446; CGP-NEXT: v_mul_lo_u32 v11, -1, v4 1447; CGP-NEXT: v_mul_hi_u32 v12, s8, v4 1448; CGP-NEXT: v_add_i32_e64 v5, s[4:5], v5, v13 1449; CGP-NEXT: v_addc_u32_e64 v13, s[6:7], v7, v9, s[4:5] 1450; CGP-NEXT: v_add_i32_e64 v7, s[6:7], v7, v9 1451; CGP-NEXT: v_mul_lo_u32 v9, s8, v5 1452; CGP-NEXT: v_mul_lo_u32 v14, -1, v5 1453; CGP-NEXT: v_mul_hi_u32 v15, s8, v5 1454; CGP-NEXT: v_mul_lo_u32 v16, s8, v10 1455; CGP-NEXT: v_mul_lo_u32 v17, v10, v8 1456; CGP-NEXT: v_mul_hi_u32 v18, v4, v8 1457; CGP-NEXT: v_mul_hi_u32 v8, v10, v8 1458; CGP-NEXT: v_mul_lo_u32 v19, s8, v13 1459; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v16 1460; CGP-NEXT: v_mul_lo_u32 v16, v13, v9 1461; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v14, v19 1462; CGP-NEXT: v_mul_hi_u32 v19, v5, v9 1463; CGP-NEXT: v_mul_hi_u32 v9, v13, v9 1464; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1465; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v14, v15 1466; CGP-NEXT: v_mul_lo_u32 v14, v4, v11 1467; CGP-NEXT: v_mul_lo_u32 v15, v5, v12 1468; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v16, v15 1469; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[6:7] 1470; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v19 1471; CGP-NEXT: v_mul_lo_u32 v15, v10, v11 1472; CGP-NEXT: v_mul_hi_u32 v19, v4, v11 1473; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 1474; CGP-NEXT: v_mul_lo_u32 v11, v13, v12 1475; CGP-NEXT: v_mul_hi_u32 v13, v13, v12 1476; CGP-NEXT: v_mul_hi_u32 v12, v5, v12 1477; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v17, v14 1478; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[8:9] 1479; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v15, v8 1480; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9] 1481; CGP-NEXT: v_add_i32_e64 v9, s[8:9], v11, v9 1482; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[8:9] 1483; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v14, v18 1484; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9] 1485; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v8, v19 1486; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9] 1487; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7] 1488; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12 1489; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1490; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v17, v14 1491; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v18 1492; CGP-NEXT: v_add_i32_e64 v16, s[6:7], v16, v19 1493; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1494; CGP-NEXT: v_add_i32_e64 v8, s[6:7], v8, v14 1495; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1496; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v16 1497; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7] 1498; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v15, v12 1499; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v14 1500; CGP-NEXT: v_add_i32_e64 v10, s[6:7], v10, v12 1501; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v13, v11 1502; CGP-NEXT: v_addc_u32_e32 v6, vcc, v6, v10, vcc 1503; CGP-NEXT: v_addc_u32_e64 v7, vcc, v7, v11, s[4:5] 1504; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1505; CGP-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1506; CGP-NEXT: v_mul_lo_u32 v8, v3, v4 1507; CGP-NEXT: v_mul_hi_u32 v10, v2, v4 1508; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 1509; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1510; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 1511; CGP-NEXT: v_mul_lo_u32 v9, v1, v5 1512; CGP-NEXT: v_mul_hi_u32 v11, v0, v5 1513; CGP-NEXT: v_mul_hi_u32 v5, v1, v5 1514; CGP-NEXT: v_mul_lo_u32 v12, v2, v6 1515; CGP-NEXT: v_mul_lo_u32 v13, v3, v6 1516; CGP-NEXT: v_mul_hi_u32 v14, v2, v6 1517; CGP-NEXT: v_mul_hi_u32 v6, v3, v6 1518; CGP-NEXT: v_mul_lo_u32 v15, v0, v7 1519; CGP-NEXT: v_mul_lo_u32 v16, v1, v7 1520; CGP-NEXT: v_mul_hi_u32 v17, v0, v7 1521; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 1522; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1523; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1524; CGP-NEXT: v_add_i32_e32 v4, vcc, v13, v4 1525; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 1526; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1527; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1528; CGP-NEXT: v_add_i32_e32 v5, vcc, v16, v5 1529; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 1530; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1531; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1532; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v14 1533; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1534; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1535; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1536; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v17 1537; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1538; CGP-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1539; CGP-NEXT: v_add_i32_e32 v10, vcc, v13, v10 1540; CGP-NEXT: v_add_i32_e32 v9, vcc, v15, v9 1541; CGP-NEXT: v_add_i32_e32 v11, vcc, v16, v11 1542; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1543; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1544; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1545; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1546; CGP-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1547; CGP-NEXT: v_mul_lo_u32 v10, s10, v4 1548; CGP-NEXT: v_mul_lo_u32 v12, 0, v4 1549; CGP-NEXT: v_mul_hi_u32 v13, s10, v4 1550; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1551; CGP-NEXT: v_mul_lo_u32 v11, s10, v5 1552; CGP-NEXT: v_mul_lo_u32 v14, 0, v5 1553; CGP-NEXT: v_mul_hi_u32 v15, s10, v5 1554; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1555; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1556; CGP-NEXT: v_mul_lo_u32 v8, s10, v6 1557; CGP-NEXT: v_add_i32_e32 v9, vcc, 1, v4 1558; CGP-NEXT: v_addc_u32_e32 v16, vcc, 0, v6, vcc 1559; CGP-NEXT: v_mul_lo_u32 v17, s10, v7 1560; CGP-NEXT: v_add_i32_e32 v18, vcc, 1, v5 1561; CGP-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc 1562; CGP-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1563; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v17 1564; CGP-NEXT: v_add_i32_e32 v14, vcc, 1, v9 1565; CGP-NEXT: v_addc_u32_e32 v17, vcc, 0, v16, vcc 1566; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v13 1567; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 1568; CGP-NEXT: v_add_i32_e32 v13, vcc, 1, v18 1569; CGP-NEXT: v_addc_u32_e32 v15, vcc, 0, v19, vcc 1570; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 1571; CGP-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v8, vcc 1572; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v8 1573; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s10, v2 1574; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 1575; CGP-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v11 1576; CGP-NEXT: v_subb_u32_e64 v11, s[6:7], v1, v12, s[4:5] 1577; CGP-NEXT: v_sub_i32_e64 v1, s[6:7], v1, v12 1578; CGP-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v10 1579; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[6:7] 1580; CGP-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v10 1581; CGP-NEXT: v_cmp_le_u32_e64 s[8:9], s10, v0 1582; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[8:9] 1583; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1584; CGP-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[6:7] 1585; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v11 1586; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 1587; CGP-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 1588; CGP-NEXT: v_subrev_i32_e32 v2, vcc, s10, v2 1589; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1590; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v2 1591; CGP-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 1592; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 1593; CGP-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc 1594; CGP-NEXT: v_subrev_i32_e32 v0, vcc, s10, v0 1595; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1596; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v0 1597; CGP-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 1598; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 1599; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 1600; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1601; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 1602; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 1603; CGP-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 1604; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1605; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 1606; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 1607; CGP-NEXT: v_cndmask_b32_e32 v1, v9, v14, vcc 1608; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0 1609; CGP-NEXT: v_cndmask_b32_e64 v0, v18, v13, s[4:5] 1610; CGP-NEXT: v_cndmask_b32_e32 v3, v16, v17, vcc 1611; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 1612; CGP-NEXT: v_cndmask_b32_e32 v2, v4, v1, vcc 1613; CGP-NEXT: v_cndmask_b32_e64 v1, v19, v15, s[4:5] 1614; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v10 1615; CGP-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[4:5] 1616; CGP-NEXT: v_cndmask_b32_e64 v1, v7, v1, s[4:5] 1617; CGP-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 1618; CGP-NEXT: s_setpc_b64 s[30:31] 1619 %result = udiv <2 x i64> %num, <i64 4096, i64 4096> 1620 ret <2 x i64> %result 1621} 1622 1623define i64 @v_udiv_i64_oddk_denom(i64 %num) { 1624; CHECK-LABEL: v_udiv_i64_oddk_denom: 1625; CHECK: ; %bb.0: 1626; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1627; CHECK-NEXT: v_cvt_f32_u32_e32 v2, 0x12d8fb 1628; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v3, 0 1629; CHECK-NEXT: s_mov_b32 s6, 0xffed2705 1630; CHECK-NEXT: s_mov_b32 s7, 0x12d8fb 1631; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 1632; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 1633; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 1634; CHECK-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 1635; CHECK-NEXT: v_trunc_f32_e32 v3, v3 1636; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 1637; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3 1638; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 1639; CHECK-NEXT: v_mul_lo_u32 v4, s6, v3 1640; CHECK-NEXT: v_mul_lo_u32 v5, s6, v2 1641; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2 1642; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2 1643; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 1644; CHECK-NEXT: v_mul_lo_u32 v6, v3, v5 1645; CHECK-NEXT: v_mul_hi_u32 v8, v2, v5 1646; CHECK-NEXT: v_mul_hi_u32 v5, v3, v5 1647; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1648; CHECK-NEXT: v_mul_lo_u32 v7, v2, v4 1649; CHECK-NEXT: v_mul_lo_u32 v9, v3, v4 1650; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4 1651; CHECK-NEXT: v_mul_hi_u32 v4, v3, v4 1652; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 1653; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1654; CHECK-NEXT: v_add_i32_e32 v5, vcc, v9, v5 1655; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1656; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1657; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1658; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v10 1659; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1660; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1661; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v8 1662; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1663; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1664; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1665; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 1666; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 1667; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v3, v4, vcc 1668; CHECK-NEXT: v_add_i32_e64 v3, s[4:5], v3, v4 1669; CHECK-NEXT: v_mul_lo_u32 v4, s6, v2 1670; CHECK-NEXT: v_mul_lo_u32 v6, -1, v2 1671; CHECK-NEXT: v_mul_hi_u32 v7, s6, v2 1672; CHECK-NEXT: v_mul_lo_u32 v8, s6, v5 1673; CHECK-NEXT: v_mul_lo_u32 v9, v5, v4 1674; CHECK-NEXT: v_mul_hi_u32 v10, v2, v4 1675; CHECK-NEXT: v_mul_hi_u32 v4, v5, v4 1676; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 1677; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1678; CHECK-NEXT: v_mul_lo_u32 v7, v2, v6 1679; CHECK-NEXT: v_mul_lo_u32 v8, v5, v6 1680; CHECK-NEXT: v_mul_hi_u32 v11, v2, v6 1681; CHECK-NEXT: v_mul_hi_u32 v5, v5, v6 1682; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v9, v7 1683; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1684; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v8, v4 1685; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1686; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 1687; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 1688; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v11 1689; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1690; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 1691; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v9 1692; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v6 1693; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 1694; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 1695; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v5, v6 1696; CHECK-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc 1697; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 1698; CHECK-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 1699; CHECK-NEXT: v_mul_lo_u32 v4, v1, v2 1700; CHECK-NEXT: v_mul_hi_u32 v5, v0, v2 1701; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 1702; CHECK-NEXT: v_mul_lo_u32 v6, v0, v3 1703; CHECK-NEXT: v_mul_lo_u32 v7, v1, v3 1704; CHECK-NEXT: v_mul_hi_u32 v8, v0, v3 1705; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 1706; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v6 1707; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1708; CHECK-NEXT: v_add_i32_e32 v2, vcc, v7, v2 1709; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1710; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1711; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1712; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 1713; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1714; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 1715; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1716; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 1717; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1718; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1719; CHECK-NEXT: v_mul_lo_u32 v5, s7, v2 1720; CHECK-NEXT: v_mul_lo_u32 v6, 0, v2 1721; CHECK-NEXT: v_mul_hi_u32 v7, s7, v2 1722; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v4 1723; CHECK-NEXT: v_mul_lo_u32 v4, s7, v3 1724; CHECK-NEXT: v_add_i32_e32 v8, vcc, 1, v2 1725; CHECK-NEXT: v_addc_u32_e32 v9, vcc, 0, v3, vcc 1726; CHECK-NEXT: v_add_i32_e32 v4, vcc, v6, v4 1727; CHECK-NEXT: v_add_i32_e32 v6, vcc, 1, v8 1728; CHECK-NEXT: v_addc_u32_e32 v10, vcc, 0, v9, vcc 1729; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v7 1730; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v5 1731; CHECK-NEXT: v_subb_u32_e64 v5, s[4:5], v1, v4, vcc 1732; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v4 1733; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 1734; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1735; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], 0, v5 1736; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1737; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1738; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v5 1739; CHECK-NEXT: v_cndmask_b32_e32 v4, v7, v4, vcc 1740; CHECK-NEXT: v_subrev_i32_e32 v0, vcc, s7, v0 1741; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1742; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s7, v0 1743; CHECK-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 1744; CHECK-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 1745; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 1746; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1747; CHECK-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc 1748; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 1749; CHECK-NEXT: v_cndmask_b32_e32 v0, v8, v6, vcc 1750; CHECK-NEXT: v_cndmask_b32_e32 v1, v9, v10, vcc 1751; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1752; CHECK-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc 1753; CHECK-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc 1754; CHECK-NEXT: s_setpc_b64 s[30:31] 1755 %result = udiv i64 %num, 1235195 1756 ret i64 %result 1757} 1758 1759define <2 x i64> @v_udiv_v2i64_oddk_denom(<2 x i64> %num) { 1760; GISEL-LABEL: v_udiv_v2i64_oddk_denom: 1761; GISEL: ; %bb.0: 1762; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1763; GISEL-NEXT: s_mov_b32 s10, 0x12d8fb 1764; GISEL-NEXT: v_cvt_f32_u32_e32 v4, s10 1765; GISEL-NEXT: s_sub_u32 s8, 0, s10 1766; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1767; GISEL-NEXT: v_cvt_f32_ubyte0_e32 v5, 0 1768; GISEL-NEXT: v_mov_b32_e32 v6, v4 1769; GISEL-NEXT: s_and_b32 s4, s4, 1 1770; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 1771; GISEL-NEXT: v_mac_f32_e32 v6, 0x4f800000, v5 1772; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 1773; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v6 1774; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1775; GISEL-NEXT: s_subb_u32 s9, 0, 0 1776; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 1777; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1778; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v4 1779; GISEL-NEXT: s_sub_u32 s11, 0, s10 1780; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1781; GISEL-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 1782; GISEL-NEXT: v_trunc_f32_e32 v6, v6 1783; GISEL-NEXT: s_and_b32 s4, s4, 1 1784; GISEL-NEXT: v_trunc_f32_e32 v7, v7 1785; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v6 1786; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 1787; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 1788; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 1789; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 1790; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1791; GISEL-NEXT: s_subb_u32 s6, 0, 0 1792; GISEL-NEXT: v_mul_lo_u32 v8, s11, v6 1793; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1794; GISEL-NEXT: v_mul_lo_u32 v9, s8, v7 1795; GISEL-NEXT: v_mul_lo_u32 v10, s11, v4 1796; GISEL-NEXT: v_mul_lo_u32 v11, s6, v4 1797; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1798; GISEL-NEXT: v_mul_lo_u32 v13, s8, v5 1799; GISEL-NEXT: v_mul_lo_u32 v14, s9, v5 1800; GISEL-NEXT: v_mul_hi_u32 v15, s8, v5 1801; GISEL-NEXT: v_add_i32_e32 v8, vcc, v11, v8 1802; GISEL-NEXT: v_mul_lo_u32 v11, v6, v10 1803; GISEL-NEXT: v_mul_hi_u32 v16, v4, v10 1804; GISEL-NEXT: v_mul_hi_u32 v10, v6, v10 1805; GISEL-NEXT: v_add_i32_e32 v9, vcc, v14, v9 1806; GISEL-NEXT: v_mul_lo_u32 v14, v7, v13 1807; GISEL-NEXT: v_mul_hi_u32 v17, v5, v13 1808; GISEL-NEXT: v_mul_hi_u32 v13, v7, v13 1809; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1810; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1811; GISEL-NEXT: v_mul_lo_u32 v12, v4, v8 1812; GISEL-NEXT: v_mul_lo_u32 v15, v6, v8 1813; GISEL-NEXT: v_mul_hi_u32 v18, v4, v8 1814; GISEL-NEXT: v_mul_hi_u32 v8, v6, v8 1815; GISEL-NEXT: v_mul_lo_u32 v19, v5, v9 1816; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v19 1817; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 1818; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1819; GISEL-NEXT: v_mul_lo_u32 v14, v7, v9 1820; GISEL-NEXT: v_mul_hi_u32 v17, v5, v9 1821; GISEL-NEXT: v_mul_hi_u32 v9, v7, v9 1822; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1823; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1824; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v15, v10 1825; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 1826; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 1827; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1828; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16 1829; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1830; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v18 1831; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 1832; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 1833; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v17 1834; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 1835; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1836; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v16 1837; GISEL-NEXT: v_add_i32_e32 v15, vcc, v19, v18 1838; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 1839; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 1840; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1841; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 1842; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1843; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1844; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v15 1845; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1846; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1847; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 1848; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc 1849; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 1850; GISEL-NEXT: v_mul_lo_u32 v8, s11, v4 1851; GISEL-NEXT: v_mul_lo_u32 v11, s6, v4 1852; GISEL-NEXT: v_mul_hi_u32 v12, s11, v4 1853; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v13 1854; GISEL-NEXT: v_addc_u32_e64 v13, s[6:7], v7, v9, s[4:5] 1855; GISEL-NEXT: v_add_i32_e64 v7, s[6:7], v7, v9 1856; GISEL-NEXT: v_mul_lo_u32 v9, s8, v5 1857; GISEL-NEXT: v_mul_lo_u32 v14, s9, v5 1858; GISEL-NEXT: v_mul_hi_u32 v15, s8, v5 1859; GISEL-NEXT: v_mul_lo_u32 v16, s11, v10 1860; GISEL-NEXT: v_mul_lo_u32 v17, v10, v8 1861; GISEL-NEXT: v_mul_hi_u32 v18, v4, v8 1862; GISEL-NEXT: v_mul_hi_u32 v8, v10, v8 1863; GISEL-NEXT: v_mul_lo_u32 v19, s8, v13 1864; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v16 1865; GISEL-NEXT: v_mul_lo_u32 v16, v13, v9 1866; GISEL-NEXT: v_add_i32_e64 v14, s[6:7], v14, v19 1867; GISEL-NEXT: v_mul_hi_u32 v19, v5, v9 1868; GISEL-NEXT: v_mul_hi_u32 v9, v13, v9 1869; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1870; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v14, v15 1871; GISEL-NEXT: v_mul_lo_u32 v14, v4, v11 1872; GISEL-NEXT: v_mul_lo_u32 v15, v5, v12 1873; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v16, v15 1874; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[6:7] 1875; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v15, v19 1876; GISEL-NEXT: v_mul_lo_u32 v15, v10, v11 1877; GISEL-NEXT: v_mul_hi_u32 v19, v4, v11 1878; GISEL-NEXT: v_mul_hi_u32 v10, v10, v11 1879; GISEL-NEXT: v_mul_lo_u32 v11, v13, v12 1880; GISEL-NEXT: v_mul_hi_u32 v13, v13, v12 1881; GISEL-NEXT: v_mul_hi_u32 v12, v5, v12 1882; GISEL-NEXT: v_add_i32_e64 v14, s[8:9], v17, v14 1883; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[8:9] 1884; GISEL-NEXT: v_add_i32_e64 v8, s[8:9], v15, v8 1885; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9] 1886; GISEL-NEXT: v_add_i32_e64 v9, s[8:9], v11, v9 1887; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[8:9] 1888; GISEL-NEXT: v_add_i32_e64 v14, s[8:9], v14, v18 1889; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9] 1890; GISEL-NEXT: v_add_i32_e64 v8, s[8:9], v8, v19 1891; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9] 1892; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7] 1893; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12 1894; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1895; GISEL-NEXT: v_add_i32_e64 v14, s[6:7], v17, v14 1896; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v15, v18 1897; GISEL-NEXT: v_add_i32_e64 v16, s[6:7], v16, v19 1898; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 1899; GISEL-NEXT: v_add_i32_e64 v8, s[6:7], v8, v14 1900; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 1901; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v16 1902; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7] 1903; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v15, v12 1904; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v14 1905; GISEL-NEXT: v_add_i32_e64 v10, s[6:7], v10, v12 1906; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v13, v11 1907; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v10, vcc 1908; GISEL-NEXT: v_addc_u32_e64 v7, vcc, v7, v11, s[4:5] 1909; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1910; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1911; GISEL-NEXT: v_mul_lo_u32 v8, v3, v4 1912; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 1913; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 1914; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1915; GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 1916; GISEL-NEXT: v_mul_lo_u32 v9, v1, v5 1917; GISEL-NEXT: v_mul_hi_u32 v11, v0, v5 1918; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 1919; GISEL-NEXT: v_mul_lo_u32 v12, v2, v6 1920; GISEL-NEXT: v_mul_lo_u32 v13, v3, v6 1921; GISEL-NEXT: v_mul_hi_u32 v14, v2, v6 1922; GISEL-NEXT: v_mul_hi_u32 v6, v3, v6 1923; GISEL-NEXT: v_mul_lo_u32 v15, v0, v7 1924; GISEL-NEXT: v_mul_lo_u32 v16, v1, v7 1925; GISEL-NEXT: v_mul_hi_u32 v17, v0, v7 1926; GISEL-NEXT: v_mul_hi_u32 v7, v1, v7 1927; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 1928; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1929; GISEL-NEXT: v_add_i32_e32 v4, vcc, v13, v4 1930; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 1931; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v15 1932; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 1933; GISEL-NEXT: v_add_i32_e32 v5, vcc, v16, v5 1934; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 1935; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1936; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1937; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v14 1938; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1939; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1940; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1941; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v17 1942; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1943; GISEL-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1944; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 1945; GISEL-NEXT: v_add_i32_e32 v9, vcc, v15, v9 1946; GISEL-NEXT: v_add_i32_e32 v11, vcc, v16, v11 1947; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 1948; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1949; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1950; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1951; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1952; GISEL-NEXT: v_mul_lo_u32 v10, s10, v4 1953; GISEL-NEXT: v_mul_lo_u32 v12, 0, v4 1954; GISEL-NEXT: v_mul_hi_u32 v13, s10, v4 1955; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1956; GISEL-NEXT: v_mul_lo_u32 v11, s10, v5 1957; GISEL-NEXT: v_mul_lo_u32 v14, 0, v5 1958; GISEL-NEXT: v_mul_hi_u32 v15, s10, v5 1959; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1960; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1961; GISEL-NEXT: v_mul_lo_u32 v8, s10, v6 1962; GISEL-NEXT: v_add_i32_e32 v9, vcc, 1, v4 1963; GISEL-NEXT: v_addc_u32_e32 v16, vcc, 0, v6, vcc 1964; GISEL-NEXT: v_mul_lo_u32 v17, s10, v7 1965; GISEL-NEXT: v_add_i32_e32 v18, vcc, 1, v5 1966; GISEL-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc 1967; GISEL-NEXT: v_add_i32_e32 v8, vcc, v12, v8 1968; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v17 1969; GISEL-NEXT: v_add_i32_e32 v14, vcc, 1, v9 1970; GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v16, vcc 1971; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v13 1972; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 1973; GISEL-NEXT: v_add_i32_e32 v13, vcc, 1, v18 1974; GISEL-NEXT: v_addc_u32_e32 v15, vcc, 0, v19, vcc 1975; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 1976; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v8, vcc 1977; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v8 1978; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s10, v2 1979; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 1980; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v11 1981; GISEL-NEXT: v_subb_u32_e64 v11, s[6:7], v1, v12, s[4:5] 1982; GISEL-NEXT: v_sub_i32_e64 v1, s[6:7], v1, v12 1983; GISEL-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v10 1984; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[6:7] 1985; GISEL-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v10 1986; GISEL-NEXT: v_cmp_le_u32_e64 s[8:9], s10, v0 1987; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[8:9] 1988; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1989; GISEL-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[6:7] 1990; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v11 1991; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 1992; GISEL-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 1993; GISEL-NEXT: v_subrev_i32_e32 v2, vcc, s10, v2 1994; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1995; GISEL-NEXT: v_cmp_le_u32_e32 vcc, s10, v2 1996; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 1997; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 1998; GISEL-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc 1999; GISEL-NEXT: v_subrev_i32_e32 v0, vcc, s10, v0 2000; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2001; GISEL-NEXT: v_cmp_le_u32_e32 vcc, s10, v0 2002; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 2003; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 2004; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 2005; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 2006; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 2007; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 2008; GISEL-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 2009; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 2010; GISEL-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 2011; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 2012; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v14, vcc 2013; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0 2014; GISEL-NEXT: v_cndmask_b32_e64 v0, v18, v13, s[4:5] 2015; GISEL-NEXT: v_cndmask_b32_e32 v3, v16, v17, vcc 2016; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 2017; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v1, vcc 2018; GISEL-NEXT: v_cndmask_b32_e64 v1, v19, v15, s[4:5] 2019; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v10 2020; GISEL-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[4:5] 2021; GISEL-NEXT: v_cndmask_b32_e64 v1, v7, v1, s[4:5] 2022; GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 2023; GISEL-NEXT: s_setpc_b64 s[30:31] 2024; 2025; CGP-LABEL: v_udiv_v2i64_oddk_denom: 2026; CGP: ; %bb.0: 2027; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2028; CGP-NEXT: v_cvt_f32_u32_e32 v4, 0x12d8fb 2029; CGP-NEXT: v_cvt_f32_ubyte0_e32 v5, 0 2030; CGP-NEXT: s_mov_b32 s8, 0xffed2705 2031; CGP-NEXT: s_mov_b32 s10, 0x12d8fb 2032; CGP-NEXT: v_mov_b32_e32 v6, v4 2033; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 2034; CGP-NEXT: v_mac_f32_e32 v6, 0x4f800000, v5 2035; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 2036; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v6 2037; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2038; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 2039; CGP-NEXT: v_mul_f32_e32 v6, 0x2f800000, v4 2040; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 2041; CGP-NEXT: v_trunc_f32_e32 v6, v6 2042; CGP-NEXT: v_trunc_f32_e32 v7, v7 2043; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v6 2044; CGP-NEXT: v_cvt_u32_f32_e32 v6, v6 2045; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 2046; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 2047; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 2048; CGP-NEXT: v_mul_lo_u32 v8, s8, v6 2049; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 2050; CGP-NEXT: v_mul_lo_u32 v9, s8, v7 2051; CGP-NEXT: v_mul_lo_u32 v10, s8, v4 2052; CGP-NEXT: v_mul_lo_u32 v11, -1, v4 2053; CGP-NEXT: v_mul_hi_u32 v12, s8, v4 2054; CGP-NEXT: v_mul_lo_u32 v13, s8, v5 2055; CGP-NEXT: v_mul_lo_u32 v14, -1, v5 2056; CGP-NEXT: v_mul_hi_u32 v15, s8, v5 2057; CGP-NEXT: v_add_i32_e32 v8, vcc, v11, v8 2058; CGP-NEXT: v_mul_lo_u32 v11, v6, v10 2059; CGP-NEXT: v_mul_hi_u32 v16, v4, v10 2060; CGP-NEXT: v_mul_hi_u32 v10, v6, v10 2061; CGP-NEXT: v_add_i32_e32 v9, vcc, v14, v9 2062; CGP-NEXT: v_mul_lo_u32 v14, v7, v13 2063; CGP-NEXT: v_mul_hi_u32 v17, v5, v13 2064; CGP-NEXT: v_mul_hi_u32 v13, v7, v13 2065; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12 2066; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15 2067; CGP-NEXT: v_mul_lo_u32 v12, v4, v8 2068; CGP-NEXT: v_mul_lo_u32 v15, v6, v8 2069; CGP-NEXT: v_mul_hi_u32 v18, v4, v8 2070; CGP-NEXT: v_mul_hi_u32 v8, v6, v8 2071; CGP-NEXT: v_mul_lo_u32 v19, v5, v9 2072; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v19 2073; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 2074; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 2075; CGP-NEXT: v_mul_lo_u32 v14, v7, v9 2076; CGP-NEXT: v_mul_hi_u32 v17, v5, v9 2077; CGP-NEXT: v_mul_hi_u32 v9, v7, v9 2078; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2079; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2080; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v15, v10 2081; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 2082; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2083; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2084; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v16 2085; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2086; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v18 2087; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 2088; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 2089; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v17 2090; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 2091; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2092; CGP-NEXT: v_add_i32_e32 v12, vcc, v15, v16 2093; CGP-NEXT: v_add_i32_e32 v15, vcc, v19, v18 2094; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 2095; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 2096; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2097; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2098; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2099; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2100; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v15 2101; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2102; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2103; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 2104; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc 2105; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 2106; CGP-NEXT: v_mul_lo_u32 v8, s8, v4 2107; CGP-NEXT: v_mul_lo_u32 v11, -1, v4 2108; CGP-NEXT: v_mul_hi_u32 v12, s8, v4 2109; CGP-NEXT: v_add_i32_e64 v5, s[4:5], v5, v13 2110; CGP-NEXT: v_addc_u32_e64 v13, s[6:7], v7, v9, s[4:5] 2111; CGP-NEXT: v_add_i32_e64 v7, s[6:7], v7, v9 2112; CGP-NEXT: v_mul_lo_u32 v9, s8, v5 2113; CGP-NEXT: v_mul_lo_u32 v14, -1, v5 2114; CGP-NEXT: v_mul_hi_u32 v15, s8, v5 2115; CGP-NEXT: v_mul_lo_u32 v16, s8, v10 2116; CGP-NEXT: v_mul_lo_u32 v17, v10, v8 2117; CGP-NEXT: v_mul_hi_u32 v18, v4, v8 2118; CGP-NEXT: v_mul_hi_u32 v8, v10, v8 2119; CGP-NEXT: v_mul_lo_u32 v19, s8, v13 2120; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v16 2121; CGP-NEXT: v_mul_lo_u32 v16, v13, v9 2122; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v14, v19 2123; CGP-NEXT: v_mul_hi_u32 v19, v5, v9 2124; CGP-NEXT: v_mul_hi_u32 v9, v13, v9 2125; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 2126; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v14, v15 2127; CGP-NEXT: v_mul_lo_u32 v14, v4, v11 2128; CGP-NEXT: v_mul_lo_u32 v15, v5, v12 2129; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v16, v15 2130; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[6:7] 2131; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v19 2132; CGP-NEXT: v_mul_lo_u32 v15, v10, v11 2133; CGP-NEXT: v_mul_hi_u32 v19, v4, v11 2134; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 2135; CGP-NEXT: v_mul_lo_u32 v11, v13, v12 2136; CGP-NEXT: v_mul_hi_u32 v13, v13, v12 2137; CGP-NEXT: v_mul_hi_u32 v12, v5, v12 2138; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v17, v14 2139; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[8:9] 2140; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v15, v8 2141; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9] 2142; CGP-NEXT: v_add_i32_e64 v9, s[8:9], v11, v9 2143; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[8:9] 2144; CGP-NEXT: v_add_i32_e64 v14, s[8:9], v14, v18 2145; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9] 2146; CGP-NEXT: v_add_i32_e64 v8, s[8:9], v8, v19 2147; CGP-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9] 2148; CGP-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7] 2149; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12 2150; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 2151; CGP-NEXT: v_add_i32_e64 v14, s[6:7], v17, v14 2152; CGP-NEXT: v_add_i32_e64 v15, s[6:7], v15, v18 2153; CGP-NEXT: v_add_i32_e64 v16, s[6:7], v16, v19 2154; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v12 2155; CGP-NEXT: v_add_i32_e64 v8, s[6:7], v8, v14 2156; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 2157; CGP-NEXT: v_add_i32_e64 v9, s[6:7], v9, v16 2158; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7] 2159; CGP-NEXT: v_add_i32_e64 v12, s[6:7], v15, v12 2160; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v11, v14 2161; CGP-NEXT: v_add_i32_e64 v10, s[6:7], v10, v12 2162; CGP-NEXT: v_add_i32_e64 v11, s[6:7], v13, v11 2163; CGP-NEXT: v_addc_u32_e32 v6, vcc, v6, v10, vcc 2164; CGP-NEXT: v_addc_u32_e64 v7, vcc, v7, v11, s[4:5] 2165; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2166; CGP-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 2167; CGP-NEXT: v_mul_lo_u32 v8, v3, v4 2168; CGP-NEXT: v_mul_hi_u32 v10, v2, v4 2169; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 2170; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2171; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 2172; CGP-NEXT: v_mul_lo_u32 v9, v1, v5 2173; CGP-NEXT: v_mul_hi_u32 v11, v0, v5 2174; CGP-NEXT: v_mul_hi_u32 v5, v1, v5 2175; CGP-NEXT: v_mul_lo_u32 v12, v2, v6 2176; CGP-NEXT: v_mul_lo_u32 v13, v3, v6 2177; CGP-NEXT: v_mul_hi_u32 v14, v2, v6 2178; CGP-NEXT: v_mul_hi_u32 v6, v3, v6 2179; CGP-NEXT: v_mul_lo_u32 v15, v0, v7 2180; CGP-NEXT: v_mul_lo_u32 v16, v1, v7 2181; CGP-NEXT: v_mul_hi_u32 v17, v0, v7 2182; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 2183; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v12 2184; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2185; CGP-NEXT: v_add_i32_e32 v4, vcc, v13, v4 2186; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2187; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v15 2188; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2189; CGP-NEXT: v_add_i32_e32 v5, vcc, v16, v5 2190; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2191; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2192; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2193; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v14 2194; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2195; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2196; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2197; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v17 2198; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2199; CGP-NEXT: v_add_i32_e32 v8, vcc, v12, v8 2200; CGP-NEXT: v_add_i32_e32 v10, vcc, v13, v10 2201; CGP-NEXT: v_add_i32_e32 v9, vcc, v15, v9 2202; CGP-NEXT: v_add_i32_e32 v11, vcc, v16, v11 2203; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2204; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2205; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2206; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2207; CGP-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2208; CGP-NEXT: v_mul_lo_u32 v10, s10, v4 2209; CGP-NEXT: v_mul_lo_u32 v12, 0, v4 2210; CGP-NEXT: v_mul_hi_u32 v13, s10, v4 2211; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 2212; CGP-NEXT: v_mul_lo_u32 v11, s10, v5 2213; CGP-NEXT: v_mul_lo_u32 v14, 0, v5 2214; CGP-NEXT: v_mul_hi_u32 v15, s10, v5 2215; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v8 2216; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2217; CGP-NEXT: v_mul_lo_u32 v8, s10, v6 2218; CGP-NEXT: v_add_i32_e32 v9, vcc, 1, v4 2219; CGP-NEXT: v_addc_u32_e32 v16, vcc, 0, v6, vcc 2220; CGP-NEXT: v_mul_lo_u32 v17, s10, v7 2221; CGP-NEXT: v_add_i32_e32 v18, vcc, 1, v5 2222; CGP-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc 2223; CGP-NEXT: v_add_i32_e32 v8, vcc, v12, v8 2224; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v17 2225; CGP-NEXT: v_add_i32_e32 v14, vcc, 1, v9 2226; CGP-NEXT: v_addc_u32_e32 v17, vcc, 0, v16, vcc 2227; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v13 2228; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2229; CGP-NEXT: v_add_i32_e32 v13, vcc, 1, v18 2230; CGP-NEXT: v_addc_u32_e32 v15, vcc, 0, v19, vcc 2231; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 2232; CGP-NEXT: v_subb_u32_e64 v10, s[4:5], v3, v8, vcc 2233; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v8 2234; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s10, v2 2235; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 2236; CGP-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v11 2237; CGP-NEXT: v_subb_u32_e64 v11, s[6:7], v1, v12, s[4:5] 2238; CGP-NEXT: v_sub_i32_e64 v1, s[6:7], v1, v12 2239; CGP-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v10 2240; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[6:7] 2241; CGP-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v10 2242; CGP-NEXT: v_cmp_le_u32_e64 s[8:9], s10, v0 2243; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[8:9] 2244; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2245; CGP-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[6:7] 2246; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v11 2247; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 2248; CGP-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 2249; CGP-NEXT: v_subrev_i32_e32 v2, vcc, s10, v2 2250; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2251; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v2 2252; CGP-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 2253; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 2254; CGP-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc 2255; CGP-NEXT: v_subrev_i32_e32 v0, vcc, s10, v0 2256; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2257; CGP-NEXT: v_cmp_le_u32_e32 vcc, s10, v0 2258; CGP-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 2259; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v3 2260; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 2261; CGP-NEXT: v_cmp_le_u32_e32 vcc, 0, v1 2262; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, vcc 2263; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 2264; CGP-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 2265; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 2266; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 2267; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 2268; CGP-NEXT: v_cndmask_b32_e32 v1, v9, v14, vcc 2269; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0 2270; CGP-NEXT: v_cndmask_b32_e64 v0, v18, v13, s[4:5] 2271; CGP-NEXT: v_cndmask_b32_e32 v3, v16, v17, vcc 2272; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 2273; CGP-NEXT: v_cndmask_b32_e32 v2, v4, v1, vcc 2274; CGP-NEXT: v_cndmask_b32_e64 v1, v19, v15, s[4:5] 2275; CGP-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v10 2276; CGP-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[4:5] 2277; CGP-NEXT: v_cndmask_b32_e64 v1, v7, v1, s[4:5] 2278; CGP-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 2279; CGP-NEXT: s_setpc_b64 s[30:31] 2280 %result = udiv <2 x i64> %num, <i64 1235195, i64 1235195> 2281 ret <2 x i64> %result 2282} 2283 2284define i64 @v_udiv_i64_pow2_shl_denom(i64 %x, i64 %y) { 2285; CHECK-LABEL: v_udiv_i64_pow2_shl_denom: 2286; CHECK: ; %bb.0: 2287; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2288; CHECK-NEXT: s_movk_i32 s4, 0x1000 2289; CHECK-NEXT: s_mov_b32 s5, 0 2290; CHECK-NEXT: v_lshl_b64 v[4:5], s[4:5], v2 2291; CHECK-NEXT: v_or_b32_e32 v3, v1, v5 2292; CHECK-NEXT: v_mov_b32_e32 v2, 0 2293; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] 2294; CHECK-NEXT: ; implicit-def: $vgpr2_vgpr3 2295; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 2296; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2297; CHECK-NEXT: s_cbranch_execz BB7_2 2298; CHECK-NEXT: ; %bb.1: 2299; CHECK-NEXT: v_cvt_f32_u32_e32 v2, v4 2300; CHECK-NEXT: v_cvt_f32_u32_e32 v3, v5 2301; CHECK-NEXT: v_sub_i32_e32 v6, vcc, 0, v4 2302; CHECK-NEXT: v_subb_u32_e32 v7, vcc, 0, v5, vcc 2303; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 2304; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 2305; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 2306; CHECK-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 2307; CHECK-NEXT: v_trunc_f32_e32 v3, v3 2308; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 2309; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3 2310; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 2311; CHECK-NEXT: v_mul_lo_u32 v8, v6, v3 2312; CHECK-NEXT: v_mul_lo_u32 v9, v6, v2 2313; CHECK-NEXT: v_mul_lo_u32 v10, v7, v2 2314; CHECK-NEXT: v_mul_hi_u32 v11, v6, v2 2315; CHECK-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2316; CHECK-NEXT: v_mul_lo_u32 v10, v3, v9 2317; CHECK-NEXT: v_mul_hi_u32 v12, v2, v9 2318; CHECK-NEXT: v_mul_hi_u32 v9, v3, v9 2319; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2320; CHECK-NEXT: v_mul_lo_u32 v11, v2, v8 2321; CHECK-NEXT: v_mul_lo_u32 v13, v3, v8 2322; CHECK-NEXT: v_mul_hi_u32 v14, v2, v8 2323; CHECK-NEXT: v_mul_hi_u32 v8, v3, v8 2324; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v11 2325; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2326; CHECK-NEXT: v_add_i32_e32 v9, vcc, v13, v9 2327; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2328; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2329; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2330; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v14 2331; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2332; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2333; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v12 2334; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2335; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2336; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2337; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2338; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v9 2339; CHECK-NEXT: v_addc_u32_e64 v9, s[4:5], v3, v8, vcc 2340; CHECK-NEXT: v_add_i32_e64 v3, s[4:5], v3, v8 2341; CHECK-NEXT: v_mul_lo_u32 v8, v6, v2 2342; CHECK-NEXT: v_mul_lo_u32 v7, v7, v2 2343; CHECK-NEXT: v_mul_hi_u32 v10, v6, v2 2344; CHECK-NEXT: v_mul_lo_u32 v6, v6, v9 2345; CHECK-NEXT: v_mul_lo_u32 v11, v9, v8 2346; CHECK-NEXT: v_mul_hi_u32 v12, v2, v8 2347; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8 2348; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 2349; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 2350; CHECK-NEXT: v_mul_lo_u32 v7, v2, v6 2351; CHECK-NEXT: v_mul_lo_u32 v10, v9, v6 2352; CHECK-NEXT: v_mul_hi_u32 v13, v2, v6 2353; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6 2354; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v11, v7 2355; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 2356; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v10, v8 2357; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 2358; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v12 2359; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 2360; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v13 2361; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2362; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v7 2363; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v10, v11 2364; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 2365; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 2366; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 2367; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v8 2368; CHECK-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 2369; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v7 2370; CHECK-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 2371; CHECK-NEXT: v_mul_lo_u32 v6, v1, v2 2372; CHECK-NEXT: v_mul_hi_u32 v7, v0, v2 2373; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 2374; CHECK-NEXT: v_mul_lo_u32 v8, v0, v3 2375; CHECK-NEXT: v_mul_lo_u32 v9, v1, v3 2376; CHECK-NEXT: v_mul_hi_u32 v10, v0, v3 2377; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 2378; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 2379; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2380; CHECK-NEXT: v_add_i32_e32 v2, vcc, v9, v2 2381; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2382; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 2383; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2384; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v10 2385; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2386; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 2387; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 2388; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v6 2389; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2390; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2391; CHECK-NEXT: v_mul_lo_u32 v7, v4, v2 2392; CHECK-NEXT: v_mul_lo_u32 v8, v5, v2 2393; CHECK-NEXT: v_mul_hi_u32 v9, v4, v2 2394; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v6 2395; CHECK-NEXT: v_mul_lo_u32 v6, v4, v3 2396; CHECK-NEXT: v_add_i32_e32 v10, vcc, 1, v2 2397; CHECK-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc 2398; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 2399; CHECK-NEXT: v_add_i32_e32 v8, vcc, 1, v10 2400; CHECK-NEXT: v_addc_u32_e32 v12, vcc, 0, v11, vcc 2401; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 2402; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v0, v7 2403; CHECK-NEXT: v_subb_u32_e64 v9, s[4:5], v1, v6, vcc 2404; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v6 2405; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v4 2406; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 2407; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 2408; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 2409; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 2410; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, v9, v5 2411; CHECK-NEXT: v_cndmask_b32_e32 v6, v13, v6, vcc 2412; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v7, v4 2413; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2414; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v7, v4 2415; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 2416; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5 2417; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc 2418; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, v1, v5 2419; CHECK-NEXT: v_cndmask_b32_e32 v1, v9, v7, vcc 2420; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 2421; CHECK-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc 2422; CHECK-NEXT: v_cndmask_b32_e32 v5, v11, v12, vcc 2423; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 2424; CHECK-NEXT: v_cndmask_b32_e32 v2, v2, v1, vcc 2425; CHECK-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc 2426; CHECK-NEXT: BB7_2: ; %Flow 2427; CHECK-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 2428; CHECK-NEXT: s_xor_b64 exec, exec, s[6:7] 2429; CHECK-NEXT: s_cbranch_execz BB7_4 2430; CHECK-NEXT: ; %bb.3: 2431; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v4 2432; CHECK-NEXT: v_sub_i32_e32 v2, vcc, 0, v4 2433; CHECK-NEXT: v_rcp_iflag_f32_e32 v1, v1 2434; CHECK-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1 2435; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 2436; CHECK-NEXT: v_mul_lo_u32 v2, v2, v1 2437; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 2438; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v2 2439; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 2440; CHECK-NEXT: v_mul_lo_u32 v2, v1, v4 2441; CHECK-NEXT: v_add_i32_e32 v3, vcc, 1, v1 2442; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 2443; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 2444; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc 2445; CHECK-NEXT: v_sub_i32_e64 v2, s[4:5], v0, v4 2446; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 2447; CHECK-NEXT: v_add_i32_e32 v2, vcc, 1, v1 2448; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 2449; CHECK-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc 2450; CHECK-NEXT: v_mov_b32_e32 v3, 0 2451; CHECK-NEXT: BB7_4: 2452; CHECK-NEXT: s_or_b64 exec, exec, s[6:7] 2453; CHECK-NEXT: v_mov_b32_e32 v0, v2 2454; CHECK-NEXT: v_mov_b32_e32 v1, v3 2455; CHECK-NEXT: s_setpc_b64 s[30:31] 2456 %shl.y = shl i64 4096, %y 2457 %r = udiv i64 %x, %shl.y 2458 ret i64 %r 2459} 2460 2461define <2 x i64> @v_udiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { 2462; GISEL-LABEL: v_udiv_v2i64_pow2_shl_denom: 2463; GISEL: ; %bb.0: 2464; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2465; GISEL-NEXT: s_movk_i32 s4, 0x1000 2466; GISEL-NEXT: s_mov_b32 s5, 0 2467; GISEL-NEXT: v_lshl_b64 v[4:5], s[4:5], v4 2468; GISEL-NEXT: v_lshl_b64 v[6:7], s[4:5], v6 2469; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v4 2470; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v5 2471; GISEL-NEXT: v_mac_f32_e32 v8, 0x4f800000, v9 2472; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v8 2473; GISEL-NEXT: v_mul_f32_e32 v8, 0x5f7ffffc, v8 2474; GISEL-NEXT: v_mul_f32_e32 v9, 0x2f800000, v8 2475; GISEL-NEXT: v_trunc_f32_e32 v9, v9 2476; GISEL-NEXT: v_mac_f32_e32 v8, 0xcf800000, v9 2477; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 2478; GISEL-NEXT: v_cvt_u32_f32_e32 v9, v9 2479; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v4 2480; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 2481; GISEL-NEXT: v_mul_lo_u32 v12, v10, v8 2482; GISEL-NEXT: v_mul_lo_u32 v13, v11, v8 2483; GISEL-NEXT: v_mul_lo_u32 v14, v10, v9 2484; GISEL-NEXT: v_mul_hi_u32 v15, v10, v8 2485; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2486; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2487; GISEL-NEXT: v_mul_lo_u32 v14, v9, v12 2488; GISEL-NEXT: v_mul_lo_u32 v15, v8, v13 2489; GISEL-NEXT: v_mul_hi_u32 v16, v8, v12 2490; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2491; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2492; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v16 2493; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2494; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2495; GISEL-NEXT: v_mul_lo_u32 v15, v9, v13 2496; GISEL-NEXT: v_mul_hi_u32 v12, v9, v12 2497; GISEL-NEXT: v_mul_hi_u32 v16, v8, v13 2498; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v12 2499; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2500; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v16 2501; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2502; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v16 2503; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2504; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2505; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2506; GISEL-NEXT: v_mul_hi_u32 v13, v9, v13 2507; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2508; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 2509; GISEL-NEXT: v_addc_u32_e64 v12, s[4:5], v9, v13, vcc 2510; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 2511; GISEL-NEXT: v_mul_lo_u32 v13, v10, v8 2512; GISEL-NEXT: v_mul_lo_u32 v11, v11, v8 2513; GISEL-NEXT: v_mul_lo_u32 v14, v10, v12 2514; GISEL-NEXT: v_mul_hi_u32 v10, v10, v8 2515; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2516; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2517; GISEL-NEXT: v_mul_lo_u32 v11, v12, v13 2518; GISEL-NEXT: v_mul_lo_u32 v14, v8, v10 2519; GISEL-NEXT: v_mul_hi_u32 v15, v8, v13 2520; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2521; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2522; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v15 2523; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2524; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 2525; GISEL-NEXT: v_mul_lo_u32 v14, v12, v10 2526; GISEL-NEXT: v_mul_hi_u32 v13, v12, v13 2527; GISEL-NEXT: v_mul_hi_u32 v15, v8, v10 2528; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2529; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2530; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 2531; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 2532; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v14, v15 2533; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 2534; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2535; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2536; GISEL-NEXT: v_mul_hi_u32 v10, v12, v10 2537; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 2538; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 2539; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v9, v10, vcc 2540; GISEL-NEXT: v_addc_u32_e64 v9, vcc, 0, v9, s[4:5] 2541; GISEL-NEXT: v_mul_lo_u32 v10, v1, v8 2542; GISEL-NEXT: v_mul_lo_u32 v11, v0, v9 2543; GISEL-NEXT: v_mul_hi_u32 v12, v0, v8 2544; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 2545; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2546; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2547; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2548; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2549; GISEL-NEXT: v_mul_lo_u32 v11, v1, v9 2550; GISEL-NEXT: v_mul_hi_u32 v8, v1, v8 2551; GISEL-NEXT: v_mul_hi_u32 v12, v0, v9 2552; GISEL-NEXT: v_add_i32_e32 v8, vcc, v11, v8 2553; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2554; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 2555; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2556; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2557; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2558; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2559; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2560; GISEL-NEXT: v_mul_hi_u32 v9, v1, v9 2561; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2562; GISEL-NEXT: v_mul_lo_u32 v10, v4, v8 2563; GISEL-NEXT: v_mul_lo_u32 v11, v5, v8 2564; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 2565; GISEL-NEXT: v_mul_hi_u32 v13, v4, v8 2566; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2567; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 2568; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 2569; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], v1, v11, vcc 2570; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v11 2571; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v5 2572; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2573; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v4 2574; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 2575; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v5 2576; GISEL-NEXT: v_cndmask_b32_e64 v10, v11, v12, s[4:5] 2577; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v4 2578; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 2579; GISEL-NEXT: v_subbrev_u32_e64 v1, vcc, 0, v1, s[4:5] 2580; GISEL-NEXT: v_add_i32_e32 v11, vcc, 1, v8 2581; GISEL-NEXT: v_addc_u32_e32 v12, vcc, 0, v9, vcc 2582; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5 2583; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, vcc 2584; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 2585; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc 2586; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v5 2587; GISEL-NEXT: v_cndmask_b32_e32 v0, v13, v0, vcc 2588; GISEL-NEXT: v_add_i32_e32 v1, vcc, 1, v11 2589; GISEL-NEXT: v_addc_u32_e32 v4, vcc, 0, v12, vcc 2590; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 2591; GISEL-NEXT: v_cndmask_b32_e32 v0, v11, v1, vcc 2592; GISEL-NEXT: v_cndmask_b32_e32 v1, v12, v4, vcc 2593; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2594; GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc 2595; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc 2596; GISEL-NEXT: v_cvt_f32_u32_e32 v4, v6 2597; GISEL-NEXT: v_cvt_f32_u32_e32 v5, v7 2598; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 2599; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 2600; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2601; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 2602; GISEL-NEXT: v_trunc_f32_e32 v5, v5 2603; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 2604; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 2605; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 2606; GISEL-NEXT: v_sub_i32_e32 v8, vcc, 0, v6 2607; GISEL-NEXT: v_subb_u32_e32 v9, vcc, 0, v7, vcc 2608; GISEL-NEXT: v_mul_lo_u32 v10, v8, v4 2609; GISEL-NEXT: v_mul_lo_u32 v11, v9, v4 2610; GISEL-NEXT: v_mul_lo_u32 v12, v8, v5 2611; GISEL-NEXT: v_mul_hi_u32 v13, v8, v4 2612; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2613; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 2614; GISEL-NEXT: v_mul_lo_u32 v12, v5, v10 2615; GISEL-NEXT: v_mul_lo_u32 v13, v4, v11 2616; GISEL-NEXT: v_mul_hi_u32 v14, v4, v10 2617; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2618; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2619; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2620; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2621; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2622; GISEL-NEXT: v_mul_lo_u32 v13, v5, v11 2623; GISEL-NEXT: v_mul_hi_u32 v10, v5, v10 2624; GISEL-NEXT: v_mul_hi_u32 v14, v4, v11 2625; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 2626; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2627; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v14 2628; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2629; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2630; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2631; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2632; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2633; GISEL-NEXT: v_mul_hi_u32 v11, v5, v11 2634; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2635; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 2636; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v11, vcc 2637; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v11 2638; GISEL-NEXT: v_mul_lo_u32 v11, v8, v4 2639; GISEL-NEXT: v_mul_lo_u32 v9, v9, v4 2640; GISEL-NEXT: v_mul_lo_u32 v12, v8, v10 2641; GISEL-NEXT: v_mul_hi_u32 v8, v8, v4 2642; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 2643; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 2644; GISEL-NEXT: v_mul_lo_u32 v9, v10, v11 2645; GISEL-NEXT: v_mul_lo_u32 v12, v4, v8 2646; GISEL-NEXT: v_mul_hi_u32 v13, v4, v11 2647; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 2648; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2649; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 2650; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 2651; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 2652; GISEL-NEXT: v_mul_lo_u32 v12, v10, v8 2653; GISEL-NEXT: v_mul_hi_u32 v11, v10, v11 2654; GISEL-NEXT: v_mul_hi_u32 v13, v4, v8 2655; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2656; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2657; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2658; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2659; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2660; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 2661; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2662; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2663; GISEL-NEXT: v_mul_hi_u32 v8, v10, v8 2664; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 2665; GISEL-NEXT: v_add_i32_e64 v4, s[4:5], v4, v9 2666; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 2667; GISEL-NEXT: v_addc_u32_e64 v5, vcc, 0, v5, s[4:5] 2668; GISEL-NEXT: v_mul_lo_u32 v8, v3, v4 2669; GISEL-NEXT: v_mul_lo_u32 v9, v2, v5 2670; GISEL-NEXT: v_mul_hi_u32 v10, v2, v4 2671; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2672; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2673; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2674; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2675; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2676; GISEL-NEXT: v_mul_lo_u32 v9, v3, v5 2677; GISEL-NEXT: v_mul_hi_u32 v4, v3, v4 2678; GISEL-NEXT: v_mul_hi_u32 v10, v2, v5 2679; GISEL-NEXT: v_add_i32_e32 v4, vcc, v9, v4 2680; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2681; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 2682; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2683; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2684; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 2685; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2686; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2687; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 2688; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 2689; GISEL-NEXT: v_mul_lo_u32 v8, v6, v4 2690; GISEL-NEXT: v_mul_lo_u32 v9, v7, v4 2691; GISEL-NEXT: v_mul_lo_u32 v10, v6, v5 2692; GISEL-NEXT: v_mul_hi_u32 v11, v6, v4 2693; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2694; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2695; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 2696; GISEL-NEXT: v_subb_u32_e64 v8, s[4:5], v3, v9, vcc 2697; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v9 2698; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v7 2699; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 2700; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6 2701; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2702; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v7 2703; GISEL-NEXT: v_cndmask_b32_e64 v8, v9, v10, s[4:5] 2704; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v2, v6 2705; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v7, vcc 2706; GISEL-NEXT: v_subbrev_u32_e64 v3, vcc, 0, v3, s[4:5] 2707; GISEL-NEXT: v_add_i32_e32 v9, vcc, 1, v4 2708; GISEL-NEXT: v_addc_u32_e32 v10, vcc, 0, v5, vcc 2709; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7 2710; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 2711; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 2712; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 2713; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v7 2714; GISEL-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 2715; GISEL-NEXT: v_add_i32_e32 v3, vcc, 1, v9 2716; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v10, vcc 2717; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 2718; GISEL-NEXT: v_cndmask_b32_e32 v2, v9, v3, vcc 2719; GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v6, vcc 2720; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 2721; GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc 2722; GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 2723; GISEL-NEXT: s_setpc_b64 s[30:31] 2724; 2725; CGP-LABEL: v_udiv_v2i64_pow2_shl_denom: 2726; CGP: ; %bb.0: 2727; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2728; CGP-NEXT: v_mov_b32_e32 v5, v0 2729; CGP-NEXT: v_mov_b32_e32 v7, v1 2730; CGP-NEXT: s_movk_i32 s4, 0x1000 2731; CGP-NEXT: s_mov_b32 s5, 0 2732; CGP-NEXT: v_lshl_b64 v[10:11], s[4:5], v4 2733; CGP-NEXT: v_lshl_b64 v[8:9], s[4:5], v6 2734; CGP-NEXT: v_or_b32_e32 v1, v7, v11 2735; CGP-NEXT: v_mov_b32_e32 v0, 0 2736; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 2737; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 2738; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 2739; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2740; CGP-NEXT: s_cbranch_execz BB8_2 2741; CGP-NEXT: ; %bb.1: 2742; CGP-NEXT: v_cvt_f32_u32_e32 v0, v10 2743; CGP-NEXT: v_cvt_f32_u32_e32 v1, v11 2744; CGP-NEXT: v_sub_i32_e32 v4, vcc, 0, v10 2745; CGP-NEXT: v_subb_u32_e32 v6, vcc, 0, v11, vcc 2746; CGP-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 2747; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 2748; CGP-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 2749; CGP-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 2750; CGP-NEXT: v_trunc_f32_e32 v1, v1 2751; CGP-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 2752; CGP-NEXT: v_cvt_u32_f32_e32 v1, v1 2753; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 2754; CGP-NEXT: v_mul_lo_u32 v12, v4, v1 2755; CGP-NEXT: v_mul_lo_u32 v13, v4, v0 2756; CGP-NEXT: v_mul_lo_u32 v14, v6, v0 2757; CGP-NEXT: v_mul_hi_u32 v15, v4, v0 2758; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v12 2759; CGP-NEXT: v_mul_lo_u32 v14, v1, v13 2760; CGP-NEXT: v_mul_hi_u32 v16, v0, v13 2761; CGP-NEXT: v_mul_hi_u32 v13, v1, v13 2762; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2763; CGP-NEXT: v_mul_lo_u32 v15, v0, v12 2764; CGP-NEXT: v_mul_lo_u32 v17, v1, v12 2765; CGP-NEXT: v_mul_hi_u32 v18, v0, v12 2766; CGP-NEXT: v_mul_hi_u32 v12, v1, v12 2767; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2768; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2769; CGP-NEXT: v_add_i32_e32 v13, vcc, v17, v13 2770; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 2771; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 2772; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2773; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v18 2774; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2775; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2776; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v16 2777; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2778; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2779; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2780; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2781; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v13 2782; CGP-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc 2783; CGP-NEXT: v_add_i32_e64 v1, s[4:5], v1, v12 2784; CGP-NEXT: v_mul_lo_u32 v12, v4, v0 2785; CGP-NEXT: v_mul_lo_u32 v6, v6, v0 2786; CGP-NEXT: v_mul_hi_u32 v14, v4, v0 2787; CGP-NEXT: v_mul_lo_u32 v4, v4, v13 2788; CGP-NEXT: v_mul_lo_u32 v15, v13, v12 2789; CGP-NEXT: v_mul_hi_u32 v16, v0, v12 2790; CGP-NEXT: v_mul_hi_u32 v12, v13, v12 2791; CGP-NEXT: v_add_i32_e64 v4, s[4:5], v6, v4 2792; CGP-NEXT: v_add_i32_e64 v4, s[4:5], v4, v14 2793; CGP-NEXT: v_mul_lo_u32 v6, v0, v4 2794; CGP-NEXT: v_mul_lo_u32 v14, v13, v4 2795; CGP-NEXT: v_mul_hi_u32 v17, v0, v4 2796; CGP-NEXT: v_mul_hi_u32 v4, v13, v4 2797; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v15, v6 2798; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2799; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 2800; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2801; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v16 2802; CGP-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[4:5] 2803; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v17 2804; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 2805; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v13, v6 2806; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v15 2807; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v12, v6 2808; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2809; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 2810; CGP-NEXT: v_add_i32_e64 v4, s[4:5], v4, v12 2811; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 2812; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v6 2813; CGP-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 2814; CGP-NEXT: v_mul_lo_u32 v4, v7, v0 2815; CGP-NEXT: v_mul_hi_u32 v6, v5, v0 2816; CGP-NEXT: v_mul_hi_u32 v0, v7, v0 2817; CGP-NEXT: v_mul_lo_u32 v12, v5, v1 2818; CGP-NEXT: v_mul_lo_u32 v13, v7, v1 2819; CGP-NEXT: v_mul_hi_u32 v14, v5, v1 2820; CGP-NEXT: v_mul_hi_u32 v1, v7, v1 2821; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v12 2822; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2823; CGP-NEXT: v_add_i32_e32 v0, vcc, v13, v0 2824; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2825; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v6 2826; CGP-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 2827; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v14 2828; CGP-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2829; CGP-NEXT: v_add_i32_e32 v4, vcc, v12, v4 2830; CGP-NEXT: v_add_i32_e32 v6, vcc, v13, v6 2831; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v4 2832; CGP-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 2833; CGP-NEXT: v_add_i32_e32 v4, vcc, v6, v4 2834; CGP-NEXT: v_mul_lo_u32 v6, v10, v0 2835; CGP-NEXT: v_mul_lo_u32 v12, v11, v0 2836; CGP-NEXT: v_mul_hi_u32 v13, v10, v0 2837; CGP-NEXT: v_add_i32_e32 v1, vcc, v1, v4 2838; CGP-NEXT: v_mul_lo_u32 v4, v10, v1 2839; CGP-NEXT: v_add_i32_e32 v14, vcc, 1, v0 2840; CGP-NEXT: v_addc_u32_e32 v15, vcc, 0, v1, vcc 2841; CGP-NEXT: v_add_i32_e32 v4, vcc, v12, v4 2842; CGP-NEXT: v_add_i32_e32 v12, vcc, 1, v14 2843; CGP-NEXT: v_addc_u32_e32 v16, vcc, 0, v15, vcc 2844; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v13 2845; CGP-NEXT: v_sub_i32_e32 v6, vcc, v5, v6 2846; CGP-NEXT: v_subb_u32_e64 v13, s[4:5], v7, v4, vcc 2847; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v7, v4 2848; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v10 2849; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2850; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v13, v11 2851; CGP-NEXT: v_cndmask_b32_e64 v17, 0, -1, s[4:5] 2852; CGP-NEXT: v_subb_u32_e32 v4, vcc, v4, v11, vcc 2853; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v13, v11 2854; CGP-NEXT: v_cndmask_b32_e32 v7, v17, v7, vcc 2855; CGP-NEXT: v_sub_i32_e32 v6, vcc, v6, v10 2856; CGP-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 2857; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v6, v10 2858; CGP-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 2859; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v4, v11 2860; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, vcc 2861; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v4, v11 2862; CGP-NEXT: v_cndmask_b32_e32 v4, v13, v6, vcc 2863; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2864; CGP-NEXT: v_cndmask_b32_e32 v4, v14, v12, vcc 2865; CGP-NEXT: v_cndmask_b32_e32 v6, v15, v16, vcc 2866; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 2867; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 2868; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc 2869; CGP-NEXT: BB8_2: ; %Flow2 2870; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 2871; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] 2872; CGP-NEXT: s_cbranch_execz BB8_4 2873; CGP-NEXT: ; %bb.3: 2874; CGP-NEXT: v_cvt_f32_u32_e32 v0, v10 2875; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v10 2876; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 2877; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 2878; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 2879; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 2880; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 2881; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 2882; CGP-NEXT: v_mul_hi_u32 v0, v5, v0 2883; CGP-NEXT: v_mul_lo_u32 v1, v0, v10 2884; CGP-NEXT: v_add_i32_e32 v4, vcc, 1, v0 2885; CGP-NEXT: v_sub_i32_e32 v1, vcc, v5, v1 2886; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v1, v10 2887; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 2888; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v1, v10 2889; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc 2890; CGP-NEXT: v_add_i32_e32 v4, vcc, 1, v0 2891; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v1, v10 2892; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 2893; CGP-NEXT: v_mov_b32_e32 v1, 0 2894; CGP-NEXT: BB8_4: 2895; CGP-NEXT: s_or_b64 exec, exec, s[6:7] 2896; CGP-NEXT: v_or_b32_e32 v5, v3, v9 2897; CGP-NEXT: v_mov_b32_e32 v4, 0 2898; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] 2899; CGP-NEXT: ; implicit-def: $vgpr4_vgpr5 2900; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 2901; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2902; CGP-NEXT: s_cbranch_execz BB8_6 2903; CGP-NEXT: ; %bb.5: 2904; CGP-NEXT: v_cvt_f32_u32_e32 v4, v8 2905; CGP-NEXT: v_cvt_f32_u32_e32 v5, v9 2906; CGP-NEXT: v_sub_i32_e32 v6, vcc, 0, v8 2907; CGP-NEXT: v_subb_u32_e32 v7, vcc, 0, v9, vcc 2908; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 2909; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 2910; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 2911; CGP-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 2912; CGP-NEXT: v_trunc_f32_e32 v5, v5 2913; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 2914; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 2915; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 2916; CGP-NEXT: v_mul_lo_u32 v10, v6, v5 2917; CGP-NEXT: v_mul_lo_u32 v11, v6, v4 2918; CGP-NEXT: v_mul_lo_u32 v12, v7, v4 2919; CGP-NEXT: v_mul_hi_u32 v13, v6, v4 2920; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2921; CGP-NEXT: v_mul_lo_u32 v12, v5, v11 2922; CGP-NEXT: v_mul_hi_u32 v14, v4, v11 2923; CGP-NEXT: v_mul_hi_u32 v11, v5, v11 2924; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 2925; CGP-NEXT: v_mul_lo_u32 v13, v4, v10 2926; CGP-NEXT: v_mul_lo_u32 v15, v5, v10 2927; CGP-NEXT: v_mul_hi_u32 v16, v4, v10 2928; CGP-NEXT: v_mul_hi_u32 v10, v5, v10 2929; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2930; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2931; CGP-NEXT: v_add_i32_e32 v11, vcc, v15, v11 2932; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2933; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2934; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2935; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v16 2936; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2937; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2938; CGP-NEXT: v_add_i32_e32 v13, vcc, v15, v14 2939; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2940; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2941; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2942; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2943; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v11 2944; CGP-NEXT: v_addc_u32_e64 v11, s[4:5], v5, v10, vcc 2945; CGP-NEXT: v_add_i32_e64 v5, s[4:5], v5, v10 2946; CGP-NEXT: v_mul_lo_u32 v10, v6, v4 2947; CGP-NEXT: v_mul_lo_u32 v7, v7, v4 2948; CGP-NEXT: v_mul_hi_u32 v12, v6, v4 2949; CGP-NEXT: v_mul_lo_u32 v6, v6, v11 2950; CGP-NEXT: v_mul_lo_u32 v13, v11, v10 2951; CGP-NEXT: v_mul_hi_u32 v14, v4, v10 2952; CGP-NEXT: v_mul_hi_u32 v10, v11, v10 2953; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v7, v6 2954; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v12 2955; CGP-NEXT: v_mul_lo_u32 v7, v4, v6 2956; CGP-NEXT: v_mul_lo_u32 v12, v11, v6 2957; CGP-NEXT: v_mul_hi_u32 v15, v4, v6 2958; CGP-NEXT: v_mul_hi_u32 v6, v11, v6 2959; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v13, v7 2960; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2961; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v10 2962; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2963; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v7, v14 2964; CGP-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 2965; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v15 2966; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2967; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v11, v7 2968; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v13 2969; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 2970; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 2971; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2972; CGP-NEXT: v_add_i32_e64 v6, s[4:5], v6, v10 2973; CGP-NEXT: v_addc_u32_e32 v5, vcc, v5, v6, vcc 2974; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2975; CGP-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 2976; CGP-NEXT: v_mul_lo_u32 v6, v3, v4 2977; CGP-NEXT: v_mul_hi_u32 v7, v2, v4 2978; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 2979; CGP-NEXT: v_mul_lo_u32 v10, v2, v5 2980; CGP-NEXT: v_mul_lo_u32 v11, v3, v5 2981; CGP-NEXT: v_mul_hi_u32 v12, v2, v5 2982; CGP-NEXT: v_mul_hi_u32 v5, v3, v5 2983; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v10 2984; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2985; CGP-NEXT: v_add_i32_e32 v4, vcc, v11, v4 2986; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2987; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v7 2988; CGP-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2989; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v12 2990; CGP-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2991; CGP-NEXT: v_add_i32_e32 v6, vcc, v10, v6 2992; CGP-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2993; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v6 2994; CGP-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2995; CGP-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2996; CGP-NEXT: v_mul_lo_u32 v7, v8, v4 2997; CGP-NEXT: v_mul_lo_u32 v10, v9, v4 2998; CGP-NEXT: v_mul_hi_u32 v11, v8, v4 2999; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v6 3000; CGP-NEXT: v_mul_lo_u32 v6, v8, v5 3001; CGP-NEXT: v_add_i32_e32 v12, vcc, 1, v4 3002; CGP-NEXT: v_addc_u32_e32 v13, vcc, 0, v5, vcc 3003; CGP-NEXT: v_add_i32_e32 v6, vcc, v10, v6 3004; CGP-NEXT: v_add_i32_e32 v10, vcc, 1, v12 3005; CGP-NEXT: v_addc_u32_e32 v14, vcc, 0, v13, vcc 3006; CGP-NEXT: v_add_i32_e32 v6, vcc, v6, v11 3007; CGP-NEXT: v_sub_i32_e32 v7, vcc, v2, v7 3008; CGP-NEXT: v_subb_u32_e64 v11, s[4:5], v3, v6, vcc 3009; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v6 3010; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v8 3011; CGP-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 3012; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v9 3013; CGP-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] 3014; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 3015; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v11, v9 3016; CGP-NEXT: v_cndmask_b32_e32 v6, v15, v6, vcc 3017; CGP-NEXT: v_sub_i32_e32 v7, vcc, v7, v8 3018; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 3019; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v7, v8 3020; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 3021; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v3, v9 3022; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, vcc 3023; CGP-NEXT: v_cmp_eq_u32_e32 vcc, v3, v9 3024; CGP-NEXT: v_cndmask_b32_e32 v3, v11, v7, vcc 3025; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 3026; CGP-NEXT: v_cndmask_b32_e32 v3, v12, v10, vcc 3027; CGP-NEXT: v_cndmask_b32_e32 v7, v13, v14, vcc 3028; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 3029; CGP-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc 3030; CGP-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 3031; CGP-NEXT: BB8_6: ; %Flow 3032; CGP-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] 3033; CGP-NEXT: s_xor_b64 exec, exec, s[6:7] 3034; CGP-NEXT: s_cbranch_execz BB8_8 3035; CGP-NEXT: ; %bb.7: 3036; CGP-NEXT: v_cvt_f32_u32_e32 v3, v8 3037; CGP-NEXT: v_sub_i32_e32 v4, vcc, 0, v8 3038; CGP-NEXT: v_rcp_iflag_f32_e32 v3, v3 3039; CGP-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3 3040; CGP-NEXT: v_cvt_u32_f32_e32 v3, v3 3041; CGP-NEXT: v_mul_lo_u32 v4, v4, v3 3042; CGP-NEXT: v_mul_hi_u32 v4, v3, v4 3043; CGP-NEXT: v_add_i32_e32 v3, vcc, v3, v4 3044; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 3045; CGP-NEXT: v_mul_lo_u32 v4, v3, v8 3046; CGP-NEXT: v_add_i32_e32 v5, vcc, 1, v3 3047; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 3048; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v8 3049; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc 3050; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v2, v8 3051; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc 3052; CGP-NEXT: v_add_i32_e32 v4, vcc, 1, v3 3053; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v8 3054; CGP-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc 3055; CGP-NEXT: v_mov_b32_e32 v5, 0 3056; CGP-NEXT: BB8_8: 3057; CGP-NEXT: s_or_b64 exec, exec, s[6:7] 3058; CGP-NEXT: v_mov_b32_e32 v2, v4 3059; CGP-NEXT: v_mov_b32_e32 v3, v5 3060; CGP-NEXT: s_setpc_b64 s[30:31] 3061 %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y 3062 %r = udiv <2 x i64> %x, %shl.y 3063 ret <2 x i64> %r 3064} 3065 3066define i64 @v_udiv_i64_24bit(i64 %num, i64 %den) { 3067; GISEL-LABEL: v_udiv_i64_24bit: 3068; GISEL: ; %bb.0: 3069; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3070; GISEL-NEXT: s_mov_b32 s4, 0xffffff 3071; GISEL-NEXT: v_and_b32_e32 v0, s4, v0 3072; GISEL-NEXT: v_and_b32_e32 v1, s4, v2 3073; GISEL-NEXT: v_cvt_f32_u32_e32 v2, v1 3074; GISEL-NEXT: v_sub_i32_e32 v3, vcc, 0, v1 3075; GISEL-NEXT: v_rcp_iflag_f32_e32 v2, v2 3076; GISEL-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2 3077; GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2 3078; GISEL-NEXT: v_mul_lo_u32 v3, v3, v2 3079; GISEL-NEXT: v_mul_hi_u32 v3, v2, v3 3080; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v3 3081; GISEL-NEXT: v_mul_hi_u32 v2, v0, v2 3082; GISEL-NEXT: v_mul_lo_u32 v3, v2, v1 3083; GISEL-NEXT: v_add_i32_e32 v4, vcc, 1, v2 3084; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 3085; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3086; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc 3087; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v0, v1 3088; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc 3089; GISEL-NEXT: v_add_i32_e32 v3, vcc, 1, v2 3090; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3091; GISEL-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc 3092; GISEL-NEXT: v_mov_b32_e32 v1, 0 3093; GISEL-NEXT: s_setpc_b64 s[30:31] 3094; 3095; CGP-LABEL: v_udiv_i64_24bit: 3096; CGP: ; %bb.0: 3097; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3098; CGP-NEXT: s_mov_b32 s4, 0xffffff 3099; CGP-NEXT: v_and_b32_e32 v0, s4, v0 3100; CGP-NEXT: v_and_b32_e32 v1, s4, v2 3101; CGP-NEXT: v_cvt_f32_u32_e32 v0, v0 3102; CGP-NEXT: v_cvt_f32_u32_e32 v1, v1 3103; CGP-NEXT: v_rcp_f32_e32 v2, v1 3104; CGP-NEXT: v_mul_f32_e32 v2, v0, v2 3105; CGP-NEXT: v_trunc_f32_e32 v2, v2 3106; CGP-NEXT: v_mad_f32 v0, -v2, v1, v0 3107; CGP-NEXT: v_cvt_u32_f32_e32 v2, v2 3108; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v0|, v1 3109; CGP-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] 3110; CGP-NEXT: v_add_i32_e32 v0, vcc, v2, v0 3111; CGP-NEXT: v_and_b32_e32 v0, 0xffffff, v0 3112; CGP-NEXT: v_mov_b32_e32 v1, 0 3113; CGP-NEXT: s_setpc_b64 s[30:31] 3114 %num.mask = and i64 %num, 16777215 3115 %den.mask = and i64 %den, 16777215 3116 %result = udiv i64 %num.mask, %den.mask 3117 ret i64 %result 3118} 3119 3120define <2 x i64> @v_udiv_v2i64_24bit(<2 x i64> %num, <2 x i64> %den) { 3121; GISEL-LABEL: v_udiv_v2i64_24bit: 3122; GISEL: ; %bb.0: 3123; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3124; GISEL-NEXT: s_mov_b32 s6, 0xffffff 3125; GISEL-NEXT: v_cvt_f32_ubyte0_e32 v1, 0 3126; GISEL-NEXT: v_and_b32_e32 v3, s6, v4 3127; GISEL-NEXT: v_and_b32_e32 v4, s6, v6 3128; GISEL-NEXT: v_cvt_f32_u32_e32 v5, v3 3129; GISEL-NEXT: v_sub_i32_e32 v6, vcc, 0, v3 3130; GISEL-NEXT: v_subb_u32_e64 v7, s[4:5], 0, 0, vcc 3131; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v4 3132; GISEL-NEXT: v_sub_i32_e32 v9, vcc, 0, v4 3133; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], 0, 0, vcc 3134; GISEL-NEXT: v_mac_f32_e32 v5, 0x4f800000, v1 3135; GISEL-NEXT: v_mac_f32_e32 v8, 0x4f800000, v1 3136; GISEL-NEXT: v_rcp_iflag_f32_e32 v1, v5 3137; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v8 3138; GISEL-NEXT: v_mul_f32_e32 v1, 0x5f7ffffc, v1 3139; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 3140; GISEL-NEXT: v_mul_f32_e32 v8, 0x2f800000, v1 3141; GISEL-NEXT: v_mul_f32_e32 v11, 0x2f800000, v5 3142; GISEL-NEXT: v_trunc_f32_e32 v8, v8 3143; GISEL-NEXT: v_trunc_f32_e32 v11, v11 3144; GISEL-NEXT: v_mac_f32_e32 v1, 0xcf800000, v8 3145; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 3146; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v11 3147; GISEL-NEXT: v_cvt_u32_f32_e32 v11, v11 3148; GISEL-NEXT: v_cvt_u32_f32_e32 v1, v1 3149; GISEL-NEXT: v_mul_lo_u32 v12, v6, v8 3150; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 3151; GISEL-NEXT: v_mul_lo_u32 v13, v9, v11 3152; GISEL-NEXT: v_mul_lo_u32 v14, v6, v1 3153; GISEL-NEXT: v_mul_lo_u32 v15, v7, v1 3154; GISEL-NEXT: v_mul_hi_u32 v16, v6, v1 3155; GISEL-NEXT: v_mul_lo_u32 v17, v9, v5 3156; GISEL-NEXT: v_mul_lo_u32 v18, v10, v5 3157; GISEL-NEXT: v_mul_hi_u32 v19, v9, v5 3158; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v12 3159; GISEL-NEXT: v_add_i32_e32 v13, vcc, v18, v13 3160; GISEL-NEXT: v_mul_lo_u32 v15, v11, v17 3161; GISEL-NEXT: v_mul_hi_u32 v18, v5, v17 3162; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v19 3163; GISEL-NEXT: v_mul_lo_u32 v19, v5, v13 3164; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v19 3165; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 3166; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v18 3167; GISEL-NEXT: v_mul_lo_u32 v15, v8, v14 3168; GISEL-NEXT: v_mul_hi_u32 v18, v1, v14 3169; GISEL-NEXT: v_mul_hi_u32 v14, v8, v14 3170; GISEL-NEXT: v_mul_hi_u32 v17, v11, v17 3171; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v16 3172; GISEL-NEXT: v_mul_lo_u32 v16, v1, v12 3173; GISEL-NEXT: v_add_i32_e64 v15, s[4:5], v15, v16 3174; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 3175; GISEL-NEXT: v_add_i32_e64 v15, s[4:5], v15, v18 3176; GISEL-NEXT: v_mul_lo_u32 v15, v8, v12 3177; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[4:5] 3178; GISEL-NEXT: v_add_i32_e64 v16, s[4:5], v16, v18 3179; GISEL-NEXT: v_mul_hi_u32 v18, v1, v12 3180; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 3181; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3182; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v14, v18 3183; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[4:5] 3184; GISEL-NEXT: v_add_i32_e64 v15, s[4:5], v15, v18 3185; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 3186; GISEL-NEXT: v_add_i32_e32 v18, vcc, v19, v18 3187; GISEL-NEXT: v_mul_lo_u32 v19, v11, v13 3188; GISEL-NEXT: v_add_i32_e32 v17, vcc, v19, v17 3189; GISEL-NEXT: v_mul_hi_u32 v19, v5, v13 3190; GISEL-NEXT: v_cndmask_b32_e64 v20, 0, 1, vcc 3191; GISEL-NEXT: v_add_i32_e32 v17, vcc, v17, v19 3192; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, vcc 3193; GISEL-NEXT: v_add_i32_e32 v19, vcc, v20, v19 3194; GISEL-NEXT: v_and_b32_e32 v0, s6, v0 3195; GISEL-NEXT: v_and_b32_e32 v2, s6, v2 3196; GISEL-NEXT: v_mul_hi_u32 v12, v8, v12 3197; GISEL-NEXT: v_mul_hi_u32 v13, v11, v13 3198; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v16 3199; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3200; GISEL-NEXT: v_add_i32_e32 v17, vcc, v17, v18 3201; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc 3202; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v16 3203; GISEL-NEXT: v_add_i32_e32 v16, vcc, v19, v18 3204; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 3205; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 3206; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v14 3207; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], v8, v12, vcc 3208; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v12 3209; GISEL-NEXT: v_mul_lo_u32 v12, v6, v1 3210; GISEL-NEXT: v_mul_lo_u32 v7, v7, v1 3211; GISEL-NEXT: v_mul_hi_u32 v15, v6, v1 3212; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v17 3213; GISEL-NEXT: v_addc_u32_e64 v16, s[6:7], v11, v13, s[4:5] 3214; GISEL-NEXT: v_add_i32_e64 v11, s[6:7], v11, v13 3215; GISEL-NEXT: v_mul_lo_u32 v13, v9, v5 3216; GISEL-NEXT: v_mul_lo_u32 v10, v10, v5 3217; GISEL-NEXT: v_mul_hi_u32 v17, v9, v5 3218; GISEL-NEXT: v_mul_lo_u32 v6, v6, v14 3219; GISEL-NEXT: v_mul_lo_u32 v18, v14, v12 3220; GISEL-NEXT: v_mul_hi_u32 v19, v1, v12 3221; GISEL-NEXT: v_mul_hi_u32 v12, v14, v12 3222; GISEL-NEXT: v_mul_lo_u32 v9, v9, v16 3223; GISEL-NEXT: v_add_i32_e64 v6, s[6:7], v7, v6 3224; GISEL-NEXT: v_mul_lo_u32 v7, v16, v13 3225; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v10, v9 3226; GISEL-NEXT: v_mul_hi_u32 v10, v5, v13 3227; GISEL-NEXT: v_mul_hi_u32 v13, v16, v13 3228; GISEL-NEXT: v_add_i32_e64 v6, s[6:7], v6, v15 3229; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v17 3230; GISEL-NEXT: v_mul_lo_u32 v15, v1, v6 3231; GISEL-NEXT: v_mul_lo_u32 v17, v5, v9 3232; GISEL-NEXT: v_add_i32_e64 v7, s[6:7], v7, v17 3233; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, s[6:7] 3234; GISEL-NEXT: v_add_i32_e64 v7, s[6:7], v7, v10 3235; GISEL-NEXT: v_mul_lo_u32 v7, v14, v6 3236; GISEL-NEXT: v_mul_hi_u32 v10, v1, v6 3237; GISEL-NEXT: v_mul_hi_u32 v6, v14, v6 3238; GISEL-NEXT: v_mul_lo_u32 v14, v16, v9 3239; GISEL-NEXT: v_mul_hi_u32 v16, v16, v9 3240; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 3241; GISEL-NEXT: v_add_i32_e64 v15, s[8:9], v18, v15 3242; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, s[8:9] 3243; GISEL-NEXT: v_add_i32_e64 v7, s[8:9], v7, v12 3244; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[8:9] 3245; GISEL-NEXT: v_add_i32_e64 v13, s[8:9], v14, v13 3246; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[8:9] 3247; GISEL-NEXT: v_add_i32_e64 v15, s[8:9], v15, v19 3248; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[8:9] 3249; GISEL-NEXT: v_add_i32_e64 v7, s[8:9], v7, v10 3250; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[8:9] 3251; GISEL-NEXT: v_cndmask_b32_e64 v19, 0, 1, s[6:7] 3252; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v13, v9 3253; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[6:7] 3254; GISEL-NEXT: v_add_i32_e64 v15, s[6:7], v18, v15 3255; GISEL-NEXT: v_add_i32_e64 v10, s[6:7], v12, v10 3256; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v17, v19 3257; GISEL-NEXT: v_add_i32_e64 v13, s[6:7], v14, v13 3258; GISEL-NEXT: v_add_i32_e64 v7, s[6:7], v7, v15 3259; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[6:7] 3260; GISEL-NEXT: v_add_i32_e64 v9, s[6:7], v9, v12 3261; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[6:7] 3262; GISEL-NEXT: v_add_i32_e64 v10, s[6:7], v10, v14 3263; GISEL-NEXT: v_add_i32_e64 v12, s[6:7], v13, v12 3264; GISEL-NEXT: v_add_i32_e64 v6, s[6:7], v6, v10 3265; GISEL-NEXT: v_add_i32_e64 v10, s[6:7], v16, v12 3266; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v8, v6, vcc 3267; GISEL-NEXT: v_addc_u32_e64 v8, vcc, v11, v10, s[4:5] 3268; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v7 3269; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 3270; GISEL-NEXT: v_mul_lo_u32 v7, 0, v1 3271; GISEL-NEXT: v_mul_hi_u32 v10, v0, v1 3272; GISEL-NEXT: v_mul_hi_u32 v1, 0, v1 3273; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 3274; GISEL-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 3275; GISEL-NEXT: v_mul_lo_u32 v9, 0, v5 3276; GISEL-NEXT: v_mul_hi_u32 v11, v2, v5 3277; GISEL-NEXT: v_mul_hi_u32 v5, 0, v5 3278; GISEL-NEXT: v_mul_lo_u32 v12, v0, v6 3279; GISEL-NEXT: v_mul_lo_u32 v13, 0, v6 3280; GISEL-NEXT: v_mul_hi_u32 v14, v0, v6 3281; GISEL-NEXT: v_mul_hi_u32 v6, 0, v6 3282; GISEL-NEXT: v_mul_lo_u32 v15, v2, v8 3283; GISEL-NEXT: v_mul_lo_u32 v16, 0, v8 3284; GISEL-NEXT: v_mul_hi_u32 v17, v2, v8 3285; GISEL-NEXT: v_mul_hi_u32 v8, 0, v8 3286; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v12 3287; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3288; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 3289; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3290; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v15 3291; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 3292; GISEL-NEXT: v_add_i32_e32 v5, vcc, v16, v5 3293; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3294; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 3295; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3296; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v14 3297; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3298; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 3299; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3300; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v17 3301; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3302; GISEL-NEXT: v_add_i32_e32 v7, vcc, v12, v7 3303; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 3304; GISEL-NEXT: v_add_i32_e32 v9, vcc, v15, v9 3305; GISEL-NEXT: v_add_i32_e32 v11, vcc, v16, v11 3306; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v7 3307; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3308; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v9 3309; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3310; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 3311; GISEL-NEXT: v_mul_lo_u32 v10, v3, v1 3312; GISEL-NEXT: v_mul_lo_u32 v12, 0, v1 3313; GISEL-NEXT: v_mul_hi_u32 v13, v3, v1 3314; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 3315; GISEL-NEXT: v_mul_lo_u32 v11, v4, v5 3316; GISEL-NEXT: v_mul_lo_u32 v14, 0, v5 3317; GISEL-NEXT: v_mul_hi_u32 v15, v4, v5 3318; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v7 3319; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v9 3320; GISEL-NEXT: v_mul_lo_u32 v8, v3, v6 3321; GISEL-NEXT: v_add_i32_e32 v9, vcc, 1, v1 3322; GISEL-NEXT: v_addc_u32_e32 v16, vcc, 0, v6, vcc 3323; GISEL-NEXT: v_mul_lo_u32 v17, v4, v7 3324; GISEL-NEXT: v_add_i32_e32 v18, vcc, 1, v5 3325; GISEL-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc 3326; GISEL-NEXT: v_add_i32_e32 v8, vcc, v12, v8 3327; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v17 3328; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v13 3329; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 3330; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 3331; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], 0, v8, vcc 3332; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v3 3333; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 3334; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v2, v11 3335; GISEL-NEXT: v_subb_u32_e64 v11, s[6:7], 0, v12, s[4:5] 3336; GISEL-NEXT: v_cmp_ge_u32_e64 s[6:7], v2, v4 3337; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[6:7] 3338; GISEL-NEXT: v_cmp_le_u32_e64 s[6:7], 0, v10 3339; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[6:7] 3340; GISEL-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v10 3341; GISEL-NEXT: v_cmp_le_u32_e64 s[8:9], 0, v11 3342; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[8:9] 3343; GISEL-NEXT: v_cmp_eq_u32_e64 s[8:9], 0, v11 3344; GISEL-NEXT: v_add_i32_e64 v11, s[10:11], 1, v9 3345; GISEL-NEXT: v_addc_u32_e64 v17, s[10:11], 0, v16, s[10:11] 3346; GISEL-NEXT: v_sub_i32_e64 v8, s[10:11], 0, v8 3347; GISEL-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v8, vcc 3348; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 3349; GISEL-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v8, vcc 3350; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v3 3351; GISEL-NEXT: v_add_i32_e64 v0, s[10:11], 1, v18 3352; GISEL-NEXT: v_addc_u32_e64 v3, s[10:11], 0, v19, s[10:11] 3353; GISEL-NEXT: v_sub_i32_e64 v12, s[10:11], 0, v12 3354; GISEL-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v12, s[4:5] 3355; GISEL-NEXT: v_cndmask_b32_e64 v13, v15, v13, s[6:7] 3356; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, -1, vcc 3357; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v14, s[8:9] 3358; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 3359; GISEL-NEXT: v_subbrev_u32_e32 v12, vcc, 0, v12, vcc 3360; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v2, v4 3361; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 3362; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v8 3363; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 3364; GISEL-NEXT: v_cmp_le_u32_e32 vcc, 0, v12 3365; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, vcc 3366; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v8 3367; GISEL-NEXT: v_cndmask_b32_e32 v4, v4, v15, vcc 3368; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v12 3369; GISEL-NEXT: v_cndmask_b32_e32 v2, v14, v2, vcc 3370; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 3371; GISEL-NEXT: v_cndmask_b32_e32 v4, v9, v11, vcc 3372; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v2 3373; GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v0, s[4:5] 3374; GISEL-NEXT: v_cndmask_b32_e32 v8, v16, v17, vcc 3375; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 3376; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc 3377; GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] 3378; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v10 3379; GISEL-NEXT: v_cndmask_b32_e64 v2, v5, v2, s[4:5] 3380; GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v8, vcc 3381; GISEL-NEXT: v_cndmask_b32_e64 v3, v7, v3, s[4:5] 3382; GISEL-NEXT: s_setpc_b64 s[30:31] 3383; 3384; CGP-LABEL: v_udiv_v2i64_24bit: 3385; CGP: ; %bb.0: 3386; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3387; CGP-NEXT: s_mov_b32 s6, 0xffffff 3388; CGP-NEXT: v_and_b32_e32 v0, s6, v0 3389; CGP-NEXT: v_and_b32_e32 v1, s6, v2 3390; CGP-NEXT: v_and_b32_e32 v2, s6, v4 3391; CGP-NEXT: v_and_b32_e32 v3, s6, v6 3392; CGP-NEXT: v_cvt_f32_u32_e32 v0, v0 3393; CGP-NEXT: v_cvt_f32_u32_e32 v2, v2 3394; CGP-NEXT: v_cvt_f32_u32_e32 v1, v1 3395; CGP-NEXT: v_cvt_f32_u32_e32 v3, v3 3396; CGP-NEXT: v_rcp_f32_e32 v4, v2 3397; CGP-NEXT: v_rcp_f32_e32 v5, v3 3398; CGP-NEXT: v_mul_f32_e32 v4, v0, v4 3399; CGP-NEXT: v_mul_f32_e32 v5, v1, v5 3400; CGP-NEXT: v_trunc_f32_e32 v4, v4 3401; CGP-NEXT: v_trunc_f32_e32 v5, v5 3402; CGP-NEXT: v_mad_f32 v0, -v4, v2, v0 3403; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 3404; CGP-NEXT: v_mad_f32 v1, -v5, v3, v1 3405; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 3406; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v0|, v2 3407; CGP-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] 3408; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v1|, v3 3409; CGP-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5] 3410; CGP-NEXT: v_add_i32_e32 v0, vcc, v4, v0 3411; CGP-NEXT: v_add_i32_e32 v1, vcc, v5, v1 3412; CGP-NEXT: v_and_b32_e32 v0, s6, v0 3413; CGP-NEXT: v_and_b32_e32 v2, s6, v1 3414; CGP-NEXT: v_mov_b32_e32 v1, 0 3415; CGP-NEXT: v_mov_b32_e32 v3, 0 3416; CGP-NEXT: s_setpc_b64 s[30:31] 3417 %num.mask = and <2 x i64> %num, <i64 16777215, i64 16777215> 3418 %den.mask = and <2 x i64> %den, <i64 16777215, i64 16777215> 3419 %result = udiv <2 x i64> %num.mask, %den.mask 3420 ret <2 x i64> %result 3421} 3422