1; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
2
3; Show that what the alloca promotion pass will do for non-atomic load/store.
4
5; OPT-LABEL: @vector_alloca_not_atomic(
6;
7; OPT: extractelement <3 x i32> <i32 0, i32 1, i32 2>, i64 %index
8define amdgpu_kernel void @vector_alloca_not_atomic(i32 addrspace(1)* %out, i64 %index) {
9entry:
10  %alloca = alloca [3 x i32], addrspace(5)
11  %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
12  %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
13  %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
14  store i32 0, i32 addrspace(5)* %a0
15  store i32 1, i32 addrspace(5)* %a1
16  store i32 2, i32 addrspace(5)* %a2
17  %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
18  %data = load i32, i32 addrspace(5)* %tmp
19  store i32 %data, i32 addrspace(1)* %out
20  ret void
21}
22
23; OPT-LABEL: @vector_alloca_atomic_read(
24;
25; OPT: alloca [3 x i32]
26; OPT: store i32 0, i32 addrspace(5)*
27; OPT: store i32 1, i32 addrspace(5)*
28; OPT: store i32 2, i32 addrspace(5)*
29; OPT: load atomic i32, i32 addrspace(5)*
30define amdgpu_kernel void @vector_alloca_atomic_read(i32 addrspace(1)* %out, i64 %index) {
31entry:
32  %alloca = alloca [3 x i32], addrspace(5)
33  %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
34  %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
35  %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
36  store i32 0, i32 addrspace(5)* %a0
37  store i32 1, i32 addrspace(5)* %a1
38  store i32 2, i32 addrspace(5)* %a2
39  %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
40  %data = load atomic i32, i32 addrspace(5)* %tmp acquire, align 4
41  store i32 %data, i32 addrspace(1)* %out
42  ret void
43}
44
45; OPT-LABEL: @vector_alloca_atomic_write(
46;
47; OPT: alloca [3 x i32]
48; OPT: store atomic i32 0, i32 addrspace(5)
49; OPT: store atomic i32 1, i32 addrspace(5)
50; OPT: store atomic i32 2, i32 addrspace(5)
51; OPT: load i32, i32 addrspace(5)*
52define amdgpu_kernel void @vector_alloca_atomic_write(i32 addrspace(1)* %out, i64 %index) {
53entry:
54  %alloca = alloca [3 x i32], addrspace(5)
55  %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
56  %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
57  %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
58  store atomic i32 0, i32 addrspace(5)* %a0 release, align 4
59  store atomic i32 1, i32 addrspace(5)* %a1 release, align 4
60  store atomic i32 2, i32 addrspace(5)* %a2  release, align 4
61  %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
62  %data = load i32, i32 addrspace(5)* %tmp
63  store i32 %data, i32 addrspace(1)* %out
64  ret void
65}
66