1; Test 64-bit floating-point loads.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5
6; Test the low end of the LD range.
7define double @f1(double *%src) {
8; CHECK-LABEL: f1:
9; CHECK: ld %f0, 0(%r2)
10; CHECK: br %r14
11  %val = load double, double *%src
12  ret double %val
13}
14
15; Test the high end of the LD range.
16define double @f2(double *%src) {
17; CHECK-LABEL: f2:
18; CHECK: ld %f0, 4088(%r2)
19; CHECK: br %r14
20  %ptr = getelementptr double, double *%src, i64 511
21  %val = load double, double *%ptr
22  ret double %val
23}
24
25; Check the next doubleword up, which should use LDY instead of LD.
26define double @f3(double *%src) {
27; CHECK-LABEL: f3:
28; CHECK: ldy %f0, 4096(%r2)
29; CHECK: br %r14
30  %ptr = getelementptr double, double *%src, i64 512
31  %val = load double, double *%ptr
32  ret double %val
33}
34
35; Check the high end of the aligned LDY range.
36define double @f4(double *%src) {
37; CHECK-LABEL: f4:
38; CHECK: ldy %f0, 524280(%r2)
39; CHECK: br %r14
40  %ptr = getelementptr double, double *%src, i64 65535
41  %val = load double, double *%ptr
42  ret double %val
43}
44
45; Check the next doubleword up, which needs separate address logic.
46; Other sequences besides this one would be OK.
47define double @f5(double *%src) {
48; CHECK-LABEL: f5:
49; CHECK: agfi %r2, 524288
50; CHECK: ld %f0, 0(%r2)
51; CHECK: br %r14
52  %ptr = getelementptr double, double *%src, i64 65536
53  %val = load double, double *%ptr
54  ret double %val
55}
56
57; Check the high end of the negative aligned LDY range.
58define double @f6(double *%src) {
59; CHECK-LABEL: f6:
60; CHECK: ldy %f0, -8(%r2)
61; CHECK: br %r14
62  %ptr = getelementptr double, double *%src, i64 -1
63  %val = load double, double *%ptr
64  ret double %val
65}
66
67; Check the low end of the LDY range.
68define double @f7(double *%src) {
69; CHECK-LABEL: f7:
70; CHECK: ldy %f0, -524288(%r2)
71; CHECK: br %r14
72  %ptr = getelementptr double, double *%src, i64 -65536
73  %val = load double, double *%ptr
74  ret double %val
75}
76
77; Check the next doubleword down, which needs separate address logic.
78; Other sequences besides this one would be OK.
79define double @f8(double *%src) {
80; CHECK-LABEL: f8:
81; CHECK: agfi %r2, -524296
82; CHECK: ld %f0, 0(%r2)
83; CHECK: br %r14
84  %ptr = getelementptr double, double *%src, i64 -65537
85  %val = load double, double *%ptr
86  ret double %val
87}
88
89; Check that LD allows an index.
90define double @f9(i64 %src, i64 %index) {
91; CHECK-LABEL: f9:
92; CHECK: ld %f0, 4095({{%r3,%r2|%r2,%r3}})
93; CHECK: br %r14
94  %add1 = add i64 %src, %index
95  %add2 = add i64 %add1, 4095
96  %ptr = inttoptr i64 %add2 to double *
97  %val = load double, double *%ptr
98  ret double %val
99}
100
101; Check that LDY allows an index.
102define double @f10(i64 %src, i64 %index) {
103; CHECK-LABEL: f10:
104; CHECK: ldy %f0, 4096({{%r3,%r2|%r2,%r3}})
105; CHECK: br %r14
106  %add1 = add i64 %src, %index
107  %add2 = add i64 %add1, 4096
108  %ptr = inttoptr i64 %add2 to double *
109  %val = load double, double *%ptr
110  ret double %val
111}
112