1; Test 64-bit comparisons in which the second operand is sign-extended
2; from a PC-relative i32.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5
6@g = global i32 1
7@h = global i32 1, align 2, section "foo"
8
9; Check signed comparison.
10define i64 @f1(i64 %src1) {
11; CHECK-LABEL: f1:
12; CHECK: cgfrl %r2, g
13; CHECK-NEXT: blr %r14
14; CHECK: br %r14
15entry:
16  %val = load i32, i32 *@g
17  %src2 = sext i32 %val to i64
18  %cond = icmp slt i64 %src1, %src2
19  br i1 %cond, label %exit, label %mulb
20mulb:
21  %mul = mul i64 %src1, %src1
22  br label %exit
23exit:
24  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
25  ret i64 %res
26}
27
28; Check unsigned comparison, which cannot use CHRL.
29define i64 @f2(i64 %src1) {
30; CHECK-LABEL: f2:
31; CHECK-NOT: cgfrl
32; CHECK: br %r14
33entry:
34  %val = load i32, i32 *@g
35  %src2 = sext i32 %val to i64
36  %cond = icmp ult i64 %src1, %src2
37  br i1 %cond, label %exit, label %mulb
38mulb:
39  %mul = mul i64 %src1, %src1
40  br label %exit
41exit:
42  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
43  ret i64 %res
44}
45
46; Check equality.
47define i64 @f3(i64 %src1) {
48; CHECK-LABEL: f3:
49; CHECK: cgfrl %r2, g
50; CHECK-NEXT: ber %r14
51; CHECK: br %r14
52entry:
53  %val = load i32, i32 *@g
54  %src2 = sext i32 %val to i64
55  %cond = icmp eq i64 %src1, %src2
56  br i1 %cond, label %exit, label %mulb
57mulb:
58  %mul = mul i64 %src1, %src1
59  br label %exit
60exit:
61  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
62  ret i64 %res
63}
64
65; Check inequality.
66define i64 @f4(i64 %src1) {
67; CHECK-LABEL: f4:
68; CHECK: cgfrl %r2, g
69; CHECK-NEXT: blhr %r14
70; CHECK: br %r14
71entry:
72  %val = load i32, i32 *@g
73  %src2 = sext i32 %val to i64
74  %cond = icmp ne i64 %src1, %src2
75  br i1 %cond, label %exit, label %mulb
76mulb:
77  %mul = mul i64 %src1, %src1
78  br label %exit
79exit:
80  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
81  ret i64 %res
82}
83
84; Repeat f1 with an unaligned address.
85define i64 @f5(i64 %src1) {
86; CHECK-LABEL: f5:
87; CHECK: larl [[REG:%r[0-5]]], h
88; CHECK: cgf %r2, 0([[REG]])
89; CHECK-NEXT: blr %r14
90; CHECK: br %r14
91entry:
92  %val = load i32, i32 *@h, align 2
93  %src2 = sext i32 %val to i64
94  %cond = icmp slt i64 %src1, %src2
95  br i1 %cond, label %exit, label %mulb
96mulb:
97  %mul = mul i64 %src1, %src1
98  br label %exit
99exit:
100  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
101  ret i64 %res
102}
103
104; Check the comparison can be reversed if that allows CGFRL to be used.
105define i64 @f6(i64 %src2) {
106; CHECK-LABEL: f6:
107; CHECK: cgfrl %r2, g
108; CHECK-NEXT: bhr %r14
109; CHECK: br %r14
110entry:
111  %val = load i32, i32 *@g
112  %src1 = sext i32 %val to i64
113  %cond = icmp slt i64 %src1, %src2
114  br i1 %cond, label %exit, label %mulb
115mulb:
116  %mul = mul i64 %src2, %src2
117  br label %exit
118exit:
119  %res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
120  ret i64 %res
121}
122