1// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
2// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
3
4//===----------------------------------------------------------------------===//
5// Generic checks
6//===----------------------------------------------------------------------===//
7
8v_mul_i32_i24 v1, v2, 100
9// CHECK: error: invalid literal operand
10
11//===----------------------------------------------------------------------===//
12// _e32 checks
13//===----------------------------------------------------------------------===//
14
15// Immediate src1
16v_mul_i32_i24_e32 v1, v2, 100
17// CHECK: error: invalid operand for instruction
18
19// sgpr src1
20v_mul_i32_i24_e32 v1, v2, s3
21// CHECK: error: invalid operand for instruction
22
23v_cndmask_b32_e32 v1, v2, v3, s[0:1]
24// CHECK: error: invalid operand for instruction
25
26//===----------------------------------------------------------------------===//
27// _e64 checks
28//===----------------------------------------------------------------------===//
29
30// Immediate src0
31v_mul_i32_i24_e64 v1, 100, v3
32// CHECK: error: invalid literal operand
33
34// Immediate src1
35v_mul_i32_i24_e64 v1, v2, 100
36// CHECK: error: invalid literal operand
37
38v_add_i32_e32 v1, s[0:1], v2, v3
39// CHECK: error: invalid operand for instruction
40
41v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]
42// CHECK: error: invalid operand for instruction
43
44v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]
45// CHECK: error: invalid operand for instruction
46
47v_addc_u32_e32 v1, vcc, v2, v3, -1
48// CHECK: error: invalid operand for instruction
49
50v_addc_u32_e32 v1, vcc, v2, v3, 123
51// CHECK: error: invalid operand for instruction
52
53v_addc_u32_e32 v1, vcc, v2, v3, s0
54// CHECK: error: invalid operand for instruction
55
56v_addc_u32_e32 v1, -1, v2, v3, s0
57// CHECK: error: invalid operand for instruction
58
59v_addc_u32_e64 v1, s[0:1], v2, v3, 123
60// CHECK: error: invalid operand for instruction
61
62v_addc_u32 v1, s[0:1], v2, v3, 123
63// CHECK: error: invalid operand for instruction
64
65// TODO: Constant bus restrictions
66