1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Assembly Writer Source Fragment *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9/// printInstruction - This method is automatically generated by tablegen 10/// from the instruction set description. 11void AArch64InstPrinter::printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) { 12 static const char AsmStrs[] = { 13 /* 0 */ 's', 'h', 'a', '1', 's', 'u', '0', 9, 0, 14 /* 9 */ 's', 'h', 'a', '5', '1', '2', 's', 'u', '0', 9, 0, 15 /* 20 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '0', 9, 0, 16 /* 31 */ 'l', 'd', '1', 9, 0, 17 /* 36 */ 't', 'r', 'n', '1', 9, 0, 18 /* 42 */ 'z', 'i', 'p', '1', 9, 0, 19 /* 48 */ 'u', 'z', 'p', '1', 9, 0, 20 /* 54 */ 'd', 'c', 'p', 's', '1', 9, 0, 21 /* 61 */ 's', 'm', '3', 's', 's', '1', 9, 0, 22 /* 69 */ 's', 't', '1', 9, 0, 23 /* 74 */ 's', 'h', 'a', '1', 's', 'u', '1', 9, 0, 24 /* 83 */ 's', 'h', 'a', '5', '1', '2', 's', 'u', '1', 9, 0, 25 /* 94 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '1', 9, 0, 26 /* 105 */ 's', 'm', '3', 'p', 'a', 'r', 't', 'w', '1', 9, 0, 27 /* 116 */ 'r', 'a', 'x', '1', 9, 0, 28 /* 122 */ 'r', 'e', 'v', '3', '2', 9, 0, 29 /* 129 */ 'l', 'd', '2', 9, 0, 30 /* 134 */ 's', 'h', 'a', '5', '1', '2', 'h', '2', 9, 0, 31 /* 144 */ 's', 'h', 'a', '2', '5', '6', 'h', '2', 9, 0, 32 /* 154 */ 's', 'a', 'b', 'a', 'l', '2', 9, 0, 33 /* 162 */ 'u', 'a', 'b', 'a', 'l', '2', 9, 0, 34 /* 170 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', '2', 9, 0, 35 /* 180 */ 'f', 'm', 'l', 'a', 'l', '2', 9, 0, 36 /* 188 */ 's', 'm', 'l', 'a', 'l', '2', 9, 0, 37 /* 196 */ 'u', 'm', 'l', 'a', 'l', '2', 9, 0, 38 /* 204 */ 's', 's', 'u', 'b', 'l', '2', 9, 0, 39 /* 212 */ 'u', 's', 'u', 'b', 'l', '2', 9, 0, 40 /* 220 */ 's', 'a', 'b', 'd', 'l', '2', 9, 0, 41 /* 228 */ 'u', 'a', 'b', 'd', 'l', '2', 9, 0, 42 /* 236 */ 's', 'a', 'd', 'd', 'l', '2', 9, 0, 43 /* 244 */ 'u', 'a', 'd', 'd', 'l', '2', 9, 0, 44 /* 252 */ 's', 's', 'h', 'l', 'l', '2', 9, 0, 45 /* 260 */ 'u', 's', 'h', 'l', 'l', '2', 9, 0, 46 /* 268 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', '2', 9, 0, 47 /* 278 */ 'p', 'm', 'u', 'l', 'l', '2', 9, 0, 48 /* 286 */ 's', 'm', 'u', 'l', 'l', '2', 9, 0, 49 /* 294 */ 'u', 'm', 'u', 'l', 'l', '2', 9, 0, 50 /* 302 */ 's', 'q', 'd', 'm', 'l', 's', 'l', '2', 9, 0, 51 /* 312 */ 'f', 'm', 'l', 's', 'l', '2', 9, 0, 52 /* 320 */ 's', 'm', 'l', 's', 'l', '2', 9, 0, 53 /* 328 */ 'u', 'm', 'l', 's', 'l', '2', 9, 0, 54 /* 336 */ 'f', 'c', 'v', 't', 'l', '2', 9, 0, 55 /* 344 */ 'r', 's', 'u', 'b', 'h', 'n', '2', 9, 0, 56 /* 353 */ 'r', 'a', 'd', 'd', 'h', 'n', '2', 9, 0, 57 /* 362 */ 's', 'q', 's', 'h', 'r', 'n', '2', 9, 0, 58 /* 371 */ 'u', 'q', 's', 'h', 'r', 'n', '2', 9, 0, 59 /* 380 */ 's', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, 60 /* 390 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, 61 /* 400 */ 't', 'r', 'n', '2', 9, 0, 62 /* 406 */ 'f', 'c', 'v', 't', 'n', '2', 9, 0, 63 /* 414 */ 's', 'q', 'x', 't', 'n', '2', 9, 0, 64 /* 422 */ 'u', 'q', 'x', 't', 'n', '2', 9, 0, 65 /* 430 */ 's', 'q', 's', 'h', 'r', 'u', 'n', '2', 9, 0, 66 /* 440 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', '2', 9, 0, 67 /* 451 */ 's', 'q', 'x', 't', 'u', 'n', '2', 9, 0, 68 /* 460 */ 'f', 'c', 'v', 't', 'x', 'n', '2', 9, 0, 69 /* 469 */ 'z', 'i', 'p', '2', 9, 0, 70 /* 475 */ 'u', 'z', 'p', '2', 9, 0, 71 /* 481 */ 'd', 'c', 'p', 's', '2', 9, 0, 72 /* 488 */ 's', 't', '2', 9, 0, 73 /* 493 */ 's', 's', 'u', 'b', 'w', '2', 9, 0, 74 /* 501 */ 'u', 's', 'u', 'b', 'w', '2', 9, 0, 75 /* 509 */ 's', 'a', 'd', 'd', 'w', '2', 9, 0, 76 /* 517 */ 'u', 'a', 'd', 'd', 'w', '2', 9, 0, 77 /* 525 */ 's', 'm', '3', 'p', 'a', 'r', 't', 'w', '2', 9, 0, 78 /* 536 */ 'l', 'd', '3', 9, 0, 79 /* 541 */ 'e', 'o', 'r', '3', 9, 0, 80 /* 547 */ 'd', 'c', 'p', 's', '3', 9, 0, 81 /* 554 */ 's', 't', '3', 9, 0, 82 /* 559 */ 'r', 'e', 'v', '6', '4', 9, 0, 83 /* 566 */ 'l', 'd', '4', 9, 0, 84 /* 571 */ 's', 't', '4', 9, 0, 85 /* 576 */ 's', 'e', 't', 'f', '1', '6', 9, 0, 86 /* 584 */ 'r', 'e', 'v', '1', '6', 9, 0, 87 /* 591 */ 's', 'e', 't', 'f', '8', 9, 0, 88 /* 598 */ 's', 'm', '3', 't', 't', '1', 'a', 9, 0, 89 /* 607 */ 's', 'm', '3', 't', 't', '2', 'a', 9, 0, 90 /* 616 */ 'b', 'r', 'a', 'a', 9, 0, 91 /* 622 */ 'l', 'd', 'r', 'a', 'a', 9, 0, 92 /* 629 */ 'b', 'l', 'r', 'a', 'a', 9, 0, 93 /* 636 */ 's', 'a', 'b', 'a', 9, 0, 94 /* 642 */ 'u', 'a', 'b', 'a', 9, 0, 95 /* 648 */ 'p', 'a', 'c', 'd', 'a', 9, 0, 96 /* 655 */ 'l', 'd', 'a', 'd', 'd', 'a', 9, 0, 97 /* 663 */ 'f', 'a', 'd', 'd', 'a', 9, 0, 98 /* 670 */ 'a', 'u', 't', 'd', 'a', 9, 0, 99 /* 677 */ 'p', 'a', 'c', 'g', 'a', 9, 0, 100 /* 684 */ 'p', 'a', 'c', 'i', 'a', 9, 0, 101 /* 691 */ 'a', 'u', 't', 'i', 'a', 9, 0, 102 /* 698 */ 'b', 'r', 'k', 'a', 9, 0, 103 /* 704 */ 'f', 'c', 'm', 'l', 'a', 9, 0, 104 /* 711 */ 'f', 'm', 'l', 'a', 9, 0, 105 /* 717 */ 'f', 'n', 'm', 'l', 'a', 9, 0, 106 /* 724 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 9, 0, 107 /* 733 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 9, 0, 108 /* 742 */ 'b', 'r', 'k', 'p', 'a', 9, 0, 109 /* 749 */ 'c', 'a', 's', 'p', 'a', 9, 0, 110 /* 756 */ 's', 'w', 'p', 'a', 9, 0, 111 /* 762 */ 'f', 'e', 'x', 'p', 'a', 9, 0, 112 /* 769 */ 'l', 'd', 'c', 'l', 'r', 'a', 9, 0, 113 /* 777 */ 'l', 'd', 'e', 'o', 'r', 'a', 9, 0, 114 /* 785 */ 's', 'r', 's', 'r', 'a', 9, 0, 115 /* 792 */ 'u', 'r', 's', 'r', 'a', 9, 0, 116 /* 799 */ 's', 's', 'r', 'a', 9, 0, 117 /* 805 */ 'u', 's', 'r', 'a', 9, 0, 118 /* 811 */ 'c', 'a', 's', 'a', 9, 0, 119 /* 817 */ 'l', 'd', 's', 'e', 't', 'a', 9, 0, 120 /* 825 */ 'f', 'r', 'i', 'n', 't', 'a', 9, 0, 121 /* 833 */ 'c', 'l', 'a', 's', 't', 'a', 9, 0, 122 /* 841 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 9, 0, 123 /* 850 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 9, 0, 124 /* 859 */ 'p', 'a', 'c', 'd', 'z', 'a', 9, 0, 125 /* 867 */ 'a', 'u', 't', 'd', 'z', 'a', 9, 0, 126 /* 875 */ 'p', 'a', 'c', 'i', 'z', 'a', 9, 0, 127 /* 883 */ 'a', 'u', 't', 'i', 'z', 'a', 9, 0, 128 /* 891 */ 'l', 'd', '1', 'b', 9, 0, 129 /* 897 */ 'l', 'd', 'f', 'f', '1', 'b', 9, 0, 130 /* 905 */ 'l', 'd', 'n', 'f', '1', 'b', 9, 0, 131 /* 913 */ 'l', 'd', 'n', 't', '1', 'b', 9, 0, 132 /* 921 */ 's', 't', 'n', 't', '1', 'b', 9, 0, 133 /* 929 */ 's', 't', '1', 'b', 9, 0, 134 /* 935 */ 's', 'm', '3', 't', 't', '1', 'b', 9, 0, 135 /* 944 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0, 136 /* 952 */ 'l', 'd', '2', 'b', 9, 0, 137 /* 958 */ 's', 't', '2', 'b', 9, 0, 138 /* 964 */ 's', 'm', '3', 't', 't', '2', 'b', 9, 0, 139 /* 973 */ 'l', 'd', '3', 'b', 9, 0, 140 /* 979 */ 's', 't', '3', 'b', 9, 0, 141 /* 985 */ 'l', 'd', '4', 'b', 9, 0, 142 /* 991 */ 's', 't', '4', 'b', 9, 0, 143 /* 997 */ 'l', 'd', 'a', 'd', 'd', 'a', 'b', 9, 0, 144 /* 1006 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'b', 9, 0, 145 /* 1016 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'b', 9, 0, 146 /* 1026 */ 's', 'w', 'p', 'a', 'b', 9, 0, 147 /* 1033 */ 'b', 'r', 'a', 'b', 9, 0, 148 /* 1039 */ 'l', 'd', 'r', 'a', 'b', 9, 0, 149 /* 1046 */ 'b', 'l', 'r', 'a', 'b', 9, 0, 150 /* 1053 */ 'l', 'd', 'c', 'l', 'r', 'a', 'b', 9, 0, 151 /* 1062 */ 'l', 'd', 'e', 'o', 'r', 'a', 'b', 9, 0, 152 /* 1071 */ 'c', 'a', 's', 'a', 'b', 9, 0, 153 /* 1078 */ 'l', 'd', 's', 'e', 't', 'a', 'b', 9, 0, 154 /* 1087 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'b', 9, 0, 155 /* 1097 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'b', 9, 0, 156 /* 1107 */ 'c', 'r', 'c', '3', '2', 'c', 'b', 9, 0, 157 /* 1116 */ 's', 'q', 'd', 'e', 'c', 'b', 9, 0, 158 /* 1124 */ 'u', 'q', 'd', 'e', 'c', 'b', 9, 0, 159 /* 1132 */ 's', 'q', 'i', 'n', 'c', 'b', 9, 0, 160 /* 1140 */ 'u', 'q', 'i', 'n', 'c', 'b', 9, 0, 161 /* 1148 */ 'p', 'a', 'c', 'd', 'b', 9, 0, 162 /* 1155 */ 'l', 'd', 'a', 'd', 'd', 'b', 9, 0, 163 /* 1163 */ 'a', 'u', 't', 'd', 'b', 9, 0, 164 /* 1170 */ 'p', 'r', 'f', 'b', 9, 0, 165 /* 1176 */ 'f', 'l', 'o', 'g', 'b', 9, 0, 166 /* 1183 */ 'p', 'a', 'c', 'i', 'b', 9, 0, 167 /* 1190 */ 'a', 'u', 't', 'i', 'b', 9, 0, 168 /* 1197 */ 'b', 'r', 'k', 'b', 9, 0, 169 /* 1203 */ 's', 'a', 'b', 'a', 'l', 'b', 9, 0, 170 /* 1211 */ 'u', 'a', 'b', 'a', 'l', 'b', 9, 0, 171 /* 1219 */ 'l', 'd', 'a', 'd', 'd', 'a', 'l', 'b', 9, 0, 172 /* 1229 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 'b', 9, 0, 173 /* 1239 */ 'f', 'm', 'l', 'a', 'l', 'b', 9, 0, 174 /* 1247 */ 's', 'm', 'l', 'a', 'l', 'b', 9, 0, 175 /* 1255 */ 'u', 'm', 'l', 'a', 'l', 'b', 9, 0, 176 /* 1263 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'l', 'b', 9, 0, 177 /* 1274 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'l', 'b', 9, 0, 178 /* 1285 */ 's', 'w', 'p', 'a', 'l', 'b', 9, 0, 179 /* 1293 */ 'l', 'd', 'c', 'l', 'r', 'a', 'l', 'b', 9, 0, 180 /* 1303 */ 'l', 'd', 'e', 'o', 'r', 'a', 'l', 'b', 9, 0, 181 /* 1313 */ 'c', 'a', 's', 'a', 'l', 'b', 9, 0, 182 /* 1321 */ 'l', 'd', 's', 'e', 't', 'a', 'l', 'b', 9, 0, 183 /* 1331 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'l', 'b', 9, 0, 184 /* 1342 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'l', 'b', 9, 0, 185 /* 1353 */ 's', 's', 'u', 'b', 'l', 'b', 9, 0, 186 /* 1361 */ 'u', 's', 'u', 'b', 'l', 'b', 9, 0, 187 /* 1369 */ 's', 'b', 'c', 'l', 'b', 9, 0, 188 /* 1376 */ 'a', 'd', 'c', 'l', 'b', 9, 0, 189 /* 1383 */ 's', 'a', 'b', 'd', 'l', 'b', 9, 0, 190 /* 1391 */ 'u', 'a', 'b', 'd', 'l', 'b', 9, 0, 191 /* 1399 */ 'l', 'd', 'a', 'd', 'd', 'l', 'b', 9, 0, 192 /* 1408 */ 's', 'a', 'd', 'd', 'l', 'b', 9, 0, 193 /* 1416 */ 'u', 'a', 'd', 'd', 'l', 'b', 9, 0, 194 /* 1424 */ 's', 's', 'h', 'l', 'l', 'b', 9, 0, 195 /* 1432 */ 'u', 's', 'h', 'l', 'l', 'b', 9, 0, 196 /* 1440 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 'b', 9, 0, 197 /* 1450 */ 'p', 'm', 'u', 'l', 'l', 'b', 9, 0, 198 /* 1458 */ 's', 'm', 'u', 'l', 'l', 'b', 9, 0, 199 /* 1466 */ 'u', 'm', 'u', 'l', 'l', 'b', 9, 0, 200 /* 1474 */ 'l', 'd', 's', 'm', 'i', 'n', 'l', 'b', 9, 0, 201 /* 1484 */ 'l', 'd', 'u', 'm', 'i', 'n', 'l', 'b', 9, 0, 202 /* 1494 */ 's', 'w', 'p', 'l', 'b', 9, 0, 203 /* 1501 */ 'l', 'd', 'c', 'l', 'r', 'l', 'b', 9, 0, 204 /* 1510 */ 'l', 'd', 'e', 'o', 'r', 'l', 'b', 9, 0, 205 /* 1519 */ 'c', 'a', 's', 'l', 'b', 9, 0, 206 /* 1526 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 'b', 9, 0, 207 /* 1536 */ 'f', 'm', 'l', 's', 'l', 'b', 9, 0, 208 /* 1544 */ 's', 'm', 'l', 's', 'l', 'b', 9, 0, 209 /* 1552 */ 'u', 'm', 'l', 's', 'l', 'b', 9, 0, 210 /* 1560 */ 'l', 'd', 's', 'e', 't', 'l', 'b', 9, 0, 211 /* 1569 */ 'l', 'd', 's', 'm', 'a', 'x', 'l', 'b', 9, 0, 212 /* 1579 */ 'l', 'd', 'u', 'm', 'a', 'x', 'l', 'b', 9, 0, 213 /* 1589 */ 'd', 'm', 'b', 9, 0, 214 /* 1594 */ 'r', 's', 'u', 'b', 'h', 'n', 'b', 9, 0, 215 /* 1603 */ 'r', 'a', 'd', 'd', 'h', 'n', 'b', 9, 0, 216 /* 1612 */ 'l', 'd', 's', 'm', 'i', 'n', 'b', 9, 0, 217 /* 1621 */ 'l', 'd', 'u', 'm', 'i', 'n', 'b', 9, 0, 218 /* 1630 */ 's', 'q', 's', 'h', 'r', 'n', 'b', 9, 0, 219 /* 1639 */ 'u', 'q', 's', 'h', 'r', 'n', 'b', 9, 0, 220 /* 1648 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 'b', 9, 0, 221 /* 1658 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 'b', 9, 0, 222 /* 1668 */ 's', 'q', 'x', 't', 'n', 'b', 9, 0, 223 /* 1676 */ 'u', 'q', 'x', 't', 'n', 'b', 9, 0, 224 /* 1684 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 'b', 9, 0, 225 /* 1694 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 'b', 9, 0, 226 /* 1705 */ 's', 'q', 'x', 't', 'u', 'n', 'b', 9, 0, 227 /* 1714 */ 'b', 'r', 'k', 'p', 'b', 9, 0, 228 /* 1721 */ 's', 'w', 'p', 'b', 9, 0, 229 /* 1727 */ 'l', 'd', '1', 'r', 'q', 'b', 9, 0, 230 /* 1735 */ 'l', 'd', '1', 'r', 'b', 9, 0, 231 /* 1742 */ 'l', 'd', 'a', 'r', 'b', 9, 0, 232 /* 1749 */ 'l', 'd', 'l', 'a', 'r', 'b', 9, 0, 233 /* 1757 */ 'l', 'd', 'r', 'b', 9, 0, 234 /* 1763 */ 'l', 'd', 'c', 'l', 'r', 'b', 9, 0, 235 /* 1771 */ 's', 't', 'l', 'l', 'r', 'b', 9, 0, 236 /* 1779 */ 's', 't', 'l', 'r', 'b', 9, 0, 237 /* 1786 */ 'l', 'd', 'e', 'o', 'r', 'b', 9, 0, 238 /* 1794 */ 'l', 'd', 'a', 'p', 'r', 'b', 9, 0, 239 /* 1802 */ 'l', 'd', 't', 'r', 'b', 9, 0, 240 /* 1809 */ 's', 't', 'r', 'b', 9, 0, 241 /* 1815 */ 's', 't', 't', 'r', 'b', 9, 0, 242 /* 1822 */ 'l', 'd', 'u', 'r', 'b', 9, 0, 243 /* 1829 */ 's', 't', 'l', 'u', 'r', 'b', 9, 0, 244 /* 1837 */ 'l', 'd', 'a', 'p', 'u', 'r', 'b', 9, 0, 245 /* 1846 */ 's', 't', 'u', 'r', 'b', 9, 0, 246 /* 1853 */ 'l', 'd', 'a', 'x', 'r', 'b', 9, 0, 247 /* 1861 */ 'l', 'd', 'x', 'r', 'b', 9, 0, 248 /* 1868 */ 's', 't', 'l', 'x', 'r', 'b', 9, 0, 249 /* 1876 */ 's', 't', 'x', 'r', 'b', 9, 0, 250 /* 1883 */ 'l', 'd', '1', 's', 'b', 9, 0, 251 /* 1890 */ 'l', 'd', 'f', 'f', '1', 's', 'b', 9, 0, 252 /* 1899 */ 'l', 'd', 'n', 'f', '1', 's', 'b', 9, 0, 253 /* 1908 */ 'l', 'd', 'n', 't', '1', 's', 'b', 9, 0, 254 /* 1917 */ 'c', 'a', 's', 'b', 9, 0, 255 /* 1923 */ 'd', 's', 'b', 9, 0, 256 /* 1928 */ 'i', 's', 'b', 9, 0, 257 /* 1933 */ 'f', 'm', 's', 'b', 9, 0, 258 /* 1939 */ 'f', 'n', 'm', 's', 'b', 9, 0, 259 /* 1946 */ 'l', 'd', '1', 'r', 's', 'b', 9, 0, 260 /* 1954 */ 'l', 'd', 'r', 's', 'b', 9, 0, 261 /* 1961 */ 'l', 'd', 't', 'r', 's', 'b', 9, 0, 262 /* 1969 */ 'l', 'd', 'u', 'r', 's', 'b', 9, 0, 263 /* 1977 */ 'l', 'd', 'a', 'p', 'u', 'r', 's', 'b', 9, 0, 264 /* 1987 */ 't', 's', 'b', 9, 0, 265 /* 1992 */ 'l', 'd', 's', 'e', 't', 'b', 9, 0, 266 /* 2000 */ 's', 's', 'u', 'b', 'l', 't', 'b', 9, 0, 267 /* 2009 */ 'c', 'n', 't', 'b', 9, 0, 268 /* 2015 */ 'e', 'o', 'r', 't', 'b', 9, 0, 269 /* 2022 */ 'c', 'l', 'a', 's', 't', 'b', 9, 0, 270 /* 2030 */ 's', 'x', 't', 'b', 9, 0, 271 /* 2036 */ 'u', 'x', 't', 'b', 9, 0, 272 /* 2042 */ 'f', 's', 'u', 'b', 9, 0, 273 /* 2048 */ 's', 'h', 's', 'u', 'b', 9, 0, 274 /* 2055 */ 'u', 'h', 's', 'u', 'b', 9, 0, 275 /* 2062 */ 'f', 'm', 's', 'u', 'b', 9, 0, 276 /* 2069 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0, 277 /* 2077 */ 's', 'q', 's', 'u', 'b', 9, 0, 278 /* 2084 */ 'u', 'q', 's', 'u', 'b', 9, 0, 279 /* 2091 */ 'r', 'e', 'v', 'b', 9, 0, 280 /* 2097 */ 's', 's', 'u', 'b', 'w', 'b', 9, 0, 281 /* 2105 */ 'u', 's', 'u', 'b', 'w', 'b', 9, 0, 282 /* 2113 */ 's', 'a', 'd', 'd', 'w', 'b', 9, 0, 283 /* 2121 */ 'u', 'a', 'd', 'd', 'w', 'b', 9, 0, 284 /* 2129 */ 'l', 'd', 's', 'm', 'a', 'x', 'b', 9, 0, 285 /* 2138 */ 'l', 'd', 'u', 'm', 'a', 'x', 'b', 9, 0, 286 /* 2147 */ 'p', 'a', 'c', 'd', 'z', 'b', 9, 0, 287 /* 2155 */ 'a', 'u', 't', 'd', 'z', 'b', 9, 0, 288 /* 2163 */ 'p', 'a', 'c', 'i', 'z', 'b', 9, 0, 289 /* 2171 */ 'a', 'u', 't', 'i', 'z', 'b', 9, 0, 290 /* 2179 */ 's', 'h', 'a', '1', 'c', 9, 0, 291 /* 2186 */ 's', 'b', 'c', 9, 0, 292 /* 2191 */ 'a', 'd', 'c', 9, 0, 293 /* 2196 */ 'b', 'i', 'c', 9, 0, 294 /* 2201 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0, 295 /* 2209 */ 'a', 'e', 's', 'm', 'c', 9, 0, 296 /* 2216 */ 'c', 's', 'i', 'n', 'c', 9, 0, 297 /* 2223 */ 'h', 'v', 'c', 9, 0, 298 /* 2228 */ 's', 'v', 'c', 9, 0, 299 /* 2233 */ 'l', 'd', '1', 'd', 9, 0, 300 /* 2239 */ 'l', 'd', 'f', 'f', '1', 'd', 9, 0, 301 /* 2247 */ 'l', 'd', 'n', 'f', '1', 'd', 9, 0, 302 /* 2255 */ 'l', 'd', 'n', 't', '1', 'd', 9, 0, 303 /* 2263 */ 's', 't', 'n', 't', '1', 'd', 9, 0, 304 /* 2271 */ 's', 't', '1', 'd', 9, 0, 305 /* 2277 */ 'l', 'd', '2', 'd', 9, 0, 306 /* 2283 */ 's', 't', '2', 'd', 9, 0, 307 /* 2289 */ 'l', 'd', '3', 'd', 9, 0, 308 /* 2295 */ 's', 't', '3', 'd', 9, 0, 309 /* 2301 */ 'l', 'd', '4', 'd', 9, 0, 310 /* 2307 */ 's', 't', '4', 'd', 9, 0, 311 /* 2313 */ 'f', 'm', 'a', 'd', 9, 0, 312 /* 2319 */ 'f', 'n', 'm', 'a', 'd', 9, 0, 313 /* 2326 */ 'f', 't', 'm', 'a', 'd', 9, 0, 314 /* 2333 */ 'f', 'a', 'b', 'd', 9, 0, 315 /* 2339 */ 's', 'a', 'b', 'd', 9, 0, 316 /* 2345 */ 'u', 'a', 'b', 'd', 9, 0, 317 /* 2351 */ 'x', 'p', 'a', 'c', 'd', 9, 0, 318 /* 2358 */ 's', 'q', 'd', 'e', 'c', 'd', 9, 0, 319 /* 2366 */ 'u', 'q', 'd', 'e', 'c', 'd', 9, 0, 320 /* 2374 */ 's', 'q', 'i', 'n', 'c', 'd', 9, 0, 321 /* 2382 */ 'u', 'q', 'i', 'n', 'c', 'd', 9, 0, 322 /* 2390 */ 'f', 'c', 'a', 'd', 'd', 9, 0, 323 /* 2397 */ 's', 'q', 'c', 'a', 'd', 'd', 9, 0, 324 /* 2405 */ 'l', 'd', 'a', 'd', 'd', 9, 0, 325 /* 2412 */ 'f', 'a', 'd', 'd', 9, 0, 326 /* 2418 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0, 327 /* 2426 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0, 328 /* 2434 */ 's', 'h', 'a', 'd', 'd', 9, 0, 329 /* 2441 */ 'u', 'h', 'a', 'd', 'd', 9, 0, 330 /* 2448 */ 'f', 'm', 'a', 'd', 'd', 9, 0, 331 /* 2455 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0, 332 /* 2463 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0, 333 /* 2471 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0, 334 /* 2479 */ 'p', 'r', 'f', 'd', 9, 0, 335 /* 2485 */ 'n', 'a', 'n', 'd', 9, 0, 336 /* 2491 */ 'l', 'd', '1', 'r', 'q', 'd', 9, 0, 337 /* 2499 */ 'l', 'd', '1', 'r', 'd', 9, 0, 338 /* 2506 */ 'a', 's', 'r', 'd', 9, 0, 339 /* 2512 */ 'a', 'e', 's', 'd', 9, 0, 340 /* 2518 */ 'c', 'n', 't', 'd', 9, 0, 341 /* 2524 */ 's', 'm', '4', 'e', 9, 0, 342 /* 2530 */ 's', 'p', 'l', 'i', 'c', 'e', 9, 0, 343 /* 2538 */ 'f', 'a', 'c', 'g', 'e', 9, 0, 344 /* 2545 */ 'w', 'h', 'i', 'l', 'e', 'g', 'e', 9, 0, 345 /* 2554 */ 'f', 'c', 'm', 'g', 'e', 9, 0, 346 /* 2561 */ 'c', 'm', 'p', 'g', 'e', 9, 0, 347 /* 2568 */ 'f', 's', 'c', 'a', 'l', 'e', 9, 0, 348 /* 2576 */ 'w', 'h', 'i', 'l', 'e', 'l', 'e', 9, 0, 349 /* 2585 */ 'f', 'c', 'm', 'l', 'e', 9, 0, 350 /* 2592 */ 'c', 'm', 'p', 'l', 'e', 9, 0, 351 /* 2599 */ 'f', 'c', 'm', 'n', 'e', 9, 0, 352 /* 2606 */ 'c', 't', 'e', 'r', 'm', 'n', 'e', 9, 0, 353 /* 2615 */ 'c', 'm', 'p', 'n', 'e', 9, 0, 354 /* 2622 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0, 355 /* 2630 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0, 356 /* 2638 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0, 357 /* 2646 */ 'f', 'c', 'm', 'p', 'e', 9, 0, 358 /* 2653 */ 'a', 'e', 's', 'e', 9, 0, 359 /* 2659 */ 'p', 'f', 'a', 'l', 's', 'e', 9, 0, 360 /* 2667 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0, 361 /* 2676 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0, 362 /* 2685 */ 'p', 't', 'r', 'u', 'e', 9, 0, 363 /* 2692 */ 'u', 'd', 'f', 9, 0, 364 /* 2697 */ 'b', 'i', 'f', 9, 0, 365 /* 2702 */ 'r', 'm', 'i', 'f', 9, 0, 366 /* 2708 */ 's', 'c', 'v', 't', 'f', 9, 0, 367 /* 2715 */ 'u', 'c', 'v', 't', 'f', 9, 0, 368 /* 2722 */ 's', 't', '2', 'g', 9, 0, 369 /* 2728 */ 's', 't', 'z', '2', 'g', 9, 0, 370 /* 2735 */ 's', 'u', 'b', 'g', 9, 0, 371 /* 2741 */ 'a', 'd', 'd', 'g', 9, 0, 372 /* 2747 */ 'l', 'd', 'g', 9, 0, 373 /* 2752 */ 'f', 'n', 'e', 'g', 9, 0, 374 /* 2758 */ 's', 'q', 'n', 'e', 'g', 9, 0, 375 /* 2765 */ 'c', 's', 'n', 'e', 'g', 9, 0, 376 /* 2772 */ 'h', 'i', 's', 't', 's', 'e', 'g', 9, 0, 377 /* 2781 */ 'i', 'r', 'g', 9, 0, 378 /* 2786 */ 's', 't', 'g', 9, 0, 379 /* 2791 */ 's', 't', 'z', 'g', 9, 0, 380 /* 2797 */ 's', 'h', 'a', '1', 'h', 9, 0, 381 /* 2804 */ 'l', 'd', '1', 'h', 9, 0, 382 /* 2810 */ 'l', 'd', 'f', 'f', '1', 'h', 9, 0, 383 /* 2818 */ 'l', 'd', 'n', 'f', '1', 'h', 9, 0, 384 /* 2826 */ 'l', 'd', 'n', 't', '1', 'h', 9, 0, 385 /* 2834 */ 's', 't', 'n', 't', '1', 'h', 9, 0, 386 /* 2842 */ 's', 't', '1', 'h', 9, 0, 387 /* 2848 */ 's', 'h', 'a', '5', '1', '2', 'h', 9, 0, 388 /* 2857 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0, 389 /* 2865 */ 'l', 'd', '2', 'h', 9, 0, 390 /* 2871 */ 's', 't', '2', 'h', 9, 0, 391 /* 2877 */ 'l', 'd', '3', 'h', 9, 0, 392 /* 2883 */ 's', 't', '3', 'h', 9, 0, 393 /* 2889 */ 'l', 'd', '4', 'h', 9, 0, 394 /* 2895 */ 's', 't', '4', 'h', 9, 0, 395 /* 2901 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0, 396 /* 2910 */ 'l', 'd', 'a', 'd', 'd', 'a', 'h', 9, 0, 397 /* 2919 */ 's', 'q', 'r', 'd', 'c', 'm', 'l', 'a', 'h', 9, 0, 398 /* 2930 */ 's', 'q', 'r', 'd', 'm', 'l', 'a', 'h', 9, 0, 399 /* 2940 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'h', 9, 0, 400 /* 2950 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'h', 9, 0, 401 /* 2960 */ 's', 'w', 'p', 'a', 'h', 9, 0, 402 /* 2967 */ 'l', 'd', 'c', 'l', 'r', 'a', 'h', 9, 0, 403 /* 2976 */ 'l', 'd', 'e', 'o', 'r', 'a', 'h', 9, 0, 404 /* 2985 */ 'c', 'a', 's', 'a', 'h', 9, 0, 405 /* 2992 */ 'l', 'd', 's', 'e', 't', 'a', 'h', 9, 0, 406 /* 3001 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'h', 9, 0, 407 /* 3011 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'h', 9, 0, 408 /* 3021 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0, 409 /* 3030 */ 's', 'q', 'd', 'e', 'c', 'h', 9, 0, 410 /* 3038 */ 'u', 'q', 'd', 'e', 'c', 'h', 9, 0, 411 /* 3046 */ 's', 'q', 'i', 'n', 'c', 'h', 9, 0, 412 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'h', 9, 0, 449 /* 3375 */ 's', 't', 'l', 'l', 'r', 'h', 9, 0, 450 /* 3383 */ 's', 't', 'l', 'r', 'h', 9, 0, 451 /* 3390 */ 'l', 'd', 'e', 'o', 'r', 'h', 9, 0, 452 /* 3398 */ 'l', 'd', 'a', 'p', 'r', 'h', 9, 0, 453 /* 3406 */ 'l', 'd', 't', 'r', 'h', 9, 0, 454 /* 3413 */ 's', 't', 'r', 'h', 9, 0, 455 /* 3419 */ 's', 't', 't', 'r', 'h', 9, 0, 456 /* 3426 */ 'l', 'd', 'u', 'r', 'h', 9, 0, 457 /* 3433 */ 's', 't', 'l', 'u', 'r', 'h', 9, 0, 458 /* 3441 */ 'l', 'd', 'a', 'p', 'u', 'r', 'h', 9, 0, 459 /* 3450 */ 's', 't', 'u', 'r', 'h', 9, 0, 460 /* 3457 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0, 461 /* 3465 */ 'l', 'd', 'x', 'r', 'h', 9, 0, 462 /* 3472 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0, 463 /* 3480 */ 's', 't', 'x', 'r', 'h', 9, 0, 464 /* 3487 */ 'l', 'd', '1', 's', 'h', 9, 0, 465 /* 3494 */ 'l', 'd', 'f', 'f', '1', 's', 'h', 9, 0, 466 /* 3503 */ 'l', 'd', 'n', 'f', '1', 's', 'h', 9, 0, 467 /* 3512 */ 'l', 'd', 'n', 't', '1', 's', 'h', 9, 0, 468 /* 3521 */ 'c', 'a', 's', 'h', 9, 0, 469 /* 3527 */ 's', 'q', 'r', 'd', 'm', 'l', 's', 'h', 9, 0, 470 /* 3537 */ 'l', 'd', '1', 'r', 's', 'h', 9, 0, 471 /* 3545 */ 'l', 'd', 'r', 's', 'h', 9, 0, 472 /* 3552 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0, 473 /* 3560 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0, 474 /* 3568 */ 'l', 'd', 'a', 'p', 'u', 'r', 's', 'h', 9, 0, 475 /* 3578 */ 'l', 'd', 's', 'e', 't', 'h', 9, 0, 476 /* 3586 */ 'c', 'n', 't', 'h', 9, 0, 477 /* 3592 */ 's', 'x', 't', 'h', 9, 0, 478 /* 3598 */ 'u', 'x', 't', 'h', 9, 0, 479 /* 3604 */ 'r', 'e', 'v', 'h', 9, 0, 480 /* 3610 */ 'l', 'd', 's', 'm', 'a', 'x', 'h', 9, 0, 481 /* 3619 */ 'l', 'd', 'u', 'm', 'a', 'x', 'h', 9, 0, 482 /* 3628 */ 'x', 'p', 'a', 'c', 'i', 9, 0, 483 /* 3635 */ 'w', 'h', 'i', 'l', 'e', 'h', 'i', 9, 0, 484 /* 3644 */ 'p', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0, 485 /* 3653 */ 's', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0, 486 /* 3662 */ 'u', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0, 487 /* 3671 */ 'c', 'm', 'h', 'i', 9, 0, 488 /* 3677 */ 'c', 'm', 'p', 'h', 'i', 9, 0, 489 /* 3684 */ 's', 'l', 'i', 9, 0, 490 /* 3689 */ 'g', 'm', 'i', 9, 0, 491 /* 3694 */ 'm', 'v', 'n', 'i', 9, 0, 492 /* 3700 */ 's', 'r', 'i', 9, 0, 493 /* 3705 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0, 494 /* 3713 */ 'm', 'o', 'v', 'i', 9, 0, 495 /* 3719 */ 'b', 'r', 'k', 9, 0, 496 /* 3724 */ 'm', 'o', 'v', 'k', 9, 0, 497 /* 3730 */ 's', 'a', 'b', 'a', 'l', 9, 0, 498 /* 3737 */ 'u', 'a', 'b', 'a', 'l', 9, 0, 499 /* 3744 */ 'l', 'd', 'a', 'd', 'd', 'a', 'l', 9, 0, 500 /* 3753 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0, 501 /* 3762 */ 'f', 'm', 'l', 'a', 'l', 9, 0, 502 /* 3769 */ 's', 'm', 'l', 'a', 'l', 9, 0, 503 /* 3776 */ 'u', 'm', 'l', 'a', 'l', 9, 0, 504 /* 3783 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'l', 9, 0, 505 /* 3793 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'l', 9, 0, 506 /* 3803 */ 'c', 'a', 's', 'p', 'a', 'l', 9, 0, 507 /* 3811 */ 's', 'w', 'p', 'a', 'l', 9, 0, 508 /* 3818 */ 'l', 'd', 'c', 'l', 'r', 'a', 'l', 9, 0, 509 /* 3827 */ 'l', 'd', 'e', 'o', 'r', 'a', 'l', 9, 0, 510 /* 3836 */ 'c', 'a', 's', 'a', 'l', 9, 0, 511 /* 3843 */ 'l', 'd', 's', 'e', 't', 'a', 'l', 9, 0, 512 /* 3852 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'l', 9, 0, 513 /* 3862 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'l', 9, 0, 514 /* 3872 */ 't', 'b', 'l', 9, 0, 515 /* 3877 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0, 516 /* 3885 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0, 517 /* 3893 */ 's', 's', 'u', 'b', 'l', 9, 0, 518 /* 3900 */ 'u', 's', 'u', 'b', 'l', 9, 0, 519 /* 3907 */ 's', 'a', 'b', 'd', 'l', 9, 0, 520 /* 3914 */ 'u', 'a', 'b', 'd', 'l', 9, 0, 521 /* 3921 */ 'l', 'd', 'a', 'd', 'd', 'l', 9, 0, 522 /* 3929 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0, 523 /* 3937 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0, 524 /* 3945 */ 's', 'a', 'd', 'd', 'l', 9, 0, 525 /* 3952 */ 'u', 'a', 'd', 'd', 'l', 9, 0, 526 /* 3959 */ 't', 'c', 'a', 'n', 'c', 'e', 'l', 9, 0, 527 /* 3968 */ 'f', 'c', 's', 'e', 'l', 9, 0, 528 /* 3975 */ 'f', 't', 's', 's', 'e', 'l', 9, 0, 529 /* 3983 */ 's', 'q', 's', 'h', 'l', 9, 0, 530 /* 3990 */ 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4907 */ 'u', 'h', 's', 'u', 'b', 'r', 9, 0, 660 /* 4915 */ 's', 'q', 's', 'u', 'b', 'r', 9, 0, 661 /* 4923 */ 'u', 'q', 's', 'u', 'b', 'r', 9, 0, 662 /* 4931 */ 'a', 'd', 'r', 9, 0, 663 /* 4936 */ 'l', 'd', 'r', 9, 0, 664 /* 4941 */ 'r', 'd', 'f', 'f', 'r', 9, 0, 665 /* 4948 */ 'w', 'r', 'f', 'f', 'r', 9, 0, 666 /* 4955 */ 's', 'r', 's', 'h', 'r', 9, 0, 667 /* 4962 */ 'u', 'r', 's', 'h', 'r', 9, 0, 668 /* 4969 */ 's', 's', 'h', 'r', 9, 0, 669 /* 4975 */ 'u', 's', 'h', 'r', 9, 0, 670 /* 4981 */ 'b', 'l', 'r', 9, 0, 671 /* 4986 */ 'l', 'd', 'c', 'l', 'r', 9, 0, 672 /* 4993 */ 's', 'q', 's', 'h', 'l', 'r', 9, 0, 673 /* 5001 */ 'u', 'q', 's', 'h', 'l', 'r', 9, 0, 674 /* 5009 */ 's', 'q', 'r', 's', 'h', 'l', 'r', 9, 0, 675 /* 5018 */ 'u', 'q', 'r', 's', 'h', 'l', 'r', 9, 0, 676 /* 5027 */ 's', 'r', 's', 'h', 'l', 'r', 9, 0, 677 /* 5035 */ 'u', 'r', 's', 'h', 'l', 'r', 9, 0, 678 /* 5043 */ 's', 't', 'l', 'l', 'r', 9, 0, 679 /* 5050 */ 'l', 's', 'l', 'r', 9, 0, 680 /* 5056 */ 's', 't', 'l', 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727 /* 5358 */ 'w', 'h', 'i', 'l', 'e', 'l', 's', 9, 0, 728 /* 5367 */ 'f', 'm', 'l', 's', 9, 0, 729 /* 5373 */ 'f', 'n', 'm', 'l', 's', 9, 0, 730 /* 5380 */ 'c', 'm', 'p', 'l', 's', 9, 0, 731 /* 5387 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0, 732 /* 5395 */ 'i', 'n', 's', 9, 0, 733 /* 5400 */ 'b', 'r', 'k', 'n', 's', 9, 0, 734 /* 5407 */ 'o', 'r', 'n', 's', 9, 0, 735 /* 5413 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0, 736 /* 5421 */ 's', 'u', 'b', 'p', 's', 9, 0, 737 /* 5428 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0, 738 /* 5436 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0, 739 /* 5444 */ 'r', 'd', 'f', 'f', 'r', 's', 9, 0, 740 /* 5452 */ 'm', 'r', 's', 9, 0, 741 /* 5457 */ 'e', 'o', 'r', 's', 9, 0, 742 /* 5463 */ 'n', 'o', 'r', 's', 9, 0, 743 /* 5469 */ 'o', 'r', 'r', 's', 9, 0, 744 /* 5475 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0, 745 /* 5484 */ 's', 'y', 's', 9, 0, 746 /* 5489 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0, 747 /* 5497 */ 'f', 'j', 'c', 'v', 't', 'z', 's', 9, 0, 748 /* 5506 */ 's', 'q', 'd', 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768 /* 5668 */ 'u', 's', 'u', 'b', 'l', 't', 9, 0, 769 /* 5676 */ 's', 'b', 'c', 'l', 't', 9, 0, 770 /* 5683 */ 'a', 'd', 'c', 'l', 't', 9, 0, 771 /* 5690 */ 's', 'a', 'b', 'd', 'l', 't', 9, 0, 772 /* 5698 */ 'u', 'a', 'b', 'd', 'l', 't', 9, 0, 773 /* 5706 */ 's', 'a', 'd', 'd', 'l', 't', 9, 0, 774 /* 5714 */ 'u', 'a', 'd', 'd', 'l', 't', 9, 0, 775 /* 5722 */ 'w', 'h', 'i', 'l', 'e', 'l', 't', 9, 0, 776 /* 5731 */ 'h', 'l', 't', 9, 0, 777 /* 5736 */ 's', 's', 'h', 'l', 'l', 't', 9, 0, 778 /* 5744 */ 'u', 's', 'h', 'l', 'l', 't', 9, 0, 779 /* 5752 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 't', 9, 0, 780 /* 5762 */ 'p', 'm', 'u', 'l', 'l', 't', 9, 0, 781 /* 5770 */ 's', 'm', 'u', 'l', 'l', 't', 9, 0, 782 /* 5778 */ 'u', 'm', 'u', 'l', 'l', 't', 9, 0, 783 /* 5786 */ 'f', 'c', 'm', 'l', 't', 9, 0, 784 /* 5793 */ 'c', 'm', 'p', 'l', 't', 9, 0, 785 /* 5800 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 't', 9, 0, 786 /* 5810 */ 'f', 'm', 'l', 's', 'l', 't', 9, 0, 787 /* 5818 */ 's', 'm', 'l', 's', 'l', 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*/ 's', 'd', 'o', 't', 9, 0, 807 /* 5988 */ 'u', 'd', 'o', 't', 9, 0, 808 /* 5994 */ 'c', 'n', 'o', 't', 9, 0, 809 /* 6000 */ 't', 's', 't', 'a', 'r', 't', 9, 0, 810 /* 6008 */ 'f', 's', 'q', 'r', 't', 9, 0, 811 /* 6015 */ 'p', 't', 'e', 's', 't', 9, 0, 812 /* 6022 */ 't', 't', 'e', 's', 't', 9, 0, 813 /* 6029 */ 'p', 'f', 'i', 'r', 's', 't', 9, 0, 814 /* 6037 */ 'c', 'm', 't', 's', 't', 9, 0, 815 /* 6044 */ 'f', 'c', 'v', 't', 9, 0, 816 /* 6050 */ 's', 's', 'u', 'b', 'w', 't', 9, 0, 817 /* 6058 */ 'u', 's', 'u', 'b', 'w', 't', 9, 0, 818 /* 6066 */ 's', 'a', 'd', 'd', 'w', 't', 9, 0, 819 /* 6074 */ 'u', 'a', 'd', 'd', 'w', 't', 9, 0, 820 /* 6082 */ 'b', 'e', 'x', 't', 9, 0, 821 /* 6088 */ 'p', 'n', 'e', 'x', 't', 9, 0, 822 /* 6095 */ 'f', 'c', 'v', 't', 'a', 'u', 9, 0, 823 /* 6103 */ 's', 'q', 's', 'h', 'l', 'u', 9, 0, 824 /* 6111 */ 'f', 'c', 'v', 't', 'm', 'u', 9, 0, 825 /* 6119 */ 'f', 'c', 'v', 't', 'n', 'u', 9, 0, 826 /* 6127 */ 'f', 'c', 'v', 't', 'p', 'u', 9, 0, 827 /* 6135 */ 'f', 'c', 'v', 't', 'z', 'u', 9, 0, 828 /* 6143 */ 'f', 'a', 'd', 'd', 'v', 9, 0, 829 /* 6150 */ 's', 'a', 'd', 'd', 'v', 9, 0, 830 /* 6157 */ 'u', 'a', 'd', 'd', 'v', 9, 0, 831 /* 6164 */ 'a', 'n', 'd', 'v', 9, 0, 832 /* 6170 */ 'r', 'e', 'v', 9, 0, 833 /* 6175 */ 'f', 'd', 'i', 'v', 9, 0, 834 /* 6181 */ 's', 'd', 'i', 'v', 9, 0, 835 /* 6187 */ 'u', 'd', 'i', 'v', 9, 0, 836 /* 6193 */ 's', 'a', 'd', 'd', 'l', 'v', 9, 0, 837 /* 6201 */ 'u', 'a', 'd', 'd', 'l', 'v', 9, 0, 838 /* 6209 */ 'f', 'm', 'i', 'n', 'n', 'm', 'v', 9, 0, 839 /* 6218 */ 'f', 'm', 'a', 'x', 'n', 'm', 'v', 9, 0, 840 /* 6227 */ 'f', 'm', 'i', 'n', 'v', 9, 0, 841 /* 6234 */ 's', 'm', 'i', 'n', 'v', 9, 0, 842 /* 6241 */ 'u', 'm', 'i', 'n', 'v', 9, 0, 843 /* 6248 */ 'c', 's', 'i', 'n', 'v', 9, 0, 844 /* 6255 */ 'f', 'm', 'o', 'v', 9, 0, 845 /* 6261 */ 's', 'm', 'o', 'v', 9, 0, 846 /* 6267 */ 'u', 'm', 'o', 'v', 9, 0, 847 /* 6273 */ 'e', 'o', 'r', 'v', 9, 0, 848 /* 6279 */ 'f', 'm', 'a', 'x', 'v', 9, 0, 849 /* 6286 */ 's', 'm', 'a', 'x', 'v', 9, 0, 850 /* 6293 */ 'u', 'm', 'a', 'x', 'v', 9, 0, 851 /* 6300 */ 'l', 'd', '1', 'w', 9, 0, 852 /* 6306 */ 'l', 'd', 'f', 'f', '1', 'w', 9, 0, 853 /* 6314 */ 'l', 'd', 'n', 'f', '1', 'w', 9, 0, 854 /* 6322 */ 'l', 'd', 'n', 't', '1', 'w', 9, 0, 855 /* 6330 */ 's', 't', 'n', 't', '1', 'w', 9, 0, 856 /* 6338 */ 's', 't', '1', 'w', 9, 0, 857 /* 6344 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0, 858 /* 6352 */ 'l', 'd', '2', 'w', 9, 0, 859 /* 6358 */ 's', 't', '2', 'w', 9, 0, 860 /* 6364 */ 'l', 'd', '3', 'w', 9, 0, 861 /* 6370 */ 's', 't', '3', 'w', 9, 0, 862 /* 6376 */ 'l', 'd', '4', 'w', 9, 0, 863 /* 6382 */ 's', 't', '4', 'w', 9, 0, 864 /* 6388 */ 's', 's', 'u', 'b', 'w', 9, 0, 865 /* 6395 */ 'u', 's', 'u', 'b', 'w', 9, 0, 866 /* 6402 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0, 867 /* 6411 */ 's', 'q', 'd', 'e', 'c', 'w', 9, 0, 868 /* 6419 */ 'u', 'q', 'd', 'e', 'c', 'w', 9, 0, 869 /* 6427 */ 's', 'q', 'i', 'n', 'c', 'w', 9, 0, 870 /* 6435 */ 'u', 'q', 'i', 'n', 'c', 'w', 9, 0, 871 /* 6443 */ 's', 'a', 'd', 'd', 'w', 9, 0, 872 /* 6450 */ 'u', 'a', 'd', 'd', 'w', 9, 0, 873 /* 6457 */ 'p', 'r', 'f', 'w', 9, 0, 874 /* 6463 */ 'l', 'd', '1', 'r', 'q', 'w', 9, 0, 875 /* 6471 */ 'l', 'd', '1', 'r', 'w', 9, 0, 876 /* 6478 */ 'w', 'h', 'i', 'l', 'e', 'r', 'w', 9, 0, 877 /* 6487 */ 'l', 'd', '1', 's', 'w', 9, 0, 878 /* 6494 */ 'l', 'd', 'f', 'f', '1', 's', 'w', 9, 0, 879 /* 6503 */ 'l', 'd', 'n', 'f', '1', 's', 'w', 9, 0, 880 /* 6512 */ 'l', 'd', 'n', 't', '1', 's', 'w', 9, 0, 881 /* 6521 */ 'l', 'd', 'p', 's', 'w', 9, 0, 882 /* 6528 */ 'l', 'd', '1', 'r', 's', 'w', 9, 0, 883 /* 6536 */ 'l', 'd', 'r', 's', 'w', 9, 0, 884 /* 6543 */ 'l', 'd', 't', 'r', 's', 'w', 9, 0, 885 /* 6551 */ 'l', 'd', 'u', 'r', 's', 'w', 9, 0, 886 /* 6559 */ 'l', 'd', 'a', 'p', 'u', 'r', 's', 'w', 9, 0, 887 /* 6569 */ 'c', 'n', 't', 'w', 9, 0, 888 /* 6575 */ 's', 'x', 't', 'w', 9, 0, 889 /* 6581 */ 'u', 'x', 't', 'w', 9, 0, 890 /* 6587 */ 'r', 'e', 'v', 'w', 9, 0, 891 /* 6593 */ 'c', 'r', 'c', '3', '2', 'x', 9, 0, 892 /* 6601 */ 'f', 'r', 'i', 'n', 't', '3', '2', 'x', 9, 0, 893 /* 6611 */ 'f', 'r', 'i', 'n', 't', '6', '4', 'x', 9, 0, 894 /* 6621 */ 'b', 'c', 'a', 'x', 9, 0, 895 /* 6627 */ 'f', 'm', 'a', 'x', 9, 0, 896 /* 6633 */ 'l', 'd', 's', 'm', 'a', 'x', 9, 0, 897 /* 6641 */ 'l', 'd', 'u', 'm', 'a', 'x', 9, 0, 898 /* 6649 */ 't', 'b', 'x', 9, 0, 899 /* 6654 */ 'c', 'r', 'c', '3', '2', 'c', 'x', 9, 0, 900 /* 6663 */ 'i', 'n', 'd', 'e', 'x', 9, 0, 901 /* 6670 */ 'c', 'l', 'r', 'e', 'x', 9, 0, 902 /* 6677 */ 'm', 'o', 'v', 'p', 'r', 'f', 'x', 9, 0, 903 /* 6686 */ 'f', 'm', 'u', 'l', 'x', 9, 0, 904 /* 6693 */ 'f', 'r', 'e', 'c', 'p', 'x', 9, 0, 905 /* 6701 */ 'f', 'r', 'i', 'n', 't', 'x', 9, 0, 906 /* 6709 */ 'f', 'c', 'v', 't', 'x', 9, 0, 907 /* 6716 */ 's', 'm', '4', 'e', 'k', 'e', 'y', 9, 0, 908 /* 6725 */ 'f', 'c', 'p', 'y', 9, 0, 909 /* 6731 */ 'f', 'r', 'i', 'n', 't', '3', '2', 'z', 9, 0, 910 /* 6741 */ 'f', 'r', 'i', 'n', 't', '6', '4', 'z', 9, 0, 911 /* 6751 */ 'b', 'r', 'a', 'a', 'z', 9, 0, 912 /* 6758 */ 'b', 'l', 'r', 'a', 'a', 'z', 9, 0, 913 /* 6766 */ 'b', 'r', 'a', 'b', 'z', 9, 0, 914 /* 6773 */ 'b', 'l', 'r', 'a', 'b', 'z', 9, 0, 915 /* 6781 */ 'c', 'b', 'z', 9, 0, 916 /* 6786 */ 't', 'b', 'z', 9, 0, 917 /* 6791 */ 'c', 'l', 'z', 9, 0, 918 /* 6796 */ 'c', 'b', 'n', 'z', 9, 0, 919 /* 6802 */ 't', 'b', 'n', 'z', 9, 0, 920 /* 6808 */ 'f', 'r', 'i', 'n', 't', 'z', 9, 0, 921 /* 6816 */ 'm', 'o', 'v', 'z', 9, 0, 922 /* 6822 */ '.', 't', 'l', 's', 'd', 'e', 's', 'c', 'c', 'a', 'l', 'l', 32, 0, 923 /* 6836 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'P', 'a', 't', 'c', 'h', 'a', 'b', 'l', 'e', 32, 'R', 'E', 'T', '.', 0, 924 /* 6867 */ 'b', '.', 0, 925 /* 6870 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'T', 'y', 'p', 'e', 'd', 32, 'E', 'v', 'e', 'n', 't', 32, 'L', 'o', 'g', '.', 0, 926 /* 6894 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'C', 'u', 's', 't', 'o', 'm', 32, 'E', 'v', 'e', 'n', 't', 32, 'L', 'o', 'g', '.', 0, 927 /* 6919 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'E', 'n', 't', 'e', 'r', '.', 0, 928 /* 6942 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'T', 'a', 'i', 'l', 32, 'C', 'a', 'l', 'l', 32, 'E', 'x', 'i', 't', '.', 0, 929 /* 6965 */ '#', 32, 'X', 'R', 'a', 'y', 32, 'F', 'u', 'n', 'c', 't', 'i', 'o', 'n', 32, 'E', 'x', 'i', 't', '.', 0, 930 /* 6987 */ 'h', 'i', 'n', 't', 32, '#', '1', '0', 0, 931 /* 6996 */ 'h', 'i', 'n', 't', 32, '#', '3', '0', 0, 932 /* 7005 */ 'h', 'i', 'n', 't', 32, '#', '3', '1', 0, 933 /* 7014 */ 'h', 'i', 'n', 't', 32, '#', '1', '2', 0, 934 /* 7023 */ 'h', 'i', 'n', 't', 32, '#', '1', '4', 0, 935 /* 7032 */ 'h', 'i', 'n', 't', 32, '#', '2', '4', 0, 936 /* 7041 */ 'h', 'i', 'n', 't', 32, '#', '2', '5', 0, 937 /* 7050 */ 'h', 'i', 'n', 't', 32, '#', '2', '6', 0, 938 /* 7059 */ 'h', 'i', 'n', 't', 32, '#', '7', 0, 939 /* 7067 */ 'h', 'i', 'n', 't', 32, '#', '2', '7', 0, 940 /* 7076 */ 'h', 'i', 'n', 't', 32, '#', '8', 0, 941 /* 7084 */ 'h', 'i', 'n', 't', 32, '#', '2', '8', 0, 942 /* 7093 */ 'h', 'i', 'n', 't', 32, '#', '2', '9', 0, 943 /* 7102 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, 944 /* 7115 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, 945 /* 7122 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, 946 /* 7132 */ 'D', 'B', 'G', '_', 'L', 'A', 'B', 'E', 'L', 0, 947 /* 7142 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, 948 /* 7157 */ 'e', 'r', 'e', 't', 'a', 'a', 0, 949 /* 7164 */ 'e', 'r', 'e', 't', 'a', 'b', 0, 950 /* 7171 */ 's', 'b', 0, 951 /* 7174 */ 'x', 'a', 'f', 'l', 'a', 'g', 0, 952 /* 7181 */ 'a', 'x', 'f', 'l', 'a', 'g', 0, 953 /* 7188 */ '#', 32, 'F', 'E', 'n', 't', 'r', 'y', 32, 'c', 'a', 'l', 'l', 0, 954 /* 7202 */ 's', 'e', 't', 'f', 'f', 'r', 0, 955 /* 7209 */ 'd', 'r', 'p', 's', 0, 956 /* 7214 */ 'e', 'r', 'e', 't', 0, 957 /* 7219 */ 't', 'c', 'o', 'm', 'm', 'i', 't', 0, 958 /* 7227 */ 'c', 'f', 'i', 'n', 'v', 0, 959 }; 960 961 static const uint32_t OpInfo0[] = { 962 0U, // PHI 963 0U, // INLINEASM 964 0U, // INLINEASM_BR 965 0U, // CFI_INSTRUCTION 966 0U, // EH_LABEL 967 0U, // GC_LABEL 968 0U, // ANNOTATION_LABEL 969 0U, // KILL 970 0U, // EXTRACT_SUBREG 971 0U, // INSERT_SUBREG 972 0U, // IMPLICIT_DEF 973 0U, // SUBREG_TO_REG 974 0U, // COPY_TO_REGCLASS 975 7123U, // DBG_VALUE 976 7133U, // DBG_LABEL 977 0U, // REG_SEQUENCE 978 0U, // COPY 979 7116U, // BUNDLE 980 7143U, // LIFETIME_START 981 7103U, // LIFETIME_END 982 0U, // STACKMAP 983 7189U, // FENTRY_CALL 984 0U, // PATCHPOINT 985 0U, // LOAD_STACK_GUARD 986 0U, // STATEPOINT 987 0U, // LOCAL_ESCAPE 988 0U, // FAULTING_OP 989 0U, // PATCHABLE_OP 990 6920U, // PATCHABLE_FUNCTION_ENTER 991 6837U, // PATCHABLE_RET 992 6966U, // PATCHABLE_FUNCTION_EXIT 993 6943U, // PATCHABLE_TAIL_CALL 994 6895U, // PATCHABLE_EVENT_CALL 995 6871U, // PATCHABLE_TYPED_EVENT_CALL 996 0U, // ICALL_BRANCH_FUNNEL 997 0U, // G_ADD 998 0U, // G_SUB 999 0U, // G_MUL 1000 0U, // G_SDIV 1001 0U, // G_UDIV 1002 0U, // G_SREM 1003 0U, // G_UREM 1004 0U, // G_AND 1005 0U, // G_OR 1006 0U, // G_XOR 1007 0U, // G_IMPLICIT_DEF 1008 0U, // G_PHI 1009 0U, // G_FRAME_INDEX 1010 0U, // G_GLOBAL_VALUE 1011 0U, // G_EXTRACT 1012 0U, // G_UNMERGE_VALUES 1013 0U, // G_INSERT 1014 0U, // G_MERGE_VALUES 1015 0U, // G_BUILD_VECTOR 1016 0U, // G_BUILD_VECTOR_TRUNC 1017 0U, // G_CONCAT_VECTORS 1018 0U, // G_PTRTOINT 1019 0U, // G_INTTOPTR 1020 0U, // G_BITCAST 1021 0U, // G_INTRINSIC_TRUNC 1022 0U, // G_INTRINSIC_ROUND 1023 0U, // G_READCYCLECOUNTER 1024 0U, // G_LOAD 1025 0U, // G_SEXTLOAD 1026 0U, // G_ZEXTLOAD 1027 0U, // G_INDEXED_LOAD 1028 0U, // G_INDEXED_SEXTLOAD 1029 0U, // G_INDEXED_ZEXTLOAD 1030 0U, // G_STORE 1031 0U, // G_INDEXED_STORE 1032 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS 1033 0U, // G_ATOMIC_CMPXCHG 1034 0U, // G_ATOMICRMW_XCHG 1035 0U, // G_ATOMICRMW_ADD 1036 0U, // G_ATOMICRMW_SUB 1037 0U, // G_ATOMICRMW_AND 1038 0U, // G_ATOMICRMW_NAND 1039 0U, // G_ATOMICRMW_OR 1040 0U, // G_ATOMICRMW_XOR 1041 0U, // G_ATOMICRMW_MAX 1042 0U, // G_ATOMICRMW_MIN 1043 0U, // G_ATOMICRMW_UMAX 1044 0U, // G_ATOMICRMW_UMIN 1045 0U, // G_ATOMICRMW_FADD 1046 0U, // G_ATOMICRMW_FSUB 1047 0U, // G_FENCE 1048 0U, // G_BRCOND 1049 0U, // G_BRINDIRECT 1050 0U, // G_INTRINSIC 1051 0U, // G_INTRINSIC_W_SIDE_EFFECTS 1052 0U, // G_ANYEXT 1053 0U, // G_TRUNC 1054 0U, // G_CONSTANT 1055 0U, // G_FCONSTANT 1056 0U, // G_VASTART 1057 0U, // G_VAARG 1058 0U, // G_SEXT 1059 0U, // G_SEXT_INREG 1060 0U, // G_ZEXT 1061 0U, // G_SHL 1062 0U, // G_LSHR 1063 0U, // G_ASHR 1064 0U, // G_ICMP 1065 0U, // G_FCMP 1066 0U, // G_SELECT 1067 0U, // G_UADDO 1068 0U, // G_UADDE 1069 0U, // G_USUBO 1070 0U, // G_USUBE 1071 0U, // G_SADDO 1072 0U, // G_SADDE 1073 0U, // G_SSUBO 1074 0U, // G_SSUBE 1075 0U, // G_UMULO 1076 0U, // G_SMULO 1077 0U, // G_UMULH 1078 0U, // G_SMULH 1079 0U, // G_FADD 1080 0U, // G_FSUB 1081 0U, // G_FMUL 1082 0U, // G_FMA 1083 0U, // G_FMAD 1084 0U, // G_FDIV 1085 0U, // G_FREM 1086 0U, // G_FPOW 1087 0U, // G_FEXP 1088 0U, // G_FEXP2 1089 0U, // G_FLOG 1090 0U, // G_FLOG2 1091 0U, // G_FLOG10 1092 0U, // G_FNEG 1093 0U, // G_FPEXT 1094 0U, // G_FPTRUNC 1095 0U, // G_FPTOSI 1096 0U, // G_FPTOUI 1097 0U, // G_SITOFP 1098 0U, // G_UITOFP 1099 0U, // G_FABS 1100 0U, // G_FCOPYSIGN 1101 0U, // G_FCANONICALIZE 1102 0U, // G_FMINNUM 1103 0U, // G_FMAXNUM 1104 0U, // G_FMINNUM_IEEE 1105 0U, // G_FMAXNUM_IEEE 1106 0U, // G_FMINIMUM 1107 0U, // G_FMAXIMUM 1108 0U, // G_PTR_ADD 1109 0U, // G_PTR_MASK 1110 0U, // G_SMIN 1111 0U, // G_SMAX 1112 0U, // G_UMIN 1113 0U, // G_UMAX 1114 0U, // G_BR 1115 0U, // G_BRJT 1116 0U, // G_INSERT_VECTOR_ELT 1117 0U, // G_EXTRACT_VECTOR_ELT 1118 0U, // G_SHUFFLE_VECTOR 1119 0U, // G_CTTZ 1120 0U, // G_CTTZ_ZERO_UNDEF 1121 0U, // G_CTLZ 1122 0U, // G_CTLZ_ZERO_UNDEF 1123 0U, // G_CTPOP 1124 0U, // G_BSWAP 1125 0U, // G_BITREVERSE 1126 0U, // G_FCEIL 1127 0U, // G_FCOS 1128 0U, // G_FSIN 1129 0U, // G_FSQRT 1130 0U, // G_FFLOOR 1131 0U, // G_FRINT 1132 0U, // G_FNEARBYINT 1133 0U, // G_ADDRSPACE_CAST 1134 0U, // G_BLOCK_ADDR 1135 0U, // G_JUMP_TABLE 1136 0U, // G_DYN_STACKALLOC 1137 0U, // G_READ_REGISTER 1138 0U, // G_WRITE_REGISTER 1139 0U, // CATCHRET 1140 0U, // CLEANUPRET 1141 0U, // SEH_AddFP 1142 0U, // SEH_EpilogEnd 1143 0U, // SEH_EpilogStart 1144 0U, // SEH_Nop 1145 0U, // SEH_PrologEnd 1146 0U, // SEH_SaveFPLR 1147 0U, // SEH_SaveFPLR_X 1148 0U, // SEH_SaveFReg 1149 0U, // SEH_SaveFRegP 1150 0U, // SEH_SaveFRegP_X 1151 0U, // SEH_SaveFReg_X 1152 0U, // SEH_SaveReg 1153 0U, // SEH_SaveRegP 1154 0U, // SEH_SaveRegP_X 1155 0U, // SEH_SaveReg_X 1156 0U, // SEH_SetFP 1157 0U, // SEH_StackAlloc 1158 13452U, // ABS_ZPmZ_B 1159 2147505292U, // ABS_ZPmZ_D 1160 34108556U, // ABS_ZPmZ_H 1161 38028U, // ABS_ZPmZ_S 1162 2215687308U, // ABSv16i8 1163 100717708U, // ABSv1i64 1164 2216211596U, // ABSv2i32 1165 69252236U, // ABSv2i64 1166 2217260172U, // ABSv4i16 1167 70300812U, // ABSv4i32 1168 2218308748U, // ABSv8i16 1169 71349388U, // ABSv8i8 1170 2281719137U, // ADCLB_ZZZ_D 1171 2315289953U, // ADCLB_ZZZ_S 1172 2281723444U, // ADCLT_ZZZ_D 1173 2315294260U, // ADCLT_ZZZ_S 1174 2248201395U, // ADCSWr 1175 2248201395U, // ADCSXr 1176 2248198288U, // ADCWr 1177 2248198288U, // ADCXr 1178 2248198838U, // ADDG 1179 2348820037U, // ADDHNB_ZZZ_B 1180 239625797U, // ADDHNB_ZZZ_H 1181 2415953477U, // ADDHNB_ZZZ_S 1182 2449487590U, // ADDHNT_ZZZ_B 1183 240154342U, // ADDHNT_ZZZ_H 1184 2281740006U, // ADDHNT_ZZZ_S 1185 2216210699U, // ADDHNv2i64_v2i32 1186 2486231395U, // ADDHNv2i64_v4i32 1187 69775627U, // ADDHNv4i32_v4i16 1188 339272035U, // ADDHNv4i32_v8i16 1189 2484134243U, // ADDHNv8i16_v16i8 1190 2218832139U, // ADDHNv8i16_v8i8 1191 2248200198U, // ADDPL_XXI 1192 369111558U, // ADDP_ZPmZ_B 1193 369119750U, // ADDP_ZPmZ_D 1194 2555933190U, // ADDP_ZPmZ_H 1195 369136134U, // ADDP_ZPmZ_S 1196 68203014U, // ADDPv16i8 1197 2216210950U, // ADDPv2i32 1198 2216735238U, // ADDPv2i64 1199 67162630U, // ADDPv2i64p 1200 69775878U, // ADDPv4i16 1201 70300166U, // ADDPv4i32 1202 2218308102U, // ADDPv8i16 1203 2218832390U, // ADDPv8i8 1204 2248201407U, // ADDSWri 1205 0U, // ADDSWrr 1206 2248201407U, // ADDSWrs 1207 2248201407U, // ADDSWrx 1208 2248201407U, // ADDSXri 1209 0U, // ADDSXrr 1210 2248201407U, // ADDSXrs 1211 2248201407U, // ADDSXrx 1212 2248201407U, // ADDSXrx64 1213 2248200324U, // ADDVL_XXI 1214 2214647809U, // ADDVv16i8v 1215 2214647809U, // ADDVv4i16v 1216 67164161U, // ADDVv4i32v 1217 2214647809U, // ADDVv8i16v 1218 67164161U, // ADDVv8i8v 1219 2248198489U, // ADDWri 1220 0U, // ADDWrr 1221 2248198489U, // ADDWrs 1222 2248198489U, // ADDWrx 1223 2248198489U, // ADDXri 1224 0U, // ADDXrr 1225 2248198489U, // ADDXrs 1226 2248198489U, // ADDXrx 1227 2248198489U, // ADDXrx64 1228 2583701849U, // ADD_ZI_B 1229 2415937881U, // ADD_ZI_D 1230 241199449U, // ADD_ZI_H 1231 2617280857U, // ADD_ZI_S 1232 369109337U, // ADD_ZPmZ_B 1233 369117529U, // ADD_ZPmZ_D 1234 2555930969U, // ADD_ZPmZ_H 1235 369133913U, // ADD_ZPmZ_S 1236 2583701849U, // ADD_ZZZ_B 1237 2415937881U, // ADD_ZZZ_D 1238 2388683097U, // ADD_ZZZ_H 1239 2617280857U, // ADD_ZZZ_S 1240 0U, // ADDlowTLS 1241 68200793U, // ADDv16i8 1242 2248198489U, // ADDv1i64 1243 2216208729U, // ADDv2i32 1244 2216733017U, // ADDv2i64 1245 69773657U, // ADDv4i16 1246 70297945U, // ADDv4i32 1247 2218305881U, // ADDv8i16 1248 2218830169U, // ADDv8i8 1249 0U, // ADJCALLSTACKDOWN 1250 0U, // ADJCALLSTACKUP 1251 100717380U, // ADR 1252 503370365U, // ADRP 1253 2422756164U, // ADR_LSL_ZZZ_D_0 1254 2422756164U, // ADR_LSL_ZZZ_D_1 1255 2422756164U, // ADR_LSL_ZZZ_D_2 1256 2422756164U, // ADR_LSL_ZZZ_D_3 1257 2624099140U, // ADR_LSL_ZZZ_S_0 1258 2624099140U, // ADR_LSL_ZZZ_S_1 1259 2624099140U, // ADR_LSL_ZZZ_S_2 1260 2624099140U, // ADR_LSL_ZZZ_S_3 1261 2422756164U, // ADR_SXTW_ZZZ_D_0 1262 2422756164U, // ADR_SXTW_ZZZ_D_1 1263 2422756164U, // ADR_SXTW_ZZZ_D_2 1264 2422756164U, // ADR_SXTW_ZZZ_D_3 1265 2422756164U, // ADR_UXTW_ZZZ_D_0 1266 2422756164U, // ADR_UXTW_ZZZ_D_1 1267 2422756164U, // ADR_UXTW_ZZZ_D_2 1268 2422756164U, // ADR_UXTW_ZZZ_D_3 1269 2583701969U, // AESD_ZZZ_B 1270 2484136401U, // AESDrr 1271 2583702110U, // AESE_ZZZ_B 1272 2484136542U, // AESErr 1273 436218010U, // AESIMC_ZZ_B 1274 2215684250U, // AESIMCrr 1275 0U, // AESIMCrrTied 1276 436218018U, // AESMC_ZZ_B 1277 2215684258U, // AESMCrr 1278 0U, // AESMCrrTied 1279 2248201414U, // ANDSWri 1280 0U, // ANDSWrr 1281 2248201414U, // ANDSWrs 1282 2248201414U, // ANDSXri 1283 0U, // ANDSXrr 1284 2248201414U, // ANDSXrs 1285 2516595910U, // ANDS_PPzPP 1286 2516637717U, // ANDV_VPZ_B 1287 2516637717U, // ANDV_VPZ_D 1288 2516637717U, // ANDV_VPZ_H 1289 2516637717U, // ANDV_VPZ_S 1290 2248198583U, // ANDWri 1291 0U, // ANDWrr 1292 2248198583U, // ANDWrs 1293 2248198583U, // ANDXri 1294 0U, // ANDXrr 1295 2248198583U, // ANDXrs 1296 2516593079U, // AND_PPzPP 1297 2415937975U, // AND_ZI 1298 369109431U, // AND_ZPmZ_B 1299 369117623U, // AND_ZPmZ_D 1300 2555931063U, // AND_ZPmZ_H 1301 369134007U, // AND_ZPmZ_S 1302 2415937975U, // AND_ZZZ 1303 68200887U, // ANDv16i8 1304 2218830263U, // ANDv8i8 1305 369109451U, // ASRD_ZPmI_B 1306 369117643U, // ASRD_ZPmI_D 1307 2555931083U, // ASRD_ZPmI_H 1308 369134027U, // ASRD_ZPmI_S 1309 369112036U, // ASRR_ZPmZ_B 1310 369120228U, // ASRR_ZPmZ_D 1311 2555933668U, // ASRR_ZPmZ_H 1312 369136612U, // ASRR_ZPmZ_S 1313 2248201200U, // ASRVWr 1314 2248201200U, // ASRVXr 1315 369112048U, // ASR_WIDE_ZPmZ_B 1316 2555933680U, // ASR_WIDE_ZPmZ_H 1317 369136624U, // ASR_WIDE_ZPmZ_S 1318 2583704560U, // ASR_WIDE_ZZZ_B 1319 241202160U, // ASR_WIDE_ZZZ_H 1320 2617283568U, // ASR_WIDE_ZZZ_S 1321 369112048U, // ASR_ZPmI_B 1322 369120240U, // ASR_ZPmI_D 1323 2555933680U, // ASR_ZPmI_H 1324 369136624U, // ASR_ZPmI_S 1325 369112048U, // ASR_ZPmZ_B 1326 369120240U, // ASR_ZPmZ_D 1327 2555933680U, // ASR_ZPmZ_H 1328 369136624U, // ASR_ZPmZ_S 1329 2583704560U, // ASR_ZZI_B 1330 2415940592U, // ASR_ZZI_D 1331 2388685808U, // ASR_ZZI_H 1332 2617283568U, // ASR_ZZI_S 1333 100713119U, // AUTDA 1334 100713612U, // AUTDB 1335 7390052U, // AUTDZA 1336 7391340U, // AUTDZB 1337 100713140U, // AUTIA 1338 7015U, // AUTIA1716 1339 7094U, // AUTIASP 1340 7085U, // AUTIAZ 1341 100713639U, // AUTIB 1342 7024U, // AUTIB1716 1343 7006U, // AUTIBSP 1344 6997U, // AUTIBZ 1345 7390068U, // AUTIZA 1346 7391356U, // AUTIZB 1347 7182U, // AXFLAG 1348 66431U, // B 1349 68205022U, // BCAX 1350 2415942110U, // BCAX_ZZZZ_D 1351 2583704081U, // BDEP_ZZZ_B 1352 2415940113U, // BDEP_ZZZ_D 1353 2388685329U, // BDEP_ZZZ_H 1354 2617283089U, // BDEP_ZZZ_S 1355 2583705539U, // BEXT_ZZZ_B 1356 2415941571U, // BEXT_ZZZ_D 1357 2388686787U, // BEXT_ZZZ_H 1358 2617284547U, // BEXT_ZZZ_S 1359 2684407979U, // BFMWri 1360 2684407979U, // BFMXri 1361 2583704195U, // BGRP_ZZZ_B 1362 2415940227U, // BGRP_ZZZ_D 1363 2388685443U, // BGRP_ZZZ_H 1364 2617283203U, // BGRP_ZZZ_S 1365 0U, // BICSWrr 1366 2248201401U, // BICSWrs 1367 0U, // BICSXrr 1368 2248201401U, // BICSXrs 1369 2516595897U, // BICS_PPzPP 1370 0U, // BICWrr 1371 2248198293U, // BICWrs 1372 0U, // BICXrr 1373 2248198293U, // BICXrs 1374 2516592789U, // BIC_PPzPP 1375 369109141U, // BIC_ZPmZ_B 1376 369117333U, // BIC_ZPmZ_D 1377 2555930773U, // BIC_ZPmZ_H 1378 369133717U, // BIC_ZPmZ_S 1379 2415937685U, // BIC_ZZZ 1380 68200597U, // BICv16i8 1381 572057749U, // BICv2i32 1382 573106325U, // BICv4i16 1383 573630613U, // BICv4i32 1384 574154901U, // BICv8i16 1385 2218829973U, // BICv8i8 1386 68201098U, // BIFv16i8 1387 2218830474U, // BIFv8i8 1388 336655846U, // BITv16i8 1389 2487285222U, // BITv8i8 1390 69410U, // BL 1391 7394166U, // BLR 1392 100713078U, // BLRAA 1393 7395943U, // BLRAAZ 1394 100713495U, // BLRAB 1395 7395958U, // BLRABZ 1396 7394080U, // BR 1397 100713065U, // BRAA 1398 7395936U, // BRAAZ 1399 100713482U, // BRAB 1400 7395951U, // BRABZ 1401 77448U, // BRK 1402 2516595828U, // BRKAS_PPzP 1403 8891U, // BRKA_PPmP 1404 2516591291U, // BRKA_PPzP 1405 2516595864U, // BRKBS_PPzP 1406 9390U, // BRKB_PPmP 1407 2516591790U, // BRKB_PPzP 1408 2516595993U, // BRKNS_PPzP 1409 2516594984U, // BRKN_PPzP 1410 2516595835U, // BRKPAS_PPzPP 1411 2516591335U, // BRKPA_PPzPP 1412 2516595871U, // BRKPBS_PPzPP 1413 2516592307U, // BRKPB_PPzPP 1414 2415939828U, // BSL1N_ZZZZ_D 1415 2415939835U, // BSL2N_ZZZZ_D 1416 2415939633U, // BSL_ZZZZ_D 1417 336654385U, // BSLv16i8 1418 2487283761U, // BSLv8i8 1419 88788U, // Bcc 1420 2583701848U, // CADD_ZZI_B 1421 2415937880U, // CADD_ZZI_D 1422 2388683096U, // CADD_ZZI_H 1423 2617280856U, // CADD_ZZI_S 1424 536962096U, // CASAB 1425 536964010U, // CASAH 1426 536962338U, // CASALB 1427 536964169U, // CASALH 1428 536964861U, // CASALW 1429 536964861U, // CASALX 1430 536961836U, // CASAW 1431 536961836U, // CASAX 1432 536962942U, // CASB 1433 536964546U, // CASH 1434 536962544U, // CASLB 1435 536964263U, // CASLH 1436 536965162U, // CASLW 1437 536965162U, // CASLX 1438 102108U, // CASPALW 1439 110300U, // CASPALX 1440 99054U, // CASPAW 1441 107246U, // CASPAX 1442 102413U, // CASPLW 1443 110605U, // CASPLX 1444 103049U, // CASPW 1445 111241U, // CASPX 1446 536966255U, // CASW 1447 536966255U, // CASX 1448 0U, // CATCHPAD 1449 604035725U, // CBNZW 1450 604035725U, // CBNZX 1451 604035710U, // CBZW 1452 604035710U, // CBZX 1453 2248200494U, // CCMNWi 1454 2248200494U, // CCMNWr 1455 2248200494U, // CCMNXi 1456 2248200494U, // CCMNXr 1457 2248200766U, // CCMPWi 1458 2248200766U, // CCMPWr 1459 2248200766U, // CCMPXi 1460 2248200766U, // CCMPXr 1461 2449495897U, // CDOT_ZZZI_D 1462 637572953U, // CDOT_ZZZI_S 1463 2449495897U, // CDOT_ZZZ_D 1464 637572953U, // CDOT_ZZZ_S 1465 7228U, // CFINV 1466 2516632386U, // CLASTA_RPZ_B 1467 2516632386U, // CLASTA_RPZ_D 1468 2516632386U, // CLASTA_RPZ_H 1469 2516632386U, // CLASTA_RPZ_S 1470 2516632386U, // CLASTA_VPZ_B 1471 2516632386U, // CLASTA_VPZ_D 1472 2516632386U, // CLASTA_VPZ_H 1473 2516632386U, // CLASTA_VPZ_S 1474 2516591426U, // CLASTA_ZPZ_B 1475 2516599618U, // CLASTA_ZPZ_D 1476 2388157250U, // CLASTA_ZPZ_H 1477 2516616002U, // CLASTA_ZPZ_S 1478 2516633575U, // CLASTB_RPZ_B 1479 2516633575U, // CLASTB_RPZ_D 1480 2516633575U, // CLASTB_RPZ_H 1481 2516633575U, // CLASTB_RPZ_S 1482 2516633575U, // CLASTB_VPZ_B 1483 2516633575U, // CLASTB_VPZ_D 1484 2516633575U, // CLASTB_VPZ_H 1485 2516633575U, // CLASTB_VPZ_S 1486 2516592615U, // CLASTB_ZPZ_B 1487 2516600807U, // CLASTB_ZPZ_D 1488 2388158439U, // CLASTB_ZPZ_H 1489 2516617191U, // CLASTB_ZPZ_S 1490 7395855U, // CLREX 1491 100717802U, // CLSWr 1492 100717802U, // CLSXr 1493 13546U, // CLS_ZPmZ_B 1494 2147505386U, // CLS_ZPmZ_D 1495 34108650U, // CLS_ZPmZ_H 1496 38122U, // CLS_ZPmZ_S 1497 2215687402U, // CLSv16i8 1498 2216211690U, // CLSv2i32 1499 2217260266U, // CLSv4i16 1500 70300906U, // CLSv4i32 1501 2218308842U, // CLSv8i16 1502 71349482U, // CLSv8i8 1503 100719240U, // CLZWr 1504 100719240U, // CLZXr 1505 14984U, // CLZ_ZPmZ_B 1506 2147506824U, // CLZ_ZPmZ_D 1507 34110088U, // CLZ_ZPmZ_H 1508 39560U, // CLZ_ZPmZ_S 1509 2215688840U, // CLZv16i8 1510 2216213128U, // CLZv2i32 1511 2217261704U, // CLZv4i16 1512 70302344U, // CLZv4i32 1513 2218310280U, // CLZv8i16 1514 71350920U, // CLZv8i8 1515 68203229U, // CMEQv16i8 1516 2215686877U, // CMEQv16i8rz 1517 2248200925U, // CMEQv1i64 1518 100717277U, // CMEQv1i64rz 1519 2216211165U, // CMEQv2i32 1520 2216211165U, // CMEQv2i32rz 1521 2216735453U, // CMEQv2i64 1522 69251805U, // CMEQv2i64rz 1523 69776093U, // CMEQv4i16 1524 2217259741U, // CMEQv4i16rz 1525 70300381U, // CMEQv4i32 1526 70300381U, // CMEQv4i32rz 1527 2218308317U, // CMEQv8i16 1528 2218308317U, // CMEQv8i16rz 1529 2218832605U, // CMEQv8i8 1530 71348957U, // CMEQv8i8rz 1531 68200956U, // CMGEv16i8 1532 2215684604U, // CMGEv16i8rz 1533 2248198652U, // CMGEv1i64 1534 100715004U, // CMGEv1i64rz 1535 2216208892U, // CMGEv2i32 1536 2216208892U, // CMGEv2i32rz 1537 2216733180U, // CMGEv2i64 1538 69249532U, // CMGEv2i64rz 1539 69773820U, // CMGEv4i16 1540 2217257468U, // CMGEv4i16rz 1541 70298108U, // CMGEv4i32 1542 70298108U, // CMGEv4i32rz 1543 2218306044U, // CMGEv8i16 1544 2218306044U, // CMGEv8i16rz 1545 2218830332U, // CMGEv8i8 1546 71346684U, // CMGEv8i8rz 1547 68203992U, // CMGTv16i8 1548 2215687640U, // CMGTv16i8rz 1549 2248201688U, // CMGTv1i64 1550 100718040U, // CMGTv1i64rz 1551 2216211928U, // CMGTv2i32 1552 2216211928U, // CMGTv2i32rz 1553 2216736216U, // CMGTv2i64 1554 69252568U, // CMGTv2i64rz 1555 69776856U, // CMGTv4i16 1556 2217260504U, // CMGTv4i16rz 1557 70301144U, // CMGTv4i32 1558 70301144U, // CMGTv4i32rz 1559 2218309080U, // CMGTv8i16 1560 2218309080U, // CMGTv8i16rz 1561 2218833368U, // CMGTv8i8 1562 71349720U, // CMGTv8i8rz 1563 68202072U, // CMHIv16i8 1564 2248199768U, // CMHIv1i64 1565 2216210008U, // CMHIv2i32 1566 2216734296U, // CMHIv2i64 1567 69774936U, // CMHIv4i16 1568 70299224U, // CMHIv4i32 1569 2218307160U, // CMHIv8i16 1570 2218831448U, // CMHIv8i8 1571 68203741U, // CMHSv16i8 1572 2248201437U, // CMHSv1i64 1573 2216211677U, // CMHSv2i32 1574 2216735965U, // CMHSv2i64 1575 69776605U, // CMHSv4i16 1576 70300893U, // CMHSv4i32 1577 2218308829U, // CMHSv8i16 1578 2218833117U, // CMHSv8i8 1579 2390254274U, // CMLA_ZZZI_H 1580 2315289282U, // CMLA_ZZZI_S 1581 637543106U, // CMLA_ZZZ_B 1582 2281718466U, // CMLA_ZZZ_D 1583 2390254274U, // CMLA_ZZZ_H 1584 2315289282U, // CMLA_ZZZ_S 1585 2215684635U, // CMLEv16i8rz 1586 100715035U, // CMLEv1i64rz 1587 2216208923U, // CMLEv2i32rz 1588 69249563U, // CMLEv2i64rz 1589 2217257499U, // CMLEv4i16rz 1590 70298139U, // CMLEv4i32rz 1591 2218306075U, // CMLEv8i16rz 1592 71346715U, // CMLEv8i8rz 1593 2215687836U, // CMLTv16i8rz 1594 100718236U, // CMLTv1i64rz 1595 2216212124U, // CMLTv2i32rz 1596 69252764U, // CMLTv2i64rz 1597 2217260700U, // CMLTv4i16rz 1598 70301340U, // CMLTv4i32rz 1599 2218309276U, // CMLTv8i16rz 1600 71349916U, // CMLTv8i8rz 1601 2516595436U, // CMPEQ_PPzZI_B 1602 2516603628U, // CMPEQ_PPzZI_D 1603 2824368876U, // CMPEQ_PPzZI_H 1604 2516620012U, // CMPEQ_PPzZI_S 1605 2516595436U, // CMPEQ_PPzZZ_B 1606 2516603628U, // CMPEQ_PPzZZ_D 1607 2824368876U, // CMPEQ_PPzZZ_H 1608 2516620012U, // CMPEQ_PPzZZ_S 1609 2516595436U, // CMPEQ_WIDE_PPzZZ_B 1610 2824368876U, // CMPEQ_WIDE_PPzZZ_H 1611 2516620012U, // CMPEQ_WIDE_PPzZZ_S 1612 2516593154U, // CMPGE_PPzZI_B 1613 2516601346U, // CMPGE_PPzZI_D 1614 2824366594U, // CMPGE_PPzZI_H 1615 2516617730U, // CMPGE_PPzZI_S 1616 2516593154U, // CMPGE_PPzZZ_B 1617 2516601346U, // CMPGE_PPzZZ_D 1618 2824366594U, // CMPGE_PPzZZ_H 1619 2516617730U, // CMPGE_PPzZZ_S 1620 2516593154U, // CMPGE_WIDE_PPzZZ_B 1621 2824366594U, // CMPGE_WIDE_PPzZZ_H 1622 2516617730U, // CMPGE_WIDE_PPzZZ_S 1623 2516596190U, // CMPGT_PPzZI_B 1624 2516604382U, // CMPGT_PPzZI_D 1625 2824369630U, // CMPGT_PPzZI_H 1626 2516620766U, // CMPGT_PPzZI_S 1627 2516596190U, // CMPGT_PPzZZ_B 1628 2516604382U, // CMPGT_PPzZZ_D 1629 2824369630U, // CMPGT_PPzZZ_H 1630 2516620766U, // CMPGT_PPzZZ_S 1631 2516596190U, // CMPGT_WIDE_PPzZZ_B 1632 2824369630U, // CMPGT_WIDE_PPzZZ_H 1633 2516620766U, // CMPGT_WIDE_PPzZZ_S 1634 2516594270U, // CMPHI_PPzZI_B 1635 2516602462U, // CMPHI_PPzZI_D 1636 2824367710U, // CMPHI_PPzZI_H 1637 2516618846U, // CMPHI_PPzZI_S 1638 2516594270U, // CMPHI_PPzZZ_B 1639 2516602462U, // CMPHI_PPzZZ_D 1640 2824367710U, // CMPHI_PPzZZ_H 1641 2516618846U, // CMPHI_PPzZZ_S 1642 2516594270U, // CMPHI_WIDE_PPzZZ_B 1643 2824367710U, // CMPHI_WIDE_PPzZZ_H 1644 2516618846U, // CMPHI_WIDE_PPzZZ_S 1645 2516595939U, // CMPHS_PPzZI_B 1646 2516604131U, // CMPHS_PPzZI_D 1647 2824369379U, // CMPHS_PPzZI_H 1648 2516620515U, // CMPHS_PPzZI_S 1649 2516595939U, // CMPHS_PPzZZ_B 1650 2516604131U, // CMPHS_PPzZZ_D 1651 2824369379U, // CMPHS_PPzZZ_H 1652 2516620515U, // CMPHS_PPzZZ_S 1653 2516595939U, // CMPHS_WIDE_PPzZZ_B 1654 2824369379U, // CMPHS_WIDE_PPzZZ_H 1655 2516620515U, // CMPHS_WIDE_PPzZZ_S 1656 2516593185U, // CMPLE_PPzZI_B 1657 2516601377U, // CMPLE_PPzZI_D 1658 2824366625U, // CMPLE_PPzZI_H 1659 2516617761U, // CMPLE_PPzZI_S 1660 2516593185U, // CMPLE_WIDE_PPzZZ_B 1661 2824366625U, // CMPLE_WIDE_PPzZZ_H 1662 2516617761U, // CMPLE_WIDE_PPzZZ_S 1663 2516595146U, // CMPLO_PPzZI_B 1664 2516603338U, // CMPLO_PPzZI_D 1665 2824368586U, // CMPLO_PPzZI_H 1666 2516619722U, // CMPLO_PPzZI_S 1667 2516595146U, // CMPLO_WIDE_PPzZZ_B 1668 2824368586U, // CMPLO_WIDE_PPzZZ_H 1669 2516619722U, // CMPLO_WIDE_PPzZZ_S 1670 2516595973U, // CMPLS_PPzZI_B 1671 2516604165U, // CMPLS_PPzZI_D 1672 2824369413U, // CMPLS_PPzZI_H 1673 2516620549U, // CMPLS_PPzZI_S 1674 2516595973U, // CMPLS_WIDE_PPzZZ_B 1675 2824369413U, // CMPLS_WIDE_PPzZZ_H 1676 2516620549U, // CMPLS_WIDE_PPzZZ_S 1677 2516596386U, // CMPLT_PPzZI_B 1678 2516604578U, // CMPLT_PPzZI_D 1679 2824369826U, // CMPLT_PPzZI_H 1680 2516620962U, // CMPLT_PPzZI_S 1681 2516596386U, // CMPLT_WIDE_PPzZZ_B 1682 2824369826U, // CMPLT_WIDE_PPzZZ_H 1683 2516620962U, // CMPLT_WIDE_PPzZZ_S 1684 2516593208U, // CMPNE_PPzZI_B 1685 2516601400U, // CMPNE_PPzZI_D 1686 2824366648U, // CMPNE_PPzZI_H 1687 2516617784U, // CMPNE_PPzZI_S 1688 2516593208U, // CMPNE_PPzZZ_B 1689 2516601400U, // CMPNE_PPzZZ_D 1690 2824366648U, // CMPNE_PPzZZ_H 1691 2516617784U, // CMPNE_PPzZZ_S 1692 2516593208U, // CMPNE_WIDE_PPzZZ_B 1693 2824366648U, // CMPNE_WIDE_PPzZZ_H 1694 2516617784U, // CMPNE_WIDE_PPzZZ_S 1695 0U, // CMP_SWAP_128 1696 0U, // CMP_SWAP_16 1697 0U, // CMP_SWAP_32 1698 0U, // CMP_SWAP_64 1699 0U, // CMP_SWAP_8 1700 68204438U, // CMTSTv16i8 1701 2248202134U, // CMTSTv1i64 1702 2216212374U, // CMTSTv2i32 1703 2216736662U, // CMTSTv2i64 1704 69777302U, // CMTSTv4i16 1705 70301590U, // CMTSTv4i32 1706 2218309526U, // CMTSTv8i16 1707 2218833814U, // CMTSTv8i8 1708 14187U, // CNOT_ZPmZ_B 1709 2147506027U, // CNOT_ZPmZ_D 1710 34109291U, // CNOT_ZPmZ_H 1711 38763U, // CNOT_ZPmZ_S 1712 704694234U, // CNTB_XPiI 1713 704694743U, // CNTD_XPiI 1714 704695811U, // CNTH_XPiI 1715 2516636303U, // CNTP_XPP_B 1716 2516636303U, // CNTP_XPP_D 1717 2516636303U, // CNTP_XPP_H 1718 2516636303U, // CNTP_XPP_S 1719 704698794U, // CNTW_XPiI 1720 14039U, // CNT_ZPmZ_B 1721 2147505879U, // CNT_ZPmZ_D 1722 34109143U, // CNT_ZPmZ_H 1723 38615U, // CNT_ZPmZ_S 1724 2215687895U, // CNTv16i8 1725 71349975U, // CNTv8i8 1726 2516604338U, // COMPACT_ZPZ_D 1727 2516620722U, // COMPACT_ZPZ_S 1728 2147498567U, // CPY_ZPmI_B 1729 23111U, // CPY_ZPmI_D 1730 738753095U, // CPY_ZPmI_H 1731 2147523143U, // CPY_ZPmI_S 1732 14919U, // CPY_ZPmR_B 1733 23111U, // CPY_ZPmR_D 1734 772307527U, // CPY_ZPmR_H 1735 39495U, // CPY_ZPmR_S 1736 14919U, // CPY_ZPmV_B 1737 23111U, // CPY_ZPmV_D 1738 772307527U, // CPY_ZPmV_H 1739 39495U, // CPY_ZPmV_S 1740 2516597319U, // CPY_ZPzI_B 1741 2516605511U, // CPY_ZPzI_D 1742 2824370759U, // CPY_ZPzI_H 1743 2516621895U, // CPY_ZPzI_S 1744 67164273U, // CPYi16 1745 2214647921U, // CPYi32 1746 67164273U, // CPYi64 1747 2214647921U, // CPYi8 1748 2248197041U, // CRC32Brr 1749 2248197204U, // CRC32CBrr 1750 2248199118U, // CRC32CHrr 1751 2248202499U, // CRC32CWrr 1752 2248202751U, // CRC32CXrr 1753 2248198954U, // CRC32Hrr 1754 2248202441U, // CRC32Wrr 1755 2248202690U, // CRC32Xrr 1756 2248200066U, // CSELWr 1757 2248200066U, // CSELXr 1758 2248198313U, // CSINCWr 1759 2248198313U, // CSINCXr 1760 2248202345U, // CSINVWr 1761 2248202345U, // CSINVXr 1762 2248198862U, // CSNEGWr 1763 2248198862U, // CSNEGXr 1764 100717283U, // CTERMEQ_WW 1765 100717283U, // CTERMEQ_XX 1766 100715055U, // CTERMNE_WW 1767 100715055U, // CTERMNE_XX 1768 0U, // CompilerBarrier 1769 73783U, // DCPS1 1770 74210U, // DCPS2 1771 74276U, // DCPS3 1772 805356639U, // DECB_XPiI 1773 805357881U, // DECD_XPiI 1774 805325113U, // DECD_ZPiI 1775 805358553U, // DECH_XPiI 1776 8416217U, // DECH_ZPiI 1777 436261351U, // DECP_XP_B 1778 268489191U, // DECP_XP_D 1779 201380327U, // DECP_XP_H 1780 469815783U, // DECP_XP_S 1781 134238695U, // DECP_ZP_D 1782 846754279U, // DECP_ZP_H 1783 167809511U, // DECP_ZP_S 1784 805361934U, // DECW_XPiI 1785 805345550U, // DECW_ZPiI 1786 116278U, // DMB 1787 7210U, // DRPS 1788 116612U, // DSB 1789 872435935U, // DUPM_ZI 1790 905982627U, // DUP_ZI_B 1791 939545251U, // DUP_ZI_D 1792 8942243U, // DUP_ZI_H 1793 973116067U, // DUP_ZI_S 1794 100676259U, // DUP_ZR_B 1795 100684451U, // DUP_ZR_D 1796 848327331U, // DUP_ZR_H 1797 100700835U, // DUP_ZR_S 1798 436220579U, // DUP_ZZI_B 1799 268456611U, // DUP_ZZI_D 1800 1012953763U, // DUP_ZZI_H 1801 10089123U, // DUP_ZZI_Q 1802 469799587U, // DUP_ZZI_S 1803 101757603U, // DUPv16i8gpr 1804 2215686819U, // DUPv16i8lane 1805 102281891U, // DUPv2i32gpr 1806 2216211107U, // DUPv2i32lane 1807 102806179U, // DUPv2i64gpr 1808 69251747U, // DUPv2i64lane 1809 103330467U, // DUPv4i16gpr 1810 69776035U, // DUPv4i16lane 1811 103854755U, // DUPv4i32gpr 1812 2217783971U, // DUPv4i32lane 1813 104379043U, // DUPv8i16gpr 1814 70824611U, // DUPv8i16lane 1815 104903331U, // DUPv8i8gpr 1816 2218832547U, // DUPv8i8lane 1817 0U, // EMITBKEY 1818 0U, // EONWrr 1819 2248200500U, // EONWrs 1820 0U, // EONXrr 1821 2248200500U, // EONXrs 1822 68198942U, // EOR3 1823 2415936030U, // EOR3_ZZZZ_D 1824 637547947U, // EORBT_ZZZ_B 1825 2281723307U, // EORBT_ZZZ_D 1826 2390259115U, // EORBT_ZZZ_H 1827 2315294123U, // EORBT_ZZZ_S 1828 2516596050U, // EORS_PPzPP 1829 637544416U, // EORTB_ZZZ_B 1830 2281719776U, // EORTB_ZZZ_D 1831 2390255584U, // EORTB_ZZZ_H 1832 2315290592U, // EORTB_ZZZ_S 1833 2516637826U, // EORV_VPZ_B 1834 2516637826U, // EORV_VPZ_D 1835 2516637826U, // EORV_VPZ_H 1836 2516637826U, // EORV_VPZ_S 1837 2248201161U, // EORWri 1838 0U, // EORWrr 1839 2248201161U, // EORWrs 1840 2248201161U, // EORXri 1841 0U, // EORXrr 1842 2248201161U, // EORXrs 1843 2516595657U, // EOR_PPzPP 1844 2415940553U, // EOR_ZI 1845 369112009U, // EOR_ZPmZ_B 1846 369120201U, // EOR_ZPmZ_D 1847 2555933641U, // EOR_ZPmZ_H 1848 369136585U, // EOR_ZPmZ_S 1849 2415940553U, // EOR_ZZZ 1850 68203465U, // EORv16i8 1851 2218832841U, // EORv8i8 1852 7215U, // ERET 1853 7158U, // ERETAA 1854 7165U, // ERETAB 1855 2248201238U, // EXTRWrri 1856 2248201238U, // EXTRXrri 1857 2583705540U, // EXT_ZZI 1858 3187685316U, // EXT_ZZI_B 1859 68204484U, // EXTv16i8 1860 2218833860U, // EXTv8i8 1861 0U, // F128CSEL 1862 2248198430U, // FABD16 1863 2248198430U, // FABD32 1864 2248198430U, // FABD64 1865 369117470U, // FABD_ZPmZ_D 1866 2555930910U, // FABD_ZPmZ_H 1867 369133854U, // FABD_ZPmZ_S 1868 2216208670U, // FABDv2f32 1869 2216732958U, // FABDv2f64 1870 69773598U, // FABDv4f16 1871 70297886U, // FABDv4f32 1872 2218305822U, // FABDv8f16 1873 100717707U, // FABSDr 1874 100717707U, // FABSHr 1875 100717707U, // FABSSr 1876 2147505291U, // FABS_ZPmZ_D 1877 34108555U, // FABS_ZPmZ_H 1878 38027U, // FABS_ZPmZ_S 1879 2216211595U, // FABSv2f32 1880 69252235U, // FABSv2f64 1881 2217260171U, // FABSv4f16 1882 70300811U, // FABSv4f32 1883 2218308747U, // FABSv8f16 1884 2248198635U, // FACGE16 1885 2248198635U, // FACGE32 1886 2248198635U, // FACGE64 1887 2516601323U, // FACGE_PPzZZ_D 1888 2824366571U, // FACGE_PPzZZ_H 1889 2516617707U, // FACGE_PPzZZ_S 1890 2216208875U, // FACGEv2f32 1891 2216733163U, // FACGEv2f64 1892 69773803U, // FACGEv4f16 1893 70298091U, // FACGEv4f32 1894 2218306027U, // FACGEv8f16 1895 2248201671U, // FACGT16 1896 2248201671U, // FACGT32 1897 2248201671U, // FACGT64 1898 2516604359U, // FACGT_PPzZZ_D 1899 2824369607U, // FACGT_PPzZZ_H 1900 2516620743U, // FACGT_PPzZZ_S 1901 2216211911U, // FACGTv2f32 1902 2216736199U, // FACGTv2f64 1903 69776839U, // FACGTv4f16 1904 70301127U, // FACGTv4f32 1905 2218309063U, // FACGTv8f16 1906 2516632216U, // FADDA_VPZ_D 1907 2516632216U, // FADDA_VPZ_H 1908 2516632216U, // FADDA_VPZ_S 1909 2248198509U, // FADDDrr 1910 2248198509U, // FADDHrr 1911 369119749U, // FADDP_ZPmZZ_D 1912 2555933189U, // FADDP_ZPmZZ_H 1913 369136133U, // FADDP_ZPmZZ_S 1914 2216210949U, // FADDPv2f32 1915 2216735237U, // FADDPv2f64 1916 67162629U, // FADDPv2i16p 1917 2214646277U, // FADDPv2i32p 1918 67162629U, // FADDPv2i64p 1919 69775877U, // FADDPv4f16 1920 70300165U, // FADDPv4f32 1921 2218308101U, // FADDPv8f16 1922 2248198509U, // FADDSrr 1923 2516637696U, // FADDV_VPZ_D 1924 2516637696U, // FADDV_VPZ_H 1925 2516637696U, // FADDV_VPZ_S 1926 369117549U, // FADD_ZPmI_D 1927 2555930989U, // FADD_ZPmI_H 1928 369133933U, // FADD_ZPmI_S 1929 369117549U, // FADD_ZPmZ_D 1930 2555930989U, // FADD_ZPmZ_H 1931 369133933U, // FADD_ZPmZ_S 1932 2415937901U, // FADD_ZZZ_D 1933 2388683117U, // FADD_ZZZ_H 1934 2617280877U, // FADD_ZZZ_S 1935 2216208749U, // FADDv2f32 1936 2216733037U, // FADDv2f64 1937 69773677U, // FADDv4f16 1938 70297965U, // FADDv4f32 1939 2218305901U, // FADDv8f16 1940 369117527U, // FCADD_ZPmZ_D 1941 2555930967U, // FCADD_ZPmZ_H 1942 369133911U, // FCADD_ZPmZ_S 1943 2216208727U, // FCADDv2f32 1944 2216733015U, // FCADDv2f64 1945 69773655U, // FCADDv4f16 1946 70297943U, // FCADDv4f32 1947 2218305879U, // FCADDv8f16 1948 2248200765U, // FCCMPDrr 1949 2248198735U, // FCCMPEDrr 1950 2248198735U, // FCCMPEHrr 1951 2248198735U, // FCCMPESrr 1952 2248200765U, // FCCMPHrr 1953 2248200765U, // FCCMPSrr 1954 2248200924U, // FCMEQ16 1955 2248200924U, // FCMEQ32 1956 2248200924U, // FCMEQ64 1957 2516603612U, // FCMEQ_PPzZ0_D 1958 2824368860U, // FCMEQ_PPzZ0_H 1959 2516619996U, // FCMEQ_PPzZ0_S 1960 2516603612U, // FCMEQ_PPzZZ_D 1961 2824368860U, // FCMEQ_PPzZZ_H 1962 2516619996U, // FCMEQ_PPzZZ_S 1963 2248200924U, // FCMEQv1i16rz 1964 2248200924U, // FCMEQv1i32rz 1965 2248200924U, // FCMEQv1i64rz 1966 2216211164U, // FCMEQv2f32 1967 2216735452U, // FCMEQv2f64 1968 68727516U, // FCMEQv2i32rz 1969 2216735452U, // FCMEQv2i64rz 1970 69776092U, // FCMEQv4f16 1971 70300380U, // FCMEQv4f32 1972 69776092U, // FCMEQv4i16rz 1973 2217784028U, // FCMEQv4i32rz 1974 2218308316U, // FCMEQv8f16 1975 70824668U, // FCMEQv8i16rz 1976 2248198651U, // FCMGE16 1977 2248198651U, // FCMGE32 1978 2248198651U, // FCMGE64 1979 2516601339U, // FCMGE_PPzZ0_D 1980 2824366587U, // FCMGE_PPzZ0_H 1981 2516617723U, // FCMGE_PPzZ0_S 1982 2516601339U, // FCMGE_PPzZZ_D 1983 2824366587U, // FCMGE_PPzZZ_H 1984 2516617723U, // FCMGE_PPzZZ_S 1985 2248198651U, // FCMGEv1i16rz 1986 2248198651U, // FCMGEv1i32rz 1987 2248198651U, // FCMGEv1i64rz 1988 2216208891U, // FCMGEv2f32 1989 2216733179U, // FCMGEv2f64 1990 68725243U, // FCMGEv2i32rz 1991 2216733179U, // FCMGEv2i64rz 1992 69773819U, // FCMGEv4f16 1993 70298107U, // FCMGEv4f32 1994 69773819U, // FCMGEv4i16rz 1995 2217781755U, // FCMGEv4i32rz 1996 2218306043U, // FCMGEv8f16 1997 70822395U, // FCMGEv8i16rz 1998 2248201687U, // FCMGT16 1999 2248201687U, // FCMGT32 2000 2248201687U, // FCMGT64 2001 2516604375U, // FCMGT_PPzZ0_D 2002 2824369623U, // FCMGT_PPzZ0_H 2003 2516620759U, // FCMGT_PPzZ0_S 2004 2516604375U, // FCMGT_PPzZZ_D 2005 2824369623U, // FCMGT_PPzZZ_H 2006 2516620759U, // FCMGT_PPzZZ_S 2007 2248201687U, // FCMGTv1i16rz 2008 2248201687U, // FCMGTv1i32rz 2009 2248201687U, // FCMGTv1i64rz 2010 2216211927U, // FCMGTv2f32 2011 2216736215U, // FCMGTv2f64 2012 68728279U, // FCMGTv2i32rz 2013 2216736215U, // FCMGTv2i64rz 2014 69776855U, // FCMGTv4f16 2015 70301143U, // FCMGTv4f32 2016 69776855U, // FCMGTv4i16rz 2017 2217784791U, // FCMGTv4i32rz 2018 2218309079U, // FCMGTv8f16 2019 70825431U, // FCMGTv8i16rz 2020 369115841U, // FCMLA_ZPmZZ_D 2021 2555929281U, // FCMLA_ZPmZZ_H 2022 369132225U, // FCMLA_ZPmZZ_S 2023 2390254273U, // FCMLA_ZZZI_H 2024 2315289281U, // FCMLA_ZZZI_S 2025 2484658881U, // FCMLAv2f32 2026 2485183169U, // FCMLAv2f64 2027 338223809U, // FCMLAv4f16 2028 338223809U, // FCMLAv4f16_indexed 2029 338748097U, // FCMLAv4f32 2030 338748097U, // FCMLAv4f32_indexed 2031 2486756033U, // FCMLAv8f16 2032 2486756033U, // FCMLAv8f16_indexed 2033 2516601370U, // FCMLE_PPzZ0_D 2034 2824366618U, // FCMLE_PPzZ0_H 2035 2516617754U, // FCMLE_PPzZ0_S 2036 2248198682U, // FCMLEv1i16rz 2037 2248198682U, // FCMLEv1i32rz 2038 2248198682U, // FCMLEv1i64rz 2039 68725274U, // FCMLEv2i32rz 2040 2216733210U, // FCMLEv2i64rz 2041 69773850U, // FCMLEv4i16rz 2042 2217781786U, // FCMLEv4i32rz 2043 70822426U, // FCMLEv8i16rz 2044 2516604571U, // FCMLT_PPzZ0_D 2045 2824369819U, // FCMLT_PPzZ0_H 2046 2516620955U, // FCMLT_PPzZ0_S 2047 2248201883U, // FCMLTv1i16rz 2048 2248201883U, // FCMLTv1i32rz 2049 2248201883U, // FCMLTv1i64rz 2050 68728475U, // FCMLTv2i32rz 2051 2216736411U, // FCMLTv2i64rz 2052 69777051U, // FCMLTv4i16rz 2053 2217784987U, // FCMLTv4i32rz 2054 70825627U, // FCMLTv8i16rz 2055 2516601384U, // FCMNE_PPzZ0_D 2056 2824366632U, // FCMNE_PPzZ0_H 2057 2516617768U, // FCMNE_PPzZ0_S 2058 2516601384U, // FCMNE_PPzZZ_D 2059 2824366632U, // FCMNE_PPzZZ_H 2060 2516617768U, // FCMNE_PPzZZ_S 2061 10539588U, // FCMPDri 2062 100717124U, // FCMPDrr 2063 10537559U, // FCMPEDri 2064 100715095U, // FCMPEDrr 2065 10537559U, // FCMPEHri 2066 100715095U, // FCMPEHrr 2067 10537559U, // FCMPESri 2068 100715095U, // FCMPESrr 2069 10539588U, // FCMPHri 2070 100717124U, // FCMPHrr 2071 10539588U, // FCMPSri 2072 100717124U, // FCMPSrr 2073 2516603345U, // FCMUO_PPzZZ_D 2074 2824368593U, // FCMUO_PPzZZ_H 2075 2516619729U, // FCMUO_PPzZZ_S 2076 2147506758U, // FCPY_ZPmI_D 2077 1074297414U, // FCPY_ZPmI_H 2078 2147523142U, // FCPY_ZPmI_S 2079 2248200065U, // FCSELDrrr 2080 2248200065U, // FCSELHrrr 2081 2248200065U, // FCSELSrrr 2082 100717699U, // FCVTASUWDr 2083 100717699U, // FCVTASUWHr 2084 100717699U, // FCVTASUWSr 2085 100717699U, // FCVTASUXDr 2086 100717699U, // FCVTASUXHr 2087 100717699U, // FCVTASUXSr 2088 100717699U, // FCVTASv1f16 2089 100717699U, // FCVTASv1i32 2090 100717699U, // FCVTASv1i64 2091 2216211587U, // FCVTASv2f32 2092 69252227U, // FCVTASv2f64 2093 2217260163U, // FCVTASv4f16 2094 70300803U, // FCVTASv4f32 2095 2218308739U, // FCVTASv8f16 2096 100718544U, // FCVTAUUWDr 2097 100718544U, // FCVTAUUWHr 2098 100718544U, // FCVTAUUWSr 2099 100718544U, // FCVTAUUXDr 2100 100718544U, // FCVTAUUXHr 2101 100718544U, // FCVTAUUXSr 2102 100718544U, // FCVTAUv1f16 2103 100718544U, // FCVTAUv1i32 2104 100718544U, // FCVTAUv1i64 2105 2216212432U, // FCVTAUv2f32 2106 69253072U, // FCVTAUv2f64 2107 2217261008U, // FCVTAUv4f16 2108 70301648U, // FCVTAUv4f32 2109 2218309584U, // FCVTAUv8f16 2110 100718493U, // FCVTDHr 2111 100718493U, // FCVTDSr 2112 100718493U, // FCVTHDr 2113 100718493U, // FCVTHSr 2114 2147522251U, // FCVTLT_ZPmZ_HtoS 2115 22219U, // FCVTLT_ZPmZ_StoD 2116 2216734818U, // FCVTLv2i32 2117 2217783394U, // FCVTLv4i16 2118 69247313U, // FCVTLv4i32 2119 2217779537U, // FCVTLv8i16 2120 100717836U, // FCVTMSUWDr 2121 100717836U, // FCVTMSUWHr 2122 100717836U, // FCVTMSUWSr 2123 100717836U, // FCVTMSUXDr 2124 100717836U, // FCVTMSUXHr 2125 100717836U, // FCVTMSUXSr 2126 100717836U, // FCVTMSv1f16 2127 100717836U, // FCVTMSv1i32 2128 100717836U, // FCVTMSv1i64 2129 2216211724U, // FCVTMSv2f32 2130 69252364U, // FCVTMSv2f64 2131 2217260300U, // FCVTMSv4f16 2132 70300940U, // FCVTMSv4f32 2133 2218308876U, // FCVTMSv8f16 2134 100718560U, // FCVTMUUWDr 2135 100718560U, // FCVTMUUWHr 2136 100718560U, // FCVTMUUWSr 2137 100718560U, // FCVTMUUXDr 2138 100718560U, // FCVTMUUXHr 2139 100718560U, // FCVTMUUXSr 2140 100718560U, // FCVTMUv1f16 2141 100718560U, // FCVTMUv1i32 2142 100718560U, // FCVTMUv1i64 2143 2216212448U, // FCVTMUv2f32 2144 69253088U, // FCVTMUv2f64 2145 2217261024U, // FCVTMUv4f16 2146 70301664U, // FCVTMUv4f32 2147 2218309600U, // FCVTMUv8f16 2148 100717862U, // FCVTNSUWDr 2149 100717862U, // FCVTNSUWHr 2150 100717862U, // FCVTNSUWSr 2151 100717862U, // FCVTNSUXDr 2152 100717862U, // FCVTNSUXHr 2153 100717862U, // FCVTNSUXSr 2154 100717862U, // FCVTNSv1f16 2155 100717862U, // FCVTNSv1i32 2156 100717862U, // FCVTNSv1i64 2157 2216211750U, // FCVTNSv2f32 2158 69252390U, // FCVTNSv2f64 2159 2217260326U, // FCVTNSv4f16 2160 70300966U, // FCVTNSv4f32 2161 2218308902U, // FCVTNSv8f16 2162 2147522330U, // FCVTNT_ZPmZ_DtoS 2163 1107851034U, // FCVTNT_ZPmZ_StoH 2164 100718568U, // FCVTNUUWDr 2165 100718568U, // FCVTNUUWHr 2166 100718568U, // FCVTNUUWSr 2167 100718568U, // FCVTNUUXDr 2168 100718568U, // FCVTNUUXHr 2169 100718568U, // FCVTNUUXSr 2170 100718568U, // FCVTNUv1f16 2171 100718568U, // FCVTNUv1i32 2172 100718568U, // FCVTNUv1i64 2173 2216212456U, // FCVTNUv2f32 2174 69253096U, // FCVTNUv2f64 2175 2217261032U, // FCVTNUv4f16 2176 70301672U, // FCVTNUv4f32 2177 2218309608U, // FCVTNUv8f16 2178 68727144U, // FCVTNv2i32 2179 69775720U, // FCVTNv4i16 2180 338747799U, // FCVTNv4i32 2181 339272087U, // FCVTNv8i16 2182 100717885U, // FCVTPSUWDr 2183 100717885U, // FCVTPSUWHr 2184 100717885U, // FCVTPSUWSr 2185 100717885U, // FCVTPSUXDr 2186 100717885U, // FCVTPSUXHr 2187 100717885U, // FCVTPSUXSr 2188 100717885U, // FCVTPSv1f16 2189 100717885U, // FCVTPSv1i32 2190 100717885U, // FCVTPSv1i64 2191 2216211773U, // FCVTPSv2f32 2192 69252413U, // FCVTPSv2f64 2193 2217260349U, // FCVTPSv4f16 2194 70300989U, // FCVTPSv4f32 2195 2218308925U, // FCVTPSv8f16 2196 100718576U, // FCVTPUUWDr 2197 100718576U, // FCVTPUUWHr 2198 100718576U, // FCVTPUUWSr 2199 100718576U, // FCVTPUUXDr 2200 100718576U, // FCVTPUUXHr 2201 100718576U, // FCVTPUUXSr 2202 100718576U, // FCVTPUv1f16 2203 100718576U, // FCVTPUv1i32 2204 100718576U, // FCVTPUv1i64 2205 2216212464U, // FCVTPUv2f32 2206 69253104U, // FCVTPUv2f64 2207 2217261040U, // FCVTPUv4f16 2208 70301680U, // FCVTPUv4f32 2209 2218309616U, // FCVTPUv8f16 2210 100718493U, // FCVTSDr 2211 100718493U, // FCVTSHr 2212 2147522384U, // FCVTXNT_ZPmZ_DtoS 2213 100716958U, // FCVTXNv1i64 2214 68727198U, // FCVTXNv2f32 2215 338747853U, // FCVTXNv4f32 2216 2147523126U, // FCVTX_ZPmZ_DtoS 2217 2248201586U, // FCVTZSSWDri 2218 2248201586U, // FCVTZSSWHri 2219 2248201586U, // FCVTZSSWSri 2220 2248201586U, // FCVTZSSXDri 2221 2248201586U, // FCVTZSSXHri 2222 2248201586U, // FCVTZSSXSri 2223 100717938U, // FCVTZSUWDr 2224 100717938U, // FCVTZSUWHr 2225 100717938U, // FCVTZSUWSr 2226 100717938U, // FCVTZSUXDr 2227 100717938U, // FCVTZSUXHr 2228 100717938U, // FCVTZSUXSr 2229 2147505522U, // FCVTZS_ZPmZ_DtoD 2230 2147521906U, // FCVTZS_ZPmZ_DtoS 2231 2147505522U, // FCVTZS_ZPmZ_HtoD 2232 34108786U, // FCVTZS_ZPmZ_HtoH 2233 2147521906U, // FCVTZS_ZPmZ_HtoS 2234 21874U, // FCVTZS_ZPmZ_StoD 2235 38258U, // FCVTZS_ZPmZ_StoS 2236 2248201586U, // FCVTZSd 2237 2248201586U, // FCVTZSh 2238 2248201586U, // FCVTZSs 2239 100717938U, // FCVTZSv1f16 2240 100717938U, // FCVTZSv1i32 2241 100717938U, // FCVTZSv1i64 2242 2216211826U, // FCVTZSv2f32 2243 69252466U, // FCVTZSv2f64 2244 2216211826U, // FCVTZSv2i32_shift 2245 2216736114U, // FCVTZSv2i64_shift 2246 2217260402U, // FCVTZSv4f16 2247 70301042U, // FCVTZSv4f32 2248 69776754U, // FCVTZSv4i16_shift 2249 70301042U, // FCVTZSv4i32_shift 2250 2218308978U, // FCVTZSv8f16 2251 2218308978U, // FCVTZSv8i16_shift 2252 2248202232U, // FCVTZUSWDri 2253 2248202232U, // FCVTZUSWHri 2254 2248202232U, // FCVTZUSWSri 2255 2248202232U, // FCVTZUSXDri 2256 2248202232U, // FCVTZUSXHri 2257 2248202232U, // FCVTZUSXSri 2258 100718584U, // FCVTZUUWDr 2259 100718584U, // FCVTZUUWHr 2260 100718584U, // FCVTZUUWSr 2261 100718584U, // FCVTZUUXDr 2262 100718584U, // FCVTZUUXHr 2263 100718584U, // FCVTZUUXSr 2264 2147506168U, // FCVTZU_ZPmZ_DtoD 2265 2147522552U, // FCVTZU_ZPmZ_DtoS 2266 2147506168U, // FCVTZU_ZPmZ_HtoD 2267 34109432U, // FCVTZU_ZPmZ_HtoH 2268 2147522552U, // FCVTZU_ZPmZ_HtoS 2269 22520U, // FCVTZU_ZPmZ_StoD 2270 38904U, // FCVTZU_ZPmZ_StoS 2271 2248202232U, // FCVTZUd 2272 2248202232U, // FCVTZUh 2273 2248202232U, // FCVTZUs 2274 100718584U, // FCVTZUv1f16 2275 100718584U, // FCVTZUv1i32 2276 100718584U, // FCVTZUv1i64 2277 2216212472U, // FCVTZUv2f32 2278 69253112U, // FCVTZUv2f64 2279 2216212472U, // FCVTZUv2i32_shift 2280 2216736760U, // FCVTZUv2i64_shift 2281 2217261048U, // FCVTZUv4f16 2282 70301688U, // FCVTZUv4f32 2283 69777400U, // FCVTZUv4i16_shift 2284 70301688U, // FCVTZUv4i32_shift 2285 2218309624U, // FCVTZUv8f16 2286 2218309624U, // FCVTZUv8i16_shift 2287 1141405597U, // FCVT_ZPmZ_DtoH 2288 2147522461U, // FCVT_ZPmZ_DtoS 2289 2147506077U, // FCVT_ZPmZ_HtoD 2290 2147522461U, // FCVT_ZPmZ_HtoS 2291 22429U, // FCVT_ZPmZ_StoD 2292 1107851165U, // FCVT_ZPmZ_StoH 2293 2248202272U, // FDIVDrr 2294 2248202272U, // FDIVHrr 2295 369120311U, // FDIVR_ZPmZ_D 2296 2555933751U, // FDIVR_ZPmZ_H 2297 369136695U, // FDIVR_ZPmZ_S 2298 2248202272U, // FDIVSrr 2299 369121312U, // FDIV_ZPmZ_D 2300 2555934752U, // FDIV_ZPmZ_H 2301 369137696U, // FDIV_ZPmZ_S 2302 2216212512U, // FDIVv2f32 2303 2216736800U, // FDIVv2f64 2304 69777440U, // FDIVv4f16 2305 70301728U, // FDIVv4f32 2306 2218309664U, // FDIVv8f16 2307 1174426274U, // FDUP_ZI_D 2308 11039394U, // FDUP_ZI_H 2309 1174442658U, // FDUP_ZI_S 2310 268452603U, // FEXPA_ZZ_D 2311 845177595U, // FEXPA_ZZ_H 2312 469795579U, // FEXPA_ZZ_S 2313 100717946U, // FJCVTZS 2314 2147501209U, // FLOGB_ZPmZ_D 2315 34104473U, // FLOGB_ZPmZ_H 2316 33945U, // FLOGB_ZPmZ_S 2317 2248198545U, // FMADDDrrr 2318 2248198545U, // FMADDHrrr 2319 2248198545U, // FMADDSrrr 2320 369117450U, // FMAD_ZPmZZ_D 2321 2555930890U, // FMAD_ZPmZZ_H 2322 369133834U, // FMAD_ZPmZZ_S 2323 2248202724U, // FMAXDrr 2324 2248202724U, // FMAXHrr 2325 2248200407U, // FMAXNMDrr 2326 2248200407U, // FMAXNMHrr 2327 369119827U, // FMAXNMP_ZPmZZ_D 2328 2555933267U, // FMAXNMP_ZPmZZ_H 2329 369136211U, // FMAXNMP_ZPmZZ_S 2330 2216211027U, // FMAXNMPv2f32 2331 2216735315U, // FMAXNMPv2f64 2332 67162707U, // FMAXNMPv2i16p 2333 2214646355U, // FMAXNMPv2i32p 2334 67162707U, // FMAXNMPv2i64p 2335 69775955U, // FMAXNMPv4f16 2336 70300243U, // FMAXNMPv4f32 2337 2218308179U, // FMAXNMPv8f16 2338 2248200407U, // FMAXNMSrr 2339 2516637771U, // FMAXNMV_VPZ_D 2340 2516637771U, // FMAXNMV_VPZ_H 2341 2516637771U, // FMAXNMV_VPZ_S 2342 2214647883U, // FMAXNMVv4i16v 2343 67164235U, // FMAXNMVv4i32v 2344 2214647883U, // FMAXNMVv8i16v 2345 369119447U, // FMAXNM_ZPmI_D 2346 2555932887U, // FMAXNM_ZPmI_H 2347 369135831U, // FMAXNM_ZPmI_S 2348 369119447U, // FMAXNM_ZPmZ_D 2349 2555932887U, // FMAXNM_ZPmZ_H 2350 369135831U, // FMAXNM_ZPmZ_S 2351 2216210647U, // FMAXNMv2f32 2352 2216734935U, // FMAXNMv2f64 2353 69775575U, // FMAXNMv4f16 2354 70299863U, // FMAXNMv4f32 2355 2218307799U, // FMAXNMv8f16 2356 369119924U, // FMAXP_ZPmZZ_D 2357 2555933364U, // FMAXP_ZPmZZ_H 2358 369136308U, // FMAXP_ZPmZZ_S 2359 2216211124U, // FMAXPv2f32 2360 2216735412U, // FMAXPv2f64 2361 67162804U, // FMAXPv2i16p 2362 2214646452U, // FMAXPv2i32p 2363 67162804U, // FMAXPv2i64p 2364 69776052U, // FMAXPv4f16 2365 70300340U, // FMAXPv4f32 2366 2218308276U, // FMAXPv8f16 2367 2248202724U, // FMAXSrr 2368 2516637832U, // FMAXV_VPZ_D 2369 2516637832U, // FMAXV_VPZ_H 2370 2516637832U, // FMAXV_VPZ_S 2371 2214647944U, // FMAXVv4i16v 2372 67164296U, // FMAXVv4i32v 2373 2214647944U, // FMAXVv8i16v 2374 369121764U, // FMAX_ZPmI_D 2375 2555935204U, // FMAX_ZPmI_H 2376 369138148U, // FMAX_ZPmI_S 2377 369121764U, // FMAX_ZPmZ_D 2378 2555935204U, // FMAX_ZPmZ_H 2379 369138148U, // FMAX_ZPmZ_S 2380 2216212964U, // FMAXv2f32 2381 2216737252U, // FMAXv2f64 2382 69777892U, // FMAXv4f16 2383 70302180U, // FMAXv4f32 2384 2218310116U, // FMAXv8f16 2385 2248200466U, // FMINDrr 2386 2248200466U, // FMINHrr 2387 2248200399U, // FMINNMDrr 2388 2248200399U, // FMINNMHrr 2389 369119818U, // FMINNMP_ZPmZZ_D 2390 2555933258U, // FMINNMP_ZPmZZ_H 2391 369136202U, // FMINNMP_ZPmZZ_S 2392 2216211018U, // FMINNMPv2f32 2393 2216735306U, // FMINNMPv2f64 2394 67162698U, // FMINNMPv2i16p 2395 2214646346U, // FMINNMPv2i32p 2396 67162698U, // FMINNMPv2i64p 2397 69775946U, // FMINNMPv4f16 2398 70300234U, // FMINNMPv4f32 2399 2218308170U, // FMINNMPv8f16 2400 2248200399U, // FMINNMSrr 2401 2516637762U, // FMINNMV_VPZ_D 2402 2516637762U, // FMINNMV_VPZ_H 2403 2516637762U, // FMINNMV_VPZ_S 2404 2214647874U, // FMINNMVv4i16v 2405 67164226U, // FMINNMVv4i32v 2406 2214647874U, // FMINNMVv8i16v 2407 369119439U, // FMINNM_ZPmI_D 2408 2555932879U, // FMINNM_ZPmI_H 2409 369135823U, // FMINNM_ZPmI_S 2410 369119439U, // FMINNM_ZPmZ_D 2411 2555932879U, // FMINNM_ZPmZ_H 2412 369135823U, // FMINNM_ZPmZ_S 2413 2216210639U, // FMINNMv2f32 2414 2216734927U, // FMINNMv2f64 2415 69775567U, // FMINNMv4f16 2416 70299855U, // FMINNMv4f32 2417 2218307791U, // FMINNMv8f16 2418 369119842U, // FMINP_ZPmZZ_D 2419 2555933282U, // FMINP_ZPmZZ_H 2420 369136226U, // FMINP_ZPmZZ_S 2421 2216211042U, // FMINPv2f32 2422 2216735330U, // FMINPv2f64 2423 67162722U, // FMINPv2i16p 2424 2214646370U, // FMINPv2i32p 2425 67162722U, // FMINPv2i64p 2426 69775970U, // FMINPv4f16 2427 70300258U, // FMINPv4f32 2428 2218308194U, // FMINPv8f16 2429 2248200466U, // FMINSrr 2430 2516637780U, // FMINV_VPZ_D 2431 2516637780U, // FMINV_VPZ_H 2432 2516637780U, // FMINV_VPZ_S 2433 2214647892U, // FMINVv4i16v 2434 67164244U, // FMINVv4i32v 2435 2214647892U, // FMINVv8i16v 2436 369119506U, // FMIN_ZPmI_D 2437 2555932946U, // FMIN_ZPmI_H 2438 369135890U, // FMIN_ZPmI_S 2439 369119506U, // FMIN_ZPmZ_D 2440 2555932946U, // FMIN_ZPmZ_H 2441 369135890U, // FMIN_ZPmZ_S 2442 2216210706U, // FMINv2f32 2443 2216734994U, // FMINv2f64 2444 69775634U, // FMINv4f16 2445 70299922U, // FMINv4f32 2446 2218307858U, // FMINv8f16 2447 337174709U, // FMLAL2lanev4f16 2448 338747573U, // FMLAL2lanev8f16 2449 337174709U, // FMLAL2v4f16 2450 338747573U, // FMLAL2v8f16 2451 2449507544U, // FMLALB_ZZZI_SHH 2452 2449507544U, // FMLALB_ZZZ_SHH 2453 2449511941U, // FMLALT_ZZZI_SHH 2454 2449511941U, // FMLALT_ZZZ_SHH 2455 337178291U, // FMLALlanev4f16 2456 338751155U, // FMLALlanev8f16 2457 337178291U, // FMLALv4f16 2458 338751155U, // FMLALv8f16 2459 369115848U, // FMLA_ZPmZZ_D 2460 2555929288U, // FMLA_ZPmZZ_H 2461 369132232U, // FMLA_ZPmZZ_S 2462 2281718472U, // FMLA_ZZZI_D 2463 2390254280U, // FMLA_ZZZI_H 2464 2315289288U, // FMLA_ZZZI_S 2465 2684445384U, // FMLAv1i16_indexed 2466 2684445384U, // FMLAv1i32_indexed 2467 2684445384U, // FMLAv1i64_indexed 2468 2484658888U, // FMLAv2f32 2469 2485183176U, // FMLAv2f64 2470 2484658888U, // FMLAv2i32_indexed 2471 2485183176U, // FMLAv2i64_indexed 2472 338223816U, // FMLAv4f16 2473 338748104U, // FMLAv4f32 2474 338223816U, // FMLAv4i16_indexed 2475 338748104U, // FMLAv4i32_indexed 2476 2486756040U, // FMLAv8f16 2477 2486756040U, // FMLAv8i16_indexed 2478 337174841U, // FMLSL2lanev4f16 2479 338747705U, // FMLSL2lanev8f16 2480 337174841U, // FMLSL2v4f16 2481 338747705U, // FMLSL2v8f16 2482 2449507841U, // FMLSLB_ZZZI_SHH 2483 2449507841U, // FMLSLB_ZZZ_SHH 2484 2449512115U, // FMLSLT_ZZZI_SHH 2485 2449512115U, // FMLSLT_ZZZ_SHH 2486 337178687U, // FMLSLlanev4f16 2487 338751551U, // FMLSLlanev8f16 2488 337178687U, // FMLSLv4f16 2489 338751551U, // FMLSLv8f16 2490 369120504U, // FMLS_ZPmZZ_D 2491 2555933944U, // FMLS_ZPmZZ_H 2492 369136888U, // FMLS_ZPmZZ_S 2493 2281723128U, // FMLS_ZZZI_D 2494 2390258936U, // FMLS_ZZZI_H 2495 2315293944U, // FMLS_ZZZI_S 2496 2684450040U, // FMLSv1i16_indexed 2497 2684450040U, // FMLSv1i32_indexed 2498 2684450040U, // FMLSv1i64_indexed 2499 2484663544U, // FMLSv2f32 2500 2485187832U, // FMLSv2f64 2501 2484663544U, // FMLSv2i32_indexed 2502 2485187832U, // FMLSv2i64_indexed 2503 338228472U, // FMLSv4f16 2504 338752760U, // FMLSv4f32 2505 338228472U, // FMLSv4i16_indexed 2506 338752760U, // FMLSv4i32_indexed 2507 2486760696U, // FMLSv8f16 2508 2486760696U, // FMLSv8i16_indexed 2509 0U, // FMOVD0 2510 67164272U, // FMOVDXHighr 2511 100718704U, // FMOVDXr 2512 1174460528U, // FMOVDi 2513 100718704U, // FMOVDr 2514 0U, // FMOVH0 2515 100718704U, // FMOVHWr 2516 100718704U, // FMOVHXr 2517 1174460528U, // FMOVHi 2518 100718704U, // FMOVHr 2519 0U, // FMOVS0 2520 100718704U, // FMOVSWr 2521 1174460528U, // FMOVSi 2522 100718704U, // FMOVSr 2523 100718704U, // FMOVWHr 2524 100718704U, // FMOVWSr 2525 112244848U, // FMOVXDHighr 2526 100718704U, // FMOVXDr 2527 100718704U, // FMOVXHr 2528 1176025200U, // FMOVv2f32_ns 2529 1176549488U, // FMOVv2f64_ns 2530 1177073776U, // FMOVv4f16_ns 2531 1177598064U, // FMOVv4f32_ns 2532 1178122352U, // FMOVv8f16_ns 2533 369117070U, // FMSB_ZPmZZ_D 2534 2555930510U, // FMSB_ZPmZZ_H 2535 369133454U, // FMSB_ZPmZZ_S 2536 2248198159U, // FMSUBDrrr 2537 2248198159U, // FMSUBHrrr 2538 2248198159U, // FMSUBSrrr 2539 2248200297U, // FMULDrr 2540 2248200297U, // FMULHrr 2541 2248200297U, // FMULSrr 2542 2248202783U, // FMULX16 2543 2248202783U, // FMULX32 2544 2248202783U, // FMULX64 2545 369121823U, // FMULX_ZPmZ_D 2546 2555935263U, // FMULX_ZPmZ_H 2547 369138207U, // FMULX_ZPmZ_S 2548 2248202783U, // FMULXv1i16_indexed 2549 2248202783U, // FMULXv1i32_indexed 2550 2248202783U, // FMULXv1i64_indexed 2551 2216213023U, // FMULXv2f32 2552 2216737311U, // FMULXv2f64 2553 2216213023U, // FMULXv2i32_indexed 2554 2216737311U, // FMULXv2i64_indexed 2555 69777951U, // FMULXv4f16 2556 70302239U, // FMULXv4f32 2557 69777951U, // FMULXv4i16_indexed 2558 70302239U, // FMULXv4i32_indexed 2559 2218310175U, // FMULXv8f16 2560 2218310175U, // FMULXv8i16_indexed 2561 369119337U, // FMUL_ZPmI_D 2562 2555932777U, // FMUL_ZPmI_H 2563 369135721U, // FMUL_ZPmI_S 2564 369119337U, // FMUL_ZPmZ_D 2565 2555932777U, // FMUL_ZPmZ_H 2566 369135721U, // FMUL_ZPmZ_S 2567 2415939689U, // FMUL_ZZZI_D 2568 2388684905U, // FMUL_ZZZI_H 2569 2617282665U, // FMUL_ZZZI_S 2570 2415939689U, // FMUL_ZZZ_D 2571 2388684905U, // FMUL_ZZZ_H 2572 2617282665U, // FMUL_ZZZ_S 2573 2248200297U, // FMULv1i16_indexed 2574 2248200297U, // FMULv1i32_indexed 2575 2248200297U, // FMULv1i64_indexed 2576 2216210537U, // FMULv2f32 2577 2216734825U, // FMULv2f64 2578 2216210537U, // FMULv2i32_indexed 2579 2216734825U, // FMULv2i64_indexed 2580 69775465U, // FMULv4f16 2581 70299753U, // FMULv4f32 2582 69775465U, // FMULv4i16_indexed 2583 70299753U, // FMULv4i32_indexed 2584 2218307689U, // FMULv8f16 2585 2218307689U, // FMULv8i16_indexed 2586 100715201U, // FNEGDr 2587 100715201U, // FNEGHr 2588 100715201U, // FNEGSr 2589 2147502785U, // FNEG_ZPmZ_D 2590 34106049U, // FNEG_ZPmZ_H 2591 35521U, // FNEG_ZPmZ_S 2592 2216209089U, // FNEGv2f32 2593 69249729U, // FNEGv2f64 2594 2217257665U, // FNEGv4f16 2595 70298305U, // FNEGv4f32 2596 2218306241U, // FNEGv8f16 2597 2248198552U, // FNMADDDrrr 2598 2248198552U, // FNMADDHrrr 2599 2248198552U, // FNMADDSrrr 2600 369117456U, // FNMAD_ZPmZZ_D 2601 2555930896U, // FNMAD_ZPmZZ_H 2602 369133840U, // FNMAD_ZPmZZ_S 2603 369115854U, // FNMLA_ZPmZZ_D 2604 2555929294U, // FNMLA_ZPmZZ_H 2605 369132238U, // FNMLA_ZPmZZ_S 2606 369120510U, // FNMLS_ZPmZZ_D 2607 2555933950U, // FNMLS_ZPmZZ_H 2608 369136894U, // FNMLS_ZPmZZ_S 2609 369117076U, // FNMSB_ZPmZZ_D 2610 2555930516U, // FNMSB_ZPmZZ_H 2611 369133460U, // FNMSB_ZPmZZ_S 2612 2248198166U, // FNMSUBDrrr 2613 2248198166U, // FNMSUBHrrr 2614 2248198166U, // FNMSUBSrrr 2615 2248200303U, // FNMULDrr 2616 2248200303U, // FNMULHrr 2617 2248200303U, // FNMULSrr 2618 268454463U, // FRECPE_ZZ_D 2619 845179455U, // FRECPE_ZZ_H 2620 469797439U, // FRECPE_ZZ_S 2621 100715071U, // FRECPEv1f16 2622 100715071U, // FRECPEv1i32 2623 100715071U, // FRECPEv1i64 2624 2216208959U, // FRECPEv2f32 2625 69249599U, // FRECPEv2f64 2626 2217257535U, // FRECPEv4f16 2627 70298175U, // FRECPEv4f32 2628 2218306111U, // FRECPEv8f16 2629 2248201525U, // FRECPS16 2630 2248201525U, // FRECPS32 2631 2248201525U, // FRECPS64 2632 2415940917U, // FRECPS_ZZZ_D 2633 2388686133U, // FRECPS_ZZZ_H 2634 2617283893U, // FRECPS_ZZZ_S 2635 2216211765U, // FRECPSv2f32 2636 2216736053U, // FRECPSv2f64 2637 69776693U, // FRECPSv4f16 2638 70300981U, // FRECPSv4f32 2639 2218308917U, // FRECPSv8f16 2640 2147506726U, // FRECPX_ZPmZ_D 2641 34109990U, // FRECPX_ZPmZ_H 2642 39462U, // FRECPX_ZPmZ_S 2643 100719142U, // FRECPXv1f16 2644 100719142U, // FRECPXv1i32 2645 100719142U, // FRECPXv1i64 2646 100719050U, // FRINT32XDr 2647 100719050U, // FRINT32XSr 2648 2216212938U, // FRINT32Xv2f32 2649 69253578U, // FRINT32Xv2f64 2650 70302154U, // FRINT32Xv4f32 2651 100719180U, // FRINT32ZDr 2652 100719180U, // FRINT32ZSr 2653 2216213068U, // FRINT32Zv2f32 2654 69253708U, // FRINT32Zv2f64 2655 70302284U, // FRINT32Zv4f32 2656 100719060U, // FRINT64XDr 2657 100719060U, // FRINT64XSr 2658 2216212948U, // FRINT64Xv2f32 2659 69253588U, // FRINT64Xv2f64 2660 70302164U, // FRINT64Xv4f32 2661 100719190U, // FRINT64ZDr 2662 100719190U, // FRINT64ZSr 2663 2216213078U, // FRINT64Zv2f32 2664 69253718U, // FRINT64Zv2f64 2665 70302294U, // FRINT64Zv4f32 2666 100713274U, // FRINTADr 2667 100713274U, // FRINTAHr 2668 100713274U, // FRINTASr 2669 2147500858U, // FRINTA_ZPmZ_D 2670 34104122U, // FRINTA_ZPmZ_H 2671 33594U, // FRINTA_ZPmZ_S 2672 2216207162U, // FRINTAv2f32 2673 69247802U, // FRINTAv2f64 2674 2217255738U, // FRINTAv4f16 2675 70296378U, // FRINTAv4f32 2676 2218304314U, // FRINTAv8f16 2677 100716154U, // FRINTIDr 2678 100716154U, // FRINTIHr 2679 100716154U, // FRINTISr 2680 2147503738U, // FRINTI_ZPmZ_D 2681 34107002U, // FRINTI_ZPmZ_H 2682 36474U, // FRINTI_ZPmZ_S 2683 2216210042U, // FRINTIv2f32 2684 69250682U, // FRINTIv2f64 2685 2217258618U, // FRINTIv4f16 2686 70299258U, // FRINTIv4f32 2687 2218307194U, // FRINTIv8f16 2688 100716773U, // FRINTMDr 2689 100716773U, // FRINTMHr 2690 100716773U, // FRINTMSr 2691 2147504357U, // FRINTM_ZPmZ_D 2692 34107621U, // FRINTM_ZPmZ_H 2693 37093U, // FRINTM_ZPmZ_S 2694 2216210661U, // FRINTMv2f32 2695 69251301U, // FRINTMv2f64 2696 2217259237U, // FRINTMv4f16 2697 70299877U, // FRINTMv4f32 2698 2218307813U, // FRINTMv8f16 2699 100716896U, // FRINTNDr 2700 100716896U, // FRINTNHr 2701 100716896U, // FRINTNSr 2702 2147504480U, // FRINTN_ZPmZ_D 2703 34107744U, // FRINTN_ZPmZ_H 2704 37216U, // FRINTN_ZPmZ_S 2705 2216210784U, // FRINTNv2f32 2706 69251424U, // FRINTNv2f64 2707 2217259360U, // FRINTNv4f16 2708 70300000U, // FRINTNv4f32 2709 2218307936U, // FRINTNv8f16 2710 100717205U, // FRINTPDr 2711 100717205U, // FRINTPHr 2712 100717205U, // FRINTPSr 2713 2147504789U, // FRINTP_ZPmZ_D 2714 34108053U, // FRINTP_ZPmZ_H 2715 37525U, // FRINTP_ZPmZ_S 2716 2216211093U, // FRINTPv2f32 2717 69251733U, // FRINTPv2f64 2718 2217259669U, // FRINTPv4f16 2719 70300309U, // FRINTPv4f32 2720 2218308245U, // FRINTPv8f16 2721 100719150U, // FRINTXDr 2722 100719150U, // FRINTXHr 2723 100719150U, // FRINTXSr 2724 2147506734U, // FRINTX_ZPmZ_D 2725 34109998U, // FRINTX_ZPmZ_H 2726 39470U, // FRINTX_ZPmZ_S 2727 2216213038U, // FRINTXv2f32 2728 69253678U, // FRINTXv2f64 2729 2217261614U, // FRINTXv4f16 2730 70302254U, // FRINTXv4f32 2731 2218310190U, // FRINTXv8f16 2732 100719257U, // FRINTZDr 2733 100719257U, // FRINTZHr 2734 100719257U, // FRINTZSr 2735 2147506841U, // FRINTZ_ZPmZ_D 2736 34110105U, // FRINTZ_ZPmZ_H 2737 39577U, // FRINTZ_ZPmZ_S 2738 2216213145U, // FRINTZv2f32 2739 69253785U, // FRINTZv2f64 2740 2217261721U, // FRINTZv4f16 2741 70302361U, // FRINTZv4f32 2742 2218310297U, // FRINTZv8f16 2743 268454508U, // FRSQRTE_ZZ_D 2744 845179500U, // FRSQRTE_ZZ_H 2745 469797484U, // FRSQRTE_ZZ_S 2746 100715116U, // FRSQRTEv1f16 2747 100715116U, // FRSQRTEv1i32 2748 100715116U, // FRSQRTEv1i64 2749 2216209004U, // FRSQRTEv2f32 2750 69249644U, // FRSQRTEv2f64 2751 2217257580U, // FRSQRTEv4f16 2752 70298220U, // FRSQRTEv4f32 2753 2218306156U, // FRSQRTEv8f16 2754 2248201572U, // FRSQRTS16 2755 2248201572U, // FRSQRTS32 2756 2248201572U, // FRSQRTS64 2757 2415940964U, // FRSQRTS_ZZZ_D 2758 2388686180U, // FRSQRTS_ZZZ_H 2759 2617283940U, // FRSQRTS_ZZZ_S 2760 2216211812U, // FRSQRTSv2f32 2761 2216736100U, // FRSQRTSv2f64 2762 69776740U, // FRSQRTSv4f16 2763 70301028U, // FRSQRTSv4f32 2764 2218308964U, // FRSQRTSv8f16 2765 369117705U, // FSCALE_ZPmZ_D 2766 2555931145U, // FSCALE_ZPmZ_H 2767 369134089U, // FSCALE_ZPmZ_S 2768 100718457U, // FSQRTDr 2769 100718457U, // FSQRTHr 2770 100718457U, // FSQRTSr 2771 2147506041U, // FSQRT_ZPmZ_D 2772 34109305U, // FSQRT_ZPmZ_H 2773 38777U, // FSQRT_ZPmZ_S 2774 2216212345U, // FSQRTv2f32 2775 69252985U, // FSQRTv2f64 2776 2217260921U, // FSQRTv4f16 2777 70301561U, // FSQRTv4f32 2778 2218309497U, // FSQRTv8f16 2779 2248198139U, // FSUBDrr 2780 2248198139U, // FSUBHrr 2781 369120029U, // FSUBR_ZPmI_D 2782 2555933469U, // FSUBR_ZPmI_H 2783 369136413U, // FSUBR_ZPmI_S 2784 369120029U, // FSUBR_ZPmZ_D 2785 2555933469U, // FSUBR_ZPmZ_H 2786 369136413U, // FSUBR_ZPmZ_S 2787 2248198139U, // FSUBSrr 2788 369117179U, // FSUB_ZPmI_D 2789 2555930619U, // FSUB_ZPmI_H 2790 369133563U, // FSUB_ZPmI_S 2791 369117179U, // FSUB_ZPmZ_D 2792 2555930619U, // FSUB_ZPmZ_H 2793 369133563U, // FSUB_ZPmZ_S 2794 2415937531U, // FSUB_ZZZ_D 2795 2388682747U, // FSUB_ZZZ_H 2796 2617280507U, // FSUB_ZZZ_S 2797 2216208379U, // FSUBv2f32 2798 2216732667U, // FSUBv2f64 2799 69773307U, // FSUBv4f16 2800 70297595U, // FSUBv4f32 2801 2218305531U, // FSUBv8f16 2802 2415937815U, // FTMAD_ZZI_D 2803 2388683031U, // FTMAD_ZZI_H 2804 2617280791U, // FTMAD_ZZI_S 2805 2415939708U, // FTSMUL_ZZZ_D 2806 2388684924U, // FTSMUL_ZZZ_H 2807 2617282684U, // FTSMUL_ZZZ_S 2808 2415939464U, // FTSSEL_ZZZ_D 2809 2388684680U, // FTSSEL_ZZZ_H 2810 2617282440U, // FTSSEL_ZZZ_S 2811 2293891964U, // GLD1B_D_IMM_REAL 2812 2696545148U, // GLD1B_D_REAL 2813 2696545148U, // GLD1B_D_SXTW_REAL 2814 2696545148U, // GLD1B_D_UXTW_REAL 2815 2327454588U, // GLD1B_S_IMM_REAL 2816 2696553340U, // GLD1B_S_SXTW_REAL 2817 2696553340U, // GLD1B_S_UXTW_REAL 2818 2293893306U, // GLD1D_IMM_REAL 2819 2696546490U, // GLD1D_REAL 2820 2696546490U, // GLD1D_SCALED_REAL 2821 2696546490U, // GLD1D_SXTW_REAL 2822 2696546490U, // GLD1D_SXTW_SCALED_REAL 2823 2696546490U, // GLD1D_UXTW_REAL 2824 2696546490U, // GLD1D_UXTW_SCALED_REAL 2825 2293893877U, // GLD1H_D_IMM_REAL 2826 2696547061U, // GLD1H_D_REAL 2827 2696547061U, // GLD1H_D_SCALED_REAL 2828 2696547061U, // GLD1H_D_SXTW_REAL 2829 2696547061U, // GLD1H_D_SXTW_SCALED_REAL 2830 2696547061U, // GLD1H_D_UXTW_REAL 2831 2696547061U, // GLD1H_D_UXTW_SCALED_REAL 2832 2327456501U, // GLD1H_S_IMM_REAL 2833 2696555253U, // GLD1H_S_SXTW_REAL 2834 2696555253U, // GLD1H_S_SXTW_SCALED_REAL 2835 2696555253U, // GLD1H_S_UXTW_REAL 2836 2696555253U, // GLD1H_S_UXTW_SCALED_REAL 2837 2293892956U, // GLD1SB_D_IMM_REAL 2838 2696546140U, // GLD1SB_D_REAL 2839 2696546140U, // GLD1SB_D_SXTW_REAL 2840 2696546140U, // GLD1SB_D_UXTW_REAL 2841 2327455580U, // GLD1SB_S_IMM_REAL 2842 2696554332U, // GLD1SB_S_SXTW_REAL 2843 2696554332U, // GLD1SB_S_UXTW_REAL 2844 2293894560U, // GLD1SH_D_IMM_REAL 2845 2696547744U, // GLD1SH_D_REAL 2846 2696547744U, // GLD1SH_D_SCALED_REAL 2847 2696547744U, // GLD1SH_D_SXTW_REAL 2848 2696547744U, // GLD1SH_D_SXTW_SCALED_REAL 2849 2696547744U, // GLD1SH_D_UXTW_REAL 2850 2696547744U, // GLD1SH_D_UXTW_SCALED_REAL 2851 2327457184U, // GLD1SH_S_IMM_REAL 2852 2696555936U, // GLD1SH_S_SXTW_REAL 2853 2696555936U, // GLD1SH_S_SXTW_SCALED_REAL 2854 2696555936U, // GLD1SH_S_UXTW_REAL 2855 2696555936U, // GLD1SH_S_UXTW_SCALED_REAL 2856 2293897560U, // GLD1SW_D_IMM_REAL 2857 2696550744U, // GLD1SW_D_REAL 2858 2696550744U, // GLD1SW_D_SCALED_REAL 2859 2696550744U, // GLD1SW_D_SXTW_REAL 2860 2696550744U, // GLD1SW_D_SXTW_SCALED_REAL 2861 2696550744U, // GLD1SW_D_UXTW_REAL 2862 2696550744U, // GLD1SW_D_UXTW_SCALED_REAL 2863 2293897373U, // GLD1W_D_IMM_REAL 2864 2696550557U, // GLD1W_D_REAL 2865 2696550557U, // GLD1W_D_SCALED_REAL 2866 2696550557U, // GLD1W_D_SXTW_REAL 2867 2696550557U, // GLD1W_D_SXTW_SCALED_REAL 2868 2696550557U, // GLD1W_D_UXTW_REAL 2869 2696550557U, // GLD1W_D_UXTW_SCALED_REAL 2870 2327459997U, // GLD1W_IMM_REAL 2871 2696558749U, // GLD1W_SXTW_REAL 2872 2696558749U, // GLD1W_SXTW_SCALED_REAL 2873 2696558749U, // GLD1W_UXTW_REAL 2874 2696558749U, // GLD1W_UXTW_SCALED_REAL 2875 2293891970U, // GLDFF1B_D_IMM_REAL 2876 2696545154U, // GLDFF1B_D_REAL 2877 2696545154U, // GLDFF1B_D_SXTW_REAL 2878 2696545154U, // GLDFF1B_D_UXTW_REAL 2879 2327454594U, // GLDFF1B_S_IMM_REAL 2880 2696553346U, // GLDFF1B_S_SXTW_REAL 2881 2696553346U, // GLDFF1B_S_UXTW_REAL 2882 2293893312U, // GLDFF1D_IMM_REAL 2883 2696546496U, // GLDFF1D_REAL 2884 2696546496U, // GLDFF1D_SCALED_REAL 2885 2696546496U, // GLDFF1D_SXTW_REAL 2886 2696546496U, // GLDFF1D_SXTW_SCALED_REAL 2887 2696546496U, // GLDFF1D_UXTW_REAL 2888 2696546496U, // GLDFF1D_UXTW_SCALED_REAL 2889 2293893883U, // GLDFF1H_D_IMM_REAL 2890 2696547067U, // GLDFF1H_D_REAL 2891 2696547067U, // GLDFF1H_D_SCALED_REAL 2892 2696547067U, // GLDFF1H_D_SXTW_REAL 2893 2696547067U, // GLDFF1H_D_SXTW_SCALED_REAL 2894 2696547067U, // GLDFF1H_D_UXTW_REAL 2895 2696547067U, // GLDFF1H_D_UXTW_SCALED_REAL 2896 2327456507U, // GLDFF1H_S_IMM_REAL 2897 2696555259U, // GLDFF1H_S_SXTW_REAL 2898 2696555259U, // GLDFF1H_S_SXTW_SCALED_REAL 2899 2696555259U, // GLDFF1H_S_UXTW_REAL 2900 2696555259U, // GLDFF1H_S_UXTW_SCALED_REAL 2901 2293892963U, // GLDFF1SB_D_IMM_REAL 2902 2696546147U, // GLDFF1SB_D_REAL 2903 2696546147U, // GLDFF1SB_D_SXTW_REAL 2904 2696546147U, // GLDFF1SB_D_UXTW_REAL 2905 2327455587U, // GLDFF1SB_S_IMM_REAL 2906 2696554339U, // GLDFF1SB_S_SXTW_REAL 2907 2696554339U, // GLDFF1SB_S_UXTW_REAL 2908 2293894567U, // GLDFF1SH_D_IMM_REAL 2909 2696547751U, // GLDFF1SH_D_REAL 2910 2696547751U, // GLDFF1SH_D_SCALED_REAL 2911 2696547751U, // GLDFF1SH_D_SXTW_REAL 2912 2696547751U, // GLDFF1SH_D_SXTW_SCALED_REAL 2913 2696547751U, // GLDFF1SH_D_UXTW_REAL 2914 2696547751U, // GLDFF1SH_D_UXTW_SCALED_REAL 2915 2327457191U, // GLDFF1SH_S_IMM_REAL 2916 2696555943U, // GLDFF1SH_S_SXTW_REAL 2917 2696555943U, // GLDFF1SH_S_SXTW_SCALED_REAL 2918 2696555943U, // GLDFF1SH_S_UXTW_REAL 2919 2696555943U, // GLDFF1SH_S_UXTW_SCALED_REAL 2920 2293897567U, // GLDFF1SW_D_IMM_REAL 2921 2696550751U, // GLDFF1SW_D_REAL 2922 2696550751U, // GLDFF1SW_D_SCALED_REAL 2923 2696550751U, // GLDFF1SW_D_SXTW_REAL 2924 2696550751U, // GLDFF1SW_D_SXTW_SCALED_REAL 2925 2696550751U, // GLDFF1SW_D_UXTW_REAL 2926 2696550751U, // GLDFF1SW_D_UXTW_SCALED_REAL 2927 2293897379U, // GLDFF1W_D_IMM_REAL 2928 2696550563U, // GLDFF1W_D_REAL 2929 2696550563U, // GLDFF1W_D_SCALED_REAL 2930 2696550563U, // GLDFF1W_D_SXTW_REAL 2931 2696550563U, // GLDFF1W_D_SXTW_SCALED_REAL 2932 2696550563U, // GLDFF1W_D_UXTW_REAL 2933 2696550563U, // GLDFF1W_D_UXTW_SCALED_REAL 2934 2327460003U, // GLDFF1W_IMM_REAL 2935 2696558755U, // GLDFF1W_SXTW_REAL 2936 2696558755U, // GLDFF1W_SXTW_SCALED_REAL 2937 2696558755U, // GLDFF1W_UXTW_REAL 2938 2696558755U, // GLDFF1W_UXTW_SCALED_REAL 2939 2248199786U, // GMI 2940 153326U, // HINT 2941 2516604627U, // HISTCNT_ZPzZZ_D 2942 2516621011U, // HISTCNT_ZPzZZ_S 2943 2583702229U, // HISTSEG_ZZZ 2944 79460U, // HLT 2945 75952U, // HVC 2946 0U, // HWASAN_CHECK_MEMACCESS 2947 0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES 2948 805356655U, // INCB_XPiI 2949 805357897U, // INCD_XPiI 2950 805325129U, // INCD_ZPiI 2951 805358569U, // INCH_XPiI 2952 8416233U, // INCH_ZPiI 2953 436261367U, // INCP_XP_B 2954 268489207U, // INCP_XP_D 2955 201380343U, // INCP_XP_H 2956 469815799U, // INCP_XP_S 2957 134238711U, // INCP_ZP_D 2958 846754295U, // INCP_ZP_H 2959 167809527U, // INCP_ZP_S 2960 805361950U, // INCW_XPiI 2961 805345566U, // INCW_ZPiI 2962 2248161800U, // INDEX_II_B 2963 2248169992U, // INDEX_II_D 2964 2391833096U, // INDEX_II_H 2965 2248186376U, // INDEX_II_S 2966 2248161800U, // INDEX_IR_B 2967 2248169992U, // INDEX_IR_D 2968 2391833096U, // INDEX_IR_H 2969 2248186376U, // INDEX_IR_S 2970 2248161800U, // INDEX_RI_B 2971 2248169992U, // INDEX_RI_D 2972 2391833096U, // INDEX_RI_H 2973 2248186376U, // INDEX_RI_S 2974 2248161800U, // INDEX_RR_B 2975 2248169992U, // INDEX_RR_D 2976 2391833096U, // INDEX_RR_H 2977 2248186376U, // INDEX_RR_S 2978 536884223U, // INSR_ZR_B 2979 536892415U, // INSR_ZR_D 2980 851473407U, // INSR_ZR_H 2981 536908799U, // INSR_ZR_S 2982 536884223U, // INSR_ZV_B 2983 536892415U, // INSR_ZV_D 2984 851473407U, // INSR_ZV_H 2985 536908799U, // INSR_ZV_S 2986 784921876U, // INSvi16gpr 2987 1221129492U, // INSvi16lane 2988 785446164U, // INSvi32gpr 2989 3369137428U, // INSvi32lane 2990 783349012U, // INSvi64gpr 2991 1219556628U, // INSvi64lane 2992 785970452U, // INSvi8gpr 2993 3369661716U, // INSvi8lane 2994 2248198878U, // IRG 2995 0U, // IRGstack 2996 116617U, // ISB 2997 0U, // JumpTableDest16 2998 0U, // JumpTableDest32 2999 0U, // JumpTableDest8 3000 2516632387U, // LASTA_RPZ_B 3001 2516632387U, // LASTA_RPZ_D 3002 2516632387U, // LASTA_RPZ_H 3003 2516632387U, // LASTA_RPZ_S 3004 2516632387U, // LASTA_VPZ_B 3005 2516632387U, // LASTA_VPZ_D 3006 2516632387U, // LASTA_VPZ_H 3007 2516632387U, // LASTA_VPZ_S 3008 2516633576U, // LASTB_RPZ_B 3009 2516633576U, // LASTB_RPZ_D 3010 2516633576U, // LASTB_RPZ_H 3011 2516633576U, // LASTB_RPZ_S 3012 2516633576U, // LASTB_VPZ_B 3013 2516633576U, // LASTB_VPZ_D 3014 2516633576U, // LASTB_VPZ_H 3015 2516633576U, // LASTB_VPZ_S 3016 2696569724U, // LD1B 3017 2696545148U, // LD1B_D 3018 2696545148U, // LD1B_D_IMM 3019 2696577916U, // LD1B_H 3020 2696577916U, // LD1B_H_IMM 3021 2696569724U, // LD1B_IMM 3022 2696553340U, // LD1B_S 3023 2696553340U, // LD1B_S_IMM 3024 2696546490U, // LD1D 3025 2696546490U, // LD1D_IMM 3026 172064U, // LD1Fourv16b 3027 14860320U, // LD1Fourv16b_POST 3028 188448U, // LD1Fourv1d 3029 15400992U, // LD1Fourv1d_POST 3030 204832U, // LD1Fourv2d 3031 14893088U, // LD1Fourv2d_POST 3032 221216U, // LD1Fourv2s 3033 15433760U, // LD1Fourv2s_POST 3034 237600U, // LD1Fourv4h 3035 15450144U, // LD1Fourv4h_POST 3036 253984U, // LD1Fourv4s 3037 14942240U, // LD1Fourv4s_POST 3038 270368U, // LD1Fourv8b 3039 15482912U, // LD1Fourv8b_POST 3040 286752U, // LD1Fourv8h 3041 14975008U, // LD1Fourv8h_POST 3042 2696579829U, // LD1H 3043 2696547061U, // LD1H_D 3044 2696547061U, // LD1H_D_IMM 3045 2696579829U, // LD1H_IMM 3046 2696555253U, // LD1H_S 3047 2696555253U, // LD1H_S_IMM 3048 172064U, // LD1Onev16b 3049 15908896U, // LD1Onev16b_POST 3050 188448U, // LD1Onev1d 3051 16449568U, // LD1Onev1d_POST 3052 204832U, // LD1Onev2d 3053 15941664U, // LD1Onev2d_POST 3054 221216U, // LD1Onev2s 3055 16482336U, // LD1Onev2s_POST 3056 237600U, // LD1Onev4h 3057 16498720U, // LD1Onev4h_POST 3058 253984U, // LD1Onev4s 3059 15990816U, // LD1Onev4s_POST 3060 270368U, // LD1Onev8b 3061 16531488U, // LD1Onev8b_POST 3062 286752U, // LD1Onev8h 3063 16023584U, // LD1Onev8h_POST 3064 2696545992U, // LD1RB_D_IMM 3065 2696578760U, // LD1RB_H_IMM 3066 2696570568U, // LD1RB_IMM 3067 2696554184U, // LD1RB_S_IMM 3068 2696546756U, // LD1RD_IMM 3069 2696547596U, // LD1RH_D_IMM 3070 2696580364U, // LD1RH_IMM 3071 2696555788U, // LD1RH_S_IMM 3072 2696570560U, // LD1RQ_B 3073 2696570560U, // LD1RQ_B_IMM 3074 2696546748U, // LD1RQ_D 3075 2696546748U, // LD1RQ_D_IMM 3076 2696580356U, // LD1RQ_H 3077 2696580356U, // LD1RQ_H_IMM 3078 2696558912U, // LD1RQ_W 3079 2696558912U, // LD1RQ_W_IMM 3080 2696546203U, // LD1RSB_D_IMM 3081 2696578971U, // LD1RSB_H_IMM 3082 2696554395U, // LD1RSB_S_IMM 3083 2696547794U, // LD1RSH_D_IMM 3084 2696555986U, // LD1RSH_S_IMM 3085 2696550785U, // LD1RSW_IMM 3086 2696550728U, // LD1RW_D_IMM 3087 2696558920U, // LD1RW_IMM 3088 176883U, // LD1Rv16b 3089 16962291U, // LD1Rv16b_POST 3090 193267U, // LD1Rv1d 3091 16454387U, // LD1Rv1d_POST 3092 209651U, // LD1Rv2d 3093 16470771U, // LD1Rv2d_POST 3094 226035U, // LD1Rv2s 3095 17535731U, // LD1Rv2s_POST 3096 242419U, // LD1Rv4h 3097 18076403U, // LD1Rv4h_POST 3098 258803U, // LD1Rv4s 3099 17568499U, // LD1Rv4s_POST 3100 275187U, // LD1Rv8b 3101 17060595U, // LD1Rv8b_POST 3102 291571U, // LD1Rv8h 3103 18125555U, // LD1Rv8h_POST 3104 2696546140U, // LD1SB_D 3105 2696546140U, // LD1SB_D_IMM 3106 2696578908U, // LD1SB_H 3107 2696578908U, // LD1SB_H_IMM 3108 2696554332U, // LD1SB_S 3109 2696554332U, // LD1SB_S_IMM 3110 2696547744U, // LD1SH_D 3111 2696547744U, // LD1SH_D_IMM 3112 2696555936U, // LD1SH_S 3113 2696555936U, // LD1SH_S_IMM 3114 2696550744U, // LD1SW_D 3115 2696550744U, // LD1SW_D_IMM 3116 172064U, // LD1Threev16b 3117 18530336U, // LD1Threev16b_POST 3118 188448U, // LD1Threev1d 3119 19071008U, // LD1Threev1d_POST 3120 204832U, // LD1Threev2d 3121 18563104U, // LD1Threev2d_POST 3122 221216U, // LD1Threev2s 3123 19103776U, // LD1Threev2s_POST 3124 237600U, // LD1Threev4h 3125 19120160U, // LD1Threev4h_POST 3126 253984U, // LD1Threev4s 3127 18612256U, // LD1Threev4s_POST 3128 270368U, // LD1Threev8b 3129 19152928U, // LD1Threev8b_POST 3130 286752U, // LD1Threev8h 3131 18645024U, // LD1Threev8h_POST 3132 172064U, // LD1Twov16b 3133 15384608U, // LD1Twov16b_POST 3134 188448U, // LD1Twov1d 3135 15925280U, // LD1Twov1d_POST 3136 204832U, // LD1Twov2d 3137 15417376U, // LD1Twov2d_POST 3138 221216U, // LD1Twov2s 3139 15958048U, // LD1Twov2s_POST 3140 237600U, // LD1Twov4h 3141 15974432U, // LD1Twov4h_POST 3142 253984U, // LD1Twov4s 3143 15466528U, // LD1Twov4s_POST 3144 270368U, // LD1Twov8b 3145 16007200U, // LD1Twov8b_POST 3146 286752U, // LD1Twov8h 3147 15499296U, // LD1Twov8h_POST 3148 2696558749U, // LD1W 3149 2696550557U, // LD1W_D 3150 2696550557U, // LD1W_D_IMM 3151 2696558749U, // LD1W_IMM 3152 19701792U, // LD1i16 3153 20234272U, // LD1i16_POST 3154 19718176U, // LD1i32 3155 20774944U, // LD1i32_POST 3156 19734560U, // LD1i64 3157 21315616U, // LD1i64_POST 3158 19750944U, // LD1i8 3159 21856288U, // LD1i8_POST 3160 2696569785U, // LD2B 3161 2696569785U, // LD2B_IMM 3162 2696546534U, // LD2D 3163 2696546534U, // LD2D_IMM 3164 2696579890U, // LD2H 3165 2696579890U, // LD2H_IMM 3166 176889U, // LD2Rv16b 3167 18010873U, // LD2Rv16b_POST 3168 193273U, // LD2Rv1d 3169 15930105U, // LD2Rv1d_POST 3170 209657U, // LD2Rv2d 3171 15946489U, // LD2Rv2d_POST 3172 226041U, // LD2Rv2s 3173 16487161U, // LD2Rv2s_POST 3174 242425U, // LD2Rv4h 3175 17552121U, // LD2Rv4h_POST 3176 258809U, // LD2Rv4s 3177 16519929U, // LD2Rv4s_POST 3178 275193U, // LD2Rv8b 3179 18109177U, // LD2Rv8b_POST 3180 291577U, // LD2Rv8h 3181 17601273U, // LD2Rv8h_POST 3182 172162U, // LD2Twov16b 3183 15384706U, // LD2Twov16b_POST 3184 204930U, // LD2Twov2d 3185 15417474U, // LD2Twov2d_POST 3186 221314U, // LD2Twov2s 3187 15958146U, // LD2Twov2s_POST 3188 237698U, // LD2Twov4h 3189 15974530U, // LD2Twov4h_POST 3190 254082U, // LD2Twov4s 3191 15466626U, // LD2Twov4s_POST 3192 270466U, // LD2Twov8b 3193 16007298U, // LD2Twov8b_POST 3194 286850U, // LD2Twov8h 3195 15499394U, // LD2Twov8h_POST 3196 2696558801U, // LD2W 3197 2696558801U, // LD2W_IMM 3198 19701890U, // LD2i16 3199 20758658U, // LD2i16_POST 3200 19718274U, // LD2i32 3201 21299330U, // LD2i32_POST 3202 19734658U, // LD2i64 3203 22364290U, // LD2i64_POST 3204 19751042U, // LD2i8 3205 20283522U, // LD2i8_POST 3206 2696569806U, // LD3B 3207 2696569806U, // LD3B_IMM 3208 2696546546U, // LD3D 3209 2696546546U, // LD3D_IMM 3210 2696579902U, // LD3H 3211 2696579902U, // LD3H_IMM 3212 176895U, // LD3Rv16b 3213 22729471U, // LD3Rv16b_POST 3214 193279U, // LD3Rv1d 3215 19075839U, // LD3Rv1d_POST 3216 209663U, // LD3Rv2d 3217 19092223U, // LD3Rv2d_POST 3218 226047U, // LD3Rv2s 3219 23302911U, // LD3Rv2s_POST 3220 242431U, // LD3Rv4h 3221 23843583U, // LD3Rv4h_POST 3222 258815U, // LD3Rv4s 3223 23335679U, // LD3Rv4s_POST 3224 275199U, // LD3Rv8b 3225 22827775U, // LD3Rv8b_POST 3226 291583U, // LD3Rv8h 3227 23892735U, // LD3Rv8h_POST 3228 172569U, // LD3Threev16b 3229 18530841U, // LD3Threev16b_POST 3230 205337U, // LD3Threev2d 3231 18563609U, // LD3Threev2d_POST 3232 221721U, // LD3Threev2s 3233 19104281U, // LD3Threev2s_POST 3234 238105U, // LD3Threev4h 3235 19120665U, // LD3Threev4h_POST 3236 254489U, // LD3Threev4s 3237 18612761U, // LD3Threev4s_POST 3238 270873U, // LD3Threev8b 3239 19153433U, // LD3Threev8b_POST 3240 287257U, // LD3Threev8h 3241 18645529U, // LD3Threev8h_POST 3242 2696558813U, // LD3W 3243 2696558813U, // LD3W_IMM 3244 19702297U, // LD3i16 3245 24429081U, // LD3i16_POST 3246 19718681U, // LD3i32 3247 24969753U, // LD3i32_POST 3248 19735065U, // LD3i64 3249 25510425U, // LD3i64_POST 3250 19751449U, // LD3i8 3251 26051097U, // LD3i8_POST 3252 2696569818U, // LD4B 3253 2696569818U, // LD4B_IMM 3254 2696546558U, // LD4D 3255 2696546558U, // LD4D_IMM 3256 172599U, // LD4Fourv16b 3257 14860855U, // LD4Fourv16b_POST 3258 205367U, // LD4Fourv2d 3259 14893623U, // LD4Fourv2d_POST 3260 221751U, // LD4Fourv2s 3261 15434295U, // LD4Fourv2s_POST 3262 238135U, // LD4Fourv4h 3263 15450679U, // LD4Fourv4h_POST 3264 254519U, // LD4Fourv4s 3265 14942775U, // LD4Fourv4s_POST 3266 270903U, // LD4Fourv8b 3267 15483447U, // LD4Fourv8b_POST 3268 287287U, // LD4Fourv8h 3269 14975543U, // LD4Fourv8h_POST 3270 2696579914U, // LD4H 3271 2696579914U, // LD4H_IMM 3272 176901U, // LD4Rv16b 3273 17486597U, // LD4Rv16b_POST 3274 193285U, // LD4Rv1d 3275 15405829U, // LD4Rv1d_POST 3276 209669U, // LD4Rv2d 3277 15422213U, // LD4Rv2d_POST 3278 226053U, // LD4Rv2s 3279 15962885U, // LD4Rv2s_POST 3280 242437U, // LD4Rv4h 3281 16503557U, // LD4Rv4h_POST 3282 258821U, // LD4Rv4s 3283 15995653U, // LD4Rv4s_POST 3284 275205U, // LD4Rv8b 3285 17584901U, // LD4Rv8b_POST 3286 291589U, // LD4Rv8h 3287 16552709U, // LD4Rv8h_POST 3288 2696558825U, // LD4W 3289 2696558825U, // LD4W_IMM 3290 19702327U, // LD4i16 3291 21283383U, // LD4i16_POST 3292 19718711U, // LD4i32 3293 22348343U, // LD4i32_POST 3294 19735095U, // LD4i64 3295 26559031U, // LD4i64_POST 3296 19751479U, // LD4i8 3297 20808247U, // LD4i8_POST 3298 1241605094U, // LDADDAB 3299 1241607007U, // LDADDAH 3300 1241605316U, // LDADDALB 3301 1241607181U, // LDADDALH 3302 1241607841U, // LDADDALW 3303 1241607841U, // LDADDALX 3304 1241604752U, // LDADDAW 3305 1241604752U, // LDADDAX 3306 1241605252U, // LDADDB 3307 1241607167U, // LDADDH 3308 1241605496U, // LDADDLB 3309 1241607281U, // LDADDLH 3310 1241608018U, // LDADDLW 3311 1241608018U, // LDADDLX 3312 1241606502U, // LDADDW 3313 1241606502U, // LDADDX 3314 2255013635U, // LDAPRB 3315 2255015239U, // LDAPRH 3316 2255016920U, // LDAPRW 3317 2255016920U, // LDAPRX 3318 2255013678U, // LDAPURBi 3319 2255015282U, // LDAPURHi 3320 2255013818U, // LDAPURSBWi 3321 2255013818U, // LDAPURSBXi 3322 2255015409U, // LDAPURSHWi 3323 2255015409U, // LDAPURSHXi 3324 2255018400U, // LDAPURSWi 3325 2255017001U, // LDAPURXi 3326 2255017001U, // LDAPURi 3327 2255013583U, // LDARB 3328 2255015187U, // LDARH 3329 2255016715U, // LDARW 3330 2255016715U, // LDARX 3331 100717229U, // LDAXPW 3332 100717229U, // LDAXPX 3333 2255013694U, // LDAXRB 3334 2255015298U, // LDAXRH 3335 2255017045U, // LDAXRW 3336 2255017045U, // LDAXRX 3337 1241605150U, // LDCLRAB 3338 1241607064U, // LDCLRAH 3339 1241605390U, // LDCLRALB 3340 1241607221U, // LDCLRALH 3341 1241607915U, // LDCLRALW 3342 1241607915U, // LDCLRALX 3343 1241604866U, // LDCLRAW 3344 1241604866U, // LDCLRAX 3345 1241605860U, // LDCLRB 3346 1241607464U, // LDCLRH 3347 1241605598U, // LDCLRLB 3348 1241607317U, // LDCLRLH 3349 1241608218U, // LDCLRLW 3350 1241608218U, // LDCLRLX 3351 1241609083U, // LDCLRW 3352 1241609083U, // LDCLRX 3353 1241605159U, // LDEORAB 3354 1241607073U, // LDEORAH 3355 1241605400U, // LDEORALB 3356 1241607231U, // LDEORALH 3357 1241607924U, // LDEORALW 3358 1241607924U, // LDEORALX 3359 1241604874U, // LDEORAW 3360 1241604874U, // LDEORAX 3361 1241605883U, // LDEORB 3362 1241607487U, // LDEORH 3363 1241605607U, // LDEORLB 3364 1241607326U, // LDEORLH 3365 1241608226U, // LDEORLW 3366 1241608226U, // LDEORLX 3367 1241609159U, // LDEORW 3368 1241609159U, // LDEORX 3369 2696545154U, // LDFF1B_D_REAL 3370 2696577922U, // LDFF1B_H_REAL 3371 2696569730U, // LDFF1B_REAL 3372 2696553346U, // LDFF1B_S_REAL 3373 2696546496U, // LDFF1D_REAL 3374 2696547067U, // LDFF1H_D_REAL 3375 2696579835U, // LDFF1H_REAL 3376 2696555259U, // LDFF1H_S_REAL 3377 2696546147U, // LDFF1SB_D_REAL 3378 2696578915U, // LDFF1SB_H_REAL 3379 2696554339U, // LDFF1SB_S_REAL 3380 2696547751U, // LDFF1SH_D_REAL 3381 2696555943U, // LDFF1SH_S_REAL 3382 2696550751U, // LDFF1SW_D_REAL 3383 2696550563U, // LDFF1W_D_REAL 3384 2696558755U, // LDFF1W_REAL 3385 2691263164U, // LDG 3386 2255016124U, // LDGM 3387 2255013590U, // LDLARB 3388 2255015194U, // LDLARH 3389 2255016721U, // LDLARW 3390 2255016721U, // LDLARX 3391 2696545162U, // LDNF1B_D_IMM 3392 2696577930U, // LDNF1B_H_IMM 3393 2696569738U, // LDNF1B_IMM 3394 2696553354U, // LDNF1B_S_IMM 3395 2696546504U, // LDNF1D_IMM 3396 2696547075U, // LDNF1H_D_IMM 3397 2696579843U, // LDNF1H_IMM 3398 2696555267U, // LDNF1H_S_IMM 3399 2696546156U, // LDNF1SB_D_IMM 3400 2696578924U, // LDNF1SB_H_IMM 3401 2696554348U, // LDNF1SB_S_IMM 3402 2696547760U, // LDNF1SH_D_IMM 3403 2696555952U, // LDNF1SH_S_IMM 3404 2696550760U, // LDNF1SW_D_IMM 3405 2696550571U, // LDNF1W_D_IMM 3406 2696558763U, // LDNF1W_IMM 3407 100717148U, // LDNPDi 3408 100717148U, // LDNPQi 3409 100717148U, // LDNPSi 3410 100717148U, // LDNPWi 3411 100717148U, // LDNPXi 3412 2696569746U, // LDNT1B_ZRI 3413 2696569746U, // LDNT1B_ZRR 3414 2293891986U, // LDNT1B_ZZR_D_REAL 3415 2327454610U, // LDNT1B_ZZR_S_REAL 3416 2696546512U, // LDNT1D_ZRI 3417 2696546512U, // LDNT1D_ZRR 3418 2293893328U, // LDNT1D_ZZR_D_REAL 3419 2696579851U, // LDNT1H_ZRI 3420 2696579851U, // LDNT1H_ZRR 3421 2293893899U, // LDNT1H_ZZR_D_REAL 3422 2327456523U, // LDNT1H_ZZR_S_REAL 3423 2293892981U, // LDNT1SB_ZZR_D_REAL 3424 2327455605U, // LDNT1SB_ZZR_S_REAL 3425 2293894585U, // LDNT1SH_ZZR_D_REAL 3426 2327457209U, // LDNT1SH_ZZR_S_REAL 3427 2293897585U, // LDNT1SW_ZZR_D_REAL 3428 2696558771U, // LDNT1W_ZRI 3429 2696558771U, // LDNT1W_ZRR 3430 2293897395U, // LDNT1W_ZZR_D_REAL 3431 2327460019U, // LDNT1W_ZZR_S_REAL 3432 100717068U, // LDPDi 3433 536965644U, // LDPDpost 3434 536965644U, // LDPDpre 3435 100717068U, // LDPQi 3436 536965644U, // LDPQpost 3437 536965644U, // LDPQpre 3438 100718970U, // LDPSWi 3439 536967546U, // LDPSWpost 3440 536967546U, // LDPSWpre 3441 100717068U, // LDPSi 3442 536965644U, // LDPSpost 3443 536965644U, // LDPSpre 3444 100717068U, // LDPWi 3445 536965644U, // LDPWpost 3446 536965644U, // LDPWpre 3447 100717068U, // LDPXi 3448 536965644U, // LDPXpost 3449 536965644U, // LDPXpre 3450 2255012463U, // LDRAAindexed 3451 2691261039U, // LDRAAwriteback 3452 2255012880U, // LDRABindexed 3453 2691261456U, // LDRABwriteback 3454 543778526U, // LDRBBpost 3455 2691262174U, // LDRBBpre 3456 2255013598U, // LDRBBroW 3457 2255013598U, // LDRBBroX 3458 2255013598U, // LDRBBui 3459 543781705U, // LDRBpost 3460 2691265353U, // LDRBpre 3461 2255016777U, // LDRBroW 3462 2255016777U, // LDRBroX 3463 2255016777U, // LDRBui 3464 604033865U, // LDRDl 3465 543781705U, // LDRDpost 3466 2691265353U, // LDRDpre 3467 2255016777U, // LDRDroW 3468 2255016777U, // LDRDroX 3469 2255016777U, // LDRDui 3470 543780130U, // LDRHHpost 3471 2691263778U, // LDRHHpre 3472 2255015202U, // LDRHHroW 3473 2255015202U, // LDRHHroX 3474 2255015202U, // LDRHHui 3475 543781705U, // LDRHpost 3476 2691265353U, // LDRHpre 3477 2255016777U, // LDRHroW 3478 2255016777U, // LDRHroX 3479 2255016777U, // LDRHui 3480 604033865U, // LDRQl 3481 543781705U, // LDRQpost 3482 2691265353U, // LDRQpre 3483 2255016777U, // LDRQroW 3484 2255016777U, // LDRQroX 3485 2255016777U, // LDRQui 3486 543778723U, // LDRSBWpost 3487 2691262371U, // LDRSBWpre 3488 2255013795U, // LDRSBWroW 3489 2255013795U, // LDRSBWroX 3490 2255013795U, // LDRSBWui 3491 543778723U, // LDRSBXpost 3492 2691262371U, // LDRSBXpre 3493 2255013795U, // LDRSBXroW 3494 2255013795U, // LDRSBXroX 3495 2255013795U, // LDRSBXui 3496 543780314U, // LDRSHWpost 3497 2691263962U, // LDRSHWpre 3498 2255015386U, // LDRSHWroW 3499 2255015386U, // LDRSHWroX 3500 2255015386U, // LDRSHWui 3501 543780314U, // LDRSHXpost 3502 2691263962U, // LDRSHXpre 3503 2255015386U, // LDRSHXroW 3504 2255015386U, // LDRSHXroX 3505 2255015386U, // LDRSHXui 3506 604035465U, // LDRSWl 3507 543783305U, // LDRSWpost 3508 2691266953U, // LDRSWpre 3509 2255018377U, // LDRSWroW 3510 2255018377U, // LDRSWroX 3511 2255018377U, // LDRSWui 3512 604033865U, // LDRSl 3513 543781705U, // LDRSpost 3514 2691265353U, // LDRSpre 3515 2255016777U, // LDRSroW 3516 2255016777U, // LDRSroX 3517 2255016777U, // LDRSui 3518 604033865U, // LDRWl 3519 543781705U, // LDRWpost 3520 2691265353U, // LDRWpre 3521 2255016777U, // LDRWroW 3522 2255016777U, // LDRWroX 3523 2255016777U, // LDRWui 3524 604033865U, // LDRXl 3525 543781705U, // LDRXpost 3526 2691265353U, // LDRXpre 3527 2255016777U, // LDRXroW 3528 2255016777U, // LDRXroX 3529 2255016777U, // LDRXui 3530 2255336265U, // LDR_PXI 3531 2255336265U, // LDR_ZXI 3532 1241605175U, // LDSETAB 3533 1241607089U, // LDSETAH 3534 1241605418U, // LDSETALB 3535 1241607249U, // LDSETALH 3536 1241607940U, // LDSETALW 3537 1241607940U, // LDSETALX 3538 1241604914U, // LDSETAW 3539 1241604914U, // LDSETAX 3540 1241606089U, // LDSETB 3541 1241607675U, // LDSETH 3542 1241605657U, // LDSETLB 3543 1241607342U, // LDSETLH 3544 1241608282U, // LDSETLW 3545 1241608282U, // LDSETLX 3546 1241609664U, // LDSETW 3547 1241609664U, // LDSETX 3548 1241605184U, // LDSMAXAB 3549 1241607098U, // LDSMAXAH 3550 1241605428U, // LDSMAXALB 3551 1241607259U, // LDSMAXALH 3552 1241607949U, // LDSMAXALW 3553 1241607949U, // LDSMAXALX 3554 1241604938U, // LDSMAXAW 3555 1241604938U, // LDSMAXAX 3556 1241606226U, // LDSMAXB 3557 1241607707U, // LDSMAXH 3558 1241605666U, // LDSMAXLB 3559 1241607384U, // LDSMAXLH 3560 1241608337U, // LDSMAXLW 3561 1241608337U, // LDSMAXLX 3562 1241610730U, // LDSMAXW 3563 1241610730U, // LDSMAXX 3564 1241605103U, // LDSMINAB 3565 1241607037U, // LDSMINAH 3566 1241605360U, // LDSMINALB 3567 1241607191U, // LDSMINALH 3568 1241607880U, // LDSMINALW 3569 1241607880U, // LDSMINALX 3570 1241604821U, // LDSMINAW 3571 1241604821U, // LDSMINAX 3572 1241605709U, // LDSMINB 3573 1241607404U, // LDSMINH 3574 1241605571U, // LDSMINLB 3575 1241607290U, // LDSMINLH 3576 1241608180U, // LDSMINLW 3577 1241608180U, // LDSMINLX 3578 1241608472U, // LDSMINW 3579 1241608472U, // LDSMINX 3580 2255013643U, // LDTRBi 3581 2255015247U, // LDTRHi 3582 2255013802U, // LDTRSBWi 3583 2255013802U, // LDTRSBXi 3584 2255015393U, // LDTRSHWi 3585 2255015393U, // LDTRSHXi 3586 2255018384U, // LDTRSWi 3587 2255016965U, // LDTRWi 3588 2255016965U, // LDTRXi 3589 1241605194U, // LDUMAXAB 3590 1241607108U, // LDUMAXAH 3591 1241605439U, // LDUMAXALB 3592 1241607270U, // LDUMAXALH 3593 1241607959U, // LDUMAXALW 3594 1241607959U, // LDUMAXALX 3595 1241604947U, // LDUMAXAW 3596 1241604947U, // LDUMAXAX 3597 1241606235U, // LDUMAXB 3598 1241607716U, // LDUMAXH 3599 1241605676U, // LDUMAXLB 3600 1241607394U, // LDUMAXLH 3601 1241608346U, // LDUMAXLW 3602 1241608346U, // LDUMAXLX 3603 1241610738U, // LDUMAXW 3604 1241610738U, // LDUMAXX 3605 1241605113U, // LDUMINAB 3606 1241607047U, // LDUMINAH 3607 1241605371U, // LDUMINALB 3608 1241607202U, // LDUMINALH 3609 1241607890U, // LDUMINALW 3610 1241607890U, // LDUMINALX 3611 1241604830U, // LDUMINAW 3612 1241604830U, // LDUMINAX 3613 1241605718U, // LDUMINB 3614 1241607413U, // LDUMINH 3615 1241605581U, // LDUMINLB 3616 1241607300U, // LDUMINLH 3617 1241608189U, // LDUMINLW 3618 1241608189U, // LDUMINLX 3619 1241608480U, // LDUMINW 3620 1241608480U, // LDUMINX 3621 2255013663U, // LDURBBi 3622 2255016988U, // LDURBi 3623 2255016988U, // LDURDi 3624 2255015267U, // LDURHHi 3625 2255016988U, // LDURHi 3626 2255016988U, // LDURQi 3627 2255013810U, // LDURSBWi 3628 2255013810U, // LDURSBXi 3629 2255015401U, // LDURSHWi 3630 2255015401U, // LDURSHXi 3631 2255018392U, // LDURSWi 3632 2255016988U, // LDURSi 3633 2255016988U, // LDURWi 3634 2255016988U, // LDURXi 3635 100717257U, // LDXPW 3636 100717257U, // LDXPX 3637 2255013702U, // LDXRB 3638 2255015306U, // LDXRH 3639 2255017052U, // LDXRW 3640 2255017052U, // LDXRX 3641 0U, // LOADgot 3642 369111995U, // LSLR_ZPmZ_B 3643 369120187U, // LSLR_ZPmZ_D 3644 2555933627U, // LSLR_ZPmZ_H 3645 369136571U, // LSLR_ZPmZ_S 3646 2248200250U, // LSLVWr 3647 2248200250U, // LSLVXr 3648 369111098U, // LSL_WIDE_ZPmZ_B 3649 2555932730U, // LSL_WIDE_ZPmZ_H 3650 369135674U, // LSL_WIDE_ZPmZ_S 3651 2583703610U, // LSL_WIDE_ZZZ_B 3652 241201210U, // LSL_WIDE_ZZZ_H 3653 2617282618U, // LSL_WIDE_ZZZ_S 3654 369111098U, // LSL_ZPmI_B 3655 369119290U, // LSL_ZPmI_D 3656 2555932730U, // LSL_ZPmI_H 3657 369135674U, // LSL_ZPmI_S 3658 369111098U, // LSL_ZPmZ_B 3659 369119290U, // LSL_ZPmZ_D 3660 2555932730U, // LSL_ZPmZ_H 3661 369135674U, // LSL_ZPmZ_S 3662 2583703610U, // LSL_ZZI_B 3663 2415939642U, // LSL_ZZI_D 3664 2388684858U, // LSL_ZZI_H 3665 2617282618U, // LSL_ZZI_S 3666 369112042U, // LSRR_ZPmZ_B 3667 369120234U, // LSRR_ZPmZ_D 3668 2555933674U, // LSRR_ZPmZ_H 3669 369136618U, // LSRR_ZPmZ_S 3670 2248201205U, // LSRVWr 3671 2248201205U, // LSRVXr 3672 369112053U, // LSR_WIDE_ZPmZ_B 3673 2555933685U, // LSR_WIDE_ZPmZ_H 3674 369136629U, // LSR_WIDE_ZPmZ_S 3675 2583704565U, // LSR_WIDE_ZZZ_B 3676 241202165U, // LSR_WIDE_ZZZ_H 3677 2617283573U, // LSR_WIDE_ZZZ_S 3678 369112053U, // LSR_ZPmI_B 3679 369120245U, // LSR_ZPmI_D 3680 2555933685U, // LSR_ZPmI_H 3681 369136629U, // LSR_ZPmI_S 3682 369112053U, // LSR_ZPmZ_B 3683 369120245U, // LSR_ZPmZ_D 3684 2555933685U, // LSR_ZPmZ_H 3685 369136629U, // LSR_ZPmZ_S 3686 2583704565U, // LSR_ZZI_B 3687 2415940597U, // LSR_ZZI_D 3688 2388685813U, // LSR_ZZI_H 3689 2617283573U, // LSR_ZZI_S 3690 2248198546U, // MADDWrrr 3691 2248198546U, // MADDXrrr 3692 369109259U, // MAD_ZPmZZ_B 3693 369117451U, // MAD_ZPmZZ_D 3694 2555930891U, // MAD_ZPmZZ_H 3695 369133835U, // MAD_ZPmZZ_S 3696 2516593656U, // MATCH_PPzZZ_B 3697 2824367096U, // MATCH_PPzZZ_H 3698 369107651U, // MLA_ZPmZZ_B 3699 369115843U, // MLA_ZPmZZ_D 3700 2555929283U, // MLA_ZPmZZ_H 3701 369132227U, // MLA_ZPmZZ_S 3702 2281718467U, // MLA_ZZZI_D 3703 2390254275U, // MLA_ZZZI_H 3704 2315289283U, // MLA_ZZZI_S 3705 336650947U, // MLAv16i8 3706 2484658883U, // MLAv2i32 3707 2484658883U, // MLAv2i32_indexed 3708 338223811U, // MLAv4i16 3709 338223811U, // MLAv4i16_indexed 3710 338748099U, // MLAv4i32 3711 338748099U, // MLAv4i32_indexed 3712 2486756035U, // MLAv8i16 3713 2486756035U, // MLAv8i16_indexed 3714 2487280323U, // MLAv8i8 3715 369112313U, // MLS_ZPmZZ_B 3716 369120505U, // MLS_ZPmZZ_D 3717 2555933945U, // MLS_ZPmZZ_H 3718 369136889U, // MLS_ZPmZZ_S 3719 2281723129U, // MLS_ZZZI_D 3720 2390258937U, // MLS_ZZZI_H 3721 2315293945U, // MLS_ZZZI_S 3722 336655609U, // MLSv16i8 3723 2484663545U, // MLSv2i32 3724 2484663545U, // MLSv2i32_indexed 3725 338228473U, // MLSv4i16 3726 338228473U, // MLSv4i16_indexed 3727 338752761U, // MLSv4i32 3728 338752761U, // MLSv4i32_indexed 3729 2486760697U, // MLSv8i16 3730 2486760697U, // MLSv8i16_indexed 3731 2487284985U, // MLSv8i8 3732 1275121282U, // MOVID 3733 1309716098U, // MOVIv16b_ns 3734 1277210242U, // MOVIv2d_ns 3735 3457724034U, // MOVIv2i32 3736 3457724034U, // MOVIv2s_msl 3737 3458772610U, // MOVIv4i16 3738 3459296898U, // MOVIv4i32 3739 3459296898U, // MOVIv4s_msl 3740 1312861826U, // MOVIv8b_ns 3741 3459821186U, // MOVIv8i16 3742 570478221U, // MOVKWi 3743 570478221U, // MOVKXi 3744 0U, // MOVMCSym 3745 3456160152U, // MOVNWi 3746 3456160152U, // MOVNXi 3747 14870U, // MOVPRFX_ZPmZ_B 3748 2147506710U, // MOVPRFX_ZPmZ_D 3749 34109974U, // MOVPRFX_ZPmZ_H 3750 39446U, // MOVPRFX_ZPmZ_S 3751 2516597270U, // MOVPRFX_ZPzZ_B 3752 2516605462U, // MOVPRFX_ZPzZ_D 3753 2824370710U, // MOVPRFX_ZPzZ_H 3754 2516621846U, // MOVPRFX_ZPzZ_S 3755 369474070U, // MOVPRFX_ZZ 3756 3456162465U, // MOVZWi 3757 3456162465U, // MOVZXi 3758 0U, // MOVaddr 3759 0U, // MOVaddrBA 3760 0U, // MOVaddrCP 3761 0U, // MOVaddrEXT 3762 0U, // MOVaddrJT 3763 0U, // MOVaddrTLS 3764 0U, // MOVbaseTLS 3765 0U, // MOVi32imm 3766 0U, // MOVi64imm 3767 1342231885U, // MRS 3768 369108879U, // MSB_ZPmZZ_B 3769 369117071U, // MSB_ZPmZZ_D 3770 2555930511U, // MSB_ZPmZZ_H 3771 369133455U, // MSB_ZPmZZ_S 3772 381946U, // MSR 3773 390138U, // MSRpstateImm1 3774 390138U, // MSRpstateImm4 3775 2248198160U, // MSUBWrrr 3776 2248198160U, // MSUBXrrr 3777 2583703658U, // MUL_ZI_B 3778 2415939690U, // MUL_ZI_D 3779 2388684906U, // MUL_ZI_H 3780 2617282666U, // MUL_ZI_S 3781 369111146U, // MUL_ZPmZ_B 3782 369119338U, // MUL_ZPmZ_D 3783 2555932778U, // MUL_ZPmZ_H 3784 369135722U, // MUL_ZPmZ_S 3785 2415939690U, // MUL_ZZZI_D 3786 2388684906U, // MUL_ZZZI_H 3787 2617282666U, // MUL_ZZZI_S 3788 2583703658U, // MUL_ZZZ_B 3789 2415939690U, // MUL_ZZZ_D 3790 2388684906U, // MUL_ZZZ_H 3791 2617282666U, // MUL_ZZZ_S 3792 68202602U, // MULv16i8 3793 2216210538U, // MULv2i32 3794 2216210538U, // MULv2i32_indexed 3795 69775466U, // MULv4i16 3796 69775466U, // MULv4i16_indexed 3797 70299754U, // MULv4i32 3798 70299754U, // MULv4i32_indexed 3799 2218307690U, // MULv8i16 3800 2218307690U, // MULv8i16_indexed 3801 2218831978U, // MULv8i8 3802 3457724015U, // MVNIv2i32 3803 3457724015U, // MVNIv2s_msl 3804 3458772591U, // MVNIv4i16 3805 3459296879U, // MVNIv4i32 3806 3459296879U, // MVNIv4s_msl 3807 3459821167U, // MVNIv8i16 3808 2516595909U, // NANDS_PPzPP 3809 2516593078U, // NAND_PPzPP 3810 2415939632U, // NBSL_ZZZZ_D 3811 10946U, // NEG_ZPmZ_B 3812 2147502786U, // NEG_ZPmZ_D 3813 34106050U, // NEG_ZPmZ_H 3814 35522U, // NEG_ZPmZ_S 3815 2215684802U, // NEGv16i8 3816 100715202U, // NEGv1i64 3817 2216209090U, // NEGv2i32 3818 69249730U, // NEGv2i64 3819 2217257666U, // NEGv4i16 3820 70298306U, // NEGv4i32 3821 2218306242U, // NEGv8i16 3822 71346882U, // NEGv8i8 3823 2516593655U, // NMATCH_PPzZZ_B 3824 2824367095U, // NMATCH_PPzZZ_H 3825 2516596056U, // NORS_PPzPP 3826 2516595662U, // NOR_PPzPP 3827 14188U, // NOT_ZPmZ_B 3828 2147506028U, // NOT_ZPmZ_D 3829 34109292U, // NOT_ZPmZ_H 3830 38764U, // NOT_ZPmZ_S 3831 2215688044U, // NOTv16i8 3832 71350124U, // NOTv8i8 3833 2516596000U, // ORNS_PPzPP 3834 0U, // ORNWrr 3835 2248200539U, // ORNWrs 3836 0U, // ORNXrr 3837 2248200539U, // ORNXrs 3838 2516595035U, // ORN_PPzPP 3839 68202843U, // ORNv16i8 3840 2218832219U, // ORNv8i8 3841 2516596062U, // ORRS_PPzPP 3842 2248201183U, // ORRWri 3843 0U, // ORRWrr 3844 2248201183U, // ORRWrs 3845 2248201183U, // ORRXri 3846 0U, // ORRXrr 3847 2248201183U, // ORRXrs 3848 2516595679U, // ORR_PPzPP 3849 2415940575U, // ORR_ZI 3850 369112031U, // ORR_ZPmZ_B 3851 369120223U, // ORR_ZPmZ_D 3852 2555933663U, // ORR_ZPmZ_H 3853 369136607U, // ORR_ZPmZ_S 3854 2415940575U, // ORR_ZZZ 3855 68203487U, // ORRv16i8 3856 572060639U, // ORRv2i32 3857 573109215U, // ORRv4i16 3858 573633503U, // ORRv4i32 3859 574157791U, // ORRv8i16 3860 2218832863U, // ORRv8i8 3861 2516637827U, // ORV_VPZ_B 3862 2516637827U, // ORV_VPZ_D 3863 2516637827U, // ORV_VPZ_H 3864 2516637827U, // ORV_VPZ_S 3865 100713097U, // PACDA 3866 100713597U, // PACDB 3867 7390044U, // PACDZA 3868 7391332U, // PACDZB 3869 2248196774U, // PACGA 3870 100713133U, // PACIA 3871 7077U, // PACIA1716 3872 7042U, // PACIASP 3873 7033U, // PACIAZ 3874 100713632U, // PACIB 3875 6988U, // PACIB1716 3876 7068U, // PACIBSP 3877 7051U, // PACIBZ 3878 7390060U, // PACIZA 3879 7391348U, // PACIZB 3880 7350884U, // PFALSE 3881 2516596622U, // PFIRST_B 3882 2617263531U, // PMULLB_ZZZ_D 3883 261645739U, // PMULLB_ZZZ_H 3884 27387307U, // PMULLB_ZZZ_Q 3885 2617267843U, // PMULLT_ZZZ_D 3886 261650051U, // PMULLT_ZZZ_H 3887 27391619U, // PMULLT_ZZZ_Q 3888 70820119U, // PMULLv16i8 3889 1403563999U, // PMULLv1i64 3890 1437114647U, // PMULLv2i64 3891 2218307551U, // PMULLv8i8 3892 2583703670U, // PMUL_ZZZ_B 3893 68202614U, // PMULv16i8 3894 2218831990U, // PMULv8i8 3895 2516596681U, // PNEXT_B 3896 2516604873U, // PNEXT_D 3897 2388162505U, // PNEXT_H 3898 2516621257U, // PNEXT_S 3899 2947941523U, // PRFB_D_PZI 3900 2395341971U, // PRFB_D_SCALED 3901 247858323U, // PRFB_D_SXTW_SCALED 3902 2395341971U, // PRFB_D_UXTW_SCALED 3903 247858323U, // PRFB_PRI 3904 247858323U, // PRFB_PRR 3905 240518291U, // PRFB_S_PZI 3906 2395341971U, // PRFB_S_SXTW_SCALED 3907 247858323U, // PRFB_S_UXTW_SCALED 3908 1471547824U, // PRFD_D_PZI 3909 2395343280U, // PRFD_D_SCALED 3910 247859632U, // PRFD_D_SXTW_SCALED 3911 2395343280U, // PRFD_D_UXTW_SCALED 3912 247859632U, // PRFD_PRI 3913 247859632U, // PRFD_PRR 3914 2388003248U, // PRFD_S_PZI 3915 247859632U, // PRFD_S_SXTW_SCALED 3916 2395343280U, // PRFD_S_UXTW_SCALED 3917 1505102855U, // PRFH_D_PZI 3918 247860231U, // PRFH_D_SCALED 3919 2395343879U, // PRFH_D_SXTW_SCALED 3920 247860231U, // PRFH_D_UXTW_SCALED 3921 247860231U, // PRFH_PRI 3922 2395343879U, // PRFH_PRR 3923 240520199U, // PRFH_S_PZI 3924 2395343879U, // PRFH_S_SXTW_SCALED 3925 247860231U, // PRFH_S_UXTW_SCALED 3926 604385462U, // PRFMl 3927 2255368374U, // PRFMroW 3928 2255368374U, // PRFMroX 3929 2255368374U, // PRFMui 3930 2395347258U, // PRFS_PRR 3931 2255368429U, // PRFUMi 3932 1538660666U, // PRFW_D_PZI 3933 247863610U, // PRFW_D_SCALED 3934 2395347258U, // PRFW_D_SXTW_SCALED 3935 247863610U, // PRFW_D_UXTW_SCALED 3936 247863610U, // PRFW_PRI 3937 2388007226U, // PRFW_S_PZI 3938 247863610U, // PRFW_S_SXTW_SCALED 3939 2395347258U, // PRFW_S_UXTW_SCALED 3940 436582272U, // PTEST_PP 3941 704656588U, // PTRUES_B 3942 704664780U, // PTRUES_D 3943 28865740U, // PTRUES_H 3944 704681164U, // PTRUES_S 3945 704653950U, // PTRUE_B 3946 704662142U, // PTRUE_D 3947 28863102U, // PTRUE_H 3948 704678526U, // PTRUE_S 3949 865627709U, // PUNPKHI_PP 3950 865628591U, // PUNPKLO_PP 3951 2348820036U, // RADDHNB_ZZZ_B 3952 239625796U, // RADDHNB_ZZZ_H 3953 2415953476U, // RADDHNB_ZZZ_S 3954 2449487589U, // RADDHNT_ZZZ_B 3955 240154341U, // RADDHNT_ZZZ_H 3956 2281740005U, // RADDHNT_ZZZ_S 3957 2216210698U, // RADDHNv2i64_v2i32 3958 2486231394U, // RADDHNv2i64_v4i32 3959 69775626U, // RADDHNv4i32_v4i16 3960 339272034U, // RADDHNv4i32_v8i16 3961 2484134242U, // RADDHNv8i16_v16i8 3962 2218832138U, // RADDHNv8i16_v8i8 3963 2216730741U, // RAX1 3964 2415935605U, // RAX1_ZZZ_D 3965 100718053U, // RBITWr 3966 100718053U, // RBITXr 3967 13797U, // RBIT_ZPmZ_B 3968 2147505637U, // RBIT_ZPmZ_D 3969 34108901U, // RBIT_ZPmZ_H 3970 38373U, // RBIT_ZPmZ_S 3971 2215687653U, // RBITv16i8 3972 71349733U, // RBITv8i8 3973 369112389U, // RDFFRS_PPz 3974 7353166U, // RDFFR_P 3975 369111886U, // RDFFR_PPz 3976 100716683U, // RDVLI_XI 3977 7394747U, // RET 3978 7159U, // RETAA 3979 7166U, // RETAB 3980 0U, // RET_ReallyLR 3981 100713033U, // REV16Wr 3982 100713033U, // REV16Xr 3983 2215682633U, // REV16v16i8 3984 71344713U, // REV16v8i8 3985 100712571U, // REV32Xr 3986 2215682171U, // REV32v16i8 3987 2217255035U, // REV32v4i16 3988 2218303611U, // REV32v8i16 3989 71344251U, // REV32v8i8 3990 2215682608U, // REV64v16i8 3991 2216206896U, // REV64v2i32 3992 2217255472U, // REV64v4i16 3993 70296112U, // REV64v4i32 3994 2218304048U, // REV64v8i16 3995 71344688U, // REV64v8i8 3996 2147502124U, // REVB_ZPmZ_D 3997 34105388U, // REVB_ZPmZ_H 3998 34860U, // REVB_ZPmZ_S 3999 2147503637U, // REVH_ZPmZ_D 4000 36373U, // REVH_ZPmZ_S 4001 2147506620U, // REVW_ZPmZ_D 4002 100718619U, // REVWr 4003 100718619U, // REVXr 4004 436221979U, // REV_PP_B 4005 268458011U, // REV_PP_D 4006 845183003U, // REV_PP_H 4007 469800987U, // REV_PP_S 4008 436221979U, // REV_ZZ_B 4009 268458011U, // REV_ZZ_D 4010 845183003U, // REV_ZZ_H 4011 469800987U, // REV_ZZ_S 4012 2248198799U, // RMIF 4013 2248201171U, // RORVWr 4014 2248201171U, // RORVXr 4015 2348820083U, // RSHRNB_ZZI_B 4016 2387109491U, // RSHRNB_ZZI_H 4017 2415953523U, // RSHRNB_ZZI_S 4018 2449487624U, // RSHRNT_ZZI_B 4019 240154376U, // RSHRNT_ZZI_H 4020 2281740040U, // RSHRNT_ZZI_S 4021 2484134271U, // RSHRNv16i8_shift 4022 2216210763U, // RSHRNv2i32_shift 4023 69775691U, // RSHRNv4i16_shift 4024 2486231423U, // RSHRNv4i32_shift 4025 339272063U, // RSHRNv8i16_shift 4026 2218832203U, // RSHRNv8i8_shift 4027 2348820027U, // RSUBHNB_ZZZ_B 4028 239625787U, // RSUBHNB_ZZZ_H 4029 2415953467U, // RSUBHNB_ZZZ_S 4030 2449487580U, // RSUBHNT_ZZZ_B 4031 240154332U, // RSUBHNT_ZZZ_H 4032 2281739996U, // RSUBHNT_ZZZ_S 4033 2216210690U, // RSUBHNv2i64_v2i32 4034 2486231385U, // RSUBHNv2i64_v4i32 4035 69775618U, // RSUBHNv4i32_v4i16 4036 339272025U, // RSUBHNv4i32_v8i16 4037 2484134233U, // RSUBHNv8i16_v16i8 4038 2218832130U, // RSUBHNv8i16_v8i8 4039 2315273396U, // SABALB_ZZZ_D 4040 29385908U, // SABALB_ZZZ_H 4041 2449507508U, // SABALB_ZZZ_S 4042 2315277803U, // SABALT_ZZZ_D 4043 29390315U, // SABALT_ZZZ_H 4044 2449511915U, // SABALT_ZZZ_S 4045 339271835U, // SABALv16i8_v8i16 4046 2485186195U, // SABALv2i32_v2i64 4047 338751123U, // SABALv4i16_v4i32 4048 337698971U, // SABALv4i32_v2i64 4049 2486231195U, // SABALv8i16_v4i32 4050 2486759059U, // SABALv8i8_v8i16 4051 637543037U, // SABA_ZZZ_B 4052 2281718397U, // SABA_ZZZ_D 4053 2390254205U, // SABA_ZZZ_H 4054 2315289213U, // SABA_ZZZ_S 4055 336650877U, // SABAv16i8 4056 2484658813U, // SABAv2i32 4057 338223741U, // SABAv4i16 4058 338748029U, // SABAv4i32 4059 2486755965U, // SABAv8i16 4060 2487280253U, // SABAv8i8 4061 2617263464U, // SABDLB_ZZZ_D 4062 261645672U, // SABDLB_ZZZ_H 4063 2348844392U, // SABDLB_ZZZ_S 4064 2617267771U, // SABDLT_ZZZ_D 4065 261649979U, // SABDLT_ZZZ_H 4066 2348848699U, // SABDLT_ZZZ_S 4067 70820061U, // SABDLv16i8_v8i16 4068 2216734532U, // SABDLv2i32_v2i64 4069 70299460U, // SABDLv4i16_v4i32 4070 69247197U, // SABDLv4i32_v2i64 4071 2217779421U, // SABDLv8i16_v4i32 4072 2218307396U, // SABDLv8i8_v8i16 4073 369109284U, // SABD_ZPmZ_B 4074 369117476U, // SABD_ZPmZ_D 4075 2555930916U, // SABD_ZPmZ_H 4076 369133860U, // SABD_ZPmZ_S 4077 68200740U, // SABDv16i8 4078 2216208676U, // SABDv2i32 4079 69773604U, // SABDv4i16 4080 70297892U, // SABDv4i32 4081 2218305828U, // SABDv8i16 4082 2218830116U, // SABDv8i8 4083 369119773U, // SADALP_ZPmZ_D 4084 408449565U, // SADALP_ZPmZ_H 4085 369136157U, // SADALP_ZPmZ_S 4086 2486759965U, // SADALPv16i8_v8i16 4087 2512974365U, // SADALPv2i32_v1i64 4088 2484662813U, // SADALPv4i16_v2i32 4089 337703453U, // SADALPv4i32_v2i64 4090 2486235677U, // SADALPv8i16_v4i32 4091 338227741U, // SADALPv8i8_v4i16 4092 2617267607U, // SADDLBT_ZZZ_D 4093 261649815U, // SADDLBT_ZZZ_H 4094 2348848535U, // SADDLBT_ZZZ_S 4095 2617263489U, // SADDLB_ZZZ_D 4096 261645697U, // SADDLB_ZZZ_H 4097 2348844417U, // SADDLB_ZZZ_S 4098 2218308141U, // SADDLPv16i8_v8i16 4099 2244522541U, // SADDLPv2i32_v1i64 4100 2216210989U, // SADDLPv4i16_v2i32 4101 69251629U, // SADDLPv4i32_v2i64 4102 2217783853U, // SADDLPv8i16_v4i32 4103 69775917U, // SADDLPv8i8_v4i16 4104 2617267787U, // SADDLT_ZZZ_D 4105 261649995U, // SADDLT_ZZZ_H 4106 2348848715U, // SADDLT_ZZZ_S 4107 2214647858U, // SADDLVv16i8v 4108 2214647858U, // SADDLVv4i16v 4109 67164210U, // SADDLVv4i32v 4110 2214647858U, // SADDLVv8i16v 4111 67164210U, // SADDLVv8i8v 4112 70820077U, // SADDLv16i8_v8i16 4113 2216734570U, // SADDLv2i32_v2i64 4114 70299498U, // SADDLv4i16_v4i32 4115 69247213U, // SADDLv4i32_v2i64 4116 2217779437U, // SADDLv8i16_v4i32 4117 2218307434U, // SADDLv8i8_v8i16 4118 2516637703U, // SADDV_VPZ_B 4119 2516637703U, // SADDV_VPZ_H 4120 2516637703U, // SADDV_VPZ_S 4121 2415937602U, // SADDWB_ZZZ_D 4122 241199170U, // SADDWB_ZZZ_H 4123 2617280578U, // SADDWB_ZZZ_S 4124 2415941555U, // SADDWT_ZZZ_D 4125 241203123U, // SADDWT_ZZZ_H 4126 2617284531U, // SADDWT_ZZZ_S 4127 2218303998U, // SADDWv16i8_v8i16 4128 2216737068U, // SADDWv2i32_v2i64 4129 70301996U, // SADDWv4i16_v4i32 4130 2216731134U, // SADDWv4i32_v2i64 4131 70296062U, // SADDWv8i16_v4i32 4132 2218309932U, // SADDWv8i8_v8i16 4133 7172U, // SB 4134 2281719130U, // SBCLB_ZZZ_D 4135 2315289946U, // SBCLB_ZZZ_S 4136 2281723437U, // SBCLT_ZZZ_D 4137 2315294253U, // SBCLT_ZZZ_S 4138 2248201389U, // SBCSWr 4139 2248201389U, // SBCSXr 4140 2248198283U, // SBCWr 4141 2248198283U, // SBCXr 4142 2248200362U, // SBFMWri 4143 2248200362U, // SBFMXri 4144 2248198805U, // SCVTFSWDri 4145 2248198805U, // SCVTFSWHri 4146 2248198805U, // SCVTFSWSri 4147 2248198805U, // SCVTFSXDri 4148 2248198805U, // SCVTFSXHri 4149 2248198805U, // SCVTFSXSri 4150 100715157U, // SCVTFUWDri 4151 100715157U, // SCVTFUWHri 4152 100715157U, // SCVTFUWSri 4153 100715157U, // SCVTFUXDri 4154 100715157U, // SCVTFUXHri 4155 100715157U, // SCVTFUXSri 4156 2147502741U, // SCVTF_ZPmZ_DtoD 4157 1141402261U, // SCVTF_ZPmZ_DtoH 4158 2147519125U, // SCVTF_ZPmZ_DtoS 4159 34106005U, // SCVTF_ZPmZ_HtoH 4160 19093U, // SCVTF_ZPmZ_StoD 4161 1107847829U, // SCVTF_ZPmZ_StoH 4162 35477U, // SCVTF_ZPmZ_StoS 4163 2248198805U, // SCVTFd 4164 2248198805U, // SCVTFh 4165 2248198805U, // SCVTFs 4166 100715157U, // SCVTFv1i16 4167 100715157U, // SCVTFv1i32 4168 100715157U, // SCVTFv1i64 4169 2216209045U, // SCVTFv2f32 4170 69249685U, // SCVTFv2f64 4171 2216209045U, // SCVTFv2i32_shift 4172 2216733333U, // SCVTFv2i64_shift 4173 2217257621U, // SCVTFv4f16 4174 70298261U, // SCVTFv4f32 4175 69773973U, // SCVTFv4i16_shift 4176 70298261U, // SCVTFv4i32_shift 4177 2218306197U, // SCVTFv8f16 4178 2218306197U, // SCVTFv8i16_shift 4179 369120318U, // SDIVR_ZPmZ_D 4180 369136702U, // SDIVR_ZPmZ_S 4181 2248202278U, // SDIVWr 4182 2248202278U, // SDIVXr 4183 369121318U, // SDIV_ZPmZ_D 4184 369137702U, // SDIV_ZPmZ_S 4185 2449495903U, // SDOT_ZZZI_D 4186 637572959U, // SDOT_ZZZI_S 4187 2449495903U, // SDOT_ZZZ_D 4188 637572959U, // SDOT_ZZZ_S 4189 338753375U, // SDOTlanev16i8 4190 2484664159U, // SDOTlanev8i8 4191 338753375U, // SDOTv16i8 4192 2484664159U, // SDOTv8i8 4193 2516594563U, // SEL_PPPP 4194 2516594563U, // SEL_ZPZZ_B 4195 2516602755U, // SEL_ZPZZ_D 4196 2388160387U, // SEL_ZPZZ_H 4197 2516619139U, // SEL_ZPZZ_S 4198 7389761U, // SETF16 4199 7389776U, // SETF8 4200 7203U, // SETFFR 4201 2684446852U, // SHA1Crrr 4202 100715246U, // SHA1Hrr 4203 2684448931U, // SHA1Mrrr 4204 2684449240U, // SHA1Prrr 4205 338747393U, // SHA1SU0rrr 4206 338747467U, // SHA1SU1rr 4207 2684444817U, // SHA256H2rrr 4208 2684447574U, // SHA256Hrrr 4209 338747413U, // SHA256SU0rr 4210 338747487U, // SHA256SU1rrr 4211 2684447521U, // SHA512H 4212 2684444807U, // SHA512H2 4213 69246986U, // SHA512SU0 4214 2485182548U, // SHA512SU1 4215 369109379U, // SHADD_ZPmZ_B 4216 369117571U, // SHADD_ZPmZ_D 4217 2555931011U, // SHADD_ZPmZ_H 4218 369133955U, // SHADD_ZPmZ_S 4219 68200835U, // SHADDv16i8 4220 2216208771U, // SHADDv2i32 4221 69773699U, // SHADDv4i16 4222 70297987U, // SHADDv4i32 4223 2218305923U, // SHADDv8i16 4224 2218830211U, // SHADDv8i8 4225 2218303742U, // SHLLv16i8 4226 69251017U, // SHLLv2i32 4227 2217783241U, // SHLLv4i16 4228 69247230U, // SHLLv4i32 4229 2217779454U, // SHLLv8i16 4230 70823881U, // SHLLv8i8 4231 2248200082U, // SHLd 4232 68202386U, // SHLv16i8_shift 4233 2216210322U, // SHLv2i32_shift 4234 2216734610U, // SHLv2i64_shift 4235 69775250U, // SHLv4i16_shift 4236 70299538U, // SHLv4i32_shift 4237 2218307474U, // SHLv8i16_shift 4238 2218831762U, // SHLv8i8_shift 4239 2348820065U, // SHRNB_ZZI_B 4240 2387109473U, // SHRNB_ZZI_H 4241 2415953505U, // SHRNB_ZZI_S 4242 2449487606U, // SHRNT_ZZI_B 4243 240154358U, // SHRNT_ZZI_H 4244 2281740022U, // SHRNT_ZZI_S 4245 2484134253U, // SHRNv16i8_shift 4246 2216210747U, // SHRNv2i32_shift 4247 69775675U, // SHRNv4i16_shift 4248 2486231405U, // SHRNv4i32_shift 4249 339272045U, // SHRNv8i16_shift 4250 2218832187U, // SHRNv8i8_shift 4251 369111844U, // SHSUBR_ZPmZ_B 4252 369120036U, // SHSUBR_ZPmZ_D 4253 2555933476U, // SHSUBR_ZPmZ_H 4254 369136420U, // SHSUBR_ZPmZ_S 4255 369108993U, // SHSUB_ZPmZ_B 4256 369117185U, // SHSUB_ZPmZ_D 4257 2555930625U, // SHSUB_ZPmZ_H 4258 369133569U, // SHSUB_ZPmZ_S 4259 68200449U, // SHSUBv16i8 4260 2216208385U, // SHSUBv2i32 4261 69773313U, // SHSUBv4i16 4262 70297601U, // SHSUBv4i32 4263 2218305537U, // SHSUBv8i16 4264 2218829825U, // SHSUBv8i8 4265 637546085U, // SLI_ZZI_B 4266 2281721445U, // SLI_ZZI_D 4267 242773605U, // SLI_ZZI_H 4268 2315292261U, // SLI_ZZI_S 4269 2684448357U, // SLId 4270 336653925U, // SLIv16i8_shift 4271 2484661861U, // SLIv2i32_shift 4272 2485186149U, // SLIv2i64_shift 4273 338226789U, // SLIv4i16_shift 4274 338751077U, // SLIv4i32_shift 4275 2486759013U, // SLIv8i16_shift 4276 2487283301U, // SLIv8i8_shift 4277 338747498U, // SM3PARTW1 4278 338747918U, // SM3PARTW2 4279 70295614U, // SM3SS1 4280 338747991U, // SM3TT1A 4281 338748328U, // SM3TT1B 4282 338748000U, // SM3TT2A 4283 338748357U, // SM3TT2B 4284 70298077U, // SM4E 4285 2617285181U, // SM4EKEY_ZZZ_S 4286 70302269U, // SM4ENCKEY 4287 2617280989U, // SM4E_ZZZ_S 4288 2248200026U, // SMADDLrrr 4289 369111739U, // SMAXP_ZPmZ_B 4290 369119931U, // SMAXP_ZPmZ_D 4291 2555933371U, // SMAXP_ZPmZ_H 4292 369136315U, // SMAXP_ZPmZ_S 4293 68203195U, // SMAXPv16i8 4294 2216211131U, // SMAXPv2i32 4295 69776059U, // SMAXPv4i16 4296 70300347U, // SMAXPv4i32 4297 2218308283U, // SMAXPv8i16 4298 2218832571U, // SMAXPv8i8 4299 2516637839U, // SMAXV_VPZ_B 4300 2516637839U, // SMAXV_VPZ_D 4301 2516637839U, // SMAXV_VPZ_H 4302 2516637839U, // SMAXV_VPZ_S 4303 2214647951U, // SMAXVv16i8v 4304 2214647951U, // SMAXVv4i16v 4305 67164303U, // SMAXVv4i32v 4306 2214647951U, // SMAXVv8i16v 4307 67164303U, // SMAXVv8i8v 4308 2583706092U, // SMAX_ZI_B 4309 2415942124U, // SMAX_ZI_D 4310 2388687340U, // SMAX_ZI_H 4311 2617285100U, // SMAX_ZI_S 4312 369113580U, // SMAX_ZPmZ_B 4313 369121772U, // SMAX_ZPmZ_D 4314 2555935212U, // SMAX_ZPmZ_H 4315 369138156U, // SMAX_ZPmZ_S 4316 68205036U, // SMAXv16i8 4317 2216212972U, // SMAXv2i32 4318 69777900U, // SMAXv4i16 4319 70302188U, // SMAXv4i32 4320 2218310124U, // SMAXv8i16 4321 2218834412U, // SMAXv8i8 4322 75940U, // SMC 4323 369111657U, // SMINP_ZPmZ_B 4324 369119849U, // SMINP_ZPmZ_D 4325 2555933289U, // SMINP_ZPmZ_H 4326 369136233U, // SMINP_ZPmZ_S 4327 68203113U, // SMINPv16i8 4328 2216211049U, // SMINPv2i32 4329 69775977U, // SMINPv4i16 4330 70300265U, // SMINPv4i32 4331 2218308201U, // SMINPv8i16 4332 2218832489U, // SMINPv8i8 4333 2516637787U, // SMINV_VPZ_B 4334 2516637787U, // SMINV_VPZ_D 4335 2516637787U, // SMINV_VPZ_H 4336 2516637787U, // SMINV_VPZ_S 4337 2214647899U, // SMINVv16i8v 4338 2214647899U, // SMINVv4i16v 4339 67164251U, // SMINVv4i32v 4340 2214647899U, // SMINVv8i16v 4341 67164251U, // SMINVv8i8v 4342 2583703834U, // SMIN_ZI_B 4343 2415939866U, // SMIN_ZI_D 4344 2388685082U, // SMIN_ZI_H 4345 2617282842U, // SMIN_ZI_S 4346 369111322U, // SMIN_ZPmZ_B 4347 369119514U, // SMIN_ZPmZ_D 4348 2555932954U, // SMIN_ZPmZ_H 4349 369135898U, // SMIN_ZPmZ_S 4350 68202778U, // SMINv16i8 4351 2216210714U, // SMINv2i32 4352 69775642U, // SMINv4i16 4353 70299930U, // SMINv4i32 4354 2218307866U, // SMINv8i16 4355 2218832154U, // SMINv8i8 4356 2315273440U, // SMLALB_ZZZI_D 4357 2449507552U, // SMLALB_ZZZI_S 4358 2315273440U, // SMLALB_ZZZ_D 4359 29385952U, // SMLALB_ZZZ_H 4360 2449507552U, // SMLALB_ZZZ_S 4361 2315277837U, // SMLALT_ZZZI_D 4362 2449511949U, // SMLALT_ZZZI_S 4363 2315277837U, // SMLALT_ZZZ_D 4364 29390349U, // SMLALT_ZZZ_H 4365 2449511949U, // SMLALT_ZZZ_S 4366 339271869U, // SMLALv16i8_v8i16 4367 2485186234U, // SMLALv2i32_indexed 4368 2485186234U, // SMLALv2i32_v2i64 4369 338751162U, // SMLALv4i16_indexed 4370 338751162U, // SMLALv4i16_v4i32 4371 337699005U, // SMLALv4i32_indexed 4372 337699005U, // SMLALv4i32_v2i64 4373 2486231229U, // SMLALv8i16_indexed 4374 2486231229U, // SMLALv8i16_v4i32 4375 2486759098U, // SMLALv8i8_v8i16 4376 2315273737U, // SMLSLB_ZZZI_D 4377 2449507849U, // SMLSLB_ZZZI_S 4378 2315273737U, // SMLSLB_ZZZ_D 4379 29386249U, // SMLSLB_ZZZ_H 4380 2449507849U, // SMLSLB_ZZZ_S 4381 2315278011U, // SMLSLT_ZZZI_D 4382 2449512123U, // SMLSLT_ZZZI_S 4383 2315278011U, // SMLSLT_ZZZ_D 4384 29390523U, // SMLSLT_ZZZ_H 4385 2449512123U, // SMLSLT_ZZZ_S 4386 339272001U, // SMLSLv16i8_v8i16 4387 2485186630U, // SMLSLv2i32_indexed 4388 2485186630U, // SMLSLv2i32_v2i64 4389 338751558U, // SMLSLv4i16_indexed 4390 338751558U, // SMLSLv4i16_v4i32 4391 337699137U, // SMLSLv4i32_indexed 4392 337699137U, // SMLSLv4i32_v2i64 4393 2486231361U, // SMLSLv8i16_indexed 4394 2486231361U, // SMLSLv8i16_v4i32 4395 2486759494U, // SMLSLv8i8_v8i16 4396 67164278U, // SMOVvi16to32 4397 67164278U, // SMOVvi16to64 4398 2214647926U, // SMOVvi32to64 4399 2214647926U, // SMOVvi8to32 4400 2214647926U, // SMOVvi8to64 4401 2248199974U, // SMSUBLrrr 4402 369110218U, // SMULH_ZPmZ_B 4403 369118410U, // SMULH_ZPmZ_D 4404 2555931850U, // SMULH_ZPmZ_H 4405 369134794U, // SMULH_ZPmZ_S 4406 2583702730U, // SMULH_ZZZ_B 4407 2415938762U, // SMULH_ZZZ_D 4408 2388683978U, // SMULH_ZZZ_H 4409 2617281738U, // SMULH_ZZZ_S 4410 2248199370U, // SMULHrr 4411 2617263539U, // SMULLB_ZZZI_D 4412 2348844467U, // SMULLB_ZZZI_S 4413 2617263539U, // SMULLB_ZZZ_D 4414 261645747U, // SMULLB_ZZZ_H 4415 2348844467U, // SMULLB_ZZZ_S 4416 2617267851U, // SMULLT_ZZZI_D 4417 2348848779U, // SMULLT_ZZZI_S 4418 2617267851U, // SMULLT_ZZZ_D 4419 261650059U, // SMULLT_ZZZ_H 4420 2348848779U, // SMULLT_ZZZ_S 4421 70820127U, // SMULLv16i8_v8i16 4422 2216734694U, // SMULLv2i32_indexed 4423 2216734694U, // SMULLv2i32_v2i64 4424 70299622U, // SMULLv4i16_indexed 4425 70299622U, // SMULLv4i16_v4i32 4426 69247263U, // SMULLv4i32_indexed 4427 69247263U, // SMULLv4i32_v2i64 4428 2217779487U, // SMULLv8i16_indexed 4429 2217779487U, // SMULLv8i16_v4i32 4430 2218307558U, // SMULLv8i8_v8i16 4431 0U, // SPACE 4432 2516593123U, // SPLICE_ZPZZ_B 4433 2516601315U, // SPLICE_ZPZZ_D 4434 2388158947U, // SPLICE_ZPZZ_H 4435 2516617699U, // SPLICE_ZPZZ_S 4436 2516593123U, // SPLICE_ZPZ_B 4437 2516601315U, // SPLICE_ZPZ_D 4438 2388158947U, // SPLICE_ZPZ_H 4439 2516617699U, // SPLICE_ZPZ_S 4440 13457U, // SQABS_ZPmZ_B 4441 2147505297U, // SQABS_ZPmZ_D 4442 34108561U, // SQABS_ZPmZ_H 4443 38033U, // SQABS_ZPmZ_S 4444 2215687313U, // SQABSv16i8 4445 100717713U, // SQABSv1i16 4446 100717713U, // SQABSv1i32 4447 100717713U, // SQABSv1i64 4448 100717713U, // SQABSv1i8 4449 2216211601U, // SQABSv2i32 4450 69252241U, // SQABSv2i64 4451 2217260177U, // SQABSv4i16 4452 70300817U, // SQABSv4i32 4453 2218308753U, // SQABSv8i16 4454 71349393U, // SQABSv8i8 4455 2583701921U, // SQADD_ZI_B 4456 2415937953U, // SQADD_ZI_D 4457 241199521U, // SQADD_ZI_H 4458 2617280929U, // SQADD_ZI_S 4459 369109409U, // SQADD_ZPmZ_B 4460 369117601U, // SQADD_ZPmZ_D 4461 2555931041U, // SQADD_ZPmZ_H 4462 369133985U, // SQADD_ZPmZ_S 4463 2583701921U, // SQADD_ZZZ_B 4464 2415937953U, // SQADD_ZZZ_D 4465 2388683169U, // SQADD_ZZZ_H 4466 2617280929U, // SQADD_ZZZ_S 4467 68200865U, // SQADDv16i8 4468 2248198561U, // SQADDv1i16 4469 2248198561U, // SQADDv1i32 4470 2248198561U, // SQADDv1i64 4471 2248198561U, // SQADDv1i8 4472 2216208801U, // SQADDv2i32 4473 2216733089U, // SQADDv2i64 4474 69773729U, // SQADDv4i16 4475 70298017U, // SQADDv4i32 4476 2218305953U, // SQADDv8i16 4477 2218830241U, // SQADDv8i8 4478 2583701854U, // SQCADD_ZZI_B 4479 2415937886U, // SQCADD_ZZI_D 4480 2388683102U, // SQCADD_ZZI_H 4481 2617280862U, // SQCADD_ZZI_S 4482 805356637U, // SQDECB_XPiI 4483 1543554141U, // SQDECB_XPiWdI 4484 805357879U, // SQDECD_XPiI 4485 1543555383U, // SQDECD_XPiWdI 4486 805325111U, // SQDECD_ZPiI 4487 805358551U, // SQDECH_XPiI 4488 1543556055U, // SQDECH_XPiWdI 4489 8416215U, // SQDECH_ZPiI 4490 2583744997U, // SQDECP_XPWd_B 4491 2415972837U, // SQDECP_XPWd_D 4492 2348863973U, // SQDECP_XPWd_H 4493 2617299429U, // SQDECP_XPWd_S 4494 436261349U, // SQDECP_XP_B 4495 268489189U, // SQDECP_XP_D 4496 201380325U, // SQDECP_XP_H 4497 469815781U, // SQDECP_XP_S 4498 134238693U, // SQDECP_ZP_D 4499 846754277U, // SQDECP_ZP_H 4500 167809509U, // SQDECP_ZP_S 4501 805361932U, // SQDECW_XPiI 4502 1543559436U, // SQDECW_XPiWdI 4503 805345548U, // SQDECW_ZPiI 4504 2315277699U, // SQDMLALBT_ZZZ_D 4505 29390211U, // SQDMLALBT_ZZZ_H 4506 2449511811U, // SQDMLALBT_ZZZ_S 4507 2315273422U, // SQDMLALB_ZZZI_D 4508 2449507534U, // SQDMLALB_ZZZI_S 4509 2315273422U, // SQDMLALB_ZZZ_D 4510 29385934U, // SQDMLALB_ZZZ_H 4511 2449507534U, // SQDMLALB_ZZZ_S 4512 2315277819U, // SQDMLALT_ZZZI_D 4513 2449511931U, // SQDMLALT_ZZZI_S 4514 2315277819U, // SQDMLALT_ZZZ_D 4515 29390331U, // SQDMLALT_ZZZ_H 4516 2449511931U, // SQDMLALT_ZZZ_S 4517 2684448426U, // SQDMLALi16 4518 2684448426U, // SQDMLALi32 4519 2684448426U, // SQDMLALv1i32_indexed 4520 2684448426U, // SQDMLALv1i64_indexed 4521 2485186218U, // SQDMLALv2i32_indexed 4522 2485186218U, // SQDMLALv2i32_v2i64 4523 338751146U, // SQDMLALv4i16_indexed 4524 338751146U, // SQDMLALv4i16_v4i32 4525 337698987U, // SQDMLALv4i32_indexed 4526 337698987U, // SQDMLALv4i32_v2i64 4527 2486231211U, // SQDMLALv8i16_indexed 4528 2486231211U, // SQDMLALv8i16_v4i32 4529 2315277728U, // SQDMLSLBT_ZZZ_D 4530 29390240U, // SQDMLSLBT_ZZZ_H 4531 2449511840U, // SQDMLSLBT_ZZZ_S 4532 2315273719U, // SQDMLSLB_ZZZI_D 4533 2449507831U, // SQDMLSLB_ZZZI_S 4534 2315273719U, // SQDMLSLB_ZZZ_D 4535 29386231U, // SQDMLSLB_ZZZ_H 4536 2449507831U, // SQDMLSLB_ZZZ_S 4537 2315277993U, // SQDMLSLT_ZZZI_D 4538 2449512105U, // SQDMLSLT_ZZZI_S 4539 2315277993U, // SQDMLSLT_ZZZ_D 4540 29390505U, // SQDMLSLT_ZZZ_H 4541 2449512105U, // SQDMLSLT_ZZZ_S 4542 2684448822U, // SQDMLSLi16 4543 2684448822U, // SQDMLSLi32 4544 2684448822U, // SQDMLSLv1i32_indexed 4545 2684448822U, // SQDMLSLv1i64_indexed 4546 2485186614U, // SQDMLSLv2i32_indexed 4547 2485186614U, // SQDMLSLv2i32_v2i64 4548 338751542U, // SQDMLSLv4i16_indexed 4549 338751542U, // SQDMLSLv4i16_v4i32 4550 337699119U, // SQDMLSLv4i32_indexed 4551 337699119U, // SQDMLSLv4i32_v2i64 4552 2486231343U, // SQDMLSLv8i16_indexed 4553 2486231343U, // SQDMLSLv8i16_v4i32 4554 2415938743U, // SQDMULH_ZZZI_D 4555 2388683959U, // SQDMULH_ZZZI_H 4556 2617281719U, // SQDMULH_ZZZI_S 4557 2583702711U, // SQDMULH_ZZZ_B 4558 2415938743U, // SQDMULH_ZZZ_D 4559 2388683959U, // SQDMULH_ZZZ_H 4560 2617281719U, // SQDMULH_ZZZ_S 4561 2248199351U, // SQDMULHv1i16 4562 2248199351U, // SQDMULHv1i16_indexed 4563 2248199351U, // SQDMULHv1i32 4564 2248199351U, // SQDMULHv1i32_indexed 4565 2216209591U, // SQDMULHv2i32 4566 2216209591U, // SQDMULHv2i32_indexed 4567 69774519U, // SQDMULHv4i16 4568 69774519U, // SQDMULHv4i16_indexed 4569 70298807U, // SQDMULHv4i32 4570 70298807U, // SQDMULHv4i32_indexed 4571 2218306743U, // SQDMULHv8i16 4572 2218306743U, // SQDMULHv8i16_indexed 4573 2617263521U, // SQDMULLB_ZZZI_D 4574 2348844449U, // SQDMULLB_ZZZI_S 4575 2617263521U, // SQDMULLB_ZZZ_D 4576 261645729U, // SQDMULLB_ZZZ_H 4577 2348844449U, // SQDMULLB_ZZZ_S 4578 2617267833U, // SQDMULLT_ZZZI_D 4579 2348848761U, // SQDMULLT_ZZZI_S 4580 2617267833U, // SQDMULLT_ZZZ_D 4581 261650041U, // SQDMULLT_ZZZ_H 4582 2348848761U, // SQDMULLT_ZZZ_S 4583 2248200150U, // SQDMULLi16 4584 2248200150U, // SQDMULLi32 4585 2248200150U, // SQDMULLv1i32_indexed 4586 2248200150U, // SQDMULLv1i64_indexed 4587 2216734678U, // SQDMULLv2i32_indexed 4588 2216734678U, // SQDMULLv2i32_v2i64 4589 70299606U, // SQDMULLv4i16_indexed 4590 70299606U, // SQDMULLv4i16_v4i32 4591 69247245U, // SQDMULLv4i32_indexed 4592 69247245U, // SQDMULLv4i32_v2i64 4593 2217779469U, // SQDMULLv8i16_indexed 4594 2217779469U, // SQDMULLv8i16_v4i32 4595 805356653U, // SQINCB_XPiI 4596 1543554157U, // SQINCB_XPiWdI 4597 805357895U, // SQINCD_XPiI 4598 1543555399U, // SQINCD_XPiWdI 4599 805325127U, // SQINCD_ZPiI 4600 805358567U, // SQINCH_XPiI 4601 1543556071U, // SQINCH_XPiWdI 4602 8416231U, // SQINCH_ZPiI 4603 2583745013U, // SQINCP_XPWd_B 4604 2415972853U, // SQINCP_XPWd_D 4605 2348863989U, // SQINCP_XPWd_H 4606 2617299445U, // SQINCP_XPWd_S 4607 436261365U, // SQINCP_XP_B 4608 268489205U, // SQINCP_XP_D 4609 201380341U, // SQINCP_XP_H 4610 469815797U, // SQINCP_XP_S 4611 134238709U, // SQINCP_ZP_D 4612 846754293U, // SQINCP_ZP_H 4613 167809525U, // SQINCP_ZP_S 4614 805361948U, // SQINCW_XPiI 4615 1543559452U, // SQINCW_XPiWdI 4616 805345564U, // SQINCW_ZPiI 4617 10951U, // SQNEG_ZPmZ_B 4618 2147502791U, // SQNEG_ZPmZ_D 4619 34106055U, // SQNEG_ZPmZ_H 4620 35527U, // SQNEG_ZPmZ_S 4621 2215684807U, // SQNEGv16i8 4622 100715207U, // SQNEGv1i16 4623 100715207U, // SQNEGv1i32 4624 100715207U, // SQNEGv1i64 4625 100715207U, // SQNEGv1i8 4626 2216209095U, // SQNEGv2i32 4627 69249735U, // SQNEGv2i64 4628 2217257671U, // SQNEGv4i16 4629 70298311U, // SQNEGv4i32 4630 2218306247U, // SQNEGv8i16 4631 71346887U, // SQNEGv8i8 4632 2390256488U, // SQRDCMLAH_ZZZI_H 4633 2315291496U, // SQRDCMLAH_ZZZI_S 4634 637545320U, // SQRDCMLAH_ZZZ_B 4635 2281720680U, // SQRDCMLAH_ZZZ_D 4636 2390256488U, // SQRDCMLAH_ZZZ_H 4637 2315291496U, // SQRDCMLAH_ZZZ_S 4638 2281720691U, // SQRDMLAH_ZZZI_D 4639 2390256499U, // SQRDMLAH_ZZZI_H 4640 2315291507U, // SQRDMLAH_ZZZI_S 4641 637545331U, // SQRDMLAH_ZZZ_B 4642 2281720691U, // SQRDMLAH_ZZZ_D 4643 2390256499U, // SQRDMLAH_ZZZ_H 4644 2315291507U, // SQRDMLAH_ZZZ_S 4645 2684447603U, // SQRDMLAHi16_indexed 4646 2684447603U, // SQRDMLAHi32_indexed 4647 2684447603U, // SQRDMLAHv1i16 4648 2684447603U, // SQRDMLAHv1i32 4649 2484661107U, // SQRDMLAHv2i32 4650 2484661107U, // SQRDMLAHv2i32_indexed 4651 338226035U, // SQRDMLAHv4i16 4652 338226035U, // SQRDMLAHv4i16_indexed 4653 338750323U, // SQRDMLAHv4i32 4654 338750323U, // SQRDMLAHv4i32_indexed 4655 2486758259U, // SQRDMLAHv8i16 4656 2486758259U, // SQRDMLAHv8i16_indexed 4657 2281721288U, // SQRDMLSH_ZZZI_D 4658 2390257096U, // SQRDMLSH_ZZZI_H 4659 2315292104U, // SQRDMLSH_ZZZI_S 4660 637545928U, // SQRDMLSH_ZZZ_B 4661 2281721288U, // SQRDMLSH_ZZZ_D 4662 2390257096U, // SQRDMLSH_ZZZ_H 4663 2315292104U, // SQRDMLSH_ZZZ_S 4664 2684448200U, // SQRDMLSHi16_indexed 4665 2684448200U, // SQRDMLSHi32_indexed 4666 2684448200U, // SQRDMLSHv1i16 4667 2684448200U, // SQRDMLSHv1i32 4668 2484661704U, // SQRDMLSHv2i32 4669 2484661704U, // SQRDMLSHv2i32_indexed 4670 338226632U, // SQRDMLSHv4i16 4671 338226632U, // SQRDMLSHv4i16_indexed 4672 338750920U, // SQRDMLSHv4i32 4673 338750920U, // SQRDMLSHv4i32_indexed 4674 2486758856U, // SQRDMLSHv8i16 4675 2486758856U, // SQRDMLSHv8i16_indexed 4676 2415938752U, // SQRDMULH_ZZZI_D 4677 2388683968U, // SQRDMULH_ZZZI_H 4678 2617281728U, // SQRDMULH_ZZZI_S 4679 2583702720U, // SQRDMULH_ZZZ_B 4680 2415938752U, // SQRDMULH_ZZZ_D 4681 2388683968U, // SQRDMULH_ZZZ_H 4682 2617281728U, // SQRDMULH_ZZZ_S 4683 2248199360U, // SQRDMULHv1i16 4684 2248199360U, // SQRDMULHv1i16_indexed 4685 2248199360U, // SQRDMULHv1i32 4686 2248199360U, // SQRDMULHv1i32_indexed 4687 2216209600U, // SQRDMULHv2i32 4688 2216209600U, // SQRDMULHv2i32_indexed 4689 69774528U, // SQRDMULHv4i16 4690 69774528U, // SQRDMULHv4i16_indexed 4691 70298816U, // SQRDMULHv4i32 4692 70298816U, // SQRDMULHv4i32_indexed 4693 2218306752U, // SQRDMULHv8i16 4694 2218306752U, // SQRDMULHv8i16_indexed 4695 369111954U, // SQRSHLR_ZPmZ_B 4696 369120146U, // SQRSHLR_ZPmZ_D 4697 2555933586U, // SQRSHLR_ZPmZ_H 4698 369136530U, // SQRSHLR_ZPmZ_S 4699 369110942U, // SQRSHL_ZPmZ_B 4700 369119134U, // SQRSHL_ZPmZ_D 4701 2555932574U, // SQRSHL_ZPmZ_H 4702 369135518U, // SQRSHL_ZPmZ_S 4703 68202398U, // SQRSHLv16i8 4704 2248200094U, // SQRSHLv1i16 4705 2248200094U, // SQRSHLv1i32 4706 2248200094U, // SQRSHLv1i64 4707 2248200094U, // SQRSHLv1i8 4708 2216210334U, // SQRSHLv2i32 4709 2216734622U, // SQRSHLv2i64 4710 69775262U, // SQRSHLv4i16 4711 70299550U, // SQRSHLv4i32 4712 2218307486U, // SQRSHLv8i16 4713 2218831774U, // SQRSHLv8i8 4714 2348820081U, // SQRSHRNB_ZZI_B 4715 2387109489U, // SQRSHRNB_ZZI_H 4716 2415953521U, // SQRSHRNB_ZZI_S 4717 2449487622U, // SQRSHRNT_ZZI_B 4718 240154374U, // SQRSHRNT_ZZI_H 4719 2281740038U, // SQRSHRNT_ZZI_S 4720 2248200521U, // SQRSHRNb 4721 2248200521U, // SQRSHRNh 4722 2248200521U, // SQRSHRNs 4723 2484134269U, // SQRSHRNv16i8_shift 4724 2216210761U, // SQRSHRNv2i32_shift 4725 69775689U, // SQRSHRNv4i16_shift 4726 2486231421U, // SQRSHRNv4i32_shift 4727 339272061U, // SQRSHRNv8i16_shift 4728 2218832201U, // SQRSHRNv8i8_shift 4729 2348820127U, // SQRSHRUNB_ZZI_B 4730 2387109535U, // SQRSHRUNB_ZZI_H 4731 2415953567U, // SQRSHRUNB_ZZI_S 4732 2449487676U, // SQRSHRUNT_ZZI_B 4733 240154428U, // SQRSHRUNT_ZZI_H 4734 2281740092U, // SQRSHRUNT_ZZI_S 4735 2248200582U, // SQRSHRUNb 4736 2248200582U, // SQRSHRUNh 4737 2248200582U, // SQRSHRUNs 4738 2484134329U, // SQRSHRUNv16i8_shift 4739 2216210822U, // SQRSHRUNv2i32_shift 4740 69775750U, // SQRSHRUNv4i16_shift 4741 2486231481U, // SQRSHRUNv4i32_shift 4742 339272121U, // SQRSHRUNv8i16_shift 4743 2218832262U, // SQRSHRUNv8i8_shift 4744 369111938U, // SQSHLR_ZPmZ_B 4745 369120130U, // SQSHLR_ZPmZ_D 4746 2555933570U, // SQSHLR_ZPmZ_H 4747 369136514U, // SQSHLR_ZPmZ_S 4748 369113048U, // SQSHLU_ZPmI_B 4749 369121240U, // SQSHLU_ZPmI_D 4750 2555934680U, // SQSHLU_ZPmI_H 4751 369137624U, // SQSHLU_ZPmI_S 4752 2248202200U, // SQSHLUb 4753 2248202200U, // SQSHLUd 4754 2248202200U, // SQSHLUh 4755 2248202200U, // SQSHLUs 4756 68204504U, // SQSHLUv16i8_shift 4757 2216212440U, // SQSHLUv2i32_shift 4758 2216736728U, // SQSHLUv2i64_shift 4759 69777368U, // SQSHLUv4i16_shift 4760 70301656U, // SQSHLUv4i32_shift 4761 2218309592U, // SQSHLUv8i16_shift 4762 2218833880U, // SQSHLUv8i8_shift 4763 369110928U, // SQSHL_ZPmI_B 4764 369119120U, // SQSHL_ZPmI_D 4765 2555932560U, // SQSHL_ZPmI_H 4766 369135504U, // SQSHL_ZPmI_S 4767 369110928U, // SQSHL_ZPmZ_B 4768 369119120U, // SQSHL_ZPmZ_D 4769 2555932560U, // SQSHL_ZPmZ_H 4770 369135504U, // SQSHL_ZPmZ_S 4771 2248200080U, // SQSHLb 4772 2248200080U, // SQSHLd 4773 2248200080U, // SQSHLh 4774 2248200080U, // SQSHLs 4775 68202384U, // SQSHLv16i8 4776 68202384U, // SQSHLv16i8_shift 4777 2248200080U, // SQSHLv1i16 4778 2248200080U, // SQSHLv1i32 4779 2248200080U, // SQSHLv1i64 4780 2248200080U, // SQSHLv1i8 4781 2216210320U, // SQSHLv2i32 4782 2216210320U, // SQSHLv2i32_shift 4783 2216734608U, // SQSHLv2i64 4784 2216734608U, // SQSHLv2i64_shift 4785 69775248U, // SQSHLv4i16 4786 69775248U, // SQSHLv4i16_shift 4787 70299536U, // SQSHLv4i32 4788 70299536U, // SQSHLv4i32_shift 4789 2218307472U, // SQSHLv8i16 4790 2218307472U, // SQSHLv8i16_shift 4791 2218831760U, // SQSHLv8i8 4792 2218831760U, // SQSHLv8i8_shift 4793 2348820063U, // SQSHRNB_ZZI_B 4794 2387109471U, // SQSHRNB_ZZI_H 4795 2415953503U, // SQSHRNB_ZZI_S 4796 2449487604U, // SQSHRNT_ZZI_B 4797 240154356U, // SQSHRNT_ZZI_H 4798 2281740020U, // SQSHRNT_ZZI_S 4799 2248200505U, // SQSHRNb 4800 2248200505U, // SQSHRNh 4801 2248200505U, // SQSHRNs 4802 2484134251U, // SQSHRNv16i8_shift 4803 2216210745U, // SQSHRNv2i32_shift 4804 69775673U, // SQSHRNv4i16_shift 4805 2486231403U, // SQSHRNv4i32_shift 4806 339272043U, // SQSHRNv8i16_shift 4807 2218832185U, // SQSHRNv8i8_shift 4808 2348820117U, // SQSHRUNB_ZZI_B 4809 2387109525U, // SQSHRUNB_ZZI_H 4810 2415953557U, // SQSHRUNB_ZZI_S 4811 2449487666U, // SQSHRUNT_ZZI_B 4812 240154418U, // SQSHRUNT_ZZI_H 4813 2281740082U, // SQSHRUNT_ZZI_S 4814 2248200573U, // SQSHRUNb 4815 2248200573U, // SQSHRUNh 4816 2248200573U, // SQSHRUNs 4817 2484134319U, // SQSHRUNv16i8_shift 4818 2216210813U, // SQSHRUNv2i32_shift 4819 69775741U, // SQSHRUNv4i16_shift 4820 2486231471U, // SQSHRUNv4i32_shift 4821 339272111U, // SQSHRUNv8i16_shift 4822 2218832253U, // SQSHRUNv8i8_shift 4823 369111860U, // SQSUBR_ZPmZ_B 4824 369120052U, // SQSUBR_ZPmZ_D 4825 2555933492U, // SQSUBR_ZPmZ_H 4826 369136436U, // SQSUBR_ZPmZ_S 4827 2583701534U, // SQSUB_ZI_B 4828 2415937566U, // SQSUB_ZI_D 4829 241199134U, // SQSUB_ZI_H 4830 2617280542U, // SQSUB_ZI_S 4831 369109022U, // SQSUB_ZPmZ_B 4832 369117214U, // SQSUB_ZPmZ_D 4833 2555930654U, // SQSUB_ZPmZ_H 4834 369133598U, // SQSUB_ZPmZ_S 4835 2583701534U, // SQSUB_ZZZ_B 4836 2415937566U, // SQSUB_ZZZ_D 4837 2388682782U, // SQSUB_ZZZ_H 4838 2617280542U, // SQSUB_ZZZ_S 4839 68200478U, // SQSUBv16i8 4840 2248198174U, // SQSUBv1i16 4841 2248198174U, // SQSUBv1i32 4842 2248198174U, // SQSUBv1i64 4843 2248198174U, // SQSUBv1i8 4844 2216208414U, // SQSUBv2i32 4845 2216732702U, // SQSUBv2i64 4846 69773342U, // SQSUBv4i16 4847 70297630U, // SQSUBv4i32 4848 2218305566U, // SQSUBv8i16 4849 2218829854U, // SQSUBv8i8 4850 201336453U, // SQXTNB_ZZ_B 4851 843605637U, // SQXTNB_ZZ_H 4852 268469893U, // SQXTNB_ZZ_S 4853 302004002U, // SQXTNT_ZZ_B 4854 844134178U, // SQXTNT_ZZ_H 4855 134256418U, // SQXTNT_ZZ_S 4856 2484134303U, // SQXTNv16i8 4857 100716911U, // SQXTNv1i16 4858 100716911U, // SQXTNv1i32 4859 100716911U, // SQXTNv1i8 4860 68727151U, // SQXTNv2i32 4861 69775727U, // SQXTNv4i16 4862 338747807U, // SQXTNv4i32 4863 339272095U, // SQXTNv8i16 4864 2218832239U, // SQXTNv8i8 4865 201336490U, // SQXTUNB_ZZ_B 4866 843605674U, // SQXTUNB_ZZ_H 4867 268469930U, // SQXTUNB_ZZ_S 4868 302004039U, // SQXTUNT_ZZ_B 4869 844134215U, // SQXTUNT_ZZ_H 4870 134256455U, // SQXTUNT_ZZ_S 4871 2484134340U, // SQXTUNv16i8 4872 100716944U, // SQXTUNv1i16 4873 100716944U, // SQXTUNv1i32 4874 100716944U, // SQXTUNv1i8 4875 68727184U, // SQXTUNv2i32 4876 69775760U, // SQXTUNv4i16 4877 338747844U, // SQXTUNv4i32 4878 339272132U, // SQXTUNv8i16 4879 2218832272U, // SQXTUNv8i8 4880 369109363U, // SRHADD_ZPmZ_B 4881 369117555U, // SRHADD_ZPmZ_D 4882 2555930995U, // SRHADD_ZPmZ_H 4883 369133939U, // SRHADD_ZPmZ_S 4884 68200819U, // SRHADDv16i8 4885 2216208755U, // SRHADDv2i32 4886 69773683U, // SRHADDv4i16 4887 70297971U, // SRHADDv4i32 4888 2218305907U, // SRHADDv8i16 4889 2218830195U, // SRHADDv8i8 4890 637546101U, // SRI_ZZI_B 4891 2281721461U, // SRI_ZZI_D 4892 242773621U, // SRI_ZZI_H 4893 2315292277U, // SRI_ZZI_S 4894 2684448373U, // SRId 4895 336653941U, // SRIv16i8_shift 4896 2484661877U, // SRIv2i32_shift 4897 2485186165U, // SRIv2i64_shift 4898 338226805U, // SRIv4i16_shift 4899 338751093U, // SRIv4i32_shift 4900 2486759029U, // SRIv8i16_shift 4901 2487283317U, // SRIv8i8_shift 4902 369111972U, // SRSHLR_ZPmZ_B 4903 369120164U, // SRSHLR_ZPmZ_D 4904 2555933604U, // SRSHLR_ZPmZ_H 4905 369136548U, // SRSHLR_ZPmZ_S 4906 369110958U, // SRSHL_ZPmZ_B 4907 369119150U, // SRSHL_ZPmZ_D 4908 2555932590U, // SRSHL_ZPmZ_H 4909 369135534U, // SRSHL_ZPmZ_S 4910 68202414U, // SRSHLv16i8 4911 2248200110U, // SRSHLv1i64 4912 2216210350U, // SRSHLv2i32 4913 2216734638U, // SRSHLv2i64 4914 69775278U, // SRSHLv4i16 4915 70299566U, // SRSHLv4i32 4916 2218307502U, // SRSHLv8i16 4917 2218831790U, // SRSHLv8i8 4918 369111900U, // SRSHR_ZPmI_B 4919 369120092U, // SRSHR_ZPmI_D 4920 2555933532U, // SRSHR_ZPmI_H 4921 369136476U, // SRSHR_ZPmI_S 4922 2248201052U, // SRSHRd 4923 68203356U, // SRSHRv16i8_shift 4924 2216211292U, // SRSHRv2i32_shift 4925 2216735580U, // SRSHRv2i64_shift 4926 69776220U, // SRSHRv4i16_shift 4927 70300508U, // SRSHRv4i32_shift 4928 2218308444U, // SRSHRv8i16_shift 4929 2218832732U, // SRSHRv8i8_shift 4930 637543186U, // SRSRA_ZZI_B 4931 2281718546U, // SRSRA_ZZI_D 4932 242770706U, // SRSRA_ZZI_H 4933 2315289362U, // SRSRA_ZZI_S 4934 2684445458U, // SRSRAd 4935 336651026U, // SRSRAv16i8_shift 4936 2484658962U, // SRSRAv2i32_shift 4937 2485183250U, // SRSRAv2i64_shift 4938 338223890U, // SRSRAv4i16_shift 4939 338748178U, // SRSRAv4i32_shift 4940 2486756114U, // SRSRAv8i16_shift 4941 2487280402U, // SRSRAv8i8_shift 4942 2617263505U, // SSHLLB_ZZI_D 4943 2409129361U, // SSHLLB_ZZI_H 4944 2348844433U, // SSHLLB_ZZI_S 4945 2617267817U, // SSHLLT_ZZI_D 4946 2409133673U, // SSHLLT_ZZI_H 4947 2348848745U, // SSHLLT_ZZI_S 4948 70820093U, // SSHLLv16i8_shift 4949 2216734664U, // SSHLLv2i32_shift 4950 70299592U, // SSHLLv4i16_shift 4951 69247229U, // SSHLLv4i32_shift 4952 2217779453U, // SSHLLv8i16_shift 4953 2218307528U, // SSHLLv8i8_shift 4954 68202428U, // SSHLv16i8 4955 2248200124U, // SSHLv1i64 4956 2216210364U, // SSHLv2i32 4957 2216734652U, // SSHLv2i64 4958 69775292U, // SSHLv4i16 4959 70299580U, // SSHLv4i32 4960 2218307516U, // SSHLv8i16 4961 2218831804U, // SSHLv8i8 4962 2248201066U, // SSHRd 4963 68203370U, // SSHRv16i8_shift 4964 2216211306U, // SSHRv2i32_shift 4965 2216735594U, // SSHRv2i64_shift 4966 69776234U, // SSHRv4i16_shift 4967 70300522U, // SSHRv4i32_shift 4968 2218308458U, // SSHRv8i16_shift 4969 2218832746U, // SSHRv8i8_shift 4970 637543200U, // SSRA_ZZI_B 4971 2281718560U, // SSRA_ZZI_D 4972 242770720U, // SSRA_ZZI_H 4973 2315289376U, // SSRA_ZZI_S 4974 2684445472U, // SSRAd 4975 336651040U, // SSRAv16i8_shift 4976 2484658976U, // SSRAv2i32_shift 4977 2485183264U, // SSRAv2i64_shift 4978 338223904U, // SSRAv4i16_shift 4979 338748192U, // SSRAv4i32_shift 4980 2486756128U, // SSRAv8i16_shift 4981 2487280416U, // SSRAv8i8_shift 4982 2288649122U, // SST1B_D_IMM 4983 2691302306U, // SST1B_D_REAL 4984 2691302306U, // SST1B_D_SXTW 4985 2691302306U, // SST1B_D_UXTW 4986 2322211746U, // SST1B_S_IMM 4987 2691310498U, // SST1B_S_SXTW 4988 2691310498U, // SST1B_S_UXTW 4989 2288650464U, // SST1D_IMM 4990 2691303648U, // SST1D_REAL 4991 2691303648U, // SST1D_SCALED_SCALED_REAL 4992 2691303648U, // SST1D_SXTW 4993 2691303648U, // SST1D_SXTW_SCALED 4994 2691303648U, // SST1D_UXTW 4995 2691303648U, // SST1D_UXTW_SCALED 4996 2288651035U, // SST1H_D_IMM 4997 2691304219U, // SST1H_D_REAL 4998 2691304219U, // SST1H_D_SCALED_SCALED_REAL 4999 2691304219U, // SST1H_D_SXTW 5000 2691304219U, // SST1H_D_SXTW_SCALED 5001 2691304219U, // SST1H_D_UXTW 5002 2691304219U, // SST1H_D_UXTW_SCALED 5003 2322213659U, // SST1H_S_IMM 5004 2691312411U, // SST1H_S_SXTW 5005 2691312411U, // SST1H_S_SXTW_SCALED 5006 2691312411U, // SST1H_S_UXTW 5007 2691312411U, // SST1H_S_UXTW_SCALED 5008 2288654531U, // SST1W_D_IMM 5009 2691307715U, // SST1W_D_REAL 5010 2691307715U, // SST1W_D_SCALED_SCALED_REAL 5011 2691307715U, // SST1W_D_SXTW 5012 2691307715U, // SST1W_D_SXTW_SCALED 5013 2691307715U, // SST1W_D_UXTW 5014 2691307715U, // SST1W_D_UXTW_SCALED 5015 2322217155U, // SST1W_IMM 5016 2691315907U, // SST1W_SXTW 5017 2691315907U, // SST1W_SXTW_SCALED 5018 2691315907U, // SST1W_UXTW 5019 2691315907U, // SST1W_UXTW_SCALED 5020 2617267598U, // SSUBLBT_ZZZ_D 5021 261649806U, // SSUBLBT_ZZZ_H 5022 2348848526U, // SSUBLBT_ZZZ_S 5023 2617263434U, // SSUBLB_ZZZ_D 5024 261645642U, // SSUBLB_ZZZ_H 5025 2348844362U, // SSUBLB_ZZZ_S 5026 2617264081U, // SSUBLTB_ZZZ_D 5027 261646289U, // SSUBLTB_ZZZ_H 5028 2348845009U, // SSUBLTB_ZZZ_S 5029 2617267741U, // SSUBLT_ZZZ_D 5030 261649949U, // SSUBLT_ZZZ_H 5031 2348848669U, // SSUBLT_ZZZ_S 5032 70820045U, // SSUBLv16i8_v8i16 5033 2216734518U, // SSUBLv2i32_v2i64 5034 70299446U, // SSUBLv4i16_v4i32 5035 69247181U, // SSUBLv4i32_v2i64 5036 2217779405U, // SSUBLv8i16_v4i32 5037 2218307382U, // SSUBLv8i8_v8i16 5038 2415937586U, // SSUBWB_ZZZ_D 5039 241199154U, // SSUBWB_ZZZ_H 5040 2617280562U, // SSUBWB_ZZZ_S 5041 2415941539U, // SSUBWT_ZZZ_D 5042 241203107U, // SSUBWT_ZZZ_H 5043 2617284515U, // SSUBWT_ZZZ_S 5044 2218303982U, // SSUBWv16i8_v8i16 5045 2216737013U, // SSUBWv2i32_v2i64 5046 70301941U, // SSUBWv4i16_v4i32 5047 2216731118U, // SSUBWv4i32_v2i64 5048 70296046U, // SSUBWv8i16_v4i32 5049 2218309877U, // SSUBWv8i8_v8i16 5050 2691326882U, // ST1B 5051 2691302306U, // ST1B_D 5052 2691302306U, // ST1B_D_IMM 5053 2691335074U, // ST1B_H 5054 2691335074U, // ST1B_H_IMM 5055 2691326882U, // ST1B_IMM 5056 2691310498U, // ST1B_S 5057 2691310498U, // ST1B_S_IMM 5058 2691303648U, // ST1D 5059 2691303648U, // ST1D_IMM 5060 172102U, // ST1Fourv16b 5061 14860358U, // ST1Fourv16b_POST 5062 188486U, // ST1Fourv1d 5063 15401030U, // ST1Fourv1d_POST 5064 204870U, // ST1Fourv2d 5065 14893126U, // ST1Fourv2d_POST 5066 221254U, // ST1Fourv2s 5067 15433798U, // ST1Fourv2s_POST 5068 237638U, // ST1Fourv4h 5069 15450182U, // ST1Fourv4h_POST 5070 254022U, // ST1Fourv4s 5071 14942278U, // ST1Fourv4s_POST 5072 270406U, // ST1Fourv8b 5073 15482950U, // ST1Fourv8b_POST 5074 286790U, // ST1Fourv8h 5075 14975046U, // ST1Fourv8h_POST 5076 2691336987U, // ST1H 5077 2691304219U, // ST1H_D 5078 2691304219U, // ST1H_D_IMM 5079 2691336987U, // ST1H_IMM 5080 2691312411U, // ST1H_S 5081 2691312411U, // ST1H_S_IMM 5082 172102U, // ST1Onev16b 5083 15908934U, // ST1Onev16b_POST 5084 188486U, // ST1Onev1d 5085 16449606U, // ST1Onev1d_POST 5086 204870U, // ST1Onev2d 5087 15941702U, // ST1Onev2d_POST 5088 221254U, // ST1Onev2s 5089 16482374U, // ST1Onev2s_POST 5090 237638U, // ST1Onev4h 5091 16498758U, // ST1Onev4h_POST 5092 254022U, // ST1Onev4s 5093 15990854U, // ST1Onev4s_POST 5094 270406U, // ST1Onev8b 5095 16531526U, // ST1Onev8b_POST 5096 286790U, // ST1Onev8h 5097 16023622U, // ST1Onev8h_POST 5098 172102U, // ST1Threev16b 5099 18530374U, // ST1Threev16b_POST 5100 188486U, // ST1Threev1d 5101 19071046U, // ST1Threev1d_POST 5102 204870U, // ST1Threev2d 5103 18563142U, // ST1Threev2d_POST 5104 221254U, // ST1Threev2s 5105 19103814U, // ST1Threev2s_POST 5106 237638U, // ST1Threev4h 5107 19120198U, // ST1Threev4h_POST 5108 254022U, // ST1Threev4s 5109 18612294U, // ST1Threev4s_POST 5110 270406U, // ST1Threev8b 5111 19152966U, // ST1Threev8b_POST 5112 286790U, // ST1Threev8h 5113 18645062U, // ST1Threev8h_POST 5114 172102U, // ST1Twov16b 5115 15384646U, // ST1Twov16b_POST 5116 188486U, // ST1Twov1d 5117 15925318U, // ST1Twov1d_POST 5118 204870U, // ST1Twov2d 5119 15417414U, // ST1Twov2d_POST 5120 221254U, // ST1Twov2s 5121 15958086U, // ST1Twov2s_POST 5122 237638U, // ST1Twov4h 5123 15974470U, // ST1Twov4h_POST 5124 254022U, // ST1Twov4s 5125 15466566U, // ST1Twov4s_POST 5126 270406U, // ST1Twov8b 5127 16007238U, // ST1Twov8b_POST 5128 286790U, // ST1Twov8h 5129 15499334U, // ST1Twov8h_POST 5130 2691315907U, // ST1W 5131 2691307715U, // ST1W_D 5132 2691307715U, // ST1W_D_IMM 5133 2691315907U, // ST1W_IMM 5134 409670U, // ST1i16 5135 1607770182U, // ST1i16_POST 5136 417862U, // ST1i32 5137 1641340998U, // ST1i32_POST 5138 426054U, // ST1i64 5139 1674911814U, // ST1i64_POST 5140 434246U, // ST1i8 5141 1708482630U, // ST1i8_POST 5142 2691326911U, // ST2B 5143 2691326911U, // ST2B_IMM 5144 2691303660U, // ST2D 5145 2691303660U, // ST2D_IMM 5146 2255014563U, // ST2GOffset 5147 543779491U, // ST2GPostIndex 5148 2691263139U, // ST2GPreIndex 5149 2691337016U, // ST2H 5150 2691337016U, // ST2H_IMM 5151 172521U, // ST2Twov16b 5152 15385065U, // ST2Twov16b_POST 5153 205289U, // ST2Twov2d 5154 15417833U, // ST2Twov2d_POST 5155 221673U, // ST2Twov2s 5156 15958505U, // ST2Twov2s_POST 5157 238057U, // ST2Twov4h 5158 15974889U, // ST2Twov4h_POST 5159 254441U, // ST2Twov4s 5160 15466985U, // ST2Twov4s_POST 5161 270825U, // ST2Twov8b 5162 16007657U, // ST2Twov8b_POST 5163 287209U, // ST2Twov8h 5164 15499753U, // ST2Twov8h_POST 5165 2691315927U, // ST2W 5166 2691315927U, // ST2W_IMM 5167 410089U, // ST2i16 5168 1641325033U, // ST2i16_POST 5169 418281U, // ST2i32 5170 1674895849U, // ST2i32_POST 5171 426473U, // ST2i64 5172 1742021097U, // ST2i64_POST 5173 434665U, // ST2i8 5174 1607819753U, // ST2i8_POST 5175 2691326932U, // ST3B 5176 2691326932U, // ST3B_IMM 5177 2691303672U, // ST3D 5178 2691303672U, // ST3D_IMM 5179 2691337028U, // ST3H 5180 2691337028U, // ST3H_IMM 5181 172587U, // ST3Threev16b 5182 18530859U, // ST3Threev16b_POST 5183 205355U, // ST3Threev2d 5184 18563627U, // ST3Threev2d_POST 5185 221739U, // ST3Threev2s 5186 19104299U, // ST3Threev2s_POST 5187 238123U, // ST3Threev4h 5188 19120683U, // ST3Threev4h_POST 5189 254507U, // ST3Threev4s 5190 18612779U, // ST3Threev4s_POST 5191 270891U, // ST3Threev8b 5192 19153451U, // ST3Threev8b_POST 5193 287275U, // ST3Threev8h 5194 18645547U, // ST3Threev8h_POST 5195 2691315939U, // ST3W 5196 2691315939U, // ST3W_IMM 5197 410155U, // ST3i16 5198 1775542827U, // ST3i16_POST 5199 418347U, // ST3i32 5200 1809113643U, // ST3i32_POST 5201 426539U, // ST3i64 5202 1842684459U, // ST3i64_POST 5203 434731U, // ST3i8 5204 1876255275U, // ST3i8_POST 5205 2691326944U, // ST4B 5206 2691326944U, // ST4B_IMM 5207 2691303684U, // ST4D 5208 2691303684U, // ST4D_IMM 5209 172604U, // ST4Fourv16b 5210 14860860U, // ST4Fourv16b_POST 5211 205372U, // ST4Fourv2d 5212 14893628U, // ST4Fourv2d_POST 5213 221756U, // ST4Fourv2s 5214 15434300U, // ST4Fourv2s_POST 5215 238140U, // ST4Fourv4h 5216 15450684U, // ST4Fourv4h_POST 5217 254524U, // ST4Fourv4s 5218 14942780U, // ST4Fourv4s_POST 5219 270908U, // ST4Fourv8b 5220 15483452U, // ST4Fourv8b_POST 5221 287292U, // ST4Fourv8h 5222 14975548U, // ST4Fourv8h_POST 5223 2691337040U, // ST4H 5224 2691337040U, // ST4H_IMM 5225 2691315951U, // ST4W 5226 2691315951U, // ST4W_IMM 5227 410172U, // ST4i16 5228 1674879548U, // ST4i16_POST 5229 418364U, // ST4i32 5230 1742004796U, // ST4i32_POST 5231 426556U, // ST4i64 5232 1909793340U, // ST4i64_POST 5233 434748U, // ST4i8 5234 1641374268U, // ST4i8_POST 5235 2255016130U, // STGM 5236 2255014627U, // STGOffset 5237 100717079U, // STGPi 5238 543779555U, // STGPostIndex 5239 536965655U, // STGPpost 5240 536965655U, // STGPpre 5241 2691263203U, // STGPreIndex 5242 0U, // STGloop 5243 2255013612U, // STLLRB 5244 2255015216U, // STLLRH 5245 2255016884U, // STLLRW 5246 2255016884U, // STLLRX 5247 2255013620U, // STLRB 5248 2255015224U, // STLRH 5249 2255016897U, // STLRW 5250 2255016897U, // STLRX 5251 2255013670U, // STLURBi 5252 2255015274U, // STLURHi 5253 2255016994U, // STLURWi 5254 2255016994U, // STLURXi 5255 2248200911U, // STLXPW 5256 2248200911U, // STLXPX 5257 100714317U, // STLXRB 5258 100715921U, // STLXRH 5259 100717666U, // STLXRW 5260 100717666U, // STLXRX 5261 100717175U, // STNPDi 5262 100717175U, // STNPQi 5263 100717175U, // STNPSi 5264 100717175U, // STNPWi 5265 100717175U, // STNPXi 5266 2691326874U, // STNT1B_ZRI 5267 2691326874U, // STNT1B_ZRR 5268 2288649114U, // STNT1B_ZZR_D_REAL 5269 2322211738U, // STNT1B_ZZR_S_REAL 5270 2691303640U, // STNT1D_ZRI 5271 2691303640U, // STNT1D_ZRR 5272 2288650456U, // STNT1D_ZZR_D_REAL 5273 2691336979U, // STNT1H_ZRI 5274 2691336979U, // STNT1H_ZRR 5275 2288651027U, // STNT1H_ZZR_D_REAL 5276 2322213651U, // STNT1H_ZZR_S_REAL 5277 2691315899U, // STNT1W_ZRI 5278 2691315899U, // STNT1W_ZRR 5279 2288654523U, // STNT1W_ZZR_D_REAL 5280 2322217147U, // STNT1W_ZZR_S_REAL 5281 100717213U, // STPDi 5282 536965789U, // STPDpost 5283 536965789U, // STPDpre 5284 100717213U, // STPQi 5285 536965789U, // STPQpost 5286 536965789U, // STPQpre 5287 100717213U, // STPSi 5288 536965789U, // STPSpost 5289 536965789U, // STPSpre 5290 100717213U, // STPWi 5291 536965789U, // STPWpost 5292 536965789U, // STPWpre 5293 100717213U, // STPXi 5294 536965789U, // STPXpost 5295 536965789U, // STPXpre 5296 543778578U, // STRBBpost 5297 2691262226U, // STRBBpre 5298 2255013650U, // STRBBroW 5299 2255013650U, // STRBBroX 5300 2255013650U, // STRBBui 5301 543781899U, // STRBpost 5302 2691265547U, // STRBpre 5303 2255016971U, // STRBroW 5304 2255016971U, // STRBroX 5305 2255016971U, // STRBui 5306 543781899U, // STRDpost 5307 2691265547U, // STRDpre 5308 2255016971U, // STRDroW 5309 2255016971U, // STRDroX 5310 2255016971U, // STRDui 5311 543780182U, // STRHHpost 5312 2691263830U, // STRHHpre 5313 2255015254U, // STRHHroW 5314 2255015254U, // STRHHroX 5315 2255015254U, // STRHHui 5316 543781899U, // STRHpost 5317 2691265547U, // STRHpre 5318 2255016971U, // STRHroW 5319 2255016971U, // STRHroX 5320 2255016971U, // STRHui 5321 543781899U, // STRQpost 5322 2691265547U, // STRQpre 5323 2255016971U, // STRQroW 5324 2255016971U, // STRQroX 5325 2255016971U, // STRQui 5326 543781899U, // STRSpost 5327 2691265547U, // STRSpre 5328 2255016971U, // STRSroW 5329 2255016971U, // STRSroX 5330 2255016971U, // STRSui 5331 543781899U, // STRWpost 5332 2691265547U, // STRWpre 5333 2255016971U, // STRWroW 5334 2255016971U, // STRWroX 5335 2255016971U, // STRWui 5336 543781899U, // STRXpost 5337 2691265547U, // STRXpre 5338 2255016971U, // STRXroW 5339 2255016971U, // STRXroX 5340 2255016971U, // STRXui 5341 2255336459U, // STR_PXI 5342 2255336459U, // STR_ZXI 5343 2255013656U, // STTRBi 5344 2255015260U, // STTRHi 5345 2255016976U, // STTRWi 5346 2255016976U, // STTRXi 5347 2255013687U, // STURBBi 5348 2255017009U, // STURBi 5349 2255017009U, // STURDi 5350 2255015291U, // STURHHi 5351 2255017009U, // STURHi 5352 2255017009U, // STURQi 5353 2255017009U, // STURSi 5354 2255017009U, // STURWi 5355 2255017009U, // STURXi 5356 2248200918U, // STXPW 5357 2248200918U, // STXPX 5358 100714325U, // STXRB 5359 100715929U, // STXRH 5360 100717673U, // STXRW 5361 100717673U, // STXRX 5362 2255014569U, // STZ2GOffset 5363 543779497U, // STZ2GPostIndex 5364 2691263145U, // STZ2GPreIndex 5365 2255016136U, // STZGM 5366 2255014632U, // STZGOffset 5367 543779560U, // STZGPostIndex 5368 2691263208U, // STZGPreIndex 5369 0U, // STZGloop 5370 2248198832U, // SUBG 5371 2348820028U, // SUBHNB_ZZZ_B 5372 239625788U, // SUBHNB_ZZZ_H 5373 2415953468U, // SUBHNB_ZZZ_S 5374 2449487581U, // SUBHNT_ZZZ_B 5375 240154333U, // SUBHNT_ZZZ_H 5376 2281739997U, // SUBHNT_ZZZ_S 5377 2216210691U, // SUBHNv2i64_v2i32 5378 2486231386U, // SUBHNv2i64_v4i32 5379 69775619U, // SUBHNv4i32_v4i16 5380 339272026U, // SUBHNv4i32_v8i16 5381 2484134234U, // SUBHNv8i16_v16i8 5382 2218832131U, // SUBHNv8i16_v8i8 5383 2248200671U, // SUBP 5384 2248201518U, // SUBPS 5385 2583704350U, // SUBR_ZI_B 5386 2415940382U, // SUBR_ZI_D 5387 241201950U, // SUBR_ZI_H 5388 2617283358U, // SUBR_ZI_S 5389 369111838U, // SUBR_ZPmZ_B 5390 369120030U, // SUBR_ZPmZ_D 5391 2555933470U, // SUBR_ZPmZ_H 5392 369136414U, // SUBR_ZPmZ_S 5393 2248201383U, // SUBSWri 5394 0U, // SUBSWrr 5395 2248201383U, // SUBSWrs 5396 2248201383U, // SUBSWrx 5397 2248201383U, // SUBSXri 5398 0U, // SUBSXrr 5399 2248201383U, // SUBSXrs 5400 2248201383U, // SUBSXrx 5401 2248201383U, // SUBSXrx64 5402 2248198140U, // SUBWri 5403 0U, // SUBWrr 5404 2248198140U, // SUBWrs 5405 2248198140U, // SUBWrx 5406 2248198140U, // SUBXri 5407 0U, // SUBXrr 5408 2248198140U, // SUBXrs 5409 2248198140U, // SUBXrx 5410 2248198140U, // SUBXrx64 5411 2583701500U, // SUB_ZI_B 5412 2415937532U, // SUB_ZI_D 5413 241199100U, // SUB_ZI_H 5414 2617280508U, // SUB_ZI_S 5415 369108988U, // SUB_ZPmZ_B 5416 369117180U, // SUB_ZPmZ_D 5417 2555930620U, // SUB_ZPmZ_H 5418 369133564U, // SUB_ZPmZ_S 5419 2583701500U, // SUB_ZZZ_B 5420 2415937532U, // SUB_ZZZ_D 5421 2388682748U, // SUB_ZZZ_H 5422 2617280508U, // SUB_ZZZ_S 5423 68200444U, // SUBv16i8 5424 2248198140U, // SUBv1i64 5425 2216208380U, // SUBv2i32 5426 2216732668U, // SUBv2i64 5427 69773308U, // SUBv4i16 5428 70297596U, // SUBv4i32 5429 2218305532U, // SUBv8i16 5430 2218829820U, // SUBv8i8 5431 469782086U, // SUNPKHI_ZZ_D 5432 865627718U, // SUNPKHI_ZZ_H 5433 201363014U, // SUNPKHI_ZZ_S 5434 469782968U, // SUNPKLO_ZZ_D 5435 865628600U, // SUNPKLO_ZZ_H 5436 201363896U, // SUNPKLO_ZZ_S 5437 369109416U, // SUQADD_ZPmZ_B 5438 369117608U, // SUQADD_ZPmZ_D 5439 2555931048U, // SUQADD_ZPmZ_H 5440 369133992U, // SUQADD_ZPmZ_S 5441 2484136360U, // SUQADDv16i8 5442 536963496U, // SUQADDv1i16 5443 536963496U, // SUQADDv1i32 5444 536963496U, // SUQADDv1i64 5445 536963496U, // SUQADDv1i8 5446 2484660648U, // SUQADDv2i32 5447 337701288U, // SUQADDv2i64 5448 2485709224U, // SUQADDv4i16 5449 338749864U, // SUQADDv4i32 5450 2486757800U, // SUQADDv8i16 5451 339798440U, // SUQADDv8i8 5452 75957U, // SVC 5453 1241605123U, // SWPAB 5454 1241607057U, // SWPAH 5455 1241605382U, // SWPALB 5456 1241607213U, // SWPALH 5457 1241607908U, // SWPALW 5458 1241607908U, // SWPALX 5459 1241604853U, // SWPAW 5460 1241604853U, // SWPAX 5461 1241605818U, // SWPB 5462 1241607422U, // SWPH 5463 1241605591U, // SWPLB 5464 1241607310U, // SWPLH 5465 1241608212U, // SWPLW 5466 1241608212U, // SWPLX 5467 1241608872U, // SWPW 5468 1241608872U, // SWPX 5469 2147502063U, // SXTB_ZPmZ_D 5470 34105327U, // SXTB_ZPmZ_H 5471 34799U, // SXTB_ZPmZ_S 5472 2147503625U, // SXTH_ZPmZ_D 5473 36361U, // SXTH_ZPmZ_S 5474 2147506608U, // SXTW_ZPmZ_D 5475 2248200276U, // SYSLxt 5476 1912657261U, // SYSxt 5477 0U, // SpeculationSafeValueW 5478 0U, // SpeculationSafeValueX 5479 0U, // TAGPstack 5480 1040199457U, // TBL_ZZZZ_B 5481 1946177313U, // TBL_ZZZZ_D 5482 30961441U, // TBL_ZZZZ_H 5483 1979748129U, // TBL_ZZZZ_S 5484 1040199457U, // TBL_ZZZ_B 5485 1946177313U, // TBL_ZZZ_D 5486 30961441U, // TBL_ZZZ_H 5487 1979748129U, // TBL_ZZZ_S 5488 4161842977U, // TBLv16i8Four 5489 4161842977U, // TBLv16i8One 5490 4161842977U, // TBLv16i8Three 5491 4161842977U, // TBLv16i8Two 5492 2017505057U, // TBLv8i8Four 5493 2017505057U, // TBLv8i8One 5494 2017505057U, // TBLv8i8Three 5495 2017505057U, // TBLv8i8Two 5496 2248202899U, // TBNZW 5497 2248202899U, // TBNZX 5498 637549050U, // TBX_ZZZ_B 5499 2281724410U, // TBX_ZZZ_D 5500 2390260218U, // TBX_ZZZ_H 5501 2315295226U, // TBX_ZZZ_S 5502 4195416570U, // TBXv16i8Four 5503 4195416570U, // TBXv16i8One 5504 4195416570U, // TBXv16i8Three 5505 4195416570U, // TBXv16i8Two 5506 2051078650U, // TBXv8i8Four 5507 2051078650U, // TBXv8i8One 5508 2051078650U, // TBXv8i8Three 5509 2051078650U, // TBXv8i8Two 5510 2248202883U, // TBZW 5511 2248202883U, // TBZX 5512 77688U, // TCANCEL 5513 7220U, // TCOMMIT 5514 0U, // TCRETURNdi 5515 0U, // TCRETURNri 5516 0U, // TCRETURNriALL 5517 0U, // TCRETURNriBTI 5518 7396007U, // TLSDESCCALL 5519 0U, // TLSDESC_CALLSEQ 5520 2583699493U, // TRN1_PPP_B 5521 2415935525U, // TRN1_PPP_D 5522 2388680741U, // TRN1_PPP_H 5523 2617278501U, // TRN1_PPP_S 5524 2583699493U, // TRN1_ZZZ_B 5525 2415935525U, // TRN1_ZZZ_D 5526 2388680741U, // TRN1_ZZZ_H 5527 2617278501U, // TRN1_ZZZ_S 5528 68198437U, // TRN1v16i8 5529 2216206373U, // TRN1v2i32 5530 2216730661U, // TRN1v2i64 5531 69771301U, // TRN1v4i16 5532 70295589U, // TRN1v4i32 5533 2218303525U, // TRN1v8i16 5534 2218827813U, // TRN1v8i8 5535 2583699857U, // TRN2_PPP_B 5536 2415935889U, // TRN2_PPP_D 5537 2388681105U, // TRN2_PPP_H 5538 2617278865U, // TRN2_PPP_S 5539 2583699857U, // TRN2_ZZZ_B 5540 2415935889U, // TRN2_ZZZ_D 5541 2388681105U, // TRN2_ZZZ_H 5542 2617278865U, // TRN2_ZZZ_S 5543 68198801U, // TRN2v16i8 5544 2216206737U, // TRN2v2i32 5545 2216731025U, // TRN2v2i64 5546 69771665U, // TRN2v4i16 5547 70295953U, // TRN2v4i32 5548 2218303889U, // TRN2v8i16 5549 2218828177U, // TRN2v8i8 5550 116676U, // TSB 5551 7395185U, // TSTART 5552 7395207U, // TTEST 5553 2315273404U, // UABALB_ZZZ_D 5554 29385916U, // UABALB_ZZZ_H 5555 2449507516U, // UABALB_ZZZ_S 5556 2315277811U, // UABALT_ZZZ_D 5557 29390323U, // UABALT_ZZZ_H 5558 2449511923U, // UABALT_ZZZ_S 5559 339271843U, // UABALv16i8_v8i16 5560 2485186202U, // UABALv2i32_v2i64 5561 338751130U, // UABALv4i16_v4i32 5562 337698979U, // UABALv4i32_v2i64 5563 2486231203U, // UABALv8i16_v4i32 5564 2486759066U, // UABALv8i8_v8i16 5565 637543043U, // UABA_ZZZ_B 5566 2281718403U, // UABA_ZZZ_D 5567 2390254211U, // UABA_ZZZ_H 5568 2315289219U, // UABA_ZZZ_S 5569 336650883U, // UABAv16i8 5570 2484658819U, // UABAv2i32 5571 338223747U, // UABAv4i16 5572 338748035U, // UABAv4i32 5573 2486755971U, // UABAv8i16 5574 2487280259U, // UABAv8i8 5575 2617263472U, // UABDLB_ZZZ_D 5576 261645680U, // UABDLB_ZZZ_H 5577 2348844400U, // UABDLB_ZZZ_S 5578 2617267779U, // UABDLT_ZZZ_D 5579 261649987U, // UABDLT_ZZZ_H 5580 2348848707U, // UABDLT_ZZZ_S 5581 70820069U, // UABDLv16i8_v8i16 5582 2216734539U, // UABDLv2i32_v2i64 5583 70299467U, // UABDLv4i16_v4i32 5584 69247205U, // UABDLv4i32_v2i64 5585 2217779429U, // UABDLv8i16_v4i32 5586 2218307403U, // UABDLv8i8_v8i16 5587 369109290U, // UABD_ZPmZ_B 5588 369117482U, // UABD_ZPmZ_D 5589 2555930922U, // UABD_ZPmZ_H 5590 369133866U, // UABD_ZPmZ_S 5591 68200746U, // UABDv16i8 5592 2216208682U, // UABDv2i32 5593 69773610U, // UABDv4i16 5594 70297898U, // UABDv4i32 5595 2218305834U, // UABDv8i16 5596 2218830122U, // UABDv8i8 5597 369119781U, // UADALP_ZPmZ_D 5598 408449573U, // UADALP_ZPmZ_H 5599 369136165U, // UADALP_ZPmZ_S 5600 2486759973U, // UADALPv16i8_v8i16 5601 2512974373U, // UADALPv2i32_v1i64 5602 2484662821U, // UADALPv4i16_v2i32 5603 337703461U, // UADALPv4i32_v2i64 5604 2486235685U, // UADALPv8i16_v4i32 5605 338227749U, // UADALPv8i8_v4i16 5606 2617263497U, // UADDLB_ZZZ_D 5607 261645705U, // UADDLB_ZZZ_H 5608 2348844425U, // UADDLB_ZZZ_S 5609 2218308149U, // UADDLPv16i8_v8i16 5610 2244522549U, // UADDLPv2i32_v1i64 5611 2216210997U, // UADDLPv4i16_v2i32 5612 69251637U, // UADDLPv4i32_v2i64 5613 2217783861U, // UADDLPv8i16_v4i32 5614 69775925U, // UADDLPv8i8_v4i16 5615 2617267795U, // UADDLT_ZZZ_D 5616 261650003U, // UADDLT_ZZZ_H 5617 2348848723U, // UADDLT_ZZZ_S 5618 2214647866U, // UADDLVv16i8v 5619 2214647866U, // UADDLVv4i16v 5620 67164218U, // UADDLVv4i32v 5621 2214647866U, // UADDLVv8i16v 5622 67164218U, // UADDLVv8i8v 5623 70820085U, // UADDLv16i8_v8i16 5624 2216734577U, // UADDLv2i32_v2i64 5625 70299505U, // UADDLv4i16_v4i32 5626 69247221U, // UADDLv4i32_v2i64 5627 2217779445U, // UADDLv8i16_v4i32 5628 2218307441U, // UADDLv8i8_v8i16 5629 2516637710U, // UADDV_VPZ_B 5630 2516637710U, // UADDV_VPZ_D 5631 2516637710U, // UADDV_VPZ_H 5632 2516637710U, // UADDV_VPZ_S 5633 2415937610U, // UADDWB_ZZZ_D 5634 241199178U, // UADDWB_ZZZ_H 5635 2617280586U, // UADDWB_ZZZ_S 5636 2415941563U, // UADDWT_ZZZ_D 5637 241203131U, // UADDWT_ZZZ_H 5638 2617284539U, // UADDWT_ZZZ_S 5639 2218304006U, // UADDWv16i8_v8i16 5640 2216737075U, // UADDWv2i32_v2i64 5641 70302003U, // UADDWv4i16_v4i32 5642 2216731142U, // UADDWv4i32_v2i64 5643 70296070U, // UADDWv8i16_v4i32 5644 2218309939U, // UADDWv8i8_v8i16 5645 2248200368U, // UBFMWri 5646 2248200368U, // UBFMXri 5647 2248198812U, // UCVTFSWDri 5648 2248198812U, // UCVTFSWHri 5649 2248198812U, // UCVTFSWSri 5650 2248198812U, // UCVTFSXDri 5651 2248198812U, // UCVTFSXHri 5652 2248198812U, // UCVTFSXSri 5653 100715164U, // UCVTFUWDri 5654 100715164U, // UCVTFUWHri 5655 100715164U, // UCVTFUWSri 5656 100715164U, // UCVTFUXDri 5657 100715164U, // UCVTFUXHri 5658 100715164U, // UCVTFUXSri 5659 2147502748U, // UCVTF_ZPmZ_DtoD 5660 1141402268U, // UCVTF_ZPmZ_DtoH 5661 2147519132U, // UCVTF_ZPmZ_DtoS 5662 34106012U, // UCVTF_ZPmZ_HtoH 5663 19100U, // UCVTF_ZPmZ_StoD 5664 1107847836U, // UCVTF_ZPmZ_StoH 5665 35484U, // UCVTF_ZPmZ_StoS 5666 2248198812U, // UCVTFd 5667 2248198812U, // UCVTFh 5668 2248198812U, // UCVTFs 5669 100715164U, // UCVTFv1i16 5670 100715164U, // UCVTFv1i32 5671 100715164U, // UCVTFv1i64 5672 2216209052U, // UCVTFv2f32 5673 69249692U, // UCVTFv2f64 5674 2216209052U, // UCVTFv2i32_shift 5675 2216733340U, // UCVTFv2i64_shift 5676 2217257628U, // UCVTFv4f16 5677 70298268U, // UCVTFv4f32 5678 69773980U, // UCVTFv4i16_shift 5679 70298268U, // UCVTFv4i32_shift 5680 2218306204U, // UCVTFv8f16 5681 2218306204U, // UCVTFv8i16_shift 5682 7391877U, // UDF 5683 369120325U, // UDIVR_ZPmZ_D 5684 369136709U, // UDIVR_ZPmZ_S 5685 2248202284U, // UDIVWr 5686 2248202284U, // UDIVXr 5687 369121324U, // UDIV_ZPmZ_D 5688 369137708U, // UDIV_ZPmZ_S 5689 2449495909U, // UDOT_ZZZI_D 5690 637572965U, // UDOT_ZZZI_S 5691 2449495909U, // UDOT_ZZZ_D 5692 637572965U, // UDOT_ZZZ_S 5693 338753381U, // UDOTlanev16i8 5694 2484664165U, // UDOTlanev8i8 5695 338753381U, // UDOTv16i8 5696 2484664165U, // UDOTv8i8 5697 369109386U, // UHADD_ZPmZ_B 5698 369117578U, // UHADD_ZPmZ_D 5699 2555931018U, // UHADD_ZPmZ_H 5700 369133962U, // UHADD_ZPmZ_S 5701 68200842U, // UHADDv16i8 5702 2216208778U, // UHADDv2i32 5703 69773706U, // UHADDv4i16 5704 70297994U, // UHADDv4i32 5705 2218305930U, // UHADDv8i16 5706 2218830218U, // UHADDv8i8 5707 369111852U, // UHSUBR_ZPmZ_B 5708 369120044U, // UHSUBR_ZPmZ_D 5709 2555933484U, // UHSUBR_ZPmZ_H 5710 369136428U, // UHSUBR_ZPmZ_S 5711 369109000U, // UHSUB_ZPmZ_B 5712 369117192U, // UHSUB_ZPmZ_D 5713 2555930632U, // UHSUB_ZPmZ_H 5714 369133576U, // UHSUB_ZPmZ_S 5715 68200456U, // UHSUBv16i8 5716 2216208392U, // UHSUBv2i32 5717 69773320U, // UHSUBv4i16 5718 70297608U, // UHSUBv4i32 5719 2218305544U, // UHSUBv8i16 5720 2218829832U, // UHSUBv8i8 5721 2248200034U, // UMADDLrrr 5722 369111746U, // UMAXP_ZPmZ_B 5723 369119938U, // UMAXP_ZPmZ_D 5724 2555933378U, // UMAXP_ZPmZ_H 5725 369136322U, // UMAXP_ZPmZ_S 5726 68203202U, // UMAXPv16i8 5727 2216211138U, // UMAXPv2i32 5728 69776066U, // UMAXPv4i16 5729 70300354U, // UMAXPv4i32 5730 2218308290U, // UMAXPv8i16 5731 2218832578U, // UMAXPv8i8 5732 2516637846U, // UMAXV_VPZ_B 5733 2516637846U, // UMAXV_VPZ_D 5734 2516637846U, // UMAXV_VPZ_H 5735 2516637846U, // UMAXV_VPZ_S 5736 2214647958U, // UMAXVv16i8v 5737 2214647958U, // UMAXVv4i16v 5738 67164310U, // UMAXVv4i32v 5739 2214647958U, // UMAXVv8i16v 5740 67164310U, // UMAXVv8i8v 5741 2583706100U, // UMAX_ZI_B 5742 2415942132U, // UMAX_ZI_D 5743 2388687348U, // UMAX_ZI_H 5744 2617285108U, // UMAX_ZI_S 5745 369113588U, // UMAX_ZPmZ_B 5746 369121780U, // UMAX_ZPmZ_D 5747 2555935220U, // UMAX_ZPmZ_H 5748 369138164U, // UMAX_ZPmZ_S 5749 68205044U, // UMAXv16i8 5750 2216212980U, // UMAXv2i32 5751 69777908U, // UMAXv4i16 5752 70302196U, // UMAXv4i32 5753 2218310132U, // UMAXv8i16 5754 2218834420U, // UMAXv8i8 5755 369111664U, // UMINP_ZPmZ_B 5756 369119856U, // UMINP_ZPmZ_D 5757 2555933296U, // UMINP_ZPmZ_H 5758 369136240U, // UMINP_ZPmZ_S 5759 68203120U, // UMINPv16i8 5760 2216211056U, // UMINPv2i32 5761 69775984U, // UMINPv4i16 5762 70300272U, // UMINPv4i32 5763 2218308208U, // UMINPv8i16 5764 2218832496U, // UMINPv8i8 5765 2516637794U, // UMINV_VPZ_B 5766 2516637794U, // UMINV_VPZ_D 5767 2516637794U, // UMINV_VPZ_H 5768 2516637794U, // UMINV_VPZ_S 5769 2214647906U, // UMINVv16i8v 5770 2214647906U, // UMINVv4i16v 5771 67164258U, // UMINVv4i32v 5772 2214647906U, // UMINVv8i16v 5773 67164258U, // UMINVv8i8v 5774 2583703842U, // UMIN_ZI_B 5775 2415939874U, // UMIN_ZI_D 5776 2388685090U, // UMIN_ZI_H 5777 2617282850U, // UMIN_ZI_S 5778 369111330U, // UMIN_ZPmZ_B 5779 369119522U, // UMIN_ZPmZ_D 5780 2555932962U, // UMIN_ZPmZ_H 5781 369135906U, // UMIN_ZPmZ_S 5782 68202786U, // UMINv16i8 5783 2216210722U, // UMINv2i32 5784 69775650U, // UMINv4i16 5785 70299938U, // UMINv4i32 5786 2218307874U, // UMINv8i16 5787 2218832162U, // UMINv8i8 5788 2315273448U, // UMLALB_ZZZI_D 5789 2449507560U, // UMLALB_ZZZI_S 5790 2315273448U, // UMLALB_ZZZ_D 5791 29385960U, // UMLALB_ZZZ_H 5792 2449507560U, // UMLALB_ZZZ_S 5793 2315277845U, // UMLALT_ZZZI_D 5794 2449511957U, // UMLALT_ZZZI_S 5795 2315277845U, // UMLALT_ZZZ_D 5796 29390357U, // UMLALT_ZZZ_H 5797 2449511957U, // UMLALT_ZZZ_S 5798 339271877U, // UMLALv16i8_v8i16 5799 2485186241U, // UMLALv2i32_indexed 5800 2485186241U, // UMLALv2i32_v2i64 5801 338751169U, // UMLALv4i16_indexed 5802 338751169U, // UMLALv4i16_v4i32 5803 337699013U, // UMLALv4i32_indexed 5804 337699013U, // UMLALv4i32_v2i64 5805 2486231237U, // UMLALv8i16_indexed 5806 2486231237U, // UMLALv8i16_v4i32 5807 2486759105U, // UMLALv8i8_v8i16 5808 2315273745U, // UMLSLB_ZZZI_D 5809 2449507857U, // UMLSLB_ZZZI_S 5810 2315273745U, // UMLSLB_ZZZ_D 5811 29386257U, // UMLSLB_ZZZ_H 5812 2449507857U, // UMLSLB_ZZZ_S 5813 2315278019U, // UMLSLT_ZZZI_D 5814 2449512131U, // UMLSLT_ZZZI_S 5815 2315278019U, // UMLSLT_ZZZ_D 5816 29390531U, // UMLSLT_ZZZ_H 5817 2449512131U, // UMLSLT_ZZZ_S 5818 339272009U, // UMLSLv16i8_v8i16 5819 2485186637U, // UMLSLv2i32_indexed 5820 2485186637U, // UMLSLv2i32_v2i64 5821 338751565U, // UMLSLv4i16_indexed 5822 338751565U, // UMLSLv4i16_v4i32 5823 337699145U, // UMLSLv4i32_indexed 5824 337699145U, // UMLSLv4i32_v2i64 5825 2486231369U, // UMLSLv8i16_indexed 5826 2486231369U, // UMLSLv8i16_v4i32 5827 2486759501U, // UMLSLv8i8_v8i16 5828 67164284U, // UMOVvi16 5829 2214647932U, // UMOVvi32 5830 67164284U, // UMOVvi64 5831 2214647932U, // UMOVvi8 5832 2248199982U, // UMSUBLrrr 5833 369110225U, // UMULH_ZPmZ_B 5834 369118417U, // UMULH_ZPmZ_D 5835 2555931857U, // UMULH_ZPmZ_H 5836 369134801U, // UMULH_ZPmZ_S 5837 2583702737U, // UMULH_ZZZ_B 5838 2415938769U, // UMULH_ZZZ_D 5839 2388683985U, // UMULH_ZZZ_H 5840 2617281745U, // UMULH_ZZZ_S 5841 2248199377U, // UMULHrr 5842 2617263547U, // UMULLB_ZZZI_D 5843 2348844475U, // UMULLB_ZZZI_S 5844 2617263547U, // UMULLB_ZZZ_D 5845 261645755U, // UMULLB_ZZZ_H 5846 2348844475U, // UMULLB_ZZZ_S 5847 2617267859U, // UMULLT_ZZZI_D 5848 2348848787U, // UMULLT_ZZZI_S 5849 2617267859U, // UMULLT_ZZZ_D 5850 261650067U, // UMULLT_ZZZ_H 5851 2348848787U, // UMULLT_ZZZ_S 5852 70820135U, // UMULLv16i8_v8i16 5853 2216734701U, // UMULLv2i32_indexed 5854 2216734701U, // UMULLv2i32_v2i64 5855 70299629U, // UMULLv4i16_indexed 5856 70299629U, // UMULLv4i16_v4i32 5857 69247271U, // UMULLv4i32_indexed 5858 69247271U, // UMULLv4i32_v2i64 5859 2217779495U, // UMULLv8i16_indexed 5860 2217779495U, // UMULLv8i16_v4i32 5861 2218307565U, // UMULLv8i8_v8i16 5862 2583701929U, // UQADD_ZI_B 5863 2415937961U, // UQADD_ZI_D 5864 241199529U, // UQADD_ZI_H 5865 2617280937U, // UQADD_ZI_S 5866 369109417U, // UQADD_ZPmZ_B 5867 369117609U, // UQADD_ZPmZ_D 5868 2555931049U, // UQADD_ZPmZ_H 5869 369133993U, // UQADD_ZPmZ_S 5870 2583701929U, // UQADD_ZZZ_B 5871 2415937961U, // UQADD_ZZZ_D 5872 2388683177U, // UQADD_ZZZ_H 5873 2617280937U, // UQADD_ZZZ_S 5874 68200873U, // UQADDv16i8 5875 2248198569U, // UQADDv1i16 5876 2248198569U, // UQADDv1i32 5877 2248198569U, // UQADDv1i64 5878 2248198569U, // UQADDv1i8 5879 2216208809U, // UQADDv2i32 5880 2216733097U, // UQADDv2i64 5881 69773737U, // UQADDv4i16 5882 70298025U, // UQADDv4i32 5883 2218305961U, // UQADDv8i16 5884 2218830249U, // UQADDv8i8 5885 805356645U, // UQDECB_WPiI 5886 805356645U, // UQDECB_XPiI 5887 805357887U, // UQDECD_WPiI 5888 805357887U, // UQDECD_XPiI 5889 805325119U, // UQDECD_ZPiI 5890 805358559U, // UQDECH_WPiI 5891 805358559U, // UQDECH_XPiI 5892 8416223U, // UQDECH_ZPiI 5893 436261357U, // UQDECP_WP_B 5894 268489197U, // UQDECP_WP_D 5895 201380333U, // UQDECP_WP_H 5896 469815789U, // UQDECP_WP_S 5897 436261357U, // UQDECP_XP_B 5898 268489197U, // UQDECP_XP_D 5899 201380333U, // UQDECP_XP_H 5900 469815789U, // UQDECP_XP_S 5901 134238701U, // UQDECP_ZP_D 5902 846754285U, // UQDECP_ZP_H 5903 167809517U, // UQDECP_ZP_S 5904 805361940U, // UQDECW_WPiI 5905 805361940U, // UQDECW_XPiI 5906 805345556U, // UQDECW_ZPiI 5907 805356661U, // UQINCB_WPiI 5908 805356661U, // UQINCB_XPiI 5909 805357903U, // UQINCD_WPiI 5910 805357903U, // UQINCD_XPiI 5911 805325135U, // UQINCD_ZPiI 5912 805358575U, // UQINCH_WPiI 5913 805358575U, // UQINCH_XPiI 5914 8416239U, // UQINCH_ZPiI 5915 436261373U, // UQINCP_WP_B 5916 268489213U, // UQINCP_WP_D 5917 201380349U, // UQINCP_WP_H 5918 469815805U, // UQINCP_WP_S 5919 436261373U, // UQINCP_XP_B 5920 268489213U, // UQINCP_XP_D 5921 201380349U, // UQINCP_XP_H 5922 469815805U, // UQINCP_XP_S 5923 134238717U, // UQINCP_ZP_D 5924 846754301U, // UQINCP_ZP_H 5925 167809533U, // UQINCP_ZP_S 5926 805361956U, // UQINCW_WPiI 5927 805361956U, // UQINCW_XPiI 5928 805345572U, // UQINCW_ZPiI 5929 369111963U, // UQRSHLR_ZPmZ_B 5930 369120155U, // UQRSHLR_ZPmZ_D 5931 2555933595U, // UQRSHLR_ZPmZ_H 5932 369136539U, // UQRSHLR_ZPmZ_S 5933 369110950U, // UQRSHL_ZPmZ_B 5934 369119142U, // UQRSHL_ZPmZ_D 5935 2555932582U, // UQRSHL_ZPmZ_H 5936 369135526U, // UQRSHL_ZPmZ_S 5937 68202406U, // UQRSHLv16i8 5938 2248200102U, // UQRSHLv1i16 5939 2248200102U, // UQRSHLv1i32 5940 2248200102U, // UQRSHLv1i64 5941 2248200102U, // UQRSHLv1i8 5942 2216210342U, // UQRSHLv2i32 5943 2216734630U, // UQRSHLv2i64 5944 69775270U, // UQRSHLv4i16 5945 70299558U, // UQRSHLv4i32 5946 2218307494U, // UQRSHLv8i16 5947 2218831782U, // UQRSHLv8i8 5948 2348820091U, // UQRSHRNB_ZZI_B 5949 2387109499U, // UQRSHRNB_ZZI_H 5950 2415953531U, // UQRSHRNB_ZZI_S 5951 2449487632U, // UQRSHRNT_ZZI_B 5952 240154384U, // UQRSHRNT_ZZI_H 5953 2281740048U, // UQRSHRNT_ZZI_S 5954 2248200530U, // UQRSHRNb 5955 2248200530U, // UQRSHRNh 5956 2248200530U, // UQRSHRNs 5957 2484134279U, // UQRSHRNv16i8_shift 5958 2216210770U, // UQRSHRNv2i32_shift 5959 69775698U, // UQRSHRNv4i16_shift 5960 2486231431U, // UQRSHRNv4i32_shift 5961 339272071U, // UQRSHRNv8i16_shift 5962 2218832210U, // UQRSHRNv8i8_shift 5963 369111946U, // UQSHLR_ZPmZ_B 5964 369120138U, // UQSHLR_ZPmZ_D 5965 2555933578U, // UQSHLR_ZPmZ_H 5966 369136522U, // UQSHLR_ZPmZ_S 5967 369110935U, // UQSHL_ZPmI_B 5968 369119127U, // UQSHL_ZPmI_D 5969 2555932567U, // UQSHL_ZPmI_H 5970 369135511U, // UQSHL_ZPmI_S 5971 369110935U, // UQSHL_ZPmZ_B 5972 369119127U, // UQSHL_ZPmZ_D 5973 2555932567U, // UQSHL_ZPmZ_H 5974 369135511U, // UQSHL_ZPmZ_S 5975 2248200087U, // UQSHLb 5976 2248200087U, // UQSHLd 5977 2248200087U, // UQSHLh 5978 2248200087U, // UQSHLs 5979 68202391U, // UQSHLv16i8 5980 68202391U, // UQSHLv16i8_shift 5981 2248200087U, // UQSHLv1i16 5982 2248200087U, // UQSHLv1i32 5983 2248200087U, // UQSHLv1i64 5984 2248200087U, // UQSHLv1i8 5985 2216210327U, // UQSHLv2i32 5986 2216210327U, // UQSHLv2i32_shift 5987 2216734615U, // UQSHLv2i64 5988 2216734615U, // UQSHLv2i64_shift 5989 69775255U, // UQSHLv4i16 5990 69775255U, // UQSHLv4i16_shift 5991 70299543U, // UQSHLv4i32 5992 70299543U, // UQSHLv4i32_shift 5993 2218307479U, // UQSHLv8i16 5994 2218307479U, // UQSHLv8i16_shift 5995 2218831767U, // UQSHLv8i8 5996 2218831767U, // UQSHLv8i8_shift 5997 2348820072U, // UQSHRNB_ZZI_B 5998 2387109480U, // UQSHRNB_ZZI_H 5999 2415953512U, // UQSHRNB_ZZI_S 6000 2449487613U, // UQSHRNT_ZZI_B 6001 240154365U, // UQSHRNT_ZZI_H 6002 2281740029U, // UQSHRNT_ZZI_S 6003 2248200513U, // UQSHRNb 6004 2248200513U, // UQSHRNh 6005 2248200513U, // UQSHRNs 6006 2484134260U, // UQSHRNv16i8_shift 6007 2216210753U, // UQSHRNv2i32_shift 6008 69775681U, // UQSHRNv4i16_shift 6009 2486231412U, // UQSHRNv4i32_shift 6010 339272052U, // UQSHRNv8i16_shift 6011 2218832193U, // UQSHRNv8i8_shift 6012 369111868U, // UQSUBR_ZPmZ_B 6013 369120060U, // UQSUBR_ZPmZ_D 6014 2555933500U, // UQSUBR_ZPmZ_H 6015 369136444U, // UQSUBR_ZPmZ_S 6016 2583701541U, // UQSUB_ZI_B 6017 2415937573U, // UQSUB_ZI_D 6018 241199141U, // UQSUB_ZI_H 6019 2617280549U, // UQSUB_ZI_S 6020 369109029U, // UQSUB_ZPmZ_B 6021 369117221U, // UQSUB_ZPmZ_D 6022 2555930661U, // UQSUB_ZPmZ_H 6023 369133605U, // UQSUB_ZPmZ_S 6024 2583701541U, // UQSUB_ZZZ_B 6025 2415937573U, // UQSUB_ZZZ_D 6026 2388682789U, // UQSUB_ZZZ_H 6027 2617280549U, // UQSUB_ZZZ_S 6028 68200485U, // UQSUBv16i8 6029 2248198181U, // UQSUBv1i16 6030 2248198181U, // UQSUBv1i32 6031 2248198181U, // UQSUBv1i64 6032 2248198181U, // UQSUBv1i8 6033 2216208421U, // UQSUBv2i32 6034 2216732709U, // UQSUBv2i64 6035 69773349U, // UQSUBv4i16 6036 70297637U, // UQSUBv4i32 6037 2218305573U, // UQSUBv8i16 6038 2218829861U, // UQSUBv8i8 6039 201336461U, // UQXTNB_ZZ_B 6040 843605645U, // UQXTNB_ZZ_H 6041 268469901U, // UQXTNB_ZZ_S 6042 302004010U, // UQXTNT_ZZ_B 6043 844134186U, // UQXTNT_ZZ_H 6044 134256426U, // UQXTNT_ZZ_S 6045 2484134311U, // UQXTNv16i8 6046 100716918U, // UQXTNv1i16 6047 100716918U, // UQXTNv1i32 6048 100716918U, // UQXTNv1i8 6049 68727158U, // UQXTNv2i32 6050 69775734U, // UQXTNv4i16 6051 338747815U, // UQXTNv4i32 6052 339272103U, // UQXTNv8i16 6053 2218832246U, // UQXTNv8i8 6054 35399U, // URECPE_ZPmZ_S 6055 2216208967U, // URECPEv2i32 6056 70298183U, // URECPEv4i32 6057 369109371U, // URHADD_ZPmZ_B 6058 369117563U, // URHADD_ZPmZ_D 6059 2555931003U, // URHADD_ZPmZ_H 6060 369133947U, // URHADD_ZPmZ_S 6061 68200827U, // URHADDv16i8 6062 2216208763U, // URHADDv2i32 6063 69773691U, // URHADDv4i16 6064 70297979U, // URHADDv4i32 6065 2218305915U, // URHADDv8i16 6066 2218830203U, // URHADDv8i8 6067 369111980U, // URSHLR_ZPmZ_B 6068 369120172U, // URSHLR_ZPmZ_D 6069 2555933612U, // URSHLR_ZPmZ_H 6070 369136556U, // URSHLR_ZPmZ_S 6071 369110965U, // URSHL_ZPmZ_B 6072 369119157U, // URSHL_ZPmZ_D 6073 2555932597U, // URSHL_ZPmZ_H 6074 369135541U, // URSHL_ZPmZ_S 6075 68202421U, // URSHLv16i8 6076 2248200117U, // URSHLv1i64 6077 2216210357U, // URSHLv2i32 6078 2216734645U, // URSHLv2i64 6079 69775285U, // URSHLv4i16 6080 70299573U, // URSHLv4i32 6081 2218307509U, // URSHLv8i16 6082 2218831797U, // URSHLv8i8 6083 369111907U, // URSHR_ZPmI_B 6084 369120099U, // URSHR_ZPmI_D 6085 2555933539U, // URSHR_ZPmI_H 6086 369136483U, // URSHR_ZPmI_S 6087 2248201059U, // URSHRd 6088 68203363U, // URSHRv16i8_shift 6089 2216211299U, // URSHRv2i32_shift 6090 2216735587U, // URSHRv2i64_shift 6091 69776227U, // URSHRv4i16_shift 6092 70300515U, // URSHRv4i32_shift 6093 2218308451U, // URSHRv8i16_shift 6094 2218832739U, // URSHRv8i8_shift 6095 35445U, // URSQRTE_ZPmZ_S 6096 2216209013U, // URSQRTEv2i32 6097 70298229U, // URSQRTEv4i32 6098 637543193U, // URSRA_ZZI_B 6099 2281718553U, // URSRA_ZZI_D 6100 242770713U, // URSRA_ZZI_H 6101 2315289369U, // URSRA_ZZI_S 6102 2684445465U, // URSRAd 6103 336651033U, // URSRAv16i8_shift 6104 2484658969U, // URSRAv2i32_shift 6105 2485183257U, // URSRAv2i64_shift 6106 338223897U, // URSRAv4i16_shift 6107 338748185U, // URSRAv4i32_shift 6108 2486756121U, // URSRAv8i16_shift 6109 2487280409U, // URSRAv8i8_shift 6110 2617263513U, // USHLLB_ZZI_D 6111 2409129369U, // USHLLB_ZZI_H 6112 2348844441U, // USHLLB_ZZI_S 6113 2617267825U, // USHLLT_ZZI_D 6114 2409133681U, // USHLLT_ZZI_H 6115 2348848753U, // USHLLT_ZZI_S 6116 70820101U, // USHLLv16i8_shift 6117 2216734671U, // USHLLv2i32_shift 6118 70299599U, // USHLLv4i16_shift 6119 69247237U, // USHLLv4i32_shift 6120 2217779461U, // USHLLv8i16_shift 6121 2218307535U, // USHLLv8i8_shift 6122 68202434U, // USHLv16i8 6123 2248200130U, // USHLv1i64 6124 2216210370U, // USHLv2i32 6125 2216734658U, // USHLv2i64 6126 69775298U, // USHLv4i16 6127 70299586U, // USHLv4i32 6128 2218307522U, // USHLv8i16 6129 2218831810U, // USHLv8i8 6130 2248201072U, // USHRd 6131 68203376U, // USHRv16i8_shift 6132 2216211312U, // USHRv2i32_shift 6133 2216735600U, // USHRv2i64_shift 6134 69776240U, // USHRv4i16_shift 6135 70300528U, // USHRv4i32_shift 6136 2218308464U, // USHRv8i16_shift 6137 2218832752U, // USHRv8i8_shift 6138 369109408U, // USQADD_ZPmZ_B 6139 369117600U, // USQADD_ZPmZ_D 6140 2555931040U, // USQADD_ZPmZ_H 6141 369133984U, // USQADD_ZPmZ_S 6142 2484136352U, // USQADDv16i8 6143 536963488U, // USQADDv1i16 6144 536963488U, // USQADDv1i32 6145 536963488U, // USQADDv1i64 6146 536963488U, // USQADDv1i8 6147 2484660640U, // USQADDv2i32 6148 337701280U, // USQADDv2i64 6149 2485709216U, // USQADDv4i16 6150 338749856U, // USQADDv4i32 6151 2486757792U, // USQADDv8i16 6152 339798432U, // USQADDv8i8 6153 637543206U, // USRA_ZZI_B 6154 2281718566U, // USRA_ZZI_D 6155 242770726U, // USRA_ZZI_H 6156 2315289382U, // USRA_ZZI_S 6157 2684445478U, // USRAd 6158 336651046U, // USRAv16i8_shift 6159 2484658982U, // USRAv2i32_shift 6160 2485183270U, // USRAv2i64_shift 6161 338223910U, // USRAv4i16_shift 6162 338748198U, // USRAv4i32_shift 6163 2486756134U, // USRAv8i16_shift 6164 2487280422U, // USRAv8i8_shift 6165 2617263442U, // USUBLB_ZZZ_D 6166 261645650U, // USUBLB_ZZZ_H 6167 2348844370U, // USUBLB_ZZZ_S 6168 2617267749U, // USUBLT_ZZZ_D 6169 261649957U, // USUBLT_ZZZ_H 6170 2348848677U, // USUBLT_ZZZ_S 6171 70820053U, // USUBLv16i8_v8i16 6172 2216734525U, // USUBLv2i32_v2i64 6173 70299453U, // USUBLv4i16_v4i32 6174 69247189U, // USUBLv4i32_v2i64 6175 2217779413U, // USUBLv8i16_v4i32 6176 2218307389U, // USUBLv8i8_v8i16 6177 2415937594U, // USUBWB_ZZZ_D 6178 241199162U, // USUBWB_ZZZ_H 6179 2617280570U, // USUBWB_ZZZ_S 6180 2415941547U, // USUBWT_ZZZ_D 6181 241203115U, // USUBWT_ZZZ_H 6182 2617284523U, // USUBWT_ZZZ_S 6183 2218303990U, // USUBWv16i8_v8i16 6184 2216737020U, // USUBWv2i32_v2i64 6185 70301948U, // USUBWv4i16_v4i32 6186 2216731126U, // USUBWv4i32_v2i64 6187 70296054U, // USUBWv8i16_v4i32 6188 2218309884U, // USUBWv8i8_v8i16 6189 469782095U, // UUNPKHI_ZZ_D 6190 865627727U, // UUNPKHI_ZZ_H 6191 201363023U, // UUNPKHI_ZZ_S 6192 469782977U, // UUNPKLO_ZZ_D 6193 865628609U, // UUNPKLO_ZZ_H 6194 201363905U, // UUNPKLO_ZZ_S 6195 2147502069U, // UXTB_ZPmZ_D 6196 34105333U, // UXTB_ZPmZ_H 6197 34805U, // UXTB_ZPmZ_S 6198 2147503631U, // UXTH_ZPmZ_D 6199 36367U, // UXTH_ZPmZ_S 6200 2147506614U, // UXTW_ZPmZ_D 6201 2583699505U, // UZP1_PPP_B 6202 2415935537U, // UZP1_PPP_D 6203 2388680753U, // UZP1_PPP_H 6204 2617278513U, // UZP1_PPP_S 6205 2583699505U, // UZP1_ZZZ_B 6206 2415935537U, // UZP1_ZZZ_D 6207 2388680753U, // UZP1_ZZZ_H 6208 2617278513U, // UZP1_ZZZ_S 6209 68198449U, // UZP1v16i8 6210 2216206385U, // UZP1v2i32 6211 2216730673U, // UZP1v2i64 6212 69771313U, // UZP1v4i16 6213 70295601U, // UZP1v4i32 6214 2218303537U, // UZP1v8i16 6215 2218827825U, // UZP1v8i8 6216 2583699932U, // UZP2_PPP_B 6217 2415935964U, // UZP2_PPP_D 6218 2388681180U, // UZP2_PPP_H 6219 2617278940U, // UZP2_PPP_S 6220 2583699932U, // UZP2_ZZZ_B 6221 2415935964U, // UZP2_ZZZ_D 6222 2388681180U, // UZP2_ZZZ_H 6223 2617278940U, // UZP2_ZZZ_S 6224 68198876U, // UZP2v16i8 6225 2216206812U, // UZP2v2i32 6226 2216731100U, // UZP2v2i64 6227 69771740U, // UZP2v4i16 6228 70296028U, // UZP2v4i32 6229 2218303964U, // UZP2v8i16 6230 2218828252U, // UZP2v8i8 6231 2248157682U, // WHILEGE_PWW_B 6232 2248165874U, // WHILEGE_PWW_D 6233 2391828978U, // WHILEGE_PWW_H 6234 2248182258U, // WHILEGE_PWW_S 6235 2248157682U, // WHILEGE_PXX_B 6236 2248165874U, // WHILEGE_PXX_D 6237 2391828978U, // WHILEGE_PXX_H 6238 2248182258U, // WHILEGE_PXX_S 6239 2248160718U, // WHILEGT_PWW_B 6240 2248168910U, // WHILEGT_PWW_D 6241 2391832014U, // WHILEGT_PWW_H 6242 2248185294U, // WHILEGT_PWW_S 6243 2248160718U, // WHILEGT_PXX_B 6244 2248168910U, // WHILEGT_PXX_D 6245 2391832014U, // WHILEGT_PXX_H 6246 2248185294U, // WHILEGT_PXX_S 6247 2248158772U, // WHILEHI_PWW_B 6248 2248166964U, // WHILEHI_PWW_D 6249 2391830068U, // WHILEHI_PWW_H 6250 2248183348U, // WHILEHI_PWW_S 6251 2248158772U, // WHILEHI_PXX_B 6252 2248166964U, // WHILEHI_PXX_D 6253 2391830068U, // WHILEHI_PXX_H 6254 2248183348U, // WHILEHI_PXX_S 6255 2248160468U, // WHILEHS_PWW_B 6256 2248168660U, // WHILEHS_PWW_D 6257 2391831764U, // WHILEHS_PWW_H 6258 2248185044U, // WHILEHS_PWW_S 6259 2248160468U, // WHILEHS_PXX_B 6260 2248168660U, // WHILEHS_PXX_D 6261 2391831764U, // WHILEHS_PXX_H 6262 2248185044U, // WHILEHS_PXX_S 6263 2248157713U, // WHILELE_PWW_B 6264 2248165905U, // WHILELE_PWW_D 6265 2391829009U, // WHILELE_PWW_H 6266 2248182289U, // WHILELE_PWW_S 6267 2248157713U, // WHILELE_PXX_B 6268 2248165905U, // WHILELE_PXX_D 6269 2391829009U, // WHILELE_PXX_H 6270 2248182289U, // WHILELE_PXX_S 6271 2248159654U, // WHILELO_PWW_B 6272 2248167846U, // WHILELO_PWW_D 6273 2391830950U, // WHILELO_PWW_H 6274 2248184230U, // WHILELO_PWW_S 6275 2248159654U, // WHILELO_PXX_B 6276 2248167846U, // WHILELO_PXX_D 6277 2391830950U, // WHILELO_PXX_H 6278 2248184230U, // WHILELO_PXX_S 6279 2248160495U, // WHILELS_PWW_B 6280 2248168687U, // WHILELS_PWW_D 6281 2391831791U, // WHILELS_PWW_H 6282 2248185071U, // WHILELS_PWW_S 6283 2248160495U, // WHILELS_PXX_B 6284 2248168687U, // WHILELS_PXX_D 6285 2391831791U, // WHILELS_PXX_H 6286 2248185071U, // WHILELS_PXX_S 6287 2248160859U, // WHILELT_PWW_B 6288 2248169051U, // WHILELT_PWW_D 6289 2391832155U, // WHILELT_PWW_H 6290 2248185435U, // WHILELT_PWW_S 6291 2248160859U, // WHILELT_PXX_B 6292 2248169051U, // WHILELT_PXX_D 6293 2391832155U, // WHILELT_PXX_H 6294 2248185435U, // WHILELT_PXX_S 6295 2248161615U, // WHILERW_PXX_B 6296 2248169807U, // WHILERW_PXX_D 6297 2391832911U, // WHILERW_PXX_H 6298 2248186191U, // WHILERW_PXX_S 6299 2248160332U, // WHILEWR_PXX_B 6300 2248168524U, // WHILEWR_PXX_D 6301 2391831628U, // WHILEWR_PXX_H 6302 2248184908U, // WHILEWR_PXX_S 6303 7353173U, // WRFFR 6304 7175U, // XAFLAG 6305 2216735512U, // XAR 6306 2583704344U, // XAR_ZZZI_B 6307 2415940376U, // XAR_ZZZI_D 6308 2388685592U, // XAR_ZZZI_H 6309 2617283352U, // XAR_ZZZI_S 6310 7391536U, // XPACD 6311 7392813U, // XPACI 6312 7060U, // XPACLRI 6313 2484134305U, // XTNv16i8 6314 68727153U, // XTNv2i32 6315 69775729U, // XTNv4i16 6316 338747809U, // XTNv4i32 6317 339272097U, // XTNv8i16 6318 2218832241U, // XTNv8i8 6319 2583699499U, // ZIP1_PPP_B 6320 2415935531U, // ZIP1_PPP_D 6321 2388680747U, // ZIP1_PPP_H 6322 2617278507U, // ZIP1_PPP_S 6323 2583699499U, // ZIP1_ZZZ_B 6324 2415935531U, // ZIP1_ZZZ_D 6325 2388680747U, // ZIP1_ZZZ_H 6326 2617278507U, // ZIP1_ZZZ_S 6327 68198443U, // ZIP1v16i8 6328 2216206379U, // ZIP1v2i32 6329 2216730667U, // ZIP1v2i64 6330 69771307U, // ZIP1v4i16 6331 70295595U, // ZIP1v4i32 6332 2218303531U, // ZIP1v8i16 6333 2218827819U, // ZIP1v8i8 6334 2583699926U, // ZIP2_PPP_B 6335 2415935958U, // ZIP2_PPP_D 6336 2388681174U, // ZIP2_PPP_H 6337 2617278934U, // ZIP2_PPP_S 6338 2583699926U, // ZIP2_ZZZ_B 6339 2415935958U, // ZIP2_ZZZ_D 6340 2388681174U, // ZIP2_ZZZ_H 6341 2617278934U, // ZIP2_ZZZ_S 6342 68198870U, // ZIP2v16i8 6343 2216206806U, // ZIP2v2i32 6344 2216731094U, // ZIP2v2i64 6345 69771734U, // ZIP2v4i16 6346 70296022U, // ZIP2v4i32 6347 2218303958U, // ZIP2v8i16 6348 2218828246U, // ZIP2v8i8 6349 }; 6350 6351 static const uint32_t OpInfo1[] = { 6352 0U, // PHI 6353 0U, // INLINEASM 6354 0U, // INLINEASM_BR 6355 0U, // CFI_INSTRUCTION 6356 0U, // EH_LABEL 6357 0U, // GC_LABEL 6358 0U, // ANNOTATION_LABEL 6359 0U, // KILL 6360 0U, // EXTRACT_SUBREG 6361 0U, // INSERT_SUBREG 6362 0U, // IMPLICIT_DEF 6363 0U, // SUBREG_TO_REG 6364 0U, // COPY_TO_REGCLASS 6365 0U, // DBG_VALUE 6366 0U, // DBG_LABEL 6367 0U, // REG_SEQUENCE 6368 0U, // COPY 6369 0U, // BUNDLE 6370 0U, // LIFETIME_START 6371 0U, // LIFETIME_END 6372 0U, // STACKMAP 6373 0U, // FENTRY_CALL 6374 0U, // PATCHPOINT 6375 0U, // LOAD_STACK_GUARD 6376 0U, // STATEPOINT 6377 0U, // LOCAL_ESCAPE 6378 0U, // FAULTING_OP 6379 0U, // PATCHABLE_OP 6380 0U, // PATCHABLE_FUNCTION_ENTER 6381 0U, // PATCHABLE_RET 6382 0U, // PATCHABLE_FUNCTION_EXIT 6383 0U, // PATCHABLE_TAIL_CALL 6384 0U, // PATCHABLE_EVENT_CALL 6385 0U, // PATCHABLE_TYPED_EVENT_CALL 6386 0U, // ICALL_BRANCH_FUNNEL 6387 0U, // G_ADD 6388 0U, // G_SUB 6389 0U, // G_MUL 6390 0U, // G_SDIV 6391 0U, // G_UDIV 6392 0U, // G_SREM 6393 0U, // G_UREM 6394 0U, // G_AND 6395 0U, // G_OR 6396 0U, // G_XOR 6397 0U, // G_IMPLICIT_DEF 6398 0U, // G_PHI 6399 0U, // G_FRAME_INDEX 6400 0U, // G_GLOBAL_VALUE 6401 0U, // G_EXTRACT 6402 0U, // G_UNMERGE_VALUES 6403 0U, // G_INSERT 6404 0U, // G_MERGE_VALUES 6405 0U, // G_BUILD_VECTOR 6406 0U, // G_BUILD_VECTOR_TRUNC 6407 0U, // G_CONCAT_VECTORS 6408 0U, // G_PTRTOINT 6409 0U, // G_INTTOPTR 6410 0U, // G_BITCAST 6411 0U, // G_INTRINSIC_TRUNC 6412 0U, // G_INTRINSIC_ROUND 6413 0U, // G_READCYCLECOUNTER 6414 0U, // G_LOAD 6415 0U, // G_SEXTLOAD 6416 0U, // G_ZEXTLOAD 6417 0U, // G_INDEXED_LOAD 6418 0U, // G_INDEXED_SEXTLOAD 6419 0U, // G_INDEXED_ZEXTLOAD 6420 0U, // G_STORE 6421 0U, // G_INDEXED_STORE 6422 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS 6423 0U, // G_ATOMIC_CMPXCHG 6424 0U, // G_ATOMICRMW_XCHG 6425 0U, // G_ATOMICRMW_ADD 6426 0U, // G_ATOMICRMW_SUB 6427 0U, // G_ATOMICRMW_AND 6428 0U, // G_ATOMICRMW_NAND 6429 0U, // G_ATOMICRMW_OR 6430 0U, // G_ATOMICRMW_XOR 6431 0U, // G_ATOMICRMW_MAX 6432 0U, // G_ATOMICRMW_MIN 6433 0U, // G_ATOMICRMW_UMAX 6434 0U, // G_ATOMICRMW_UMIN 6435 0U, // G_ATOMICRMW_FADD 6436 0U, // G_ATOMICRMW_FSUB 6437 0U, // G_FENCE 6438 0U, // G_BRCOND 6439 0U, // G_BRINDIRECT 6440 0U, // G_INTRINSIC 6441 0U, // G_INTRINSIC_W_SIDE_EFFECTS 6442 0U, // G_ANYEXT 6443 0U, // G_TRUNC 6444 0U, // G_CONSTANT 6445 0U, // G_FCONSTANT 6446 0U, // G_VASTART 6447 0U, // G_VAARG 6448 0U, // G_SEXT 6449 0U, // G_SEXT_INREG 6450 0U, // G_ZEXT 6451 0U, // G_SHL 6452 0U, // G_LSHR 6453 0U, // G_ASHR 6454 0U, // G_ICMP 6455 0U, // G_FCMP 6456 0U, // G_SELECT 6457 0U, // G_UADDO 6458 0U, // G_UADDE 6459 0U, // G_USUBO 6460 0U, // G_USUBE 6461 0U, // G_SADDO 6462 0U, // G_SADDE 6463 0U, // G_SSUBO 6464 0U, // G_SSUBE 6465 0U, // G_UMULO 6466 0U, // G_SMULO 6467 0U, // G_UMULH 6468 0U, // G_SMULH 6469 0U, // G_FADD 6470 0U, // G_FSUB 6471 0U, // G_FMUL 6472 0U, // G_FMA 6473 0U, // G_FMAD 6474 0U, // G_FDIV 6475 0U, // G_FREM 6476 0U, // G_FPOW 6477 0U, // G_FEXP 6478 0U, // G_FEXP2 6479 0U, // G_FLOG 6480 0U, // G_FLOG2 6481 0U, // G_FLOG10 6482 0U, // G_FNEG 6483 0U, // G_FPEXT 6484 0U, // G_FPTRUNC 6485 0U, // G_FPTOSI 6486 0U, // G_FPTOUI 6487 0U, // G_SITOFP 6488 0U, // G_UITOFP 6489 0U, // G_FABS 6490 0U, // G_FCOPYSIGN 6491 0U, // G_FCANONICALIZE 6492 0U, // G_FMINNUM 6493 0U, // G_FMAXNUM 6494 0U, // G_FMINNUM_IEEE 6495 0U, // G_FMAXNUM_IEEE 6496 0U, // G_FMINIMUM 6497 0U, // G_FMAXIMUM 6498 0U, // G_PTR_ADD 6499 0U, // G_PTR_MASK 6500 0U, // G_SMIN 6501 0U, // G_SMAX 6502 0U, // G_UMIN 6503 0U, // G_UMAX 6504 0U, // G_BR 6505 0U, // G_BRJT 6506 0U, // G_INSERT_VECTOR_ELT 6507 0U, // G_EXTRACT_VECTOR_ELT 6508 0U, // G_SHUFFLE_VECTOR 6509 0U, // G_CTTZ 6510 0U, // G_CTTZ_ZERO_UNDEF 6511 0U, // G_CTLZ 6512 0U, // G_CTLZ_ZERO_UNDEF 6513 0U, // G_CTPOP 6514 0U, // G_BSWAP 6515 0U, // G_BITREVERSE 6516 0U, // G_FCEIL 6517 0U, // G_FCOS 6518 0U, // G_FSIN 6519 0U, // G_FSQRT 6520 0U, // G_FFLOOR 6521 0U, // G_FRINT 6522 0U, // G_FNEARBYINT 6523 0U, // G_ADDRSPACE_CAST 6524 0U, // G_BLOCK_ADDR 6525 0U, // G_JUMP_TABLE 6526 0U, // G_DYN_STACKALLOC 6527 0U, // G_READ_REGISTER 6528 0U, // G_WRITE_REGISTER 6529 0U, // CATCHRET 6530 0U, // CLEANUPRET 6531 0U, // SEH_AddFP 6532 0U, // SEH_EpilogEnd 6533 0U, // SEH_EpilogStart 6534 0U, // SEH_Nop 6535 0U, // SEH_PrologEnd 6536 0U, // SEH_SaveFPLR 6537 0U, // SEH_SaveFPLR_X 6538 0U, // SEH_SaveFReg 6539 0U, // SEH_SaveFRegP 6540 0U, // SEH_SaveFRegP_X 6541 0U, // SEH_SaveFReg_X 6542 0U, // SEH_SaveReg 6543 0U, // SEH_SaveRegP 6544 0U, // SEH_SaveRegP_X 6545 0U, // SEH_SaveReg_X 6546 0U, // SEH_SetFP 6547 0U, // SEH_StackAlloc 6548 0U, // ABS_ZPmZ_B 6549 0U, // ABS_ZPmZ_D 6550 0U, // ABS_ZPmZ_H 6551 1U, // ABS_ZPmZ_S 6552 1U, // ABSv16i8 6553 2U, // ABSv1i64 6554 2U, // ABSv2i32 6555 3U, // ABSv2i64 6556 3U, // ABSv4i16 6557 4U, // ABSv4i32 6558 4U, // ABSv8i16 6559 5U, // ABSv8i8 6560 69U, // ADCLB_ZZZ_D 6561 133U, // ADCLB_ZZZ_S 6562 69U, // ADCLT_ZZZ_D 6563 133U, // ADCLT_ZZZ_S 6564 197U, // ADCSWr 6565 197U, // ADCSXr 6566 197U, // ADCWr 6567 197U, // ADCXr 6568 8453U, // ADDG 6569 325U, // ADDHNB_ZZZ_B 6570 6U, // ADDHNB_ZZZ_H 6571 389U, // ADDHNB_ZZZ_S 6572 453U, // ADDHNT_ZZZ_B 6573 1U, // ADDHNT_ZZZ_H 6574 69U, // ADDHNT_ZZZ_S 6575 16902U, // ADDHNv2i64_v2i32 6576 16966U, // ADDHNv2i64_v4i32 6577 25095U, // ADDHNv4i32_v4i16 6578 25159U, // ADDHNv4i32_v8i16 6579 33351U, // ADDHNv8i16_v16i8 6580 33287U, // ADDHNv8i16_v8i8 6581 197U, // ADDPL_XXI 6582 533128U, // ADDP_ZPmZ_B 6583 1057160U, // ADDP_ZPmZ_D 6584 1614536U, // ADDP_ZPmZ_H 6585 2106120U, // ADDP_ZPmZ_S 6586 49673U, // ADDPv16i8 6587 57865U, // ADDPv2i32 6588 16902U, // ADDPv2i64 6589 3U, // ADDPv2i64p 6590 66058U, // ADDPv4i16 6591 25095U, // ADDPv4i32 6592 33287U, // ADDPv8i16 6593 74250U, // ADDPv8i8 6594 837U, // ADDSWri 6595 0U, // ADDSWrr 6596 901U, // ADDSWrs 6597 965U, // ADDSWrx 6598 837U, // ADDSXri 6599 0U, // ADDSXrr 6600 901U, // ADDSXrs 6601 965U, // ADDSXrx 6602 82117U, // ADDSXrx64 6603 197U, // ADDVL_XXI 6604 1U, // ADDVv16i8v 6605 3U, // ADDVv4i16v 6606 4U, // ADDVv4i32v 6607 4U, // ADDVv8i16v 6608 5U, // ADDVv8i8v 6609 837U, // ADDWri 6610 0U, // ADDWrr 6611 901U, // ADDWrs 6612 965U, // ADDWrx 6613 837U, // ADDXri 6614 0U, // ADDXrr 6615 901U, // ADDXrs 6616 965U, // ADDXrx 6617 82117U, // ADDXrx64 6618 1029U, // ADD_ZI_B 6619 1093U, // ADD_ZI_D 6620 11U, // ADD_ZI_H 6621 1157U, // ADD_ZI_S 6622 533128U, // ADD_ZPmZ_B 6623 1057160U, // ADD_ZPmZ_D 6624 1614536U, // ADD_ZPmZ_H 6625 2106120U, // ADD_ZPmZ_S 6626 645U, // ADD_ZZZ_B 6627 389U, // ADD_ZZZ_D 6628 8U, // ADD_ZZZ_H 6629 773U, // ADD_ZZZ_S 6630 0U, // ADDlowTLS 6631 49673U, // ADDv16i8 6632 197U, // ADDv1i64 6633 57865U, // ADDv2i32 6634 16902U, // ADDv2i64 6635 66058U, // ADDv4i16 6636 25095U, // ADDv4i32 6637 33287U, // ADDv8i16 6638 74250U, // ADDv8i8 6639 0U, // ADJCALLSTACKDOWN 6640 0U, // ADJCALLSTACKUP 6641 2U, // ADR 6642 0U, // ADRP 6643 1221U, // ADR_LSL_ZZZ_D_0 6644 1285U, // ADR_LSL_ZZZ_D_1 6645 1349U, // ADR_LSL_ZZZ_D_2 6646 1413U, // ADR_LSL_ZZZ_D_3 6647 1477U, // ADR_LSL_ZZZ_S_0 6648 1541U, // ADR_LSL_ZZZ_S_1 6649 1605U, // ADR_LSL_ZZZ_S_2 6650 1669U, // ADR_LSL_ZZZ_S_3 6651 1733U, // ADR_SXTW_ZZZ_D_0 6652 1797U, // ADR_SXTW_ZZZ_D_1 6653 1861U, // ADR_SXTW_ZZZ_D_2 6654 1925U, // ADR_SXTW_ZZZ_D_3 6655 1989U, // ADR_UXTW_ZZZ_D_0 6656 2053U, // ADR_UXTW_ZZZ_D_1 6657 2117U, // ADR_UXTW_ZZZ_D_2 6658 2181U, // ADR_UXTW_ZZZ_D_3 6659 645U, // AESD_ZZZ_B 6660 1U, // AESDrr 6661 645U, // AESE_ZZZ_B 6662 1U, // AESErr 6663 2U, // AESIMC_ZZ_B 6664 1U, // AESIMCrr 6665 0U, // AESIMCrrTied 6666 2U, // AESMC_ZZ_B 6667 1U, // AESMCrr 6668 0U, // AESMCrrTied 6669 2245U, // ANDSWri 6670 0U, // ANDSWrr 6671 901U, // ANDSWrs 6672 2309U, // ANDSXri 6673 0U, // ANDSXrr 6674 901U, // ANDSXrs 6675 533131U, // ANDS_PPzPP 6676 645U, // ANDV_VPZ_B 6677 389U, // ANDV_VPZ_D 6678 325U, // ANDV_VPZ_H 6679 773U, // ANDV_VPZ_S 6680 2245U, // ANDWri 6681 0U, // ANDWrr 6682 901U, // ANDWrs 6683 2309U, // ANDXri 6684 0U, // ANDXrr 6685 901U, // ANDXrs 6686 533131U, // AND_PPzPP 6687 2309U, // AND_ZI 6688 533128U, // AND_ZPmZ_B 6689 1057160U, // AND_ZPmZ_D 6690 1614536U, // AND_ZPmZ_H 6691 2106120U, // AND_ZPmZ_S 6692 389U, // AND_ZZZ 6693 49673U, // ANDv16i8 6694 74250U, // ANDv8i8 6695 8840U, // ASRD_ZPmI_B 6696 8584U, // ASRD_ZPmI_D 6697 90824U, // ASRD_ZPmI_H 6698 8968U, // ASRD_ZPmI_S 6699 533128U, // ASRR_ZPmZ_B 6700 1057160U, // ASRR_ZPmZ_D 6701 1614536U, // ASRR_ZPmZ_H 6702 2106120U, // ASRR_ZPmZ_S 6703 197U, // ASRVWr 6704 197U, // ASRVXr 6705 1057416U, // ASR_WIDE_ZPmZ_B 6706 99016U, // ASR_WIDE_ZPmZ_H 6707 1057544U, // ASR_WIDE_ZPmZ_S 6708 389U, // ASR_WIDE_ZZZ_B 6709 12U, // ASR_WIDE_ZZZ_H 6710 389U, // ASR_WIDE_ZZZ_S 6711 8840U, // ASR_ZPmI_B 6712 8584U, // ASR_ZPmI_D 6713 90824U, // ASR_ZPmI_H 6714 8968U, // ASR_ZPmI_S 6715 533128U, // ASR_ZPmZ_B 6716 1057160U, // ASR_ZPmZ_D 6717 1614536U, // ASR_ZPmZ_H 6718 2106120U, // ASR_ZPmZ_S 6719 197U, // ASR_ZZI_B 6720 197U, // ASR_ZZI_D 6721 12U, // ASR_ZZI_H 6722 197U, // ASR_ZZI_S 6723 2U, // AUTDA 6724 2U, // AUTDB 6725 0U, // AUTDZA 6726 0U, // AUTDZB 6727 2U, // AUTIA 6728 0U, // AUTIA1716 6729 0U, // AUTIASP 6730 0U, // AUTIAZ 6731 2U, // AUTIB 6732 0U, // AUTIB1716 6733 0U, // AUTIBSP 6734 0U, // AUTIBZ 6735 0U, // AUTIZA 6736 0U, // AUTIZB 6737 0U, // AXFLAG 6738 0U, // B 6739 36282889U, // BCAX 6740 1057157U, // BCAX_ZZZZ_D 6741 645U, // BDEP_ZZZ_B 6742 389U, // BDEP_ZZZ_D 6743 8U, // BDEP_ZZZ_H 6744 773U, // BDEP_ZZZ_S 6745 645U, // BEXT_ZZZ_B 6746 389U, // BEXT_ZZZ_D 6747 8U, // BEXT_ZZZ_H 6748 773U, // BEXT_ZZZ_S 6749 3156293U, // BFMWri 6750 3156293U, // BFMXri 6751 645U, // BGRP_ZZZ_B 6752 389U, // BGRP_ZZZ_D 6753 8U, // BGRP_ZZZ_H 6754 773U, // BGRP_ZZZ_S 6755 0U, // BICSWrr 6756 901U, // BICSWrs 6757 0U, // BICSXrr 6758 901U, // BICSXrs 6759 533131U, // BICS_PPzPP 6760 0U, // BICWrr 6761 901U, // BICWrs 6762 0U, // BICXrr 6763 901U, // BICXrs 6764 533131U, // BIC_PPzPP 6765 533128U, // BIC_ZPmZ_B 6766 1057160U, // BIC_ZPmZ_D 6767 1614536U, // BIC_ZPmZ_H 6768 2106120U, // BIC_ZPmZ_S 6769 389U, // BIC_ZZZ 6770 49673U, // BICv16i8 6771 0U, // BICv2i32 6772 0U, // BICv4i16 6773 0U, // BICv4i32 6774 0U, // BICv8i16 6775 74250U, // BICv8i8 6776 49673U, // BIFv16i8 6777 74250U, // BIFv8i8 6778 49737U, // BITv16i8 6779 74314U, // BITv8i8 6780 0U, // BL 6781 0U, // BLR 6782 2U, // BLRAA 6783 0U, // BLRAAZ 6784 2U, // BLRAB 6785 0U, // BLRABZ 6786 0U, // BR 6787 2U, // BRAA 6788 0U, // BRAAZ 6789 2U, // BRAB 6790 0U, // BRABZ 6791 0U, // BRK 6792 651U, // BRKAS_PPzP 6793 0U, // BRKA_PPmP 6794 651U, // BRKA_PPzP 6795 651U, // BRKBS_PPzP 6796 0U, // BRKB_PPmP 6797 651U, // BRKB_PPzP 6798 533131U, // BRKNS_PPzP 6799 533131U, // BRKN_PPzP 6800 533131U, // BRKPAS_PPzPP 6801 533131U, // BRKPA_PPzPP 6802 533131U, // BRKPBS_PPzPP 6803 533131U, // BRKPB_PPzPP 6804 1057157U, // BSL1N_ZZZZ_D 6805 1057157U, // BSL2N_ZZZZ_D 6806 1057157U, // BSL_ZZZZ_D 6807 49737U, // BSLv16i8 6808 74314U, // BSLv8i8 6809 0U, // Bcc 6810 3678853U, // CADD_ZZI_B 6811 3678597U, // CADD_ZZI_D 6812 115400U, // CADD_ZZI_H 6813 3678981U, // CADD_ZZI_S 6814 125261U, // CASAB 6815 125261U, // CASAH 6816 125261U, // CASALB 6817 125261U, // CASALH 6818 125261U, // CASALW 6819 125261U, // CASALX 6820 125261U, // CASAW 6821 125261U, // CASAX 6822 125261U, // CASB 6823 125261U, // CASH 6824 125261U, // CASLB 6825 125261U, // CASLH 6826 125261U, // CASLW 6827 125261U, // CASLX 6828 0U, // CASPALW 6829 0U, // CASPALX 6830 0U, // CASPAW 6831 0U, // CASPAX 6832 0U, // CASPLW 6833 0U, // CASPLX 6834 0U, // CASPW 6835 0U, // CASPX 6836 125261U, // CASW 6837 125261U, // CASX 6838 0U, // CATCHPAD 6839 0U, // CBNZW 6840 0U, // CBNZX 6841 0U, // CBZW 6842 0U, // CBZX 6843 4202693U, // CCMNWi 6844 4202693U, // CCMNWr 6845 4202693U, // CCMNXi 6846 4202693U, // CCMNXr 6847 4202693U, // CCMPWi 6848 4202693U, // CCMPWr 6849 4202693U, // CCMPXi 6850 4202693U, // CCMPXr 6851 71958981U, // CDOT_ZZZI_D 6852 5253504U, // CDOT_ZZZI_S 6853 5775813U, // CDOT_ZZZ_D 6854 139968U, // CDOT_ZZZ_S 6855 0U, // CFINV 6856 532677U, // CLASTA_RPZ_B 6857 1056965U, // CLASTA_RPZ_D 6858 6299845U, // CLASTA_RPZ_H 6859 2105541U, // CLASTA_RPZ_S 6860 532677U, // CLASTA_VPZ_B 6861 1056965U, // CLASTA_VPZ_D 6862 6299845U, // CLASTA_VPZ_H 6863 2105541U, // CLASTA_VPZ_S 6864 533125U, // CLASTA_ZPZ_B 6865 1057157U, // CLASTA_ZPZ_D 6866 1614536U, // CLASTA_ZPZ_H 6867 2106117U, // CLASTA_ZPZ_S 6868 532677U, // CLASTB_RPZ_B 6869 1056965U, // CLASTB_RPZ_D 6870 6299845U, // CLASTB_RPZ_H 6871 2105541U, // CLASTB_RPZ_S 6872 532677U, // CLASTB_VPZ_B 6873 1056965U, // CLASTB_VPZ_D 6874 6299845U, // CLASTB_VPZ_H 6875 2105541U, // CLASTB_VPZ_S 6876 533125U, // CLASTB_ZPZ_B 6877 1057157U, // CLASTB_ZPZ_D 6878 1614536U, // CLASTB_ZPZ_H 6879 2106117U, // CLASTB_ZPZ_S 6880 0U, // CLREX 6881 2U, // CLSWr 6882 2U, // CLSXr 6883 0U, // CLS_ZPmZ_B 6884 0U, // CLS_ZPmZ_D 6885 0U, // CLS_ZPmZ_H 6886 1U, // CLS_ZPmZ_S 6887 1U, // CLSv16i8 6888 2U, // CLSv2i32 6889 3U, // CLSv4i16 6890 4U, // CLSv4i32 6891 4U, // CLSv8i16 6892 5U, // CLSv8i8 6893 2U, // CLZWr 6894 2U, // CLZXr 6895 0U, // CLZ_ZPmZ_B 6896 0U, // CLZ_ZPmZ_D 6897 0U, // CLZ_ZPmZ_H 6898 1U, // CLZ_ZPmZ_S 6899 1U, // CLZv16i8 6900 2U, // CLZv2i32 6901 3U, // CLZv4i16 6902 4U, // CLZv4i32 6903 4U, // CLZv8i16 6904 5U, // CLZv8i8 6905 49673U, // CMEQv16i8 6906 13U, // CMEQv16i8rz 6907 197U, // CMEQv1i64 6908 14U, // CMEQv1i64rz 6909 57865U, // CMEQv2i32 6910 14U, // CMEQv2i32rz 6911 16902U, // CMEQv2i64 6912 15U, // CMEQv2i64rz 6913 66058U, // CMEQv4i16 6914 15U, // CMEQv4i16rz 6915 25095U, // CMEQv4i32 6916 16U, // CMEQv4i32rz 6917 33287U, // CMEQv8i16 6918 16U, // CMEQv8i16rz 6919 74250U, // CMEQv8i8 6920 17U, // CMEQv8i8rz 6921 49673U, // CMGEv16i8 6922 13U, // CMGEv16i8rz 6923 197U, // CMGEv1i64 6924 14U, // CMGEv1i64rz 6925 57865U, // CMGEv2i32 6926 14U, // CMGEv2i32rz 6927 16902U, // CMGEv2i64 6928 15U, // CMGEv2i64rz 6929 66058U, // CMGEv4i16 6930 15U, // CMGEv4i16rz 6931 25095U, // CMGEv4i32 6932 16U, // CMGEv4i32rz 6933 33287U, // CMGEv8i16 6934 16U, // CMGEv8i16rz 6935 74250U, // CMGEv8i8 6936 17U, // CMGEv8i8rz 6937 49673U, // CMGTv16i8 6938 13U, // CMGTv16i8rz 6939 197U, // CMGTv1i64 6940 14U, // CMGTv1i64rz 6941 57865U, // CMGTv2i32 6942 14U, // CMGTv2i32rz 6943 16902U, // CMGTv2i64 6944 15U, // CMGTv2i64rz 6945 66058U, // CMGTv4i16 6946 15U, // CMGTv4i16rz 6947 25095U, // CMGTv4i32 6948 16U, // CMGTv4i32rz 6949 33287U, // CMGTv8i16 6950 16U, // CMGTv8i16rz 6951 74250U, // CMGTv8i8 6952 17U, // CMGTv8i8rz 6953 49673U, // CMHIv16i8 6954 197U, // CMHIv1i64 6955 57865U, // CMHIv2i32 6956 16902U, // CMHIv2i64 6957 66058U, // CMHIv4i16 6958 25095U, // CMHIv4i32 6959 33287U, // CMHIv8i16 6960 74250U, // CMHIv8i8 6961 49673U, // CMHSv16i8 6962 197U, // CMHSv1i64 6963 57865U, // CMHSv2i32 6964 16902U, // CMHSv2i64 6965 66058U, // CMHSv4i16 6966 25095U, // CMHSv4i32 6967 33287U, // CMHSv8i16 6968 74250U, // CMHSv8i8 6969 5253521U, // CMLA_ZZZI_H 6970 71958661U, // CMLA_ZZZI_S 6971 139968U, // CMLA_ZZZ_B 6972 5775429U, // CMLA_ZZZ_D 6973 139985U, // CMLA_ZZZ_H 6974 5775493U, // CMLA_ZZZ_S 6975 13U, // CMLEv16i8rz 6976 14U, // CMLEv1i64rz 6977 14U, // CMLEv2i32rz 6978 15U, // CMLEv2i64rz 6979 15U, // CMLEv4i16rz 6980 16U, // CMLEv4i32rz 6981 16U, // CMLEv8i16rz 6982 17U, // CMLEv8i8rz 6983 13U, // CMLTv16i8rz 6984 14U, // CMLTv1i64rz 6985 14U, // CMLTv2i32rz 6986 15U, // CMLTv2i64rz 6987 15U, // CMLTv4i16rz 6988 16U, // CMLTv4i32rz 6989 16U, // CMLTv8i16rz 6990 17U, // CMLTv8i8rz 6991 8843U, // CMPEQ_PPzZI_B 6992 8587U, // CMPEQ_PPzZI_D 6993 90824U, // CMPEQ_PPzZI_H 6994 8971U, // CMPEQ_PPzZI_S 6995 533131U, // CMPEQ_PPzZZ_B 6996 1057163U, // CMPEQ_PPzZZ_D 6997 1614536U, // CMPEQ_PPzZZ_H 6998 2106123U, // CMPEQ_PPzZZ_S 6999 1057419U, // CMPEQ_WIDE_PPzZZ_B 7000 99016U, // CMPEQ_WIDE_PPzZZ_H 7001 1057547U, // CMPEQ_WIDE_PPzZZ_S 7002 8843U, // CMPGE_PPzZI_B 7003 8587U, // CMPGE_PPzZI_D 7004 90824U, // CMPGE_PPzZI_H 7005 8971U, // CMPGE_PPzZI_S 7006 533131U, // CMPGE_PPzZZ_B 7007 1057163U, // CMPGE_PPzZZ_D 7008 1614536U, // CMPGE_PPzZZ_H 7009 2106123U, // CMPGE_PPzZZ_S 7010 1057419U, // CMPGE_WIDE_PPzZZ_B 7011 99016U, // CMPGE_WIDE_PPzZZ_H 7012 1057547U, // CMPGE_WIDE_PPzZZ_S 7013 8843U, // CMPGT_PPzZI_B 7014 8587U, // CMPGT_PPzZI_D 7015 90824U, // CMPGT_PPzZI_H 7016 8971U, // CMPGT_PPzZI_S 7017 533131U, // CMPGT_PPzZZ_B 7018 1057163U, // CMPGT_PPzZZ_D 7019 1614536U, // CMPGT_PPzZZ_H 7020 2106123U, // CMPGT_PPzZZ_S 7021 1057419U, // CMPGT_WIDE_PPzZZ_B 7022 99016U, // CMPGT_WIDE_PPzZZ_H 7023 1057547U, // CMPGT_WIDE_PPzZZ_S 7024 6824587U, // CMPHI_PPzZI_B 7025 6824331U, // CMPHI_PPzZI_D 7026 148168U, // CMPHI_PPzZI_H 7027 6824715U, // CMPHI_PPzZI_S 7028 533131U, // CMPHI_PPzZZ_B 7029 1057163U, // CMPHI_PPzZZ_D 7030 1614536U, // CMPHI_PPzZZ_H 7031 2106123U, // CMPHI_PPzZZ_S 7032 1057419U, // CMPHI_WIDE_PPzZZ_B 7033 99016U, // CMPHI_WIDE_PPzZZ_H 7034 1057547U, // CMPHI_WIDE_PPzZZ_S 7035 6824587U, // CMPHS_PPzZI_B 7036 6824331U, // CMPHS_PPzZI_D 7037 148168U, // CMPHS_PPzZI_H 7038 6824715U, // CMPHS_PPzZI_S 7039 533131U, // CMPHS_PPzZZ_B 7040 1057163U, // CMPHS_PPzZZ_D 7041 1614536U, // CMPHS_PPzZZ_H 7042 2106123U, // CMPHS_PPzZZ_S 7043 1057419U, // CMPHS_WIDE_PPzZZ_B 7044 99016U, // CMPHS_WIDE_PPzZZ_H 7045 1057547U, // CMPHS_WIDE_PPzZZ_S 7046 8843U, // CMPLE_PPzZI_B 7047 8587U, // CMPLE_PPzZI_D 7048 90824U, // CMPLE_PPzZI_H 7049 8971U, // CMPLE_PPzZI_S 7050 1057419U, // CMPLE_WIDE_PPzZZ_B 7051 99016U, // CMPLE_WIDE_PPzZZ_H 7052 1057547U, // CMPLE_WIDE_PPzZZ_S 7053 6824587U, // CMPLO_PPzZI_B 7054 6824331U, // CMPLO_PPzZI_D 7055 148168U, // CMPLO_PPzZI_H 7056 6824715U, // CMPLO_PPzZI_S 7057 1057419U, // CMPLO_WIDE_PPzZZ_B 7058 99016U, // CMPLO_WIDE_PPzZZ_H 7059 1057547U, // CMPLO_WIDE_PPzZZ_S 7060 6824587U, // CMPLS_PPzZI_B 7061 6824331U, // CMPLS_PPzZI_D 7062 148168U, // CMPLS_PPzZI_H 7063 6824715U, // CMPLS_PPzZI_S 7064 1057419U, // CMPLS_WIDE_PPzZZ_B 7065 99016U, // CMPLS_WIDE_PPzZZ_H 7066 1057547U, // CMPLS_WIDE_PPzZZ_S 7067 8843U, // CMPLT_PPzZI_B 7068 8587U, // CMPLT_PPzZI_D 7069 90824U, // CMPLT_PPzZI_H 7070 8971U, // CMPLT_PPzZI_S 7071 1057419U, // CMPLT_WIDE_PPzZZ_B 7072 99016U, // CMPLT_WIDE_PPzZZ_H 7073 1057547U, // CMPLT_WIDE_PPzZZ_S 7074 8843U, // CMPNE_PPzZI_B 7075 8587U, // CMPNE_PPzZI_D 7076 90824U, // CMPNE_PPzZI_H 7077 8971U, // CMPNE_PPzZI_S 7078 533131U, // CMPNE_PPzZZ_B 7079 1057163U, // CMPNE_PPzZZ_D 7080 1614536U, // CMPNE_PPzZZ_H 7081 2106123U, // CMPNE_PPzZZ_S 7082 1057419U, // CMPNE_WIDE_PPzZZ_B 7083 99016U, // CMPNE_WIDE_PPzZZ_H 7084 1057547U, // CMPNE_WIDE_PPzZZ_S 7085 0U, // CMP_SWAP_128 7086 0U, // CMP_SWAP_16 7087 0U, // CMP_SWAP_32 7088 0U, // CMP_SWAP_64 7089 0U, // CMP_SWAP_8 7090 49673U, // CMTSTv16i8 7091 197U, // CMTSTv1i64 7092 57865U, // CMTSTv2i32 7093 16902U, // CMTSTv2i64 7094 66058U, // CMTSTv4i16 7095 25095U, // CMTSTv4i32 7096 33287U, // CMTSTv8i16 7097 74250U, // CMTSTv8i8 7098 0U, // CNOT_ZPmZ_B 7099 0U, // CNOT_ZPmZ_D 7100 0U, // CNOT_ZPmZ_H 7101 1U, // CNOT_ZPmZ_S 7102 18U, // CNTB_XPiI 7103 18U, // CNTD_XPiI 7104 18U, // CNTH_XPiI 7105 645U, // CNTP_XPP_B 7106 389U, // CNTP_XPP_D 7107 325U, // CNTP_XPP_H 7108 773U, // CNTP_XPP_S 7109 18U, // CNTW_XPiI 7110 0U, // CNT_ZPmZ_B 7111 0U, // CNT_ZPmZ_D 7112 0U, // CNT_ZPmZ_H 7113 1U, // CNT_ZPmZ_S 7114 1U, // CNTv16i8 7115 5U, // CNTv8i8 7116 389U, // COMPACT_ZPZ_D 7117 773U, // COMPACT_ZPZ_S 7118 18U, // CPY_ZPmI_B 7119 19U, // CPY_ZPmI_D 7120 0U, // CPY_ZPmI_H 7121 19U, // CPY_ZPmI_S 7122 20U, // CPY_ZPmR_B 7123 20U, // CPY_ZPmR_D 7124 2U, // CPY_ZPmR_H 7125 20U, // CPY_ZPmR_S 7126 20U, // CPY_ZPmV_B 7127 20U, // CPY_ZPmV_D 7128 2U, // CPY_ZPmV_H 7129 20U, // CPY_ZPmV_S 7130 2507U, // CPY_ZPzI_B 7131 2571U, // CPY_ZPzI_D 7132 20U, // CPY_ZPzI_H 7133 2635U, // CPY_ZPzI_S 7134 2709U, // CPYi16 7135 2709U, // CPYi32 7136 2710U, // CPYi64 7137 2710U, // CPYi8 7138 197U, // CRC32Brr 7139 197U, // CRC32CBrr 7140 197U, // CRC32CHrr 7141 197U, // CRC32CWrr 7142 197U, // CRC32CXrr 7143 197U, // CRC32Hrr 7144 197U, // CRC32Wrr 7145 197U, // CRC32Xrr 7146 4202693U, // CSELWr 7147 4202693U, // CSELXr 7148 4202693U, // CSINCWr 7149 4202693U, // CSINCXr 7150 4202693U, // CSINVWr 7151 4202693U, // CSINVXr 7152 4202693U, // CSNEGWr 7153 4202693U, // CSNEGXr 7154 2U, // CTERMEQ_WW 7155 2U, // CTERMEQ_XX 7156 2U, // CTERMNE_WW 7157 2U, // CTERMNE_XX 7158 0U, // CompilerBarrier 7159 0U, // DCPS1 7160 0U, // DCPS2 7161 0U, // DCPS3 7162 0U, // DECB_XPiI 7163 0U, // DECD_XPiI 7164 0U, // DECD_ZPiI 7165 0U, // DECH_XPiI 7166 0U, // DECH_ZPiI 7167 2U, // DECP_XP_B 7168 2U, // DECP_XP_D 7169 2U, // DECP_XP_H 7170 2U, // DECP_XP_S 7171 2U, // DECP_ZP_D 7172 0U, // DECP_ZP_H 7173 2U, // DECP_ZP_S 7174 0U, // DECW_XPiI 7175 0U, // DECW_ZPiI 7176 0U, // DMB 7177 0U, // DRPS 7178 0U, // DSB 7179 0U, // DUPM_ZI 7180 0U, // DUP_ZI_B 7181 0U, // DUP_ZI_D 7182 0U, // DUP_ZI_H 7183 0U, // DUP_ZI_S 7184 2U, // DUP_ZR_B 7185 2U, // DUP_ZR_D 7186 0U, // DUP_ZR_H 7187 2U, // DUP_ZR_S 7188 23U, // DUP_ZZI_B 7189 23U, // DUP_ZZI_D 7190 0U, // DUP_ZZI_H 7191 0U, // DUP_ZZI_Q 7192 23U, // DUP_ZZI_S 7193 2U, // DUPv16i8gpr 7194 2710U, // DUPv16i8lane 7195 2U, // DUPv2i32gpr 7196 2709U, // DUPv2i32lane 7197 2U, // DUPv2i64gpr 7198 2710U, // DUPv2i64lane 7199 2U, // DUPv4i16gpr 7200 2709U, // DUPv4i16lane 7201 2U, // DUPv4i32gpr 7202 2709U, // DUPv4i32lane 7203 2U, // DUPv8i16gpr 7204 2709U, // DUPv8i16lane 7205 2U, // DUPv8i8gpr 7206 2710U, // DUPv8i8lane 7207 0U, // EMITBKEY 7208 0U, // EONWrr 7209 901U, // EONWrs 7210 0U, // EONXrr 7211 901U, // EONXrs 7212 36282889U, // EOR3 7213 1057157U, // EOR3_ZZZZ_D 7214 0U, // EORBT_ZZZ_B 7215 69U, // EORBT_ZZZ_D 7216 17U, // EORBT_ZZZ_H 7217 133U, // EORBT_ZZZ_S 7218 533131U, // EORS_PPzPP 7219 0U, // EORTB_ZZZ_B 7220 69U, // EORTB_ZZZ_D 7221 17U, // EORTB_ZZZ_H 7222 133U, // EORTB_ZZZ_S 7223 645U, // EORV_VPZ_B 7224 389U, // EORV_VPZ_D 7225 325U, // EORV_VPZ_H 7226 773U, // EORV_VPZ_S 7227 2245U, // EORWri 7228 0U, // EORWrr 7229 901U, // EORWrs 7230 2309U, // EORXri 7231 0U, // EORXrr 7232 901U, // EORXrs 7233 533131U, // EOR_PPzPP 7234 2309U, // EOR_ZI 7235 533128U, // EOR_ZPmZ_B 7236 1057160U, // EOR_ZPmZ_D 7237 1614536U, // EOR_ZPmZ_H 7238 2106120U, // EOR_ZPmZ_S 7239 389U, // EOR_ZZZ 7240 49673U, // EORv16i8 7241 74250U, // EORv8i8 7242 0U, // ERET 7243 0U, // ERETAA 7244 0U, // ERETAB 7245 8389U, // EXTRWrri 7246 8389U, // EXTRXrri 7247 6824581U, // EXT_ZZI 7248 23U, // EXT_ZZI_B 7249 107017U, // EXTv16i8 7250 156170U, // EXTv8i8 7251 0U, // F128CSEL 7252 197U, // FABD16 7253 197U, // FABD32 7254 197U, // FABD64 7255 1057160U, // FABD_ZPmZ_D 7256 1614536U, // FABD_ZPmZ_H 7257 2106120U, // FABD_ZPmZ_S 7258 57865U, // FABDv2f32 7259 16902U, // FABDv2f64 7260 66058U, // FABDv4f16 7261 25095U, // FABDv4f32 7262 33287U, // FABDv8f16 7263 2U, // FABSDr 7264 2U, // FABSHr 7265 2U, // FABSSr 7266 0U, // FABS_ZPmZ_D 7267 0U, // FABS_ZPmZ_H 7268 1U, // FABS_ZPmZ_S 7269 2U, // FABSv2f32 7270 3U, // FABSv2f64 7271 3U, // FABSv4f16 7272 4U, // FABSv4f32 7273 4U, // FABSv8f16 7274 197U, // FACGE16 7275 197U, // FACGE32 7276 197U, // FACGE64 7277 1057163U, // FACGE_PPzZZ_D 7278 1614536U, // FACGE_PPzZZ_H 7279 2106123U, // FACGE_PPzZZ_S 7280 57865U, // FACGEv2f32 7281 16902U, // FACGEv2f64 7282 66058U, // FACGEv4f16 7283 25095U, // FACGEv4f32 7284 33287U, // FACGEv8f16 7285 197U, // FACGT16 7286 197U, // FACGT32 7287 197U, // FACGT64 7288 1057163U, // FACGT_PPzZZ_D 7289 1614536U, // FACGT_PPzZZ_H 7290 2106123U, // FACGT_PPzZZ_S 7291 57865U, // FACGTv2f32 7292 16902U, // FACGTv2f64 7293 66058U, // FACGTv4f16 7294 25095U, // FACGTv4f32 7295 33287U, // FACGTv8f16 7296 1056965U, // FADDA_VPZ_D 7297 6299845U, // FADDA_VPZ_H 7298 2105541U, // FADDA_VPZ_S 7299 197U, // FADDDrr 7300 197U, // FADDHrr 7301 1057160U, // FADDP_ZPmZZ_D 7302 1614536U, // FADDP_ZPmZZ_H 7303 2106120U, // FADDP_ZPmZZ_S 7304 57865U, // FADDPv2f32 7305 16902U, // FADDPv2f64 7306 24U, // FADDPv2i16p 7307 2U, // FADDPv2i32p 7308 3U, // FADDPv2i64p 7309 66058U, // FADDPv4f16 7310 25095U, // FADDPv4f32 7311 33287U, // FADDPv8f16 7312 197U, // FADDSrr 7313 389U, // FADDV_VPZ_D 7314 325U, // FADDV_VPZ_H 7315 773U, // FADDV_VPZ_S 7316 7348616U, // FADD_ZPmI_D 7317 164552U, // FADD_ZPmI_H 7318 7349000U, // FADD_ZPmI_S 7319 1057160U, // FADD_ZPmZ_D 7320 1614536U, // FADD_ZPmZ_H 7321 2106120U, // FADD_ZPmZ_S 7322 389U, // FADD_ZZZ_D 7323 8U, // FADD_ZZZ_H 7324 773U, // FADD_ZZZ_S 7325 57865U, // FADDv2f32 7326 16902U, // FADDv2f64 7327 66058U, // FADDv4f16 7328 25095U, // FADDv4f32 7329 33287U, // FADDv8f16 7330 101720456U, // FCADD_ZPmZ_D 7331 138977992U, // FCADD_ZPmZ_H 7332 102769416U, // FCADD_ZPmZ_S 7333 3842569U, // FCADDv2f32 7334 3850758U, // FCADDv2f64 7335 3858954U, // FCADDv4f16 7336 3867143U, // FCADDv4f32 7337 3875335U, // FCADDv8f16 7338 4202693U, // FCCMPDrr 7339 4202693U, // FCCMPEDrr 7340 4202693U, // FCCMPEHrr 7341 4202693U, // FCCMPESrr 7342 4202693U, // FCCMPHrr 7343 4202693U, // FCCMPSrr 7344 197U, // FCMEQ16 7345 197U, // FCMEQ32 7346 197U, // FCMEQ64 7347 213387U, // FCMEQ_PPzZ0_D 7348 2760U, // FCMEQ_PPzZ0_H 7349 213771U, // FCMEQ_PPzZ0_S 7350 1057163U, // FCMEQ_PPzZZ_D 7351 1614536U, // FCMEQ_PPzZZ_H 7352 2106123U, // FCMEQ_PPzZZ_S 7353 24U, // FCMEQv1i16rz 7354 24U, // FCMEQv1i32rz 7355 24U, // FCMEQv1i64rz 7356 57865U, // FCMEQv2f32 7357 16902U, // FCMEQv2f64 7358 25U, // FCMEQv2i32rz 7359 25U, // FCMEQv2i64rz 7360 66058U, // FCMEQv4f16 7361 25095U, // FCMEQv4f32 7362 26U, // FCMEQv4i16rz 7363 26U, // FCMEQv4i32rz 7364 33287U, // FCMEQv8f16 7365 27U, // FCMEQv8i16rz 7366 197U, // FCMGE16 7367 197U, // FCMGE32 7368 197U, // FCMGE64 7369 213387U, // FCMGE_PPzZ0_D 7370 2760U, // FCMGE_PPzZ0_H 7371 213771U, // FCMGE_PPzZ0_S 7372 1057163U, // FCMGE_PPzZZ_D 7373 1614536U, // FCMGE_PPzZZ_H 7374 2106123U, // FCMGE_PPzZZ_S 7375 24U, // FCMGEv1i16rz 7376 24U, // FCMGEv1i32rz 7377 24U, // FCMGEv1i64rz 7378 57865U, // FCMGEv2f32 7379 16902U, // FCMGEv2f64 7380 25U, // FCMGEv2i32rz 7381 25U, // FCMGEv2i64rz 7382 66058U, // FCMGEv4f16 7383 25095U, // FCMGEv4f32 7384 26U, // FCMGEv4i16rz 7385 26U, // FCMGEv4i32rz 7386 33287U, // FCMGEv8f16 7387 27U, // FCMGEv8i16rz 7388 197U, // FCMGT16 7389 197U, // FCMGT32 7390 197U, // FCMGT64 7391 213387U, // FCMGT_PPzZ0_D 7392 2760U, // FCMGT_PPzZ0_H 7393 213771U, // FCMGT_PPzZ0_S 7394 1057163U, // FCMGT_PPzZZ_D 7395 1614536U, // FCMGT_PPzZZ_H 7396 2106123U, // FCMGT_PPzZZ_S 7397 24U, // FCMGTv1i16rz 7398 24U, // FCMGTv1i32rz 7399 24U, // FCMGTv1i64rz 7400 57865U, // FCMGTv2f32 7401 16902U, // FCMGTv2f64 7402 25U, // FCMGTv2i32rz 7403 25U, // FCMGTv2i64rz 7404 66058U, // FCMGTv4f16 7405 25095U, // FCMGTv4f32 7406 26U, // FCMGTv4i16rz 7407 26U, // FCMGTv4i32rz 7408 33287U, // FCMGTv8f16 7409 27U, // FCMGTv8i16rz 7410 376971336U, // FCMLA_ZPmZZ_D 7411 72049361U, // FCMLA_ZPmZZ_H 7412 377495688U, // FCMLA_ZPmZZ_S 7413 5253521U, // FCMLA_ZZZI_H 7414 71958661U, // FCMLA_ZZZI_S 7415 5939785U, // FCMLAv2f32 7416 5947974U, // FCMLAv2f64 7417 5956170U, // FCMLAv4f16 7418 378241610U, // FCMLAv4f16_indexed 7419 5964359U, // FCMLAv4f32 7420 378249799U, // FCMLAv4f32_indexed 7421 5972551U, // FCMLAv8f16 7422 378241607U, // FCMLAv8f16_indexed 7423 213387U, // FCMLE_PPzZ0_D 7424 2760U, // FCMLE_PPzZ0_H 7425 213771U, // FCMLE_PPzZ0_S 7426 24U, // FCMLEv1i16rz 7427 24U, // FCMLEv1i32rz 7428 24U, // FCMLEv1i64rz 7429 25U, // FCMLEv2i32rz 7430 25U, // FCMLEv2i64rz 7431 26U, // FCMLEv4i16rz 7432 26U, // FCMLEv4i32rz 7433 27U, // FCMLEv8i16rz 7434 213387U, // FCMLT_PPzZ0_D 7435 2760U, // FCMLT_PPzZ0_H 7436 213771U, // FCMLT_PPzZ0_S 7437 24U, // FCMLTv1i16rz 7438 24U, // FCMLTv1i32rz 7439 24U, // FCMLTv1i64rz 7440 25U, // FCMLTv2i32rz 7441 25U, // FCMLTv2i64rz 7442 26U, // FCMLTv4i16rz 7443 26U, // FCMLTv4i32rz 7444 27U, // FCMLTv8i16rz 7445 213387U, // FCMNE_PPzZ0_D 7446 2760U, // FCMNE_PPzZ0_H 7447 213771U, // FCMNE_PPzZ0_S 7448 1057163U, // FCMNE_PPzZZ_D 7449 1614536U, // FCMNE_PPzZZ_H 7450 2106123U, // FCMNE_PPzZZ_S 7451 0U, // FCMPDri 7452 2U, // FCMPDrr 7453 0U, // FCMPEDri 7454 2U, // FCMPEDrr 7455 0U, // FCMPEHri 7456 2U, // FCMPEHrr 7457 0U, // FCMPESri 7458 2U, // FCMPESrr 7459 0U, // FCMPHri 7460 2U, // FCMPHrr 7461 0U, // FCMPSri 7462 2U, // FCMPSrr 7463 1057163U, // FCMUO_PPzZZ_D 7464 1614536U, // FCMUO_PPzZZ_H 7465 2106123U, // FCMUO_PPzZZ_S 7466 27U, // FCPY_ZPmI_D 7467 0U, // FCPY_ZPmI_H 7468 27U, // FCPY_ZPmI_S 7469 4202693U, // FCSELDrrr 7470 4202693U, // FCSELHrrr 7471 4202693U, // FCSELSrrr 7472 2U, // FCVTASUWDr 7473 2U, // FCVTASUWHr 7474 2U, // FCVTASUWSr 7475 2U, // FCVTASUXDr 7476 2U, // FCVTASUXHr 7477 2U, // FCVTASUXSr 7478 2U, // FCVTASv1f16 7479 2U, // FCVTASv1i32 7480 2U, // FCVTASv1i64 7481 2U, // FCVTASv2f32 7482 3U, // FCVTASv2f64 7483 3U, // FCVTASv4f16 7484 4U, // FCVTASv4f32 7485 4U, // FCVTASv8f16 7486 2U, // FCVTAUUWDr 7487 2U, // FCVTAUUWHr 7488 2U, // FCVTAUUWSr 7489 2U, // FCVTAUUXDr 7490 2U, // FCVTAUUXHr 7491 2U, // FCVTAUUXSr 7492 2U, // FCVTAUv1f16 7493 2U, // FCVTAUv1i32 7494 2U, // FCVTAUv1i64 7495 2U, // FCVTAUv2f32 7496 3U, // FCVTAUv2f64 7497 3U, // FCVTAUv4f16 7498 4U, // FCVTAUv4f32 7499 4U, // FCVTAUv8f16 7500 2U, // FCVTDHr 7501 2U, // FCVTDSr 7502 2U, // FCVTHDr 7503 2U, // FCVTHSr 7504 17U, // FCVTLT_ZPmZ_HtoS 7505 1U, // FCVTLT_ZPmZ_StoD 7506 2U, // FCVTLv2i32 7507 3U, // FCVTLv4i16 7508 4U, // FCVTLv4i32 7509 4U, // FCVTLv8i16 7510 2U, // FCVTMSUWDr 7511 2U, // FCVTMSUWHr 7512 2U, // FCVTMSUWSr 7513 2U, // FCVTMSUXDr 7514 2U, // FCVTMSUXHr 7515 2U, // FCVTMSUXSr 7516 2U, // FCVTMSv1f16 7517 2U, // FCVTMSv1i32 7518 2U, // FCVTMSv1i64 7519 2U, // FCVTMSv2f32 7520 3U, // FCVTMSv2f64 7521 3U, // FCVTMSv4f16 7522 4U, // FCVTMSv4f32 7523 4U, // FCVTMSv8f16 7524 2U, // FCVTMUUWDr 7525 2U, // FCVTMUUWHr 7526 2U, // FCVTMUUWSr 7527 2U, // FCVTMUUXDr 7528 2U, // FCVTMUUXHr 7529 2U, // FCVTMUUXSr 7530 2U, // FCVTMUv1f16 7531 2U, // FCVTMUv1i32 7532 2U, // FCVTMUv1i64 7533 2U, // FCVTMUv2f32 7534 3U, // FCVTMUv2f64 7535 3U, // FCVTMUv4f16 7536 4U, // FCVTMUv4f32 7537 4U, // FCVTMUv8f16 7538 2U, // FCVTNSUWDr 7539 2U, // FCVTNSUWHr 7540 2U, // FCVTNSUWSr 7541 2U, // FCVTNSUXDr 7542 2U, // FCVTNSUXHr 7543 2U, // FCVTNSUXSr 7544 2U, // FCVTNSv1f16 7545 2U, // FCVTNSv1i32 7546 2U, // FCVTNSv1i64 7547 2U, // FCVTNSv2f32 7548 3U, // FCVTNSv2f64 7549 3U, // FCVTNSv4f16 7550 4U, // FCVTNSv4f32 7551 4U, // FCVTNSv8f16 7552 0U, // FCVTNT_ZPmZ_DtoS 7553 0U, // FCVTNT_ZPmZ_StoH 7554 2U, // FCVTNUUWDr 7555 2U, // FCVTNUUWHr 7556 2U, // FCVTNUUWSr 7557 2U, // FCVTNUUXDr 7558 2U, // FCVTNUUXHr 7559 2U, // FCVTNUUXSr 7560 2U, // FCVTNUv1f16 7561 2U, // FCVTNUv1i32 7562 2U, // FCVTNUv1i64 7563 2U, // FCVTNUv2f32 7564 3U, // FCVTNUv2f64 7565 3U, // FCVTNUv4f16 7566 4U, // FCVTNUv4f32 7567 4U, // FCVTNUv8f16 7568 3U, // FCVTNv2i32 7569 4U, // FCVTNv4i16 7570 3U, // FCVTNv4i32 7571 4U, // FCVTNv8i16 7572 2U, // FCVTPSUWDr 7573 2U, // FCVTPSUWHr 7574 2U, // FCVTPSUWSr 7575 2U, // FCVTPSUXDr 7576 2U, // FCVTPSUXHr 7577 2U, // FCVTPSUXSr 7578 2U, // FCVTPSv1f16 7579 2U, // FCVTPSv1i32 7580 2U, // FCVTPSv1i64 7581 2U, // FCVTPSv2f32 7582 3U, // FCVTPSv2f64 7583 3U, // FCVTPSv4f16 7584 4U, // FCVTPSv4f32 7585 4U, // FCVTPSv8f16 7586 2U, // FCVTPUUWDr 7587 2U, // FCVTPUUWHr 7588 2U, // FCVTPUUWSr 7589 2U, // FCVTPUUXDr 7590 2U, // FCVTPUUXHr 7591 2U, // FCVTPUUXSr 7592 2U, // FCVTPUv1f16 7593 2U, // FCVTPUv1i32 7594 2U, // FCVTPUv1i64 7595 2U, // FCVTPUv2f32 7596 3U, // FCVTPUv2f64 7597 3U, // FCVTPUv4f16 7598 4U, // FCVTPUv4f32 7599 4U, // FCVTPUv8f16 7600 2U, // FCVTSDr 7601 2U, // FCVTSHr 7602 0U, // FCVTXNT_ZPmZ_DtoS 7603 2U, // FCVTXNv1i64 7604 3U, // FCVTXNv2f32 7605 3U, // FCVTXNv4f32 7606 0U, // FCVTX_ZPmZ_DtoS 7607 197U, // FCVTZSSWDri 7608 197U, // FCVTZSSWHri 7609 197U, // FCVTZSSWSri 7610 197U, // FCVTZSSXDri 7611 197U, // FCVTZSSXHri 7612 197U, // FCVTZSSXSri 7613 2U, // FCVTZSUWDr 7614 2U, // FCVTZSUWHr 7615 2U, // FCVTZSUWSr 7616 2U, // FCVTZSUXDr 7617 2U, // FCVTZSUXHr 7618 2U, // FCVTZSUXSr 7619 0U, // FCVTZS_ZPmZ_DtoD 7620 0U, // FCVTZS_ZPmZ_DtoS 7621 17U, // FCVTZS_ZPmZ_HtoD 7622 0U, // FCVTZS_ZPmZ_HtoH 7623 17U, // FCVTZS_ZPmZ_HtoS 7624 1U, // FCVTZS_ZPmZ_StoD 7625 1U, // FCVTZS_ZPmZ_StoS 7626 197U, // FCVTZSd 7627 197U, // FCVTZSh 7628 197U, // FCVTZSs 7629 2U, // FCVTZSv1f16 7630 2U, // FCVTZSv1i32 7631 2U, // FCVTZSv1i64 7632 2U, // FCVTZSv2f32 7633 3U, // FCVTZSv2f64 7634 201U, // FCVTZSv2i32_shift 7635 198U, // FCVTZSv2i64_shift 7636 3U, // FCVTZSv4f16 7637 4U, // FCVTZSv4f32 7638 202U, // FCVTZSv4i16_shift 7639 199U, // FCVTZSv4i32_shift 7640 4U, // FCVTZSv8f16 7641 199U, // FCVTZSv8i16_shift 7642 197U, // FCVTZUSWDri 7643 197U, // FCVTZUSWHri 7644 197U, // FCVTZUSWSri 7645 197U, // FCVTZUSXDri 7646 197U, // FCVTZUSXHri 7647 197U, // FCVTZUSXSri 7648 2U, // FCVTZUUWDr 7649 2U, // FCVTZUUWHr 7650 2U, // FCVTZUUWSr 7651 2U, // FCVTZUUXDr 7652 2U, // FCVTZUUXHr 7653 2U, // FCVTZUUXSr 7654 0U, // FCVTZU_ZPmZ_DtoD 7655 0U, // FCVTZU_ZPmZ_DtoS 7656 17U, // FCVTZU_ZPmZ_HtoD 7657 0U, // FCVTZU_ZPmZ_HtoH 7658 17U, // FCVTZU_ZPmZ_HtoS 7659 1U, // FCVTZU_ZPmZ_StoD 7660 1U, // FCVTZU_ZPmZ_StoS 7661 197U, // FCVTZUd 7662 197U, // FCVTZUh 7663 197U, // FCVTZUs 7664 2U, // FCVTZUv1f16 7665 2U, // FCVTZUv1i32 7666 2U, // FCVTZUv1i64 7667 2U, // FCVTZUv2f32 7668 3U, // FCVTZUv2f64 7669 201U, // FCVTZUv2i32_shift 7670 198U, // FCVTZUv2i64_shift 7671 3U, // FCVTZUv4f16 7672 4U, // FCVTZUv4f32 7673 202U, // FCVTZUv4i16_shift 7674 199U, // FCVTZUv4i32_shift 7675 4U, // FCVTZUv8f16 7676 199U, // FCVTZUv8i16_shift 7677 0U, // FCVT_ZPmZ_DtoH 7678 0U, // FCVT_ZPmZ_DtoS 7679 17U, // FCVT_ZPmZ_HtoD 7680 17U, // FCVT_ZPmZ_HtoS 7681 1U, // FCVT_ZPmZ_StoD 7682 0U, // FCVT_ZPmZ_StoH 7683 197U, // FDIVDrr 7684 197U, // FDIVHrr 7685 1057160U, // FDIVR_ZPmZ_D 7686 1614536U, // FDIVR_ZPmZ_H 7687 2106120U, // FDIVR_ZPmZ_S 7688 197U, // FDIVSrr 7689 1057160U, // FDIV_ZPmZ_D 7690 1614536U, // FDIV_ZPmZ_H 7691 2106120U, // FDIV_ZPmZ_S 7692 57865U, // FDIVv2f32 7693 16902U, // FDIVv2f64 7694 66058U, // FDIVv4f16 7695 25095U, // FDIVv4f32 7696 33287U, // FDIVv8f16 7697 0U, // FDUP_ZI_D 7698 0U, // FDUP_ZI_H 7699 0U, // FDUP_ZI_S 7700 2U, // FEXPA_ZZ_D 7701 0U, // FEXPA_ZZ_H 7702 2U, // FEXPA_ZZ_S 7703 2U, // FJCVTZS 7704 0U, // FLOGB_ZPmZ_D 7705 0U, // FLOGB_ZPmZ_H 7706 1U, // FLOGB_ZPmZ_S 7707 8389U, // FMADDDrrr 7708 8389U, // FMADDHrrr 7709 8389U, // FMADDSrrr 7710 7872584U, // FMAD_ZPmZZ_D 7711 1794769U, // FMAD_ZPmZZ_H 7712 8396936U, // FMAD_ZPmZZ_S 7713 197U, // FMAXDrr 7714 197U, // FMAXHrr 7715 197U, // FMAXNMDrr 7716 197U, // FMAXNMHrr 7717 1057160U, // FMAXNMP_ZPmZZ_D 7718 1614536U, // FMAXNMP_ZPmZZ_H 7719 2106120U, // FMAXNMP_ZPmZZ_S 7720 57865U, // FMAXNMPv2f32 7721 16902U, // FMAXNMPv2f64 7722 24U, // FMAXNMPv2i16p 7723 2U, // FMAXNMPv2i32p 7724 3U, // FMAXNMPv2i64p 7725 66058U, // FMAXNMPv4f16 7726 25095U, // FMAXNMPv4f32 7727 33287U, // FMAXNMPv8f16 7728 197U, // FMAXNMSrr 7729 389U, // FMAXNMV_VPZ_D 7730 325U, // FMAXNMV_VPZ_H 7731 773U, // FMAXNMV_VPZ_S 7732 3U, // FMAXNMVv4i16v 7733 4U, // FMAXNMVv4i32v 7734 4U, // FMAXNMVv8i16v 7735 9445768U, // FMAXNM_ZPmI_D 7736 246472U, // FMAXNM_ZPmI_H 7737 9446152U, // FMAXNM_ZPmI_S 7738 1057160U, // FMAXNM_ZPmZ_D 7739 1614536U, // FMAXNM_ZPmZ_H 7740 2106120U, // FMAXNM_ZPmZ_S 7741 57865U, // FMAXNMv2f32 7742 16902U, // FMAXNMv2f64 7743 66058U, // FMAXNMv4f16 7744 25095U, // FMAXNMv4f32 7745 33287U, // FMAXNMv8f16 7746 1057160U, // FMAXP_ZPmZZ_D 7747 1614536U, // FMAXP_ZPmZZ_H 7748 2106120U, // FMAXP_ZPmZZ_S 7749 57865U, // FMAXPv2f32 7750 16902U, // FMAXPv2f64 7751 24U, // FMAXPv2i16p 7752 2U, // FMAXPv2i32p 7753 3U, // FMAXPv2i64p 7754 66058U, // FMAXPv4f16 7755 25095U, // FMAXPv4f32 7756 33287U, // FMAXPv8f16 7757 197U, // FMAXSrr 7758 389U, // FMAXV_VPZ_D 7759 325U, // FMAXV_VPZ_H 7760 773U, // FMAXV_VPZ_S 7761 3U, // FMAXVv4i16v 7762 4U, // FMAXVv4i32v 7763 4U, // FMAXVv8i16v 7764 9445768U, // FMAX_ZPmI_D 7765 246472U, // FMAX_ZPmI_H 7766 9446152U, // FMAX_ZPmI_S 7767 1057160U, // FMAX_ZPmZ_D 7768 1614536U, // FMAX_ZPmZ_H 7769 2106120U, // FMAX_ZPmZ_S 7770 57865U, // FMAXv2f32 7771 16902U, // FMAXv2f64 7772 66058U, // FMAXv4f16 7773 25095U, // FMAXv4f32 7774 33287U, // FMAXv8f16 7775 197U, // FMINDrr 7776 197U, // FMINHrr 7777 197U, // FMINNMDrr 7778 197U, // FMINNMHrr 7779 1057160U, // FMINNMP_ZPmZZ_D 7780 1614536U, // FMINNMP_ZPmZZ_H 7781 2106120U, // FMINNMP_ZPmZZ_S 7782 57865U, // FMINNMPv2f32 7783 16902U, // FMINNMPv2f64 7784 24U, // FMINNMPv2i16p 7785 2U, // FMINNMPv2i32p 7786 3U, // FMINNMPv2i64p 7787 66058U, // FMINNMPv4f16 7788 25095U, // FMINNMPv4f32 7789 33287U, // FMINNMPv8f16 7790 197U, // FMINNMSrr 7791 389U, // FMINNMV_VPZ_D 7792 325U, // FMINNMV_VPZ_H 7793 773U, // FMINNMV_VPZ_S 7794 3U, // FMINNMVv4i16v 7795 4U, // FMINNMVv4i32v 7796 4U, // FMINNMVv8i16v 7797 9445768U, // FMINNM_ZPmI_D 7798 246472U, // FMINNM_ZPmI_H 7799 9446152U, // FMINNM_ZPmI_S 7800 1057160U, // FMINNM_ZPmZ_D 7801 1614536U, // FMINNM_ZPmZ_H 7802 2106120U, // FMINNM_ZPmZ_S 7803 57865U, // FMINNMv2f32 7804 16902U, // FMINNMv2f64 7805 66058U, // FMINNMv4f16 7806 25095U, // FMINNMv4f32 7807 33287U, // FMINNMv8f16 7808 1057160U, // FMINP_ZPmZZ_D 7809 1614536U, // FMINP_ZPmZZ_H 7810 2106120U, // FMINP_ZPmZZ_S 7811 57865U, // FMINPv2f32 7812 16902U, // FMINPv2f64 7813 24U, // FMINPv2i16p 7814 2U, // FMINPv2i32p 7815 3U, // FMINPv2i64p 7816 66058U, // FMINPv4f16 7817 25095U, // FMINPv4f32 7818 33287U, // FMINPv8f16 7819 197U, // FMINSrr 7820 389U, // FMINV_VPZ_D 7821 325U, // FMINV_VPZ_H 7822 773U, // FMINV_VPZ_S 7823 3U, // FMINVv4i16v 7824 4U, // FMINVv4i32v 7825 4U, // FMINVv8i16v 7826 9445768U, // FMIN_ZPmI_D 7827 246472U, // FMIN_ZPmI_H 7828 9446152U, // FMIN_ZPmI_S 7829 1057160U, // FMIN_ZPmZ_D 7830 1614536U, // FMIN_ZPmZ_H 7831 2106120U, // FMIN_ZPmZ_S 7832 57865U, // FMINv2f32 7833 16902U, // FMINv2f64 7834 66058U, // FMINv4f16 7835 25095U, // FMINv4f32 7836 33287U, // FMINv8f16 7837 2844U, // FMLAL2lanev4f16 7838 9142858U, // FMLAL2lanev8f16 7839 2908U, // FMLAL2v4f16 7840 66122U, // FMLAL2v8f16 7841 1704389U, // FMLALB_ZZZI_SHH 7842 453U, // FMLALB_ZZZ_SHH 7843 1704389U, // FMLALT_ZZZI_SHH 7844 453U, // FMLALT_ZZZ_SHH 7845 2844U, // FMLALlanev4f16 7846 9142858U, // FMLALlanev8f16 7847 2908U, // FMLALv4f16 7848 66122U, // FMLALv8f16 7849 7872584U, // FMLA_ZPmZZ_D 7850 1794769U, // FMLA_ZPmZZ_H 7851 8396936U, // FMLA_ZPmZZ_S 7852 1704005U, // FMLA_ZZZI_D 7853 2449U, // FMLA_ZZZI_H 7854 1704069U, // FMLA_ZZZI_S 7855 9142853U, // FMLAv1i16_indexed 7856 9151045U, // FMLAv1i32_indexed 7857 9167429U, // FMLAv1i64_indexed 7858 57929U, // FMLAv2f32 7859 16966U, // FMLAv2f64 7860 9151049U, // FMLAv2i32_indexed 7861 9167430U, // FMLAv2i64_indexed 7862 66122U, // FMLAv4f16 7863 25159U, // FMLAv4f32 7864 9142858U, // FMLAv4i16_indexed 7865 9151047U, // FMLAv4i32_indexed 7866 33351U, // FMLAv8f16 7867 9142855U, // FMLAv8i16_indexed 7868 2844U, // FMLSL2lanev4f16 7869 9142858U, // FMLSL2lanev8f16 7870 2908U, // FMLSL2v4f16 7871 66122U, // FMLSL2v8f16 7872 1704389U, // FMLSLB_ZZZI_SHH 7873 453U, // FMLSLB_ZZZ_SHH 7874 1704389U, // FMLSLT_ZZZI_SHH 7875 453U, // FMLSLT_ZZZ_SHH 7876 2844U, // FMLSLlanev4f16 7877 9142858U, // FMLSLlanev8f16 7878 2908U, // FMLSLv4f16 7879 66122U, // FMLSLv8f16 7880 7872584U, // FMLS_ZPmZZ_D 7881 1794769U, // FMLS_ZPmZZ_H 7882 8396936U, // FMLS_ZPmZZ_S 7883 1704005U, // FMLS_ZZZI_D 7884 2449U, // FMLS_ZZZI_H 7885 1704069U, // FMLS_ZZZI_S 7886 9142853U, // FMLSv1i16_indexed 7887 9151045U, // FMLSv1i32_indexed 7888 9167429U, // FMLSv1i64_indexed 7889 57929U, // FMLSv2f32 7890 16966U, // FMLSv2f64 7891 9151049U, // FMLSv2i32_indexed 7892 9167430U, // FMLSv2i64_indexed 7893 66122U, // FMLSv4f16 7894 25159U, // FMLSv4f32 7895 9142858U, // FMLSv4i16_indexed 7896 9151047U, // FMLSv4i32_indexed 7897 33351U, // FMLSv8f16 7898 9142855U, // FMLSv8i16_indexed 7899 0U, // FMOVD0 7900 2710U, // FMOVDXHighr 7901 2U, // FMOVDXr 7902 0U, // FMOVDi 7903 2U, // FMOVDr 7904 0U, // FMOVH0 7905 2U, // FMOVHWr 7906 2U, // FMOVHXr 7907 0U, // FMOVHi 7908 2U, // FMOVHr 7909 0U, // FMOVS0 7910 2U, // FMOVSWr 7911 0U, // FMOVSi 7912 2U, // FMOVSr 7913 2U, // FMOVWHr 7914 2U, // FMOVWSr 7915 2U, // FMOVXDHighr 7916 2U, // FMOVXDr 7917 2U, // FMOVXHr 7918 0U, // FMOVv2f32_ns 7919 0U, // FMOVv2f64_ns 7920 0U, // FMOVv4f16_ns 7921 0U, // FMOVv4f32_ns 7922 0U, // FMOVv8f16_ns 7923 7872584U, // FMSB_ZPmZZ_D 7924 1794769U, // FMSB_ZPmZZ_H 7925 8396936U, // FMSB_ZPmZZ_S 7926 8389U, // FMSUBDrrr 7927 8389U, // FMSUBHrrr 7928 8389U, // FMSUBSrrr 7929 197U, // FMULDrr 7930 197U, // FMULHrr 7931 197U, // FMULSrr 7932 197U, // FMULX16 7933 197U, // FMULX32 7934 197U, // FMULX64 7935 1057160U, // FMULX_ZPmZ_D 7936 1614536U, // FMULX_ZPmZ_H 7937 2106120U, // FMULX_ZPmZ_S 7938 10191365U, // FMULXv1i16_indexed 7939 10199557U, // FMULXv1i32_indexed 7940 10215941U, // FMULXv1i64_indexed 7941 57865U, // FMULXv2f32 7942 16902U, // FMULXv2f64 7943 10199561U, // FMULXv2i32_indexed 7944 10215942U, // FMULXv2i64_indexed 7945 66058U, // FMULXv4f16 7946 25095U, // FMULXv4f32 7947 10191370U, // FMULXv4i16_indexed 7948 10199559U, // FMULXv4i32_indexed 7949 33287U, // FMULXv8f16 7950 10191367U, // FMULXv8i16_indexed 7951 10494344U, // FMUL_ZPmI_D 7952 262856U, // FMUL_ZPmI_H 7953 10494728U, // FMUL_ZPmI_S 7954 1057160U, // FMUL_ZPmZ_D 7955 1614536U, // FMUL_ZPmZ_H 7956 2106120U, // FMUL_ZPmZ_S 7957 270725U, // FMUL_ZZZI_D 7958 2952U, // FMUL_ZZZI_H 7959 271109U, // FMUL_ZZZI_S 7960 389U, // FMUL_ZZZ_D 7961 8U, // FMUL_ZZZ_H 7962 773U, // FMUL_ZZZ_S 7963 10191365U, // FMULv1i16_indexed 7964 10199557U, // FMULv1i32_indexed 7965 10215941U, // FMULv1i64_indexed 7966 57865U, // FMULv2f32 7967 16902U, // FMULv2f64 7968 10199561U, // FMULv2i32_indexed 7969 10215942U, // FMULv2i64_indexed 7970 66058U, // FMULv4f16 7971 25095U, // FMULv4f32 7972 10191370U, // FMULv4i16_indexed 7973 10199559U, // FMULv4i32_indexed 7974 33287U, // FMULv8f16 7975 10191367U, // FMULv8i16_indexed 7976 2U, // FNEGDr 7977 2U, // FNEGHr 7978 2U, // FNEGSr 7979 0U, // FNEG_ZPmZ_D 7980 0U, // FNEG_ZPmZ_H 7981 1U, // FNEG_ZPmZ_S 7982 2U, // FNEGv2f32 7983 3U, // FNEGv2f64 7984 3U, // FNEGv4f16 7985 4U, // FNEGv4f32 7986 4U, // FNEGv8f16 7987 8389U, // FNMADDDrrr 7988 8389U, // FNMADDHrrr 7989 8389U, // FNMADDSrrr 7990 7872584U, // FNMAD_ZPmZZ_D 7991 1794769U, // FNMAD_ZPmZZ_H 7992 8396936U, // FNMAD_ZPmZZ_S 7993 7872584U, // FNMLA_ZPmZZ_D 7994 1794769U, // FNMLA_ZPmZZ_H 7995 8396936U, // FNMLA_ZPmZZ_S 7996 7872584U, // FNMLS_ZPmZZ_D 7997 1794769U, // FNMLS_ZPmZZ_H 7998 8396936U, // FNMLS_ZPmZZ_S 7999 7872584U, // FNMSB_ZPmZZ_D 8000 1794769U, // FNMSB_ZPmZZ_H 8001 8396936U, // FNMSB_ZPmZZ_S 8002 8389U, // FNMSUBDrrr 8003 8389U, // FNMSUBHrrr 8004 8389U, // FNMSUBSrrr 8005 197U, // FNMULDrr 8006 197U, // FNMULHrr 8007 197U, // FNMULSrr 8008 2U, // FRECPE_ZZ_D 8009 0U, // FRECPE_ZZ_H 8010 2U, // FRECPE_ZZ_S 8011 2U, // FRECPEv1f16 8012 2U, // FRECPEv1i32 8013 2U, // FRECPEv1i64 8014 2U, // FRECPEv2f32 8015 3U, // FRECPEv2f64 8016 3U, // FRECPEv4f16 8017 4U, // FRECPEv4f32 8018 4U, // FRECPEv8f16 8019 197U, // FRECPS16 8020 197U, // FRECPS32 8021 197U, // FRECPS64 8022 389U, // FRECPS_ZZZ_D 8023 8U, // FRECPS_ZZZ_H 8024 773U, // FRECPS_ZZZ_S 8025 57865U, // FRECPSv2f32 8026 16902U, // FRECPSv2f64 8027 66058U, // FRECPSv4f16 8028 25095U, // FRECPSv4f32 8029 33287U, // FRECPSv8f16 8030 0U, // FRECPX_ZPmZ_D 8031 0U, // FRECPX_ZPmZ_H 8032 1U, // FRECPX_ZPmZ_S 8033 2U, // FRECPXv1f16 8034 2U, // FRECPXv1i32 8035 2U, // FRECPXv1i64 8036 2U, // FRINT32XDr 8037 2U, // FRINT32XSr 8038 2U, // FRINT32Xv2f32 8039 3U, // FRINT32Xv2f64 8040 4U, // FRINT32Xv4f32 8041 2U, // FRINT32ZDr 8042 2U, // FRINT32ZSr 8043 2U, // FRINT32Zv2f32 8044 3U, // FRINT32Zv2f64 8045 4U, // FRINT32Zv4f32 8046 2U, // FRINT64XDr 8047 2U, // FRINT64XSr 8048 2U, // FRINT64Xv2f32 8049 3U, // FRINT64Xv2f64 8050 4U, // FRINT64Xv4f32 8051 2U, // FRINT64ZDr 8052 2U, // FRINT64ZSr 8053 2U, // FRINT64Zv2f32 8054 3U, // FRINT64Zv2f64 8055 4U, // FRINT64Zv4f32 8056 2U, // FRINTADr 8057 2U, // FRINTAHr 8058 2U, // FRINTASr 8059 0U, // FRINTA_ZPmZ_D 8060 0U, // FRINTA_ZPmZ_H 8061 1U, // FRINTA_ZPmZ_S 8062 2U, // FRINTAv2f32 8063 3U, // FRINTAv2f64 8064 3U, // FRINTAv4f16 8065 4U, // FRINTAv4f32 8066 4U, // FRINTAv8f16 8067 2U, // FRINTIDr 8068 2U, // FRINTIHr 8069 2U, // FRINTISr 8070 0U, // FRINTI_ZPmZ_D 8071 0U, // FRINTI_ZPmZ_H 8072 1U, // FRINTI_ZPmZ_S 8073 2U, // FRINTIv2f32 8074 3U, // FRINTIv2f64 8075 3U, // FRINTIv4f16 8076 4U, // FRINTIv4f32 8077 4U, // FRINTIv8f16 8078 2U, // FRINTMDr 8079 2U, // FRINTMHr 8080 2U, // FRINTMSr 8081 0U, // FRINTM_ZPmZ_D 8082 0U, // FRINTM_ZPmZ_H 8083 1U, // FRINTM_ZPmZ_S 8084 2U, // FRINTMv2f32 8085 3U, // FRINTMv2f64 8086 3U, // FRINTMv4f16 8087 4U, // FRINTMv4f32 8088 4U, // FRINTMv8f16 8089 2U, // FRINTNDr 8090 2U, // FRINTNHr 8091 2U, // FRINTNSr 8092 0U, // FRINTN_ZPmZ_D 8093 0U, // FRINTN_ZPmZ_H 8094 1U, // FRINTN_ZPmZ_S 8095 2U, // FRINTNv2f32 8096 3U, // FRINTNv2f64 8097 3U, // FRINTNv4f16 8098 4U, // FRINTNv4f32 8099 4U, // FRINTNv8f16 8100 2U, // FRINTPDr 8101 2U, // FRINTPHr 8102 2U, // FRINTPSr 8103 0U, // FRINTP_ZPmZ_D 8104 0U, // FRINTP_ZPmZ_H 8105 1U, // FRINTP_ZPmZ_S 8106 2U, // FRINTPv2f32 8107 3U, // FRINTPv2f64 8108 3U, // FRINTPv4f16 8109 4U, // FRINTPv4f32 8110 4U, // FRINTPv8f16 8111 2U, // FRINTXDr 8112 2U, // FRINTXHr 8113 2U, // FRINTXSr 8114 0U, // FRINTX_ZPmZ_D 8115 0U, // FRINTX_ZPmZ_H 8116 1U, // FRINTX_ZPmZ_S 8117 2U, // FRINTXv2f32 8118 3U, // FRINTXv2f64 8119 3U, // FRINTXv4f16 8120 4U, // FRINTXv4f32 8121 4U, // FRINTXv8f16 8122 2U, // FRINTZDr 8123 2U, // FRINTZHr 8124 2U, // FRINTZSr 8125 0U, // FRINTZ_ZPmZ_D 8126 0U, // FRINTZ_ZPmZ_H 8127 1U, // FRINTZ_ZPmZ_S 8128 2U, // FRINTZv2f32 8129 3U, // FRINTZv2f64 8130 3U, // FRINTZv4f16 8131 4U, // FRINTZv4f32 8132 4U, // FRINTZv8f16 8133 2U, // FRSQRTE_ZZ_D 8134 0U, // FRSQRTE_ZZ_H 8135 2U, // FRSQRTE_ZZ_S 8136 2U, // FRSQRTEv1f16 8137 2U, // FRSQRTEv1i32 8138 2U, // FRSQRTEv1i64 8139 2U, // FRSQRTEv2f32 8140 3U, // FRSQRTEv2f64 8141 3U, // FRSQRTEv4f16 8142 4U, // FRSQRTEv4f32 8143 4U, // FRSQRTEv8f16 8144 197U, // FRSQRTS16 8145 197U, // FRSQRTS32 8146 197U, // FRSQRTS64 8147 389U, // FRSQRTS_ZZZ_D 8148 8U, // FRSQRTS_ZZZ_H 8149 773U, // FRSQRTS_ZZZ_S 8150 57865U, // FRSQRTSv2f32 8151 16902U, // FRSQRTSv2f64 8152 66058U, // FRSQRTSv4f16 8153 25095U, // FRSQRTSv4f32 8154 33287U, // FRSQRTSv8f16 8155 1057160U, // FSCALE_ZPmZ_D 8156 1614536U, // FSCALE_ZPmZ_H 8157 2106120U, // FSCALE_ZPmZ_S 8158 2U, // FSQRTDr 8159 2U, // FSQRTHr 8160 2U, // FSQRTSr 8161 0U, // FSQRT_ZPmZ_D 8162 0U, // FSQRT_ZPmZ_H 8163 1U, // FSQRT_ZPmZ_S 8164 2U, // FSQRTv2f32 8165 3U, // FSQRTv2f64 8166 3U, // FSQRTv4f16 8167 4U, // FSQRTv4f32 8168 4U, // FSQRTv8f16 8169 197U, // FSUBDrr 8170 197U, // FSUBHrr 8171 7348616U, // FSUBR_ZPmI_D 8172 164552U, // FSUBR_ZPmI_H 8173 7349000U, // FSUBR_ZPmI_S 8174 1057160U, // FSUBR_ZPmZ_D 8175 1614536U, // FSUBR_ZPmZ_H 8176 2106120U, // FSUBR_ZPmZ_S 8177 197U, // FSUBSrr 8178 7348616U, // FSUB_ZPmI_D 8179 164552U, // FSUB_ZPmI_H 8180 7349000U, // FSUB_ZPmI_S 8181 1057160U, // FSUB_ZPmZ_D 8182 1614536U, // FSUB_ZPmZ_H 8183 2106120U, // FSUB_ZPmZ_S 8184 389U, // FSUB_ZZZ_D 8185 8U, // FSUB_ZZZ_H 8186 773U, // FSUB_ZZZ_S 8187 57865U, // FSUBv2f32 8188 16902U, // FSUBv2f64 8189 66058U, // FSUBv4f16 8190 25095U, // FSUBv4f32 8191 33287U, // FSUBv8f16 8192 8581U, // FTMAD_ZZI_D 8193 90824U, // FTMAD_ZZI_H 8194 8965U, // FTMAD_ZZI_S 8195 389U, // FTSMUL_ZZZ_D 8196 8U, // FTSMUL_ZZZ_H 8197 773U, // FTSMUL_ZZZ_S 8198 389U, // FTSSEL_ZZZ_D 8199 8U, // FTSSEL_ZZZ_H 8200 773U, // FTSSEL_ZZZ_S 8201 125253U, // GLD1B_D_IMM_REAL 8202 3013U, // GLD1B_D_REAL 8203 3077U, // GLD1B_D_SXTW_REAL 8204 3141U, // GLD1B_D_UXTW_REAL 8205 125253U, // GLD1B_S_IMM_REAL 8206 3205U, // GLD1B_S_SXTW_REAL 8207 3269U, // GLD1B_S_UXTW_REAL 8208 126213U, // GLD1D_IMM_REAL 8209 3013U, // GLD1D_REAL 8210 3397U, // GLD1D_SCALED_REAL 8211 3077U, // GLD1D_SXTW_REAL 8212 3461U, // GLD1D_SXTW_SCALED_REAL 8213 3141U, // GLD1D_UXTW_REAL 8214 3525U, // GLD1D_UXTW_SCALED_REAL 8215 126469U, // GLD1H_D_IMM_REAL 8216 3013U, // GLD1H_D_REAL 8217 3653U, // GLD1H_D_SCALED_REAL 8218 3077U, // GLD1H_D_SXTW_REAL 8219 3717U, // GLD1H_D_SXTW_SCALED_REAL 8220 3141U, // GLD1H_D_UXTW_REAL 8221 3781U, // GLD1H_D_UXTW_SCALED_REAL 8222 126469U, // GLD1H_S_IMM_REAL 8223 3205U, // GLD1H_S_SXTW_REAL 8224 3845U, // GLD1H_S_SXTW_SCALED_REAL 8225 3269U, // GLD1H_S_UXTW_REAL 8226 3909U, // GLD1H_S_UXTW_SCALED_REAL 8227 125253U, // GLD1SB_D_IMM_REAL 8228 3013U, // GLD1SB_D_REAL 8229 3077U, // GLD1SB_D_SXTW_REAL 8230 3141U, // GLD1SB_D_UXTW_REAL 8231 125253U, // GLD1SB_S_IMM_REAL 8232 3205U, // GLD1SB_S_SXTW_REAL 8233 3269U, // GLD1SB_S_UXTW_REAL 8234 126469U, // GLD1SH_D_IMM_REAL 8235 3013U, // GLD1SH_D_REAL 8236 3653U, // GLD1SH_D_SCALED_REAL 8237 3077U, // GLD1SH_D_SXTW_REAL 8238 3717U, // GLD1SH_D_SXTW_SCALED_REAL 8239 3141U, // GLD1SH_D_UXTW_REAL 8240 3781U, // GLD1SH_D_UXTW_SCALED_REAL 8241 126469U, // GLD1SH_S_IMM_REAL 8242 3205U, // GLD1SH_S_SXTW_REAL 8243 3845U, // GLD1SH_S_SXTW_SCALED_REAL 8244 3269U, // GLD1SH_S_UXTW_REAL 8245 3909U, // GLD1SH_S_UXTW_SCALED_REAL 8246 126853U, // GLD1SW_D_IMM_REAL 8247 3013U, // GLD1SW_D_REAL 8248 4037U, // GLD1SW_D_SCALED_REAL 8249 3077U, // GLD1SW_D_SXTW_REAL 8250 4101U, // GLD1SW_D_SXTW_SCALED_REAL 8251 3141U, // GLD1SW_D_UXTW_REAL 8252 4165U, // GLD1SW_D_UXTW_SCALED_REAL 8253 126853U, // GLD1W_D_IMM_REAL 8254 3013U, // GLD1W_D_REAL 8255 4037U, // GLD1W_D_SCALED_REAL 8256 3077U, // GLD1W_D_SXTW_REAL 8257 4101U, // GLD1W_D_SXTW_SCALED_REAL 8258 3141U, // GLD1W_D_UXTW_REAL 8259 4165U, // GLD1W_D_UXTW_SCALED_REAL 8260 126853U, // GLD1W_IMM_REAL 8261 3205U, // GLD1W_SXTW_REAL 8262 4229U, // GLD1W_SXTW_SCALED_REAL 8263 3269U, // GLD1W_UXTW_REAL 8264 4293U, // GLD1W_UXTW_SCALED_REAL 8265 125253U, // GLDFF1B_D_IMM_REAL 8266 3013U, // GLDFF1B_D_REAL 8267 3077U, // GLDFF1B_D_SXTW_REAL 8268 3141U, // GLDFF1B_D_UXTW_REAL 8269 125253U, // GLDFF1B_S_IMM_REAL 8270 3205U, // GLDFF1B_S_SXTW_REAL 8271 3269U, // GLDFF1B_S_UXTW_REAL 8272 126213U, // GLDFF1D_IMM_REAL 8273 3013U, // GLDFF1D_REAL 8274 3397U, // GLDFF1D_SCALED_REAL 8275 3077U, // GLDFF1D_SXTW_REAL 8276 3461U, // GLDFF1D_SXTW_SCALED_REAL 8277 3141U, // GLDFF1D_UXTW_REAL 8278 3525U, // GLDFF1D_UXTW_SCALED_REAL 8279 126469U, // GLDFF1H_D_IMM_REAL 8280 3013U, // GLDFF1H_D_REAL 8281 3653U, // GLDFF1H_D_SCALED_REAL 8282 3077U, // GLDFF1H_D_SXTW_REAL 8283 3717U, // GLDFF1H_D_SXTW_SCALED_REAL 8284 3141U, // GLDFF1H_D_UXTW_REAL 8285 3781U, // GLDFF1H_D_UXTW_SCALED_REAL 8286 126469U, // GLDFF1H_S_IMM_REAL 8287 3205U, // GLDFF1H_S_SXTW_REAL 8288 3845U, // GLDFF1H_S_SXTW_SCALED_REAL 8289 3269U, // GLDFF1H_S_UXTW_REAL 8290 3909U, // GLDFF1H_S_UXTW_SCALED_REAL 8291 125253U, // GLDFF1SB_D_IMM_REAL 8292 3013U, // GLDFF1SB_D_REAL 8293 3077U, // GLDFF1SB_D_SXTW_REAL 8294 3141U, // GLDFF1SB_D_UXTW_REAL 8295 125253U, // GLDFF1SB_S_IMM_REAL 8296 3205U, // GLDFF1SB_S_SXTW_REAL 8297 3269U, // GLDFF1SB_S_UXTW_REAL 8298 126469U, // GLDFF1SH_D_IMM_REAL 8299 3013U, // GLDFF1SH_D_REAL 8300 3653U, // GLDFF1SH_D_SCALED_REAL 8301 3077U, // GLDFF1SH_D_SXTW_REAL 8302 3717U, // GLDFF1SH_D_SXTW_SCALED_REAL 8303 3141U, // GLDFF1SH_D_UXTW_REAL 8304 3781U, // GLDFF1SH_D_UXTW_SCALED_REAL 8305 126469U, // GLDFF1SH_S_IMM_REAL 8306 3205U, // GLDFF1SH_S_SXTW_REAL 8307 3845U, // GLDFF1SH_S_SXTW_SCALED_REAL 8308 3269U, // GLDFF1SH_S_UXTW_REAL 8309 3909U, // GLDFF1SH_S_UXTW_SCALED_REAL 8310 126853U, // GLDFF1SW_D_IMM_REAL 8311 3013U, // GLDFF1SW_D_REAL 8312 4037U, // GLDFF1SW_D_SCALED_REAL 8313 3077U, // GLDFF1SW_D_SXTW_REAL 8314 4101U, // GLDFF1SW_D_SXTW_SCALED_REAL 8315 3141U, // GLDFF1SW_D_UXTW_REAL 8316 4165U, // GLDFF1SW_D_UXTW_SCALED_REAL 8317 126853U, // GLDFF1W_D_IMM_REAL 8318 3013U, // GLDFF1W_D_REAL 8319 4037U, // GLDFF1W_D_SCALED_REAL 8320 3077U, // GLDFF1W_D_SXTW_REAL 8321 4101U, // GLDFF1W_D_SXTW_SCALED_REAL 8322 3141U, // GLDFF1W_D_UXTW_REAL 8323 4165U, // GLDFF1W_D_UXTW_SCALED_REAL 8324 126853U, // GLDFF1W_IMM_REAL 8325 3205U, // GLDFF1W_SXTW_REAL 8326 4229U, // GLDFF1W_SXTW_SCALED_REAL 8327 3269U, // GLDFF1W_UXTW_REAL 8328 4293U, // GLDFF1W_UXTW_SCALED_REAL 8329 197U, // GMI 8330 0U, // HINT 8331 1057163U, // HISTCNT_ZPzZZ_D 8332 2106123U, // HISTCNT_ZPzZZ_S 8333 645U, // HISTSEG_ZZZ 8334 0U, // HLT 8335 0U, // HVC 8336 0U, // HWASAN_CHECK_MEMACCESS 8337 0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES 8338 0U, // INCB_XPiI 8339 0U, // INCD_XPiI 8340 0U, // INCD_ZPiI 8341 0U, // INCH_XPiI 8342 0U, // INCH_ZPiI 8343 2U, // INCP_XP_B 8344 2U, // INCP_XP_D 8345 2U, // INCP_XP_H 8346 2U, // INCP_XP_S 8347 2U, // INCP_ZP_D 8348 0U, // INCP_ZP_H 8349 2U, // INCP_ZP_S 8350 0U, // INCW_XPiI 8351 0U, // INCW_ZPiI 8352 197U, // INDEX_II_B 8353 197U, // INDEX_II_D 8354 12U, // INDEX_II_H 8355 197U, // INDEX_II_S 8356 197U, // INDEX_IR_B 8357 197U, // INDEX_IR_D 8358 12U, // INDEX_IR_H 8359 197U, // INDEX_IR_S 8360 197U, // INDEX_RI_B 8361 197U, // INDEX_RI_D 8362 12U, // INDEX_RI_H 8363 197U, // INDEX_RI_S 8364 197U, // INDEX_RR_B 8365 197U, // INDEX_RR_D 8366 12U, // INDEX_RR_H 8367 197U, // INDEX_RR_S 8368 2U, // INSR_ZR_B 8369 2U, // INSR_ZR_D 8370 0U, // INSR_ZR_H 8371 2U, // INSR_ZR_S 8372 2U, // INSR_ZV_B 8373 2U, // INSR_ZV_D 8374 0U, // INSR_ZV_H 8375 2U, // INSR_ZV_S 8376 2U, // INSvi16gpr 8377 2453U, // INSvi16lane 8378 2U, // INSvi32gpr 8379 2453U, // INSvi32lane 8380 2U, // INSvi64gpr 8381 2454U, // INSvi64lane 8382 2U, // INSvi8gpr 8383 2454U, // INSvi8lane 8384 197U, // IRG 8385 0U, // IRGstack 8386 0U, // ISB 8387 0U, // JumpTableDest16 8388 0U, // JumpTableDest32 8389 0U, // JumpTableDest8 8390 645U, // LASTA_RPZ_B 8391 389U, // LASTA_RPZ_D 8392 325U, // LASTA_RPZ_H 8393 773U, // LASTA_RPZ_S 8394 645U, // LASTA_VPZ_B 8395 389U, // LASTA_VPZ_D 8396 325U, // LASTA_VPZ_H 8397 773U, // LASTA_VPZ_S 8398 645U, // LASTB_RPZ_B 8399 389U, // LASTB_RPZ_D 8400 325U, // LASTB_RPZ_H 8401 773U, // LASTB_RPZ_S 8402 645U, // LASTB_VPZ_B 8403 389U, // LASTB_VPZ_D 8404 325U, // LASTB_VPZ_H 8405 773U, // LASTB_VPZ_S 8406 4357U, // LD1B 8407 4357U, // LD1B_D 8408 280901U, // LD1B_D_IMM 8409 4357U, // LD1B_H 8410 280901U, // LD1B_H_IMM 8411 280901U, // LD1B_IMM 8412 4357U, // LD1B_S 8413 280901U, // LD1B_S_IMM 8414 4421U, // LD1D 8415 280901U, // LD1D_IMM 8416 0U, // LD1Fourv16b 8417 0U, // LD1Fourv16b_POST 8418 0U, // LD1Fourv1d 8419 0U, // LD1Fourv1d_POST 8420 0U, // LD1Fourv2d 8421 0U, // LD1Fourv2d_POST 8422 0U, // LD1Fourv2s 8423 0U, // LD1Fourv2s_POST 8424 0U, // LD1Fourv4h 8425 0U, // LD1Fourv4h_POST 8426 0U, // LD1Fourv4s 8427 0U, // LD1Fourv4s_POST 8428 0U, // LD1Fourv8b 8429 0U, // LD1Fourv8b_POST 8430 0U, // LD1Fourv8h 8431 0U, // LD1Fourv8h_POST 8432 4485U, // LD1H 8433 4485U, // LD1H_D 8434 280901U, // LD1H_D_IMM 8435 280901U, // LD1H_IMM 8436 4485U, // LD1H_S 8437 280901U, // LD1H_S_IMM 8438 0U, // LD1Onev16b 8439 0U, // LD1Onev16b_POST 8440 0U, // LD1Onev1d 8441 0U, // LD1Onev1d_POST 8442 0U, // LD1Onev2d 8443 0U, // LD1Onev2d_POST 8444 0U, // LD1Onev2s 8445 0U, // LD1Onev2s_POST 8446 0U, // LD1Onev4h 8447 0U, // LD1Onev4h_POST 8448 0U, // LD1Onev4s 8449 0U, // LD1Onev4s_POST 8450 0U, // LD1Onev8b 8451 0U, // LD1Onev8b_POST 8452 0U, // LD1Onev8h 8453 0U, // LD1Onev8h_POST 8454 125253U, // LD1RB_D_IMM 8455 125253U, // LD1RB_H_IMM 8456 125253U, // LD1RB_IMM 8457 125253U, // LD1RB_S_IMM 8458 126213U, // LD1RD_IMM 8459 126469U, // LD1RH_D_IMM 8460 126469U, // LD1RH_IMM 8461 126469U, // LD1RH_S_IMM 8462 4357U, // LD1RQ_B 8463 127429U, // LD1RQ_B_IMM 8464 4421U, // LD1RQ_D 8465 127429U, // LD1RQ_D_IMM 8466 4485U, // LD1RQ_H 8467 127429U, // LD1RQ_H_IMM 8468 4613U, // LD1RQ_W 8469 127429U, // LD1RQ_W_IMM 8470 125253U, // LD1RSB_D_IMM 8471 125253U, // LD1RSB_H_IMM 8472 125253U, // LD1RSB_S_IMM 8473 126469U, // LD1RSH_D_IMM 8474 126469U, // LD1RSH_S_IMM 8475 126853U, // LD1RSW_IMM 8476 126853U, // LD1RW_D_IMM 8477 126853U, // LD1RW_IMM 8478 0U, // LD1Rv16b 8479 0U, // LD1Rv16b_POST 8480 0U, // LD1Rv1d 8481 0U, // LD1Rv1d_POST 8482 0U, // LD1Rv2d 8483 0U, // LD1Rv2d_POST 8484 0U, // LD1Rv2s 8485 0U, // LD1Rv2s_POST 8486 0U, // LD1Rv4h 8487 0U, // LD1Rv4h_POST 8488 0U, // LD1Rv4s 8489 0U, // LD1Rv4s_POST 8490 0U, // LD1Rv8b 8491 0U, // LD1Rv8b_POST 8492 0U, // LD1Rv8h 8493 0U, // LD1Rv8h_POST 8494 4357U, // LD1SB_D 8495 280901U, // LD1SB_D_IMM 8496 4357U, // LD1SB_H 8497 280901U, // LD1SB_H_IMM 8498 4357U, // LD1SB_S 8499 280901U, // LD1SB_S_IMM 8500 4485U, // LD1SH_D 8501 280901U, // LD1SH_D_IMM 8502 4485U, // LD1SH_S 8503 280901U, // LD1SH_S_IMM 8504 4613U, // LD1SW_D 8505 280901U, // LD1SW_D_IMM 8506 0U, // LD1Threev16b 8507 0U, // LD1Threev16b_POST 8508 0U, // LD1Threev1d 8509 0U, // LD1Threev1d_POST 8510 0U, // LD1Threev2d 8511 0U, // LD1Threev2d_POST 8512 0U, // LD1Threev2s 8513 0U, // LD1Threev2s_POST 8514 0U, // LD1Threev4h 8515 0U, // LD1Threev4h_POST 8516 0U, // LD1Threev4s 8517 0U, // LD1Threev4s_POST 8518 0U, // LD1Threev8b 8519 0U, // LD1Threev8b_POST 8520 0U, // LD1Threev8h 8521 0U, // LD1Threev8h_POST 8522 0U, // LD1Twov16b 8523 0U, // LD1Twov16b_POST 8524 0U, // LD1Twov1d 8525 0U, // LD1Twov1d_POST 8526 0U, // LD1Twov2d 8527 0U, // LD1Twov2d_POST 8528 0U, // LD1Twov2s 8529 0U, // LD1Twov2s_POST 8530 0U, // LD1Twov4h 8531 0U, // LD1Twov4h_POST 8532 0U, // LD1Twov4s 8533 0U, // LD1Twov4s_POST 8534 0U, // LD1Twov8b 8535 0U, // LD1Twov8b_POST 8536 0U, // LD1Twov8h 8537 0U, // LD1Twov8h_POST 8538 4613U, // LD1W 8539 4613U, // LD1W_D 8540 280901U, // LD1W_D_IMM 8541 280901U, // LD1W_IMM 8542 0U, // LD1i16 8543 0U, // LD1i16_POST 8544 0U, // LD1i32 8545 0U, // LD1i32_POST 8546 0U, // LD1i64 8547 0U, // LD1i64_POST 8548 0U, // LD1i8 8549 0U, // LD1i8_POST 8550 4357U, // LD2B 8551 282117U, // LD2B_IMM 8552 4421U, // LD2D 8553 282117U, // LD2D_IMM 8554 4485U, // LD2H 8555 282117U, // LD2H_IMM 8556 0U, // LD2Rv16b 8557 0U, // LD2Rv16b_POST 8558 0U, // LD2Rv1d 8559 0U, // LD2Rv1d_POST 8560 0U, // LD2Rv2d 8561 0U, // LD2Rv2d_POST 8562 0U, // LD2Rv2s 8563 0U, // LD2Rv2s_POST 8564 0U, // LD2Rv4h 8565 0U, // LD2Rv4h_POST 8566 0U, // LD2Rv4s 8567 0U, // LD2Rv4s_POST 8568 0U, // LD2Rv8b 8569 0U, // LD2Rv8b_POST 8570 0U, // LD2Rv8h 8571 0U, // LD2Rv8h_POST 8572 0U, // LD2Twov16b 8573 0U, // LD2Twov16b_POST 8574 0U, // LD2Twov2d 8575 0U, // LD2Twov2d_POST 8576 0U, // LD2Twov2s 8577 0U, // LD2Twov2s_POST 8578 0U, // LD2Twov4h 8579 0U, // LD2Twov4h_POST 8580 0U, // LD2Twov4s 8581 0U, // LD2Twov4s_POST 8582 0U, // LD2Twov8b 8583 0U, // LD2Twov8b_POST 8584 0U, // LD2Twov8h 8585 0U, // LD2Twov8h_POST 8586 4613U, // LD2W 8587 282117U, // LD2W_IMM 8588 0U, // LD2i16 8589 0U, // LD2i16_POST 8590 0U, // LD2i32 8591 0U, // LD2i32_POST 8592 0U, // LD2i64 8593 0U, // LD2i64_POST 8594 0U, // LD2i8 8595 0U, // LD2i8_POST 8596 4357U, // LD3B 8597 4677U, // LD3B_IMM 8598 4421U, // LD3D 8599 4677U, // LD3D_IMM 8600 4485U, // LD3H 8601 4677U, // LD3H_IMM 8602 0U, // LD3Rv16b 8603 0U, // LD3Rv16b_POST 8604 0U, // LD3Rv1d 8605 0U, // LD3Rv1d_POST 8606 0U, // LD3Rv2d 8607 0U, // LD3Rv2d_POST 8608 0U, // LD3Rv2s 8609 0U, // LD3Rv2s_POST 8610 0U, // LD3Rv4h 8611 0U, // LD3Rv4h_POST 8612 0U, // LD3Rv4s 8613 0U, // LD3Rv4s_POST 8614 0U, // LD3Rv8b 8615 0U, // LD3Rv8b_POST 8616 0U, // LD3Rv8h 8617 0U, // LD3Rv8h_POST 8618 0U, // LD3Threev16b 8619 0U, // LD3Threev16b_POST 8620 0U, // LD3Threev2d 8621 0U, // LD3Threev2d_POST 8622 0U, // LD3Threev2s 8623 0U, // LD3Threev2s_POST 8624 0U, // LD3Threev4h 8625 0U, // LD3Threev4h_POST 8626 0U, // LD3Threev4s 8627 0U, // LD3Threev4s_POST 8628 0U, // LD3Threev8b 8629 0U, // LD3Threev8b_POST 8630 0U, // LD3Threev8h 8631 0U, // LD3Threev8h_POST 8632 4613U, // LD3W 8633 4677U, // LD3W_IMM 8634 0U, // LD3i16 8635 0U, // LD3i16_POST 8636 0U, // LD3i32 8637 0U, // LD3i32_POST 8638 0U, // LD3i64 8639 0U, // LD3i64_POST 8640 0U, // LD3i8 8641 0U, // LD3i8_POST 8642 4357U, // LD4B 8643 282501U, // LD4B_IMM 8644 4421U, // LD4D 8645 282501U, // LD4D_IMM 8646 0U, // LD4Fourv16b 8647 0U, // LD4Fourv16b_POST 8648 0U, // LD4Fourv2d 8649 0U, // LD4Fourv2d_POST 8650 0U, // LD4Fourv2s 8651 0U, // LD4Fourv2s_POST 8652 0U, // LD4Fourv4h 8653 0U, // LD4Fourv4h_POST 8654 0U, // LD4Fourv4s 8655 0U, // LD4Fourv4s_POST 8656 0U, // LD4Fourv8b 8657 0U, // LD4Fourv8b_POST 8658 0U, // LD4Fourv8h 8659 0U, // LD4Fourv8h_POST 8660 4485U, // LD4H 8661 282501U, // LD4H_IMM 8662 0U, // LD4Rv16b 8663 0U, // LD4Rv16b_POST 8664 0U, // LD4Rv1d 8665 0U, // LD4Rv1d_POST 8666 0U, // LD4Rv2d 8667 0U, // LD4Rv2d_POST 8668 0U, // LD4Rv2s 8669 0U, // LD4Rv2s_POST 8670 0U, // LD4Rv4h 8671 0U, // LD4Rv4h_POST 8672 0U, // LD4Rv4s 8673 0U, // LD4Rv4s_POST 8674 0U, // LD4Rv8b 8675 0U, // LD4Rv8b_POST 8676 0U, // LD4Rv8h 8677 0U, // LD4Rv8h_POST 8678 4613U, // LD4W 8679 282501U, // LD4W_IMM 8680 0U, // LD4i16 8681 0U, // LD4i16_POST 8682 0U, // LD4i32 8683 0U, // LD4i32_POST 8684 0U, // LD4i64 8685 0U, // LD4i64_POST 8686 0U, // LD4i8 8687 0U, // LD4i8_POST 8688 0U, // LDADDAB 8689 0U, // LDADDAH 8690 0U, // LDADDALB 8691 0U, // LDADDALH 8692 0U, // LDADDALW 8693 0U, // LDADDALX 8694 0U, // LDADDAW 8695 0U, // LDADDAX 8696 0U, // LDADDB 8697 0U, // LDADDH 8698 0U, // LDADDLB 8699 0U, // LDADDLH 8700 0U, // LDADDLW 8701 0U, // LDADDLX 8702 0U, // LDADDW 8703 0U, // LDADDX 8704 28U, // LDAPRB 8705 28U, // LDAPRH 8706 28U, // LDAPRW 8707 28U, // LDAPRX 8708 123077U, // LDAPURBi 8709 123077U, // LDAPURHi 8710 123077U, // LDAPURSBWi 8711 123077U, // LDAPURSBXi 8712 123077U, // LDAPURSHWi 8713 123077U, // LDAPURSHXi 8714 123077U, // LDAPURSWi 8715 123077U, // LDAPURXi 8716 123077U, // LDAPURi 8717 28U, // LDARB 8718 28U, // LDARH 8719 28U, // LDARW 8720 28U, // LDARX 8721 123085U, // LDAXPW 8722 123085U, // LDAXPX 8723 28U, // LDAXRB 8724 28U, // LDAXRH 8725 28U, // LDAXRW 8726 28U, // LDAXRX 8727 0U, // LDCLRAB 8728 0U, // LDCLRAH 8729 0U, // LDCLRALB 8730 0U, // LDCLRALH 8731 0U, // LDCLRALW 8732 0U, // LDCLRALX 8733 0U, // LDCLRAW 8734 0U, // LDCLRAX 8735 0U, // LDCLRB 8736 0U, // LDCLRH 8737 0U, // LDCLRLB 8738 0U, // LDCLRLH 8739 0U, // LDCLRLW 8740 0U, // LDCLRLX 8741 0U, // LDCLRW 8742 0U, // LDCLRX 8743 0U, // LDEORAB 8744 0U, // LDEORAH 8745 0U, // LDEORALB 8746 0U, // LDEORALH 8747 0U, // LDEORALW 8748 0U, // LDEORALX 8749 0U, // LDEORAW 8750 0U, // LDEORAX 8751 0U, // LDEORB 8752 0U, // LDEORH 8753 0U, // LDEORLB 8754 0U, // LDEORLH 8755 0U, // LDEORLW 8756 0U, // LDEORLX 8757 0U, // LDEORW 8758 0U, // LDEORX 8759 4357U, // LDFF1B_D_REAL 8760 4357U, // LDFF1B_H_REAL 8761 4357U, // LDFF1B_REAL 8762 4357U, // LDFF1B_S_REAL 8763 4421U, // LDFF1D_REAL 8764 4485U, // LDFF1H_D_REAL 8765 4485U, // LDFF1H_REAL 8766 4485U, // LDFF1H_S_REAL 8767 4357U, // LDFF1SB_D_REAL 8768 4357U, // LDFF1SB_H_REAL 8769 4357U, // LDFF1SB_S_REAL 8770 4485U, // LDFF1SH_D_REAL 8771 4485U, // LDFF1SH_S_REAL 8772 4613U, // LDFF1SW_D_REAL 8773 4613U, // LDFF1W_D_REAL 8774 4613U, // LDFF1W_REAL 8775 127429U, // LDG 8776 28U, // LDGM 8777 28U, // LDLARB 8778 28U, // LDLARH 8779 28U, // LDLARW 8780 28U, // LDLARX 8781 280901U, // LDNF1B_D_IMM 8782 280901U, // LDNF1B_H_IMM 8783 280901U, // LDNF1B_IMM 8784 280901U, // LDNF1B_S_IMM 8785 280901U, // LDNF1D_IMM 8786 280901U, // LDNF1H_D_IMM 8787 280901U, // LDNF1H_IMM 8788 280901U, // LDNF1H_S_IMM 8789 280901U, // LDNF1SB_D_IMM 8790 280901U, // LDNF1SB_H_IMM 8791 280901U, // LDNF1SB_S_IMM 8792 280901U, // LDNF1SH_D_IMM 8793 280901U, // LDNF1SH_S_IMM 8794 280901U, // LDNF1SW_D_IMM 8795 280901U, // LDNF1W_D_IMM 8796 280901U, // LDNF1W_IMM 8797 11018445U, // LDNPDi 8798 11542733U, // LDNPQi 8799 12067021U, // LDNPSi 8800 12067021U, // LDNPWi 8801 11018445U, // LDNPXi 8802 280901U, // LDNT1B_ZRI 8803 4357U, // LDNT1B_ZRR 8804 125253U, // LDNT1B_ZZR_D_REAL 8805 125253U, // LDNT1B_ZZR_S_REAL 8806 280901U, // LDNT1D_ZRI 8807 4421U, // LDNT1D_ZRR 8808 125253U, // LDNT1D_ZZR_D_REAL 8809 280901U, // LDNT1H_ZRI 8810 4485U, // LDNT1H_ZRR 8811 125253U, // LDNT1H_ZZR_D_REAL 8812 125253U, // LDNT1H_ZZR_S_REAL 8813 125253U, // LDNT1SB_ZZR_D_REAL 8814 125253U, // LDNT1SB_ZZR_S_REAL 8815 125253U, // LDNT1SH_ZZR_D_REAL 8816 125253U, // LDNT1SH_ZZR_S_REAL 8817 125253U, // LDNT1SW_ZZR_D_REAL 8818 280901U, // LDNT1W_ZRI 8819 4613U, // LDNT1W_ZRR 8820 125253U, // LDNT1W_ZZR_D_REAL 8821 125253U, // LDNT1W_ZZR_S_REAL 8822 11018445U, // LDPDi 8823 12872013U, // LDPDpost 8824 180365645U, // LDPDpre 8825 11542733U, // LDPQi 8826 13396301U, // LDPQpost 8827 180889933U, // LDPQpre 8828 12067021U, // LDPSWi 8829 13920589U, // LDPSWpost 8830 181414221U, // LDPSWpre 8831 12067021U, // LDPSi 8832 13920589U, // LDPSpost 8833 181414221U, // LDPSpre 8834 12067021U, // LDPWi 8835 13920589U, // LDPWpost 8836 181414221U, // LDPWpre 8837 11018445U, // LDPXi 8838 12872013U, // LDPXpost 8839 180365645U, // LDPXpre 8840 4741U, // LDRAAindexed 8841 298245U, // LDRAAwriteback 8842 4741U, // LDRABindexed 8843 298245U, // LDRABwriteback 8844 2397U, // LDRBBpost 8845 297285U, // LDRBBpre 8846 14164165U, // LDRBBroW 8847 14688453U, // LDRBBroX 8848 4805U, // LDRBBui 8849 2397U, // LDRBpost 8850 297285U, // LDRBpre 8851 14164165U, // LDRBroW 8852 14688453U, // LDRBroX 8853 4805U, // LDRBui 8854 0U, // LDRDl 8855 2397U, // LDRDpost 8856 297285U, // LDRDpre 8857 15212741U, // LDRDroW 8858 15737029U, // LDRDroX 8859 4869U, // LDRDui 8860 2397U, // LDRHHpost 8861 297285U, // LDRHHpre 8862 16261317U, // LDRHHroW 8863 16785605U, // LDRHHroX 8864 4933U, // LDRHHui 8865 2397U, // LDRHpost 8866 297285U, // LDRHpre 8867 16261317U, // LDRHroW 8868 16785605U, // LDRHroX 8869 4933U, // LDRHui 8870 0U, // LDRQl 8871 2397U, // LDRQpost 8872 297285U, // LDRQpre 8873 17309893U, // LDRQroW 8874 17834181U, // LDRQroX 8875 4997U, // LDRQui 8876 2397U, // LDRSBWpost 8877 297285U, // LDRSBWpre 8878 14164165U, // LDRSBWroW 8879 14688453U, // LDRSBWroX 8880 4805U, // LDRSBWui 8881 2397U, // LDRSBXpost 8882 297285U, // LDRSBXpre 8883 14164165U, // LDRSBXroW 8884 14688453U, // LDRSBXroX 8885 4805U, // LDRSBXui 8886 2397U, // LDRSHWpost 8887 297285U, // LDRSHWpre 8888 16261317U, // LDRSHWroW 8889 16785605U, // LDRSHWroX 8890 4933U, // LDRSHWui 8891 2397U, // LDRSHXpost 8892 297285U, // LDRSHXpre 8893 16261317U, // LDRSHXroW 8894 16785605U, // LDRSHXroX 8895 4933U, // LDRSHXui 8896 0U, // LDRSWl 8897 2397U, // LDRSWpost 8898 297285U, // LDRSWpre 8899 18358469U, // LDRSWroW 8900 18882757U, // LDRSWroX 8901 5061U, // LDRSWui 8902 0U, // LDRSl 8903 2397U, // LDRSpost 8904 297285U, // LDRSpre 8905 18358469U, // LDRSroW 8906 18882757U, // LDRSroX 8907 5061U, // LDRSui 8908 0U, // LDRWl 8909 2397U, // LDRWpost 8910 297285U, // LDRWpre 8911 18358469U, // LDRWroW 8912 18882757U, // LDRWroX 8913 5061U, // LDRWui 8914 0U, // LDRXl 8915 2397U, // LDRXpost 8916 297285U, // LDRXpre 8917 15212741U, // LDRXroW 8918 15737029U, // LDRXroX 8919 4869U, // LDRXui 8920 278725U, // LDR_PXI 8921 278725U, // LDR_ZXI 8922 0U, // LDSETAB 8923 0U, // LDSETAH 8924 0U, // LDSETALB 8925 0U, // LDSETALH 8926 0U, // LDSETALW 8927 0U, // LDSETALX 8928 0U, // LDSETAW 8929 0U, // LDSETAX 8930 0U, // LDSETB 8931 0U, // LDSETH 8932 0U, // LDSETLB 8933 0U, // LDSETLH 8934 0U, // LDSETLW 8935 0U, // LDSETLX 8936 0U, // LDSETW 8937 0U, // LDSETX 8938 0U, // LDSMAXAB 8939 0U, // LDSMAXAH 8940 0U, // LDSMAXALB 8941 0U, // LDSMAXALH 8942 0U, // LDSMAXALW 8943 0U, // LDSMAXALX 8944 0U, // LDSMAXAW 8945 0U, // LDSMAXAX 8946 0U, // LDSMAXB 8947 0U, // LDSMAXH 8948 0U, // LDSMAXLB 8949 0U, // LDSMAXLH 8950 0U, // LDSMAXLW 8951 0U, // LDSMAXLX 8952 0U, // LDSMAXW 8953 0U, // LDSMAXX 8954 0U, // LDSMINAB 8955 0U, // LDSMINAH 8956 0U, // LDSMINALB 8957 0U, // LDSMINALH 8958 0U, // LDSMINALW 8959 0U, // LDSMINALX 8960 0U, // LDSMINAW 8961 0U, // LDSMINAX 8962 0U, // LDSMINB 8963 0U, // LDSMINH 8964 0U, // LDSMINLB 8965 0U, // LDSMINLH 8966 0U, // LDSMINLW 8967 0U, // LDSMINLX 8968 0U, // LDSMINW 8969 0U, // LDSMINX 8970 123077U, // LDTRBi 8971 123077U, // LDTRHi 8972 123077U, // LDTRSBWi 8973 123077U, // LDTRSBXi 8974 123077U, // LDTRSHWi 8975 123077U, // LDTRSHXi 8976 123077U, // LDTRSWi 8977 123077U, // LDTRWi 8978 123077U, // LDTRXi 8979 0U, // LDUMAXAB 8980 0U, // LDUMAXAH 8981 0U, // LDUMAXALB 8982 0U, // LDUMAXALH 8983 0U, // LDUMAXALW 8984 0U, // LDUMAXALX 8985 0U, // LDUMAXAW 8986 0U, // LDUMAXAX 8987 0U, // LDUMAXB 8988 0U, // LDUMAXH 8989 0U, // LDUMAXLB 8990 0U, // LDUMAXLH 8991 0U, // LDUMAXLW 8992 0U, // LDUMAXLX 8993 0U, // LDUMAXW 8994 0U, // LDUMAXX 8995 0U, // LDUMINAB 8996 0U, // LDUMINAH 8997 0U, // LDUMINALB 8998 0U, // LDUMINALH 8999 0U, // LDUMINALW 9000 0U, // LDUMINALX 9001 0U, // LDUMINAW 9002 0U, // LDUMINAX 9003 0U, // LDUMINB 9004 0U, // LDUMINH 9005 0U, // LDUMINLB 9006 0U, // LDUMINLH 9007 0U, // LDUMINLW 9008 0U, // LDUMINLX 9009 0U, // LDUMINW 9010 0U, // LDUMINX 9011 123077U, // LDURBBi 9012 123077U, // LDURBi 9013 123077U, // LDURDi 9014 123077U, // LDURHHi 9015 123077U, // LDURHi 9016 123077U, // LDURQi 9017 123077U, // LDURSBWi 9018 123077U, // LDURSBXi 9019 123077U, // LDURSHWi 9020 123077U, // LDURSHXi 9021 123077U, // LDURSWi 9022 123077U, // LDURSi 9023 123077U, // LDURWi 9024 123077U, // LDURXi 9025 123085U, // LDXPW 9026 123085U, // LDXPX 9027 28U, // LDXRB 9028 28U, // LDXRH 9029 28U, // LDXRW 9030 28U, // LDXRX 9031 0U, // LOADgot 9032 533128U, // LSLR_ZPmZ_B 9033 1057160U, // LSLR_ZPmZ_D 9034 1614536U, // LSLR_ZPmZ_H 9035 2106120U, // LSLR_ZPmZ_S 9036 197U, // LSLVWr 9037 197U, // LSLVXr 9038 1057416U, // LSL_WIDE_ZPmZ_B 9039 99016U, // LSL_WIDE_ZPmZ_H 9040 1057544U, // LSL_WIDE_ZPmZ_S 9041 389U, // LSL_WIDE_ZZZ_B 9042 12U, // LSL_WIDE_ZZZ_H 9043 389U, // LSL_WIDE_ZZZ_S 9044 8840U, // LSL_ZPmI_B 9045 8584U, // LSL_ZPmI_D 9046 90824U, // LSL_ZPmI_H 9047 8968U, // LSL_ZPmI_S 9048 533128U, // LSL_ZPmZ_B 9049 1057160U, // LSL_ZPmZ_D 9050 1614536U, // LSL_ZPmZ_H 9051 2106120U, // LSL_ZPmZ_S 9052 197U, // LSL_ZZI_B 9053 197U, // LSL_ZZI_D 9054 12U, // LSL_ZZI_H 9055 197U, // LSL_ZZI_S 9056 533128U, // LSRR_ZPmZ_B 9057 1057160U, // LSRR_ZPmZ_D 9058 1614536U, // LSRR_ZPmZ_H 9059 2106120U, // LSRR_ZPmZ_S 9060 197U, // LSRVWr 9061 197U, // LSRVXr 9062 1057416U, // LSR_WIDE_ZPmZ_B 9063 99016U, // LSR_WIDE_ZPmZ_H 9064 1057544U, // LSR_WIDE_ZPmZ_S 9065 389U, // LSR_WIDE_ZZZ_B 9066 12U, // LSR_WIDE_ZZZ_H 9067 389U, // LSR_WIDE_ZZZ_S 9068 8840U, // LSR_ZPmI_B 9069 8584U, // LSR_ZPmI_D 9070 90824U, // LSR_ZPmI_H 9071 8968U, // LSR_ZPmI_S 9072 533128U, // LSR_ZPmZ_B 9073 1057160U, // LSR_ZPmZ_D 9074 1614536U, // LSR_ZPmZ_H 9075 2106120U, // LSR_ZPmZ_S 9076 197U, // LSR_ZZI_B 9077 197U, // LSR_ZZI_D 9078 12U, // LSR_ZZI_H 9079 197U, // LSR_ZZI_S 9080 8389U, // MADDWrrr 9081 8389U, // MADDXrrr 9082 5128U, // MAD_ZPmZZ_B 9083 7872584U, // MAD_ZPmZZ_D 9084 1794769U, // MAD_ZPmZZ_H 9085 8396936U, // MAD_ZPmZZ_S 9086 533131U, // MATCH_PPzZZ_B 9087 1614536U, // MATCH_PPzZZ_H 9088 5128U, // MLA_ZPmZZ_B 9089 7872584U, // MLA_ZPmZZ_D 9090 1794769U, // MLA_ZPmZZ_H 9091 8396936U, // MLA_ZPmZZ_S 9092 1704005U, // MLA_ZZZI_D 9093 2449U, // MLA_ZZZI_H 9094 1704069U, // MLA_ZZZI_S 9095 49737U, // MLAv16i8 9096 57929U, // MLAv2i32 9097 9151049U, // MLAv2i32_indexed 9098 66122U, // MLAv4i16 9099 9142858U, // MLAv4i16_indexed 9100 25159U, // MLAv4i32 9101 9151047U, // MLAv4i32_indexed 9102 33351U, // MLAv8i16 9103 9142855U, // MLAv8i16_indexed 9104 74314U, // MLAv8i8 9105 5128U, // MLS_ZPmZZ_B 9106 7872584U, // MLS_ZPmZZ_D 9107 1794769U, // MLS_ZPmZZ_H 9108 8396936U, // MLS_ZPmZZ_S 9109 1704005U, // MLS_ZZZI_D 9110 2449U, // MLS_ZZZI_H 9111 1704069U, // MLS_ZZZI_S 9112 49737U, // MLSv16i8 9113 57929U, // MLSv2i32 9114 9151049U, // MLSv2i32_indexed 9115 66122U, // MLSv4i16 9116 9142858U, // MLSv4i16_indexed 9117 25159U, // MLSv4i32 9118 9151047U, // MLSv4i32_indexed 9119 33351U, // MLSv8i16 9120 9142855U, // MLSv8i16_indexed 9121 74314U, // MLSv8i8 9122 0U, // MOVID 9123 2U, // MOVIv16b_ns 9124 0U, // MOVIv2d_ns 9125 29U, // MOVIv2i32 9126 29U, // MOVIv2s_msl 9127 29U, // MOVIv4i16 9128 29U, // MOVIv4i32 9129 29U, // MOVIv4s_msl 9130 2U, // MOVIv8b_ns 9131 29U, // MOVIv8i16 9132 0U, // MOVKWi 9133 0U, // MOVKXi 9134 0U, // MOVMCSym 9135 29U, // MOVNWi 9136 29U, // MOVNXi 9137 0U, // MOVPRFX_ZPmZ_B 9138 0U, // MOVPRFX_ZPmZ_D 9139 0U, // MOVPRFX_ZPmZ_H 9140 1U, // MOVPRFX_ZPmZ_S 9141 651U, // MOVPRFX_ZPzZ_B 9142 395U, // MOVPRFX_ZPzZ_D 9143 8U, // MOVPRFX_ZPzZ_H 9144 779U, // MOVPRFX_ZPzZ_S 9145 2U, // MOVPRFX_ZZ 9146 29U, // MOVZWi 9147 29U, // MOVZXi 9148 0U, // MOVaddr 9149 0U, // MOVaddrBA 9150 0U, // MOVaddrCP 9151 0U, // MOVaddrEXT 9152 0U, // MOVaddrJT 9153 0U, // MOVaddrTLS 9154 0U, // MOVbaseTLS 9155 0U, // MOVi32imm 9156 0U, // MOVi64imm 9157 0U, // MRS 9158 5128U, // MSB_ZPmZZ_B 9159 7872584U, // MSB_ZPmZZ_D 9160 1794769U, // MSB_ZPmZZ_H 9161 8396936U, // MSB_ZPmZZ_S 9162 0U, // MSR 9163 0U, // MSRpstateImm1 9164 0U, // MSRpstateImm4 9165 8389U, // MSUBWrrr 9166 8389U, // MSUBXrrr 9167 197U, // MUL_ZI_B 9168 197U, // MUL_ZI_D 9169 12U, // MUL_ZI_H 9170 197U, // MUL_ZI_S 9171 533128U, // MUL_ZPmZ_B 9172 1057160U, // MUL_ZPmZ_D 9173 1614536U, // MUL_ZPmZ_H 9174 2106120U, // MUL_ZPmZ_S 9175 270725U, // MUL_ZZZI_D 9176 2952U, // MUL_ZZZI_H 9177 271109U, // MUL_ZZZI_S 9178 645U, // MUL_ZZZ_B 9179 389U, // MUL_ZZZ_D 9180 8U, // MUL_ZZZ_H 9181 773U, // MUL_ZZZ_S 9182 49673U, // MULv16i8 9183 57865U, // MULv2i32 9184 10199561U, // MULv2i32_indexed 9185 66058U, // MULv4i16 9186 10191370U, // MULv4i16_indexed 9187 25095U, // MULv4i32 9188 10199559U, // MULv4i32_indexed 9189 33287U, // MULv8i16 9190 10191367U, // MULv8i16_indexed 9191 74250U, // MULv8i8 9192 29U, // MVNIv2i32 9193 29U, // MVNIv2s_msl 9194 29U, // MVNIv4i16 9195 29U, // MVNIv4i32 9196 29U, // MVNIv4s_msl 9197 29U, // MVNIv8i16 9198 533131U, // NANDS_PPzPP 9199 533131U, // NAND_PPzPP 9200 1057157U, // NBSL_ZZZZ_D 9201 0U, // NEG_ZPmZ_B 9202 0U, // NEG_ZPmZ_D 9203 0U, // NEG_ZPmZ_H 9204 1U, // NEG_ZPmZ_S 9205 1U, // NEGv16i8 9206 2U, // NEGv1i64 9207 2U, // NEGv2i32 9208 3U, // NEGv2i64 9209 3U, // NEGv4i16 9210 4U, // NEGv4i32 9211 4U, // NEGv8i16 9212 5U, // NEGv8i8 9213 533131U, // NMATCH_PPzZZ_B 9214 1614536U, // NMATCH_PPzZZ_H 9215 533131U, // NORS_PPzPP 9216 533131U, // NOR_PPzPP 9217 0U, // NOT_ZPmZ_B 9218 0U, // NOT_ZPmZ_D 9219 0U, // NOT_ZPmZ_H 9220 1U, // NOT_ZPmZ_S 9221 1U, // NOTv16i8 9222 5U, // NOTv8i8 9223 533131U, // ORNS_PPzPP 9224 0U, // ORNWrr 9225 901U, // ORNWrs 9226 0U, // ORNXrr 9227 901U, // ORNXrs 9228 533131U, // ORN_PPzPP 9229 49673U, // ORNv16i8 9230 74250U, // ORNv8i8 9231 533131U, // ORRS_PPzPP 9232 2245U, // ORRWri 9233 0U, // ORRWrr 9234 901U, // ORRWrs 9235 2309U, // ORRXri 9236 0U, // ORRXrr 9237 901U, // ORRXrs 9238 533131U, // ORR_PPzPP 9239 2309U, // ORR_ZI 9240 533128U, // ORR_ZPmZ_B 9241 1057160U, // ORR_ZPmZ_D 9242 1614536U, // ORR_ZPmZ_H 9243 2106120U, // ORR_ZPmZ_S 9244 389U, // ORR_ZZZ 9245 49673U, // ORRv16i8 9246 0U, // ORRv2i32 9247 0U, // ORRv4i16 9248 0U, // ORRv4i32 9249 0U, // ORRv8i16 9250 74250U, // ORRv8i8 9251 645U, // ORV_VPZ_B 9252 389U, // ORV_VPZ_D 9253 325U, // ORV_VPZ_H 9254 773U, // ORV_VPZ_S 9255 2U, // PACDA 9256 2U, // PACDB 9257 0U, // PACDZA 9258 0U, // PACDZB 9259 197U, // PACGA 9260 2U, // PACIA 9261 0U, // PACIA1716 9262 0U, // PACIASP 9263 0U, // PACIAZ 9264 2U, // PACIB 9265 0U, // PACIB1716 9266 0U, // PACIBSP 9267 0U, // PACIBZ 9268 0U, // PACIZA 9269 0U, // PACIZB 9270 0U, // PFALSE 9271 645U, // PFIRST_B 9272 773U, // PMULLB_ZZZ_D 9273 30U, // PMULLB_ZZZ_H 9274 0U, // PMULLB_ZZZ_Q 9275 773U, // PMULLT_ZZZ_D 9276 30U, // PMULLT_ZZZ_H 9277 0U, // PMULLT_ZZZ_Q 9278 49673U, // PMULLv16i8 9279 0U, // PMULLv1i64 9280 0U, // PMULLv2i64 9281 74250U, // PMULLv8i8 9282 645U, // PMUL_ZZZ_B 9283 49673U, // PMULv16i8 9284 74250U, // PMULv8i8 9285 645U, // PNEXT_B 9286 389U, // PNEXT_D 9287 8U, // PNEXT_H 9288 773U, // PNEXT_S 9289 28U, // PRFB_D_PZI 9290 30U, // PRFB_D_SCALED 9291 31U, // PRFB_D_SXTW_SCALED 9292 31U, // PRFB_D_UXTW_SCALED 9293 5204U, // PRFB_PRI 9294 32U, // PRFB_PRR 9295 5268U, // PRFB_S_PZI 9296 32U, // PRFB_S_SXTW_SCALED 9297 33U, // PRFB_S_UXTW_SCALED 9298 0U, // PRFD_D_PZI 9299 33U, // PRFD_D_SCALED 9300 34U, // PRFD_D_SXTW_SCALED 9301 34U, // PRFD_D_UXTW_SCALED 9302 5204U, // PRFD_PRI 9303 35U, // PRFD_PRR 9304 35U, // PRFD_S_PZI 9305 36U, // PRFD_S_SXTW_SCALED 9306 36U, // PRFD_S_UXTW_SCALED 9307 0U, // PRFH_D_PZI 9308 37U, // PRFH_D_SCALED 9309 37U, // PRFH_D_SXTW_SCALED 9310 38U, // PRFH_D_UXTW_SCALED 9311 5204U, // PRFH_PRI 9312 38U, // PRFH_PRR 9313 39U, // PRFH_S_PZI 9314 39U, // PRFH_S_SXTW_SCALED 9315 40U, // PRFH_S_UXTW_SCALED 9316 0U, // PRFMl 9317 15212741U, // PRFMroW 9318 15737029U, // PRFMroX 9319 4869U, // PRFMui 9320 40U, // PRFS_PRR 9321 123077U, // PRFUMi 9322 0U, // PRFW_D_PZI 9323 41U, // PRFW_D_SCALED 9324 41U, // PRFW_D_SXTW_SCALED 9325 42U, // PRFW_D_UXTW_SCALED 9326 5204U, // PRFW_PRI 9327 42U, // PRFW_S_PZI 9328 43U, // PRFW_S_SXTW_SCALED 9329 43U, // PRFW_S_UXTW_SCALED 9330 2U, // PTEST_PP 9331 2U, // PTRUES_B 9332 2U, // PTRUES_D 9333 0U, // PTRUES_H 9334 2U, // PTRUES_S 9335 2U, // PTRUE_B 9336 2U, // PTRUE_D 9337 0U, // PTRUE_H 9338 2U, // PTRUE_S 9339 0U, // PUNPKHI_PP 9340 0U, // PUNPKLO_PP 9341 325U, // RADDHNB_ZZZ_B 9342 6U, // RADDHNB_ZZZ_H 9343 389U, // RADDHNB_ZZZ_S 9344 453U, // RADDHNT_ZZZ_B 9345 1U, // RADDHNT_ZZZ_H 9346 69U, // RADDHNT_ZZZ_S 9347 16902U, // RADDHNv2i64_v2i32 9348 16966U, // RADDHNv2i64_v4i32 9349 25095U, // RADDHNv4i32_v4i16 9350 25159U, // RADDHNv4i32_v8i16 9351 33351U, // RADDHNv8i16_v16i8 9352 33287U, // RADDHNv8i16_v8i8 9353 16902U, // RAX1 9354 389U, // RAX1_ZZZ_D 9355 2U, // RBITWr 9356 2U, // RBITXr 9357 0U, // RBIT_ZPmZ_B 9358 0U, // RBIT_ZPmZ_D 9359 0U, // RBIT_ZPmZ_H 9360 1U, // RBIT_ZPmZ_S 9361 1U, // RBITv16i8 9362 5U, // RBITv8i8 9363 44U, // RDFFRS_PPz 9364 0U, // RDFFR_P 9365 44U, // RDFFR_PPz 9366 2U, // RDVLI_XI 9367 0U, // RET 9368 0U, // RETAA 9369 0U, // RETAB 9370 0U, // RET_ReallyLR 9371 2U, // REV16Wr 9372 2U, // REV16Xr 9373 1U, // REV16v16i8 9374 5U, // REV16v8i8 9375 2U, // REV32Xr 9376 1U, // REV32v16i8 9377 3U, // REV32v4i16 9378 4U, // REV32v8i16 9379 5U, // REV32v8i8 9380 1U, // REV64v16i8 9381 2U, // REV64v2i32 9382 3U, // REV64v4i16 9383 4U, // REV64v4i32 9384 4U, // REV64v8i16 9385 5U, // REV64v8i8 9386 0U, // REVB_ZPmZ_D 9387 0U, // REVB_ZPmZ_H 9388 1U, // REVB_ZPmZ_S 9389 0U, // REVH_ZPmZ_D 9390 1U, // REVH_ZPmZ_S 9391 0U, // REVW_ZPmZ_D 9392 2U, // REVWr 9393 2U, // REVXr 9394 2U, // REV_PP_B 9395 2U, // REV_PP_D 9396 0U, // REV_PP_H 9397 2U, // REV_PP_S 9398 2U, // REV_ZZ_B 9399 2U, // REV_ZZ_D 9400 0U, // REV_ZZ_H 9401 2U, // REV_ZZ_S 9402 197U, // RMIF 9403 197U, // RORVWr 9404 197U, // RORVXr 9405 197U, // RSHRNB_ZZI_B 9406 12U, // RSHRNB_ZZI_H 9407 197U, // RSHRNB_ZZI_S 9408 2373U, // RSHRNT_ZZI_B 9409 20U, // RSHRNT_ZZI_H 9410 2373U, // RSHRNT_ZZI_S 9411 2375U, // RSHRNv16i8_shift 9412 198U, // RSHRNv2i32_shift 9413 199U, // RSHRNv4i16_shift 9414 2374U, // RSHRNv4i32_shift 9415 2375U, // RSHRNv8i16_shift 9416 199U, // RSHRNv8i8_shift 9417 325U, // RSUBHNB_ZZZ_B 9418 6U, // RSUBHNB_ZZZ_H 9419 389U, // RSUBHNB_ZZZ_S 9420 453U, // RSUBHNT_ZZZ_B 9421 1U, // RSUBHNT_ZZZ_H 9422 69U, // RSUBHNT_ZZZ_S 9423 16902U, // RSUBHNv2i64_v2i32 9424 16966U, // RSUBHNv2i64_v4i32 9425 25095U, // RSUBHNv4i32_v4i16 9426 25159U, // RSUBHNv4i32_v8i16 9427 33351U, // RSUBHNv8i16_v16i8 9428 33287U, // RSUBHNv8i16_v8i8 9429 133U, // SABALB_ZZZ_D 9430 0U, // SABALB_ZZZ_H 9431 453U, // SABALB_ZZZ_S 9432 133U, // SABALT_ZZZ_D 9433 0U, // SABALT_ZZZ_H 9434 453U, // SABALT_ZZZ_S 9435 49737U, // SABALv16i8_v8i16 9436 57929U, // SABALv2i32_v2i64 9437 66122U, // SABALv4i16_v4i32 9438 25159U, // SABALv4i32_v2i64 9439 33351U, // SABALv8i16_v4i32 9440 74314U, // SABALv8i8_v8i16 9441 0U, // SABA_ZZZ_B 9442 69U, // SABA_ZZZ_D 9443 17U, // SABA_ZZZ_H 9444 133U, // SABA_ZZZ_S 9445 49737U, // SABAv16i8 9446 57929U, // SABAv2i32 9447 66122U, // SABAv4i16 9448 25159U, // SABAv4i32 9449 33351U, // SABAv8i16 9450 74314U, // SABAv8i8 9451 773U, // SABDLB_ZZZ_D 9452 30U, // SABDLB_ZZZ_H 9453 325U, // SABDLB_ZZZ_S 9454 773U, // SABDLT_ZZZ_D 9455 30U, // SABDLT_ZZZ_H 9456 325U, // SABDLT_ZZZ_S 9457 49673U, // SABDLv16i8_v8i16 9458 57865U, // SABDLv2i32_v2i64 9459 66058U, // SABDLv4i16_v4i32 9460 25095U, // SABDLv4i32_v2i64 9461 33287U, // SABDLv8i16_v4i32 9462 74250U, // SABDLv8i8_v8i16 9463 533128U, // SABD_ZPmZ_B 9464 1057160U, // SABD_ZPmZ_D 9465 1614536U, // SABD_ZPmZ_H 9466 2106120U, // SABD_ZPmZ_S 9467 49673U, // SABDv16i8 9468 57865U, // SABDv2i32 9469 66058U, // SABDv4i16 9470 25095U, // SABDv4i32 9471 33287U, // SABDv8i16 9472 74250U, // SABDv8i8 9473 136U, // SADALP_ZPmZ_D 9474 0U, // SADALP_ZPmZ_H 9475 456U, // SADALP_ZPmZ_S 9476 1U, // SADALPv16i8_v8i16 9477 2U, // SADALPv2i32_v1i64 9478 3U, // SADALPv4i16_v2i32 9479 4U, // SADALPv4i32_v2i64 9480 4U, // SADALPv8i16_v4i32 9481 5U, // SADALPv8i8_v4i16 9482 773U, // SADDLBT_ZZZ_D 9483 30U, // SADDLBT_ZZZ_H 9484 325U, // SADDLBT_ZZZ_S 9485 773U, // SADDLB_ZZZ_D 9486 30U, // SADDLB_ZZZ_H 9487 325U, // SADDLB_ZZZ_S 9488 1U, // SADDLPv16i8_v8i16 9489 2U, // SADDLPv2i32_v1i64 9490 3U, // SADDLPv4i16_v2i32 9491 4U, // SADDLPv4i32_v2i64 9492 4U, // SADDLPv8i16_v4i32 9493 5U, // SADDLPv8i8_v4i16 9494 773U, // SADDLT_ZZZ_D 9495 30U, // SADDLT_ZZZ_H 9496 325U, // SADDLT_ZZZ_S 9497 1U, // SADDLVv16i8v 9498 3U, // SADDLVv4i16v 9499 4U, // SADDLVv4i32v 9500 4U, // SADDLVv8i16v 9501 5U, // SADDLVv8i8v 9502 49673U, // SADDLv16i8_v8i16 9503 57865U, // SADDLv2i32_v2i64 9504 66058U, // SADDLv4i16_v4i32 9505 25095U, // SADDLv4i32_v2i64 9506 33287U, // SADDLv8i16_v4i32 9507 74250U, // SADDLv8i8_v8i16 9508 645U, // SADDV_VPZ_B 9509 325U, // SADDV_VPZ_H 9510 773U, // SADDV_VPZ_S 9511 773U, // SADDWB_ZZZ_D 9512 30U, // SADDWB_ZZZ_H 9513 325U, // SADDWB_ZZZ_S 9514 773U, // SADDWT_ZZZ_D 9515 30U, // SADDWT_ZZZ_H 9516 325U, // SADDWT_ZZZ_S 9517 49671U, // SADDWv16i8_v8i16 9518 57862U, // SADDWv2i32_v2i64 9519 66055U, // SADDWv4i16_v4i32 9520 25094U, // SADDWv4i32_v2i64 9521 33287U, // SADDWv8i16_v4i32 9522 74247U, // SADDWv8i8_v8i16 9523 0U, // SB 9524 69U, // SBCLB_ZZZ_D 9525 133U, // SBCLB_ZZZ_S 9526 69U, // SBCLT_ZZZ_D 9527 133U, // SBCLT_ZZZ_S 9528 197U, // SBCSWr 9529 197U, // SBCSXr 9530 197U, // SBCWr 9531 197U, // SBCXr 9532 8389U, // SBFMWri 9533 8389U, // SBFMXri 9534 197U, // SCVTFSWDri 9535 197U, // SCVTFSWHri 9536 197U, // SCVTFSWSri 9537 197U, // SCVTFSXDri 9538 197U, // SCVTFSXHri 9539 197U, // SCVTFSXSri 9540 2U, // SCVTFUWDri 9541 2U, // SCVTFUWHri 9542 2U, // SCVTFUWSri 9543 2U, // SCVTFUXDri 9544 2U, // SCVTFUXHri 9545 2U, // SCVTFUXSri 9546 0U, // SCVTF_ZPmZ_DtoD 9547 0U, // SCVTF_ZPmZ_DtoH 9548 0U, // SCVTF_ZPmZ_DtoS 9549 0U, // SCVTF_ZPmZ_HtoH 9550 1U, // SCVTF_ZPmZ_StoD 9551 0U, // SCVTF_ZPmZ_StoH 9552 1U, // SCVTF_ZPmZ_StoS 9553 197U, // SCVTFd 9554 197U, // SCVTFh 9555 197U, // SCVTFs 9556 2U, // SCVTFv1i16 9557 2U, // SCVTFv1i32 9558 2U, // SCVTFv1i64 9559 2U, // SCVTFv2f32 9560 3U, // SCVTFv2f64 9561 201U, // SCVTFv2i32_shift 9562 198U, // SCVTFv2i64_shift 9563 3U, // SCVTFv4f16 9564 4U, // SCVTFv4f32 9565 202U, // SCVTFv4i16_shift 9566 199U, // SCVTFv4i32_shift 9567 4U, // SCVTFv8f16 9568 199U, // SCVTFv8i16_shift 9569 1057160U, // SDIVR_ZPmZ_D 9570 2106120U, // SDIVR_ZPmZ_S 9571 197U, // SDIVWr 9572 197U, // SDIVXr 9573 1057160U, // SDIV_ZPmZ_D 9574 2106120U, // SDIV_ZPmZ_S 9575 1704389U, // SDOT_ZZZI_D 9576 2432U, // SDOT_ZZZI_S 9577 453U, // SDOT_ZZZ_D 9578 0U, // SDOT_ZZZ_S 9579 303689U, // SDOTlanev16i8 9580 303690U, // SDOTlanev8i8 9581 49737U, // SDOTv16i8 9582 74314U, // SDOTv8i8 9583 533125U, // SEL_PPPP 9584 533125U, // SEL_ZPZZ_B 9585 1057157U, // SEL_ZPZZ_D 9586 1614536U, // SEL_ZPZZ_H 9587 2106117U, // SEL_ZPZZ_S 9588 0U, // SETF16 9589 0U, // SETF8 9590 0U, // SETFFR 9591 25157U, // SHA1Crrr 9592 2U, // SHA1Hrr 9593 25157U, // SHA1Mrrr 9594 25157U, // SHA1Prrr 9595 25159U, // SHA1SU0rrr 9596 4U, // SHA1SU1rr 9597 25157U, // SHA256H2rrr 9598 25157U, // SHA256Hrrr 9599 4U, // SHA256SU0rr 9600 25159U, // SHA256SU1rrr 9601 16965U, // SHA512H 9602 16965U, // SHA512H2 9603 3U, // SHA512SU0 9604 16966U, // SHA512SU1 9605 533128U, // SHADD_ZPmZ_B 9606 1057160U, // SHADD_ZPmZ_D 9607 1614536U, // SHADD_ZPmZ_H 9608 2106120U, // SHADD_ZPmZ_S 9609 49673U, // SHADDv16i8 9610 57865U, // SHADDv2i32 9611 66058U, // SHADDv4i16 9612 25095U, // SHADDv4i32 9613 33287U, // SHADDv8i16 9614 74250U, // SHADDv8i8 9615 44U, // SHLLv16i8 9616 45U, // SHLLv2i32 9617 45U, // SHLLv4i16 9618 46U, // SHLLv4i32 9619 46U, // SHLLv8i16 9620 47U, // SHLLv8i8 9621 197U, // SHLd 9622 201U, // SHLv16i8_shift 9623 201U, // SHLv2i32_shift 9624 198U, // SHLv2i64_shift 9625 202U, // SHLv4i16_shift 9626 199U, // SHLv4i32_shift 9627 199U, // SHLv8i16_shift 9628 202U, // SHLv8i8_shift 9629 197U, // SHRNB_ZZI_B 9630 12U, // SHRNB_ZZI_H 9631 197U, // SHRNB_ZZI_S 9632 2373U, // SHRNT_ZZI_B 9633 20U, // SHRNT_ZZI_H 9634 2373U, // SHRNT_ZZI_S 9635 2375U, // SHRNv16i8_shift 9636 198U, // SHRNv2i32_shift 9637 199U, // SHRNv4i16_shift 9638 2374U, // SHRNv4i32_shift 9639 2375U, // SHRNv8i16_shift 9640 199U, // SHRNv8i8_shift 9641 533128U, // SHSUBR_ZPmZ_B 9642 1057160U, // SHSUBR_ZPmZ_D 9643 1614536U, // SHSUBR_ZPmZ_H 9644 2106120U, // SHSUBR_ZPmZ_S 9645 533128U, // SHSUB_ZPmZ_B 9646 1057160U, // SHSUB_ZPmZ_D 9647 1614536U, // SHSUB_ZPmZ_H 9648 2106120U, // SHSUB_ZPmZ_S 9649 49673U, // SHSUBv16i8 9650 57865U, // SHSUBv2i32 9651 66058U, // SHSUBv4i16 9652 25095U, // SHSUBv4i32 9653 33287U, // SHSUBv8i16 9654 74250U, // SHSUBv8i8 9655 20U, // SLI_ZZI_B 9656 2373U, // SLI_ZZI_D 9657 20U, // SLI_ZZI_H 9658 2373U, // SLI_ZZI_S 9659 2373U, // SLId 9660 2377U, // SLIv16i8_shift 9661 2377U, // SLIv2i32_shift 9662 2374U, // SLIv2i64_shift 9663 2378U, // SLIv4i16_shift 9664 2375U, // SLIv4i32_shift 9665 2375U, // SLIv8i16_shift 9666 2378U, // SLIv8i8_shift 9667 25159U, // SM3PARTW1 9668 25159U, // SM3PARTW2 9669 204145159U, // SM3SS1 9670 9151047U, // SM3TT1A 9671 9151047U, // SM3TT1B 9672 9151047U, // SM3TT2A 9673 9151047U, // SM3TT2B 9674 4U, // SM4E 9675 773U, // SM4EKEY_ZZZ_S 9676 25095U, // SM4ENCKEY 9677 773U, // SM4E_ZZZ_S 9678 8389U, // SMADDLrrr 9679 533128U, // SMAXP_ZPmZ_B 9680 1057160U, // SMAXP_ZPmZ_D 9681 1614536U, // SMAXP_ZPmZ_H 9682 2106120U, // SMAXP_ZPmZ_S 9683 49673U, // SMAXPv16i8 9684 57865U, // SMAXPv2i32 9685 66058U, // SMAXPv4i16 9686 25095U, // SMAXPv4i32 9687 33287U, // SMAXPv8i16 9688 74250U, // SMAXPv8i8 9689 645U, // SMAXV_VPZ_B 9690 389U, // SMAXV_VPZ_D 9691 325U, // SMAXV_VPZ_H 9692 773U, // SMAXV_VPZ_S 9693 1U, // SMAXVv16i8v 9694 3U, // SMAXVv4i16v 9695 4U, // SMAXVv4i32v 9696 4U, // SMAXVv8i16v 9697 5U, // SMAXVv8i8v 9698 197U, // SMAX_ZI_B 9699 197U, // SMAX_ZI_D 9700 12U, // SMAX_ZI_H 9701 197U, // SMAX_ZI_S 9702 533128U, // SMAX_ZPmZ_B 9703 1057160U, // SMAX_ZPmZ_D 9704 1614536U, // SMAX_ZPmZ_H 9705 2106120U, // SMAX_ZPmZ_S 9706 49673U, // SMAXv16i8 9707 57865U, // SMAXv2i32 9708 66058U, // SMAXv4i16 9709 25095U, // SMAXv4i32 9710 33287U, // SMAXv8i16 9711 74250U, // SMAXv8i8 9712 0U, // SMC 9713 533128U, // SMINP_ZPmZ_B 9714 1057160U, // SMINP_ZPmZ_D 9715 1614536U, // SMINP_ZPmZ_H 9716 2106120U, // SMINP_ZPmZ_S 9717 49673U, // SMINPv16i8 9718 57865U, // SMINPv2i32 9719 66058U, // SMINPv4i16 9720 25095U, // SMINPv4i32 9721 33287U, // SMINPv8i16 9722 74250U, // SMINPv8i8 9723 645U, // SMINV_VPZ_B 9724 389U, // SMINV_VPZ_D 9725 325U, // SMINV_VPZ_H 9726 773U, // SMINV_VPZ_S 9727 1U, // SMINVv16i8v 9728 3U, // SMINVv4i16v 9729 4U, // SMINVv4i32v 9730 4U, // SMINVv8i16v 9731 5U, // SMINVv8i8v 9732 197U, // SMIN_ZI_B 9733 197U, // SMIN_ZI_D 9734 12U, // SMIN_ZI_H 9735 197U, // SMIN_ZI_S 9736 533128U, // SMIN_ZPmZ_B 9737 1057160U, // SMIN_ZPmZ_D 9738 1614536U, // SMIN_ZPmZ_H 9739 2106120U, // SMIN_ZPmZ_S 9740 49673U, // SMINv16i8 9741 57865U, // SMINv2i32 9742 66058U, // SMINv4i16 9743 25095U, // SMINv4i32 9744 33287U, // SMINv8i16 9745 74250U, // SMINv8i8 9746 1704069U, // SMLALB_ZZZI_D 9747 1704389U, // SMLALB_ZZZI_S 9748 133U, // SMLALB_ZZZ_D 9749 0U, // SMLALB_ZZZ_H 9750 453U, // SMLALB_ZZZ_S 9751 1704069U, // SMLALT_ZZZI_D 9752 1704389U, // SMLALT_ZZZI_S 9753 133U, // SMLALT_ZZZ_D 9754 0U, // SMLALT_ZZZ_H 9755 453U, // SMLALT_ZZZ_S 9756 49737U, // SMLALv16i8_v8i16 9757 9151049U, // SMLALv2i32_indexed 9758 57929U, // SMLALv2i32_v2i64 9759 9142858U, // SMLALv4i16_indexed 9760 66122U, // SMLALv4i16_v4i32 9761 9151047U, // SMLALv4i32_indexed 9762 25159U, // SMLALv4i32_v2i64 9763 9142855U, // SMLALv8i16_indexed 9764 33351U, // SMLALv8i16_v4i32 9765 74314U, // SMLALv8i8_v8i16 9766 1704069U, // SMLSLB_ZZZI_D 9767 1704389U, // SMLSLB_ZZZI_S 9768 133U, // SMLSLB_ZZZ_D 9769 0U, // SMLSLB_ZZZ_H 9770 453U, // SMLSLB_ZZZ_S 9771 1704069U, // SMLSLT_ZZZI_D 9772 1704389U, // SMLSLT_ZZZI_S 9773 133U, // SMLSLT_ZZZ_D 9774 0U, // SMLSLT_ZZZ_H 9775 453U, // SMLSLT_ZZZ_S 9776 49737U, // SMLSLv16i8_v8i16 9777 9151049U, // SMLSLv2i32_indexed 9778 57929U, // SMLSLv2i32_v2i64 9779 9142858U, // SMLSLv4i16_indexed 9780 66122U, // SMLSLv4i16_v4i32 9781 9151047U, // SMLSLv4i32_indexed 9782 25159U, // SMLSLv4i32_v2i64 9783 9142855U, // SMLSLv8i16_indexed 9784 33351U, // SMLSLv8i16_v4i32 9785 74314U, // SMLSLv8i8_v8i16 9786 2709U, // SMOVvi16to32 9787 2709U, // SMOVvi16to64 9788 2709U, // SMOVvi32to64 9789 2710U, // SMOVvi8to32 9790 2710U, // SMOVvi8to64 9791 8389U, // SMSUBLrrr 9792 533128U, // SMULH_ZPmZ_B 9793 1057160U, // SMULH_ZPmZ_D 9794 1614536U, // SMULH_ZPmZ_H 9795 2106120U, // SMULH_ZPmZ_S 9796 645U, // SMULH_ZZZ_B 9797 389U, // SMULH_ZZZ_D 9798 8U, // SMULH_ZZZ_H 9799 773U, // SMULH_ZZZ_S 9800 197U, // SMULHrr 9801 271109U, // SMULLB_ZZZI_D 9802 270661U, // SMULLB_ZZZI_S 9803 773U, // SMULLB_ZZZ_D 9804 30U, // SMULLB_ZZZ_H 9805 325U, // SMULLB_ZZZ_S 9806 271109U, // SMULLT_ZZZI_D 9807 270661U, // SMULLT_ZZZI_S 9808 773U, // SMULLT_ZZZ_D 9809 30U, // SMULLT_ZZZ_H 9810 325U, // SMULLT_ZZZ_S 9811 49673U, // SMULLv16i8_v8i16 9812 10199561U, // SMULLv2i32_indexed 9813 57865U, // SMULLv2i32_v2i64 9814 10191370U, // SMULLv4i16_indexed 9815 66058U, // SMULLv4i16_v4i32 9816 10199559U, // SMULLv4i32_indexed 9817 25095U, // SMULLv4i32_v2i64 9818 10191367U, // SMULLv8i16_indexed 9819 33287U, // SMULLv8i16_v4i32 9820 74250U, // SMULLv8i8_v8i16 9821 0U, // SPACE 9822 5317U, // SPLICE_ZPZZ_B 9823 5381U, // SPLICE_ZPZZ_D 9824 47U, // SPLICE_ZPZZ_H 9825 5445U, // SPLICE_ZPZZ_S 9826 533125U, // SPLICE_ZPZ_B 9827 1057157U, // SPLICE_ZPZ_D 9828 1614536U, // SPLICE_ZPZ_H 9829 2106117U, // SPLICE_ZPZ_S 9830 0U, // SQABS_ZPmZ_B 9831 0U, // SQABS_ZPmZ_D 9832 0U, // SQABS_ZPmZ_H 9833 1U, // SQABS_ZPmZ_S 9834 1U, // SQABSv16i8 9835 2U, // SQABSv1i16 9836 2U, // SQABSv1i32 9837 2U, // SQABSv1i64 9838 2U, // SQABSv1i8 9839 2U, // SQABSv2i32 9840 3U, // SQABSv2i64 9841 3U, // SQABSv4i16 9842 4U, // SQABSv4i32 9843 4U, // SQABSv8i16 9844 5U, // SQABSv8i8 9845 1029U, // SQADD_ZI_B 9846 1093U, // SQADD_ZI_D 9847 11U, // SQADD_ZI_H 9848 1157U, // SQADD_ZI_S 9849 533128U, // SQADD_ZPmZ_B 9850 1057160U, // SQADD_ZPmZ_D 9851 1614536U, // SQADD_ZPmZ_H 9852 2106120U, // SQADD_ZPmZ_S 9853 645U, // SQADD_ZZZ_B 9854 389U, // SQADD_ZZZ_D 9855 8U, // SQADD_ZZZ_H 9856 773U, // SQADD_ZZZ_S 9857 49673U, // SQADDv16i8 9858 197U, // SQADDv1i16 9859 197U, // SQADDv1i32 9860 197U, // SQADDv1i64 9861 197U, // SQADDv1i8 9862 57865U, // SQADDv2i32 9863 16902U, // SQADDv2i64 9864 66058U, // SQADDv4i16 9865 25095U, // SQADDv4i32 9866 33287U, // SQADDv8i16 9867 74250U, // SQADDv8i8 9868 3678853U, // SQCADD_ZZI_B 9869 3678597U, // SQCADD_ZZI_D 9870 115400U, // SQCADD_ZZI_H 9871 3678981U, // SQCADD_ZZI_S 9872 0U, // SQDECB_XPiI 9873 0U, // SQDECB_XPiWdI 9874 0U, // SQDECD_XPiI 9875 0U, // SQDECD_XPiWdI 9876 0U, // SQDECD_ZPiI 9877 0U, // SQDECH_XPiI 9878 0U, // SQDECH_XPiWdI 9879 0U, // SQDECH_ZPiI 9880 5509U, // SQDECP_XPWd_B 9881 5509U, // SQDECP_XPWd_D 9882 5509U, // SQDECP_XPWd_H 9883 5509U, // SQDECP_XPWd_S 9884 2U, // SQDECP_XP_B 9885 2U, // SQDECP_XP_D 9886 2U, // SQDECP_XP_H 9887 2U, // SQDECP_XP_S 9888 2U, // SQDECP_ZP_D 9889 0U, // SQDECP_ZP_H 9890 2U, // SQDECP_ZP_S 9891 0U, // SQDECW_XPiI 9892 0U, // SQDECW_XPiWdI 9893 0U, // SQDECW_ZPiI 9894 133U, // SQDMLALBT_ZZZ_D 9895 0U, // SQDMLALBT_ZZZ_H 9896 453U, // SQDMLALBT_ZZZ_S 9897 1704069U, // SQDMLALB_ZZZI_D 9898 1704389U, // SQDMLALB_ZZZI_S 9899 133U, // SQDMLALB_ZZZ_D 9900 0U, // SQDMLALB_ZZZ_H 9901 453U, // SQDMLALB_ZZZ_S 9902 1704069U, // SQDMLALT_ZZZI_D 9903 1704389U, // SQDMLALT_ZZZI_S 9904 133U, // SQDMLALT_ZZZ_D 9905 0U, // SQDMLALT_ZZZ_H 9906 453U, // SQDMLALT_ZZZ_S 9907 2373U, // SQDMLALi16 9908 2373U, // SQDMLALi32 9909 9142853U, // SQDMLALv1i32_indexed 9910 9151045U, // SQDMLALv1i64_indexed 9911 9151049U, // SQDMLALv2i32_indexed 9912 57929U, // SQDMLALv2i32_v2i64 9913 9142858U, // SQDMLALv4i16_indexed 9914 66122U, // SQDMLALv4i16_v4i32 9915 9151047U, // SQDMLALv4i32_indexed 9916 25159U, // SQDMLALv4i32_v2i64 9917 9142855U, // SQDMLALv8i16_indexed 9918 33351U, // SQDMLALv8i16_v4i32 9919 133U, // SQDMLSLBT_ZZZ_D 9920 0U, // SQDMLSLBT_ZZZ_H 9921 453U, // SQDMLSLBT_ZZZ_S 9922 1704069U, // SQDMLSLB_ZZZI_D 9923 1704389U, // SQDMLSLB_ZZZI_S 9924 133U, // SQDMLSLB_ZZZ_D 9925 0U, // SQDMLSLB_ZZZ_H 9926 453U, // SQDMLSLB_ZZZ_S 9927 1704069U, // SQDMLSLT_ZZZI_D 9928 1704389U, // SQDMLSLT_ZZZI_S 9929 133U, // SQDMLSLT_ZZZ_D 9930 0U, // SQDMLSLT_ZZZ_H 9931 453U, // SQDMLSLT_ZZZ_S 9932 2373U, // SQDMLSLi16 9933 2373U, // SQDMLSLi32 9934 9142853U, // SQDMLSLv1i32_indexed 9935 9151045U, // SQDMLSLv1i64_indexed 9936 9151049U, // SQDMLSLv2i32_indexed 9937 57929U, // SQDMLSLv2i32_v2i64 9938 9142858U, // SQDMLSLv4i16_indexed 9939 66122U, // SQDMLSLv4i16_v4i32 9940 9151047U, // SQDMLSLv4i32_indexed 9941 25159U, // SQDMLSLv4i32_v2i64 9942 9142855U, // SQDMLSLv8i16_indexed 9943 33351U, // SQDMLSLv8i16_v4i32 9944 270725U, // SQDMULH_ZZZI_D 9945 2952U, // SQDMULH_ZZZI_H 9946 271109U, // SQDMULH_ZZZI_S 9947 645U, // SQDMULH_ZZZ_B 9948 389U, // SQDMULH_ZZZ_D 9949 8U, // SQDMULH_ZZZ_H 9950 773U, // SQDMULH_ZZZ_S 9951 197U, // SQDMULHv1i16 9952 10191365U, // SQDMULHv1i16_indexed 9953 197U, // SQDMULHv1i32 9954 10199557U, // SQDMULHv1i32_indexed 9955 57865U, // SQDMULHv2i32 9956 10199561U, // SQDMULHv2i32_indexed 9957 66058U, // SQDMULHv4i16 9958 10191370U, // SQDMULHv4i16_indexed 9959 25095U, // SQDMULHv4i32 9960 10199559U, // SQDMULHv4i32_indexed 9961 33287U, // SQDMULHv8i16 9962 10191367U, // SQDMULHv8i16_indexed 9963 271109U, // SQDMULLB_ZZZI_D 9964 270661U, // SQDMULLB_ZZZI_S 9965 773U, // SQDMULLB_ZZZ_D 9966 30U, // SQDMULLB_ZZZ_H 9967 325U, // SQDMULLB_ZZZ_S 9968 271109U, // SQDMULLT_ZZZI_D 9969 270661U, // SQDMULLT_ZZZI_S 9970 773U, // SQDMULLT_ZZZ_D 9971 30U, // SQDMULLT_ZZZ_H 9972 325U, // SQDMULLT_ZZZ_S 9973 197U, // SQDMULLi16 9974 197U, // SQDMULLi32 9975 10191365U, // SQDMULLv1i32_indexed 9976 10199557U, // SQDMULLv1i64_indexed 9977 10199561U, // SQDMULLv2i32_indexed 9978 57865U, // SQDMULLv2i32_v2i64 9979 10191370U, // SQDMULLv4i16_indexed 9980 66058U, // SQDMULLv4i16_v4i32 9981 10199559U, // SQDMULLv4i32_indexed 9982 25095U, // SQDMULLv4i32_v2i64 9983 10191367U, // SQDMULLv8i16_indexed 9984 33287U, // SQDMULLv8i16_v4i32 9985 0U, // SQINCB_XPiI 9986 0U, // SQINCB_XPiWdI 9987 0U, // SQINCD_XPiI 9988 0U, // SQINCD_XPiWdI 9989 0U, // SQINCD_ZPiI 9990 0U, // SQINCH_XPiI 9991 0U, // SQINCH_XPiWdI 9992 0U, // SQINCH_ZPiI 9993 5509U, // SQINCP_XPWd_B 9994 5509U, // SQINCP_XPWd_D 9995 5509U, // SQINCP_XPWd_H 9996 5509U, // SQINCP_XPWd_S 9997 2U, // SQINCP_XP_B 9998 2U, // SQINCP_XP_D 9999 2U, // SQINCP_XP_H 10000 2U, // SQINCP_XP_S 10001 2U, // SQINCP_ZP_D 10002 0U, // SQINCP_ZP_H 10003 2U, // SQINCP_ZP_S 10004 0U, // SQINCW_XPiI 10005 0U, // SQINCW_XPiWdI 10006 0U, // SQINCW_ZPiI 10007 0U, // SQNEG_ZPmZ_B 10008 0U, // SQNEG_ZPmZ_D 10009 0U, // SQNEG_ZPmZ_H 10010 1U, // SQNEG_ZPmZ_S 10011 1U, // SQNEGv16i8 10012 2U, // SQNEGv1i16 10013 2U, // SQNEGv1i32 10014 2U, // SQNEGv1i64 10015 2U, // SQNEGv1i8 10016 2U, // SQNEGv2i32 10017 3U, // SQNEGv2i64 10018 3U, // SQNEGv4i16 10019 4U, // SQNEGv4i32 10020 4U, // SQNEGv8i16 10021 5U, // SQNEGv8i8 10022 5253521U, // SQRDCMLAH_ZZZI_H 10023 71958661U, // SQRDCMLAH_ZZZI_S 10024 139968U, // SQRDCMLAH_ZZZ_B 10025 5775429U, // SQRDCMLAH_ZZZ_D 10026 139985U, // SQRDCMLAH_ZZZ_H 10027 5775493U, // SQRDCMLAH_ZZZ_S 10028 1704005U, // SQRDMLAH_ZZZI_D 10029 2449U, // SQRDMLAH_ZZZI_H 10030 1704069U, // SQRDMLAH_ZZZI_S 10031 0U, // SQRDMLAH_ZZZ_B 10032 69U, // SQRDMLAH_ZZZ_D 10033 17U, // SQRDMLAH_ZZZ_H 10034 133U, // SQRDMLAH_ZZZ_S 10035 9142853U, // SQRDMLAHi16_indexed 10036 9151045U, // SQRDMLAHi32_indexed 10037 2373U, // SQRDMLAHv1i16 10038 2373U, // SQRDMLAHv1i32 10039 57929U, // SQRDMLAHv2i32 10040 9151049U, // SQRDMLAHv2i32_indexed 10041 66122U, // SQRDMLAHv4i16 10042 9142858U, // SQRDMLAHv4i16_indexed 10043 25159U, // SQRDMLAHv4i32 10044 9151047U, // SQRDMLAHv4i32_indexed 10045 33351U, // SQRDMLAHv8i16 10046 9142855U, // SQRDMLAHv8i16_indexed 10047 1704005U, // SQRDMLSH_ZZZI_D 10048 2449U, // SQRDMLSH_ZZZI_H 10049 1704069U, // SQRDMLSH_ZZZI_S 10050 0U, // SQRDMLSH_ZZZ_B 10051 69U, // SQRDMLSH_ZZZ_D 10052 17U, // SQRDMLSH_ZZZ_H 10053 133U, // SQRDMLSH_ZZZ_S 10054 9142853U, // SQRDMLSHi16_indexed 10055 9151045U, // SQRDMLSHi32_indexed 10056 2373U, // SQRDMLSHv1i16 10057 2373U, // SQRDMLSHv1i32 10058 57929U, // SQRDMLSHv2i32 10059 9151049U, // SQRDMLSHv2i32_indexed 10060 66122U, // SQRDMLSHv4i16 10061 9142858U, // SQRDMLSHv4i16_indexed 10062 25159U, // SQRDMLSHv4i32 10063 9151047U, // SQRDMLSHv4i32_indexed 10064 33351U, // SQRDMLSHv8i16 10065 9142855U, // SQRDMLSHv8i16_indexed 10066 270725U, // SQRDMULH_ZZZI_D 10067 2952U, // SQRDMULH_ZZZI_H 10068 271109U, // SQRDMULH_ZZZI_S 10069 645U, // SQRDMULH_ZZZ_B 10070 389U, // SQRDMULH_ZZZ_D 10071 8U, // SQRDMULH_ZZZ_H 10072 773U, // SQRDMULH_ZZZ_S 10073 197U, // SQRDMULHv1i16 10074 10191365U, // SQRDMULHv1i16_indexed 10075 197U, // SQRDMULHv1i32 10076 10199557U, // SQRDMULHv1i32_indexed 10077 57865U, // SQRDMULHv2i32 10078 10199561U, // SQRDMULHv2i32_indexed 10079 66058U, // SQRDMULHv4i16 10080 10191370U, // SQRDMULHv4i16_indexed 10081 25095U, // SQRDMULHv4i32 10082 10199559U, // SQRDMULHv4i32_indexed 10083 33287U, // SQRDMULHv8i16 10084 10191367U, // SQRDMULHv8i16_indexed 10085 533128U, // SQRSHLR_ZPmZ_B 10086 1057160U, // SQRSHLR_ZPmZ_D 10087 1614536U, // SQRSHLR_ZPmZ_H 10088 2106120U, // SQRSHLR_ZPmZ_S 10089 533128U, // SQRSHL_ZPmZ_B 10090 1057160U, // SQRSHL_ZPmZ_D 10091 1614536U, // SQRSHL_ZPmZ_H 10092 2106120U, // SQRSHL_ZPmZ_S 10093 49673U, // SQRSHLv16i8 10094 197U, // SQRSHLv1i16 10095 197U, // SQRSHLv1i32 10096 197U, // SQRSHLv1i64 10097 197U, // SQRSHLv1i8 10098 57865U, // SQRSHLv2i32 10099 16902U, // SQRSHLv2i64 10100 66058U, // SQRSHLv4i16 10101 25095U, // SQRSHLv4i32 10102 33287U, // SQRSHLv8i16 10103 74250U, // SQRSHLv8i8 10104 197U, // SQRSHRNB_ZZI_B 10105 12U, // SQRSHRNB_ZZI_H 10106 197U, // SQRSHRNB_ZZI_S 10107 2373U, // SQRSHRNT_ZZI_B 10108 20U, // SQRSHRNT_ZZI_H 10109 2373U, // SQRSHRNT_ZZI_S 10110 197U, // SQRSHRNb 10111 197U, // SQRSHRNh 10112 197U, // SQRSHRNs 10113 2375U, // SQRSHRNv16i8_shift 10114 198U, // SQRSHRNv2i32_shift 10115 199U, // SQRSHRNv4i16_shift 10116 2374U, // SQRSHRNv4i32_shift 10117 2375U, // SQRSHRNv8i16_shift 10118 199U, // SQRSHRNv8i8_shift 10119 197U, // SQRSHRUNB_ZZI_B 10120 12U, // SQRSHRUNB_ZZI_H 10121 197U, // SQRSHRUNB_ZZI_S 10122 2373U, // SQRSHRUNT_ZZI_B 10123 20U, // SQRSHRUNT_ZZI_H 10124 2373U, // SQRSHRUNT_ZZI_S 10125 197U, // SQRSHRUNb 10126 197U, // SQRSHRUNh 10127 197U, // SQRSHRUNs 10128 2375U, // SQRSHRUNv16i8_shift 10129 198U, // SQRSHRUNv2i32_shift 10130 199U, // SQRSHRUNv4i16_shift 10131 2374U, // SQRSHRUNv4i32_shift 10132 2375U, // SQRSHRUNv8i16_shift 10133 199U, // SQRSHRUNv8i8_shift 10134 533128U, // SQSHLR_ZPmZ_B 10135 1057160U, // SQSHLR_ZPmZ_D 10136 1614536U, // SQSHLR_ZPmZ_H 10137 2106120U, // SQSHLR_ZPmZ_S 10138 8840U, // SQSHLU_ZPmI_B 10139 8584U, // SQSHLU_ZPmI_D 10140 90824U, // SQSHLU_ZPmI_H 10141 8968U, // SQSHLU_ZPmI_S 10142 197U, // SQSHLUb 10143 197U, // SQSHLUd 10144 197U, // SQSHLUh 10145 197U, // SQSHLUs 10146 201U, // SQSHLUv16i8_shift 10147 201U, // SQSHLUv2i32_shift 10148 198U, // SQSHLUv2i64_shift 10149 202U, // SQSHLUv4i16_shift 10150 199U, // SQSHLUv4i32_shift 10151 199U, // SQSHLUv8i16_shift 10152 202U, // SQSHLUv8i8_shift 10153 8840U, // SQSHL_ZPmI_B 10154 8584U, // SQSHL_ZPmI_D 10155 90824U, // SQSHL_ZPmI_H 10156 8968U, // SQSHL_ZPmI_S 10157 533128U, // SQSHL_ZPmZ_B 10158 1057160U, // SQSHL_ZPmZ_D 10159 1614536U, // SQSHL_ZPmZ_H 10160 2106120U, // SQSHL_ZPmZ_S 10161 197U, // SQSHLb 10162 197U, // SQSHLd 10163 197U, // SQSHLh 10164 197U, // SQSHLs 10165 49673U, // SQSHLv16i8 10166 201U, // SQSHLv16i8_shift 10167 197U, // SQSHLv1i16 10168 197U, // SQSHLv1i32 10169 197U, // SQSHLv1i64 10170 197U, // SQSHLv1i8 10171 57865U, // SQSHLv2i32 10172 201U, // SQSHLv2i32_shift 10173 16902U, // SQSHLv2i64 10174 198U, // SQSHLv2i64_shift 10175 66058U, // SQSHLv4i16 10176 202U, // SQSHLv4i16_shift 10177 25095U, // SQSHLv4i32 10178 199U, // SQSHLv4i32_shift 10179 33287U, // SQSHLv8i16 10180 199U, // SQSHLv8i16_shift 10181 74250U, // SQSHLv8i8 10182 202U, // SQSHLv8i8_shift 10183 197U, // SQSHRNB_ZZI_B 10184 12U, // SQSHRNB_ZZI_H 10185 197U, // SQSHRNB_ZZI_S 10186 2373U, // SQSHRNT_ZZI_B 10187 20U, // SQSHRNT_ZZI_H 10188 2373U, // SQSHRNT_ZZI_S 10189 197U, // SQSHRNb 10190 197U, // SQSHRNh 10191 197U, // SQSHRNs 10192 2375U, // SQSHRNv16i8_shift 10193 198U, // SQSHRNv2i32_shift 10194 199U, // SQSHRNv4i16_shift 10195 2374U, // SQSHRNv4i32_shift 10196 2375U, // SQSHRNv8i16_shift 10197 199U, // SQSHRNv8i8_shift 10198 197U, // SQSHRUNB_ZZI_B 10199 12U, // SQSHRUNB_ZZI_H 10200 197U, // SQSHRUNB_ZZI_S 10201 2373U, // SQSHRUNT_ZZI_B 10202 20U, // SQSHRUNT_ZZI_H 10203 2373U, // SQSHRUNT_ZZI_S 10204 197U, // SQSHRUNb 10205 197U, // SQSHRUNh 10206 197U, // SQSHRUNs 10207 2375U, // SQSHRUNv16i8_shift 10208 198U, // SQSHRUNv2i32_shift 10209 199U, // SQSHRUNv4i16_shift 10210 2374U, // SQSHRUNv4i32_shift 10211 2375U, // SQSHRUNv8i16_shift 10212 199U, // SQSHRUNv8i8_shift 10213 533128U, // SQSUBR_ZPmZ_B 10214 1057160U, // SQSUBR_ZPmZ_D 10215 1614536U, // SQSUBR_ZPmZ_H 10216 2106120U, // SQSUBR_ZPmZ_S 10217 1029U, // SQSUB_ZI_B 10218 1093U, // SQSUB_ZI_D 10219 11U, // SQSUB_ZI_H 10220 1157U, // SQSUB_ZI_S 10221 533128U, // SQSUB_ZPmZ_B 10222 1057160U, // SQSUB_ZPmZ_D 10223 1614536U, // SQSUB_ZPmZ_H 10224 2106120U, // SQSUB_ZPmZ_S 10225 645U, // SQSUB_ZZZ_B 10226 389U, // SQSUB_ZZZ_D 10227 8U, // SQSUB_ZZZ_H 10228 773U, // SQSUB_ZZZ_S 10229 49673U, // SQSUBv16i8 10230 197U, // SQSUBv1i16 10231 197U, // SQSUBv1i32 10232 197U, // SQSUBv1i64 10233 197U, // SQSUBv1i8 10234 57865U, // SQSUBv2i32 10235 16902U, // SQSUBv2i64 10236 66058U, // SQSUBv4i16 10237 25095U, // SQSUBv4i32 10238 33287U, // SQSUBv8i16 10239 74250U, // SQSUBv8i8 10240 2U, // SQXTNB_ZZ_B 10241 0U, // SQXTNB_ZZ_H 10242 2U, // SQXTNB_ZZ_S 10243 2U, // SQXTNT_ZZ_B 10244 0U, // SQXTNT_ZZ_H 10245 2U, // SQXTNT_ZZ_S 10246 4U, // SQXTNv16i8 10247 2U, // SQXTNv1i16 10248 2U, // SQXTNv1i32 10249 2U, // SQXTNv1i8 10250 3U, // SQXTNv2i32 10251 4U, // SQXTNv4i16 10252 3U, // SQXTNv4i32 10253 4U, // SQXTNv8i16 10254 4U, // SQXTNv8i8 10255 2U, // SQXTUNB_ZZ_B 10256 0U, // SQXTUNB_ZZ_H 10257 2U, // SQXTUNB_ZZ_S 10258 2U, // SQXTUNT_ZZ_B 10259 0U, // SQXTUNT_ZZ_H 10260 2U, // SQXTUNT_ZZ_S 10261 4U, // SQXTUNv16i8 10262 2U, // SQXTUNv1i16 10263 2U, // SQXTUNv1i32 10264 2U, // SQXTUNv1i8 10265 3U, // SQXTUNv2i32 10266 4U, // SQXTUNv4i16 10267 3U, // SQXTUNv4i32 10268 4U, // SQXTUNv8i16 10269 4U, // SQXTUNv8i8 10270 533128U, // SRHADD_ZPmZ_B 10271 1057160U, // SRHADD_ZPmZ_D 10272 1614536U, // SRHADD_ZPmZ_H 10273 2106120U, // SRHADD_ZPmZ_S 10274 49673U, // SRHADDv16i8 10275 57865U, // SRHADDv2i32 10276 66058U, // SRHADDv4i16 10277 25095U, // SRHADDv4i32 10278 33287U, // SRHADDv8i16 10279 74250U, // SRHADDv8i8 10280 20U, // SRI_ZZI_B 10281 2373U, // SRI_ZZI_D 10282 20U, // SRI_ZZI_H 10283 2373U, // SRI_ZZI_S 10284 2373U, // SRId 10285 2377U, // SRIv16i8_shift 10286 2377U, // SRIv2i32_shift 10287 2374U, // SRIv2i64_shift 10288 2378U, // SRIv4i16_shift 10289 2375U, // SRIv4i32_shift 10290 2375U, // SRIv8i16_shift 10291 2378U, // SRIv8i8_shift 10292 533128U, // SRSHLR_ZPmZ_B 10293 1057160U, // SRSHLR_ZPmZ_D 10294 1614536U, // SRSHLR_ZPmZ_H 10295 2106120U, // SRSHLR_ZPmZ_S 10296 533128U, // SRSHL_ZPmZ_B 10297 1057160U, // SRSHL_ZPmZ_D 10298 1614536U, // SRSHL_ZPmZ_H 10299 2106120U, // SRSHL_ZPmZ_S 10300 49673U, // SRSHLv16i8 10301 197U, // SRSHLv1i64 10302 57865U, // SRSHLv2i32 10303 16902U, // SRSHLv2i64 10304 66058U, // SRSHLv4i16 10305 25095U, // SRSHLv4i32 10306 33287U, // SRSHLv8i16 10307 74250U, // SRSHLv8i8 10308 8840U, // SRSHR_ZPmI_B 10309 8584U, // SRSHR_ZPmI_D 10310 90824U, // SRSHR_ZPmI_H 10311 8968U, // SRSHR_ZPmI_S 10312 197U, // SRSHRd 10313 201U, // SRSHRv16i8_shift 10314 201U, // SRSHRv2i32_shift 10315 198U, // SRSHRv2i64_shift 10316 202U, // SRSHRv4i16_shift 10317 199U, // SRSHRv4i32_shift 10318 199U, // SRSHRv8i16_shift 10319 202U, // SRSHRv8i8_shift 10320 20U, // SRSRA_ZZI_B 10321 2373U, // SRSRA_ZZI_D 10322 20U, // SRSRA_ZZI_H 10323 2373U, // SRSRA_ZZI_S 10324 2373U, // SRSRAd 10325 2377U, // SRSRAv16i8_shift 10326 2377U, // SRSRAv2i32_shift 10327 2374U, // SRSRAv2i64_shift 10328 2378U, // SRSRAv4i16_shift 10329 2375U, // SRSRAv4i32_shift 10330 2375U, // SRSRAv8i16_shift 10331 2378U, // SRSRAv8i8_shift 10332 197U, // SSHLLB_ZZI_D 10333 12U, // SSHLLB_ZZI_H 10334 197U, // SSHLLB_ZZI_S 10335 197U, // SSHLLT_ZZI_D 10336 12U, // SSHLLT_ZZI_H 10337 197U, // SSHLLT_ZZI_S 10338 201U, // SSHLLv16i8_shift 10339 201U, // SSHLLv2i32_shift 10340 202U, // SSHLLv4i16_shift 10341 199U, // SSHLLv4i32_shift 10342 199U, // SSHLLv8i16_shift 10343 202U, // SSHLLv8i8_shift 10344 49673U, // SSHLv16i8 10345 197U, // SSHLv1i64 10346 57865U, // SSHLv2i32 10347 16902U, // SSHLv2i64 10348 66058U, // SSHLv4i16 10349 25095U, // SSHLv4i32 10350 33287U, // SSHLv8i16 10351 74250U, // SSHLv8i8 10352 197U, // SSHRd 10353 201U, // SSHRv16i8_shift 10354 201U, // SSHRv2i32_shift 10355 198U, // SSHRv2i64_shift 10356 202U, // SSHRv4i16_shift 10357 199U, // SSHRv4i32_shift 10358 199U, // SSHRv8i16_shift 10359 202U, // SSHRv8i8_shift 10360 20U, // SSRA_ZZI_B 10361 2373U, // SSRA_ZZI_D 10362 20U, // SSRA_ZZI_H 10363 2373U, // SSRA_ZZI_S 10364 2373U, // SSRAd 10365 2377U, // SSRAv16i8_shift 10366 2377U, // SSRAv2i32_shift 10367 2374U, // SSRAv2i64_shift 10368 2378U, // SSRAv4i16_shift 10369 2375U, // SSRAv4i32_shift 10370 2375U, // SSRAv8i16_shift 10371 2378U, // SSRAv8i8_shift 10372 125253U, // SST1B_D_IMM 10373 3013U, // SST1B_D_REAL 10374 3077U, // SST1B_D_SXTW 10375 3141U, // SST1B_D_UXTW 10376 125253U, // SST1B_S_IMM 10377 3205U, // SST1B_S_SXTW 10378 3269U, // SST1B_S_UXTW 10379 126213U, // SST1D_IMM 10380 3013U, // SST1D_REAL 10381 3397U, // SST1D_SCALED_SCALED_REAL 10382 3077U, // SST1D_SXTW 10383 3461U, // SST1D_SXTW_SCALED 10384 3141U, // SST1D_UXTW 10385 3525U, // SST1D_UXTW_SCALED 10386 126469U, // SST1H_D_IMM 10387 3013U, // SST1H_D_REAL 10388 3653U, // SST1H_D_SCALED_SCALED_REAL 10389 3077U, // SST1H_D_SXTW 10390 3717U, // SST1H_D_SXTW_SCALED 10391 3141U, // SST1H_D_UXTW 10392 3781U, // SST1H_D_UXTW_SCALED 10393 126469U, // SST1H_S_IMM 10394 3205U, // SST1H_S_SXTW 10395 3845U, // SST1H_S_SXTW_SCALED 10396 3269U, // SST1H_S_UXTW 10397 3909U, // SST1H_S_UXTW_SCALED 10398 126853U, // SST1W_D_IMM 10399 3013U, // SST1W_D_REAL 10400 4037U, // SST1W_D_SCALED_SCALED_REAL 10401 3077U, // SST1W_D_SXTW 10402 4101U, // SST1W_D_SXTW_SCALED 10403 3141U, // SST1W_D_UXTW 10404 4165U, // SST1W_D_UXTW_SCALED 10405 126853U, // SST1W_IMM 10406 3205U, // SST1W_SXTW 10407 4229U, // SST1W_SXTW_SCALED 10408 3269U, // SST1W_UXTW 10409 4293U, // SST1W_UXTW_SCALED 10410 773U, // SSUBLBT_ZZZ_D 10411 30U, // SSUBLBT_ZZZ_H 10412 325U, // SSUBLBT_ZZZ_S 10413 773U, // SSUBLB_ZZZ_D 10414 30U, // SSUBLB_ZZZ_H 10415 325U, // SSUBLB_ZZZ_S 10416 773U, // SSUBLTB_ZZZ_D 10417 30U, // SSUBLTB_ZZZ_H 10418 325U, // SSUBLTB_ZZZ_S 10419 773U, // SSUBLT_ZZZ_D 10420 30U, // SSUBLT_ZZZ_H 10421 325U, // SSUBLT_ZZZ_S 10422 49673U, // SSUBLv16i8_v8i16 10423 57865U, // SSUBLv2i32_v2i64 10424 66058U, // SSUBLv4i16_v4i32 10425 25095U, // SSUBLv4i32_v2i64 10426 33287U, // SSUBLv8i16_v4i32 10427 74250U, // SSUBLv8i8_v8i16 10428 773U, // SSUBWB_ZZZ_D 10429 30U, // SSUBWB_ZZZ_H 10430 325U, // SSUBWB_ZZZ_S 10431 773U, // SSUBWT_ZZZ_D 10432 30U, // SSUBWT_ZZZ_H 10433 325U, // SSUBWT_ZZZ_S 10434 49671U, // SSUBWv16i8_v8i16 10435 57862U, // SSUBWv2i32_v2i64 10436 66055U, // SSUBWv4i16_v4i32 10437 25094U, // SSUBWv4i32_v2i64 10438 33287U, // SSUBWv8i16_v4i32 10439 74247U, // SSUBWv8i8_v8i16 10440 4357U, // ST1B 10441 4357U, // ST1B_D 10442 280901U, // ST1B_D_IMM 10443 4357U, // ST1B_H 10444 280901U, // ST1B_H_IMM 10445 280901U, // ST1B_IMM 10446 4357U, // ST1B_S 10447 280901U, // ST1B_S_IMM 10448 4421U, // ST1D 10449 280901U, // ST1D_IMM 10450 0U, // ST1Fourv16b 10451 0U, // ST1Fourv16b_POST 10452 0U, // ST1Fourv1d 10453 0U, // ST1Fourv1d_POST 10454 0U, // ST1Fourv2d 10455 0U, // ST1Fourv2d_POST 10456 0U, // ST1Fourv2s 10457 0U, // ST1Fourv2s_POST 10458 0U, // ST1Fourv4h 10459 0U, // ST1Fourv4h_POST 10460 0U, // ST1Fourv4s 10461 0U, // ST1Fourv4s_POST 10462 0U, // ST1Fourv8b 10463 0U, // ST1Fourv8b_POST 10464 0U, // ST1Fourv8h 10465 0U, // ST1Fourv8h_POST 10466 4485U, // ST1H 10467 4485U, // ST1H_D 10468 280901U, // ST1H_D_IMM 10469 280901U, // ST1H_IMM 10470 4485U, // ST1H_S 10471 280901U, // ST1H_S_IMM 10472 0U, // ST1Onev16b 10473 0U, // ST1Onev16b_POST 10474 0U, // ST1Onev1d 10475 0U, // ST1Onev1d_POST 10476 0U, // ST1Onev2d 10477 0U, // ST1Onev2d_POST 10478 0U, // ST1Onev2s 10479 0U, // ST1Onev2s_POST 10480 0U, // ST1Onev4h 10481 0U, // ST1Onev4h_POST 10482 0U, // ST1Onev4s 10483 0U, // ST1Onev4s_POST 10484 0U, // ST1Onev8b 10485 0U, // ST1Onev8b_POST 10486 0U, // ST1Onev8h 10487 0U, // ST1Onev8h_POST 10488 0U, // ST1Threev16b 10489 0U, // ST1Threev16b_POST 10490 0U, // ST1Threev1d 10491 0U, // ST1Threev1d_POST 10492 0U, // ST1Threev2d 10493 0U, // ST1Threev2d_POST 10494 0U, // ST1Threev2s 10495 0U, // ST1Threev2s_POST 10496 0U, // ST1Threev4h 10497 0U, // ST1Threev4h_POST 10498 0U, // ST1Threev4s 10499 0U, // ST1Threev4s_POST 10500 0U, // ST1Threev8b 10501 0U, // ST1Threev8b_POST 10502 0U, // ST1Threev8h 10503 0U, // ST1Threev8h_POST 10504 0U, // ST1Twov16b 10505 0U, // ST1Twov16b_POST 10506 0U, // ST1Twov1d 10507 0U, // ST1Twov1d_POST 10508 0U, // ST1Twov2d 10509 0U, // ST1Twov2d_POST 10510 0U, // ST1Twov2s 10511 0U, // ST1Twov2s_POST 10512 0U, // ST1Twov4h 10513 0U, // ST1Twov4h_POST 10514 0U, // ST1Twov4s 10515 0U, // ST1Twov4s_POST 10516 0U, // ST1Twov8b 10517 0U, // ST1Twov8b_POST 10518 0U, // ST1Twov8h 10519 0U, // ST1Twov8h_POST 10520 4613U, // ST1W 10521 4613U, // ST1W_D 10522 280901U, // ST1W_D_IMM 10523 280901U, // ST1W_IMM 10524 0U, // ST1i16 10525 0U, // ST1i16_POST 10526 0U, // ST1i32 10527 0U, // ST1i32_POST 10528 0U, // ST1i64 10529 0U, // ST1i64_POST 10530 0U, // ST1i8 10531 0U, // ST1i8_POST 10532 4357U, // ST2B 10533 282117U, // ST2B_IMM 10534 4421U, // ST2D 10535 282117U, // ST2D_IMM 10536 123141U, // ST2GOffset 10537 4573U, // ST2GPostIndex 10538 299461U, // ST2GPreIndex 10539 4485U, // ST2H 10540 282117U, // ST2H_IMM 10541 0U, // ST2Twov16b 10542 0U, // ST2Twov16b_POST 10543 0U, // ST2Twov2d 10544 0U, // ST2Twov2d_POST 10545 0U, // ST2Twov2s 10546 0U, // ST2Twov2s_POST 10547 0U, // ST2Twov4h 10548 0U, // ST2Twov4h_POST 10549 0U, // ST2Twov4s 10550 0U, // ST2Twov4s_POST 10551 0U, // ST2Twov8b 10552 0U, // ST2Twov8b_POST 10553 0U, // ST2Twov8h 10554 0U, // ST2Twov8h_POST 10555 4613U, // ST2W 10556 282117U, // ST2W_IMM 10557 0U, // ST2i16 10558 0U, // ST2i16_POST 10559 0U, // ST2i32 10560 0U, // ST2i32_POST 10561 0U, // ST2i64 10562 0U, // ST2i64_POST 10563 0U, // ST2i8 10564 0U, // ST2i8_POST 10565 4357U, // ST3B 10566 4677U, // ST3B_IMM 10567 4421U, // ST3D 10568 4677U, // ST3D_IMM 10569 4485U, // ST3H 10570 4677U, // ST3H_IMM 10571 0U, // ST3Threev16b 10572 0U, // ST3Threev16b_POST 10573 0U, // ST3Threev2d 10574 0U, // ST3Threev2d_POST 10575 0U, // ST3Threev2s 10576 0U, // ST3Threev2s_POST 10577 0U, // ST3Threev4h 10578 0U, // ST3Threev4h_POST 10579 0U, // ST3Threev4s 10580 0U, // ST3Threev4s_POST 10581 0U, // ST3Threev8b 10582 0U, // ST3Threev8b_POST 10583 0U, // ST3Threev8h 10584 0U, // ST3Threev8h_POST 10585 4613U, // ST3W 10586 4677U, // ST3W_IMM 10587 0U, // ST3i16 10588 0U, // ST3i16_POST 10589 0U, // ST3i32 10590 0U, // ST3i32_POST 10591 0U, // ST3i64 10592 0U, // ST3i64_POST 10593 0U, // ST3i8 10594 0U, // ST3i8_POST 10595 4357U, // ST4B 10596 282501U, // ST4B_IMM 10597 4421U, // ST4D 10598 282501U, // ST4D_IMM 10599 0U, // ST4Fourv16b 10600 0U, // ST4Fourv16b_POST 10601 0U, // ST4Fourv2d 10602 0U, // ST4Fourv2d_POST 10603 0U, // ST4Fourv2s 10604 0U, // ST4Fourv2s_POST 10605 0U, // ST4Fourv4h 10606 0U, // ST4Fourv4h_POST 10607 0U, // ST4Fourv4s 10608 0U, // ST4Fourv4s_POST 10609 0U, // ST4Fourv8b 10610 0U, // ST4Fourv8b_POST 10611 0U, // ST4Fourv8h 10612 0U, // ST4Fourv8h_POST 10613 4485U, // ST4H 10614 282501U, // ST4H_IMM 10615 4613U, // ST4W 10616 282501U, // ST4W_IMM 10617 0U, // ST4i16 10618 0U, // ST4i16_POST 10619 0U, // ST4i32 10620 0U, // ST4i32_POST 10621 0U, // ST4i64 10622 0U, // ST4i64_POST 10623 0U, // ST4i8 10624 0U, // ST4i8_POST 10625 28U, // STGM 10626 123141U, // STGOffset 10627 11542733U, // STGPi 10628 4573U, // STGPostIndex 10629 13396301U, // STGPpost 10630 180889933U, // STGPpre 10631 299461U, // STGPreIndex 10632 0U, // STGloop 10633 28U, // STLLRB 10634 28U, // STLLRH 10635 28U, // STLLRW 10636 28U, // STLLRX 10637 28U, // STLRB 10638 28U, // STLRH 10639 28U, // STLRW 10640 28U, // STLRX 10641 123077U, // STLURBi 10642 123077U, // STLURHi 10643 123077U, // STLURWi 10644 123077U, // STLURXi 10645 311493U, // STLXPW 10646 311493U, // STLXPX 10647 123085U, // STLXRB 10648 123085U, // STLXRH 10649 123085U, // STLXRW 10650 123085U, // STLXRX 10651 11018445U, // STNPDi 10652 11542733U, // STNPQi 10653 12067021U, // STNPSi 10654 12067021U, // STNPWi 10655 11018445U, // STNPXi 10656 280901U, // STNT1B_ZRI 10657 4357U, // STNT1B_ZRR 10658 125253U, // STNT1B_ZZR_D_REAL 10659 125253U, // STNT1B_ZZR_S_REAL 10660 280901U, // STNT1D_ZRI 10661 4421U, // STNT1D_ZRR 10662 125253U, // STNT1D_ZZR_D_REAL 10663 280901U, // STNT1H_ZRI 10664 4485U, // STNT1H_ZRR 10665 125253U, // STNT1H_ZZR_D_REAL 10666 125253U, // STNT1H_ZZR_S_REAL 10667 280901U, // STNT1W_ZRI 10668 4613U, // STNT1W_ZRR 10669 125253U, // STNT1W_ZZR_D_REAL 10670 125253U, // STNT1W_ZZR_S_REAL 10671 11018445U, // STPDi 10672 12872013U, // STPDpost 10673 180365645U, // STPDpre 10674 11542733U, // STPQi 10675 13396301U, // STPQpost 10676 180889933U, // STPQpre 10677 12067021U, // STPSi 10678 13920589U, // STPSpost 10679 181414221U, // STPSpre 10680 12067021U, // STPWi 10681 13920589U, // STPWpost 10682 181414221U, // STPWpre 10683 11018445U, // STPXi 10684 12872013U, // STPXpost 10685 180365645U, // STPXpre 10686 2397U, // STRBBpost 10687 297285U, // STRBBpre 10688 14164165U, // STRBBroW 10689 14688453U, // STRBBroX 10690 4805U, // STRBBui 10691 2397U, // STRBpost 10692 297285U, // STRBpre 10693 14164165U, // STRBroW 10694 14688453U, // STRBroX 10695 4805U, // STRBui 10696 2397U, // STRDpost 10697 297285U, // STRDpre 10698 15212741U, // STRDroW 10699 15737029U, // STRDroX 10700 4869U, // STRDui 10701 2397U, // STRHHpost 10702 297285U, // STRHHpre 10703 16261317U, // STRHHroW 10704 16785605U, // STRHHroX 10705 4933U, // STRHHui 10706 2397U, // STRHpost 10707 297285U, // STRHpre 10708 16261317U, // STRHroW 10709 16785605U, // STRHroX 10710 4933U, // STRHui 10711 2397U, // STRQpost 10712 297285U, // STRQpre 10713 17309893U, // STRQroW 10714 17834181U, // STRQroX 10715 4997U, // STRQui 10716 2397U, // STRSpost 10717 297285U, // STRSpre 10718 18358469U, // STRSroW 10719 18882757U, // STRSroX 10720 5061U, // STRSui 10721 2397U, // STRWpost 10722 297285U, // STRWpre 10723 18358469U, // STRWroW 10724 18882757U, // STRWroX 10725 5061U, // STRWui 10726 2397U, // STRXpost 10727 297285U, // STRXpre 10728 15212741U, // STRXroW 10729 15737029U, // STRXroX 10730 4869U, // STRXui 10731 278725U, // STR_PXI 10732 278725U, // STR_ZXI 10733 123077U, // STTRBi 10734 123077U, // STTRHi 10735 123077U, // STTRWi 10736 123077U, // STTRXi 10737 123077U, // STURBBi 10738 123077U, // STURBi 10739 123077U, // STURDi 10740 123077U, // STURHHi 10741 123077U, // STURHi 10742 123077U, // STURQi 10743 123077U, // STURSi 10744 123077U, // STURWi 10745 123077U, // STURXi 10746 311493U, // STXPW 10747 311493U, // STXPX 10748 123085U, // STXRB 10749 123085U, // STXRH 10750 123085U, // STXRW 10751 123085U, // STXRX 10752 123141U, // STZ2GOffset 10753 4573U, // STZ2GPostIndex 10754 299461U, // STZ2GPreIndex 10755 28U, // STZGM 10756 123141U, // STZGOffset 10757 4573U, // STZGPostIndex 10758 299461U, // STZGPreIndex 10759 0U, // STZGloop 10760 8453U, // SUBG 10761 325U, // SUBHNB_ZZZ_B 10762 6U, // SUBHNB_ZZZ_H 10763 389U, // SUBHNB_ZZZ_S 10764 453U, // SUBHNT_ZZZ_B 10765 1U, // SUBHNT_ZZZ_H 10766 69U, // SUBHNT_ZZZ_S 10767 16902U, // SUBHNv2i64_v2i32 10768 16966U, // SUBHNv2i64_v4i32 10769 25095U, // SUBHNv4i32_v4i16 10770 25159U, // SUBHNv4i32_v8i16 10771 33351U, // SUBHNv8i16_v16i8 10772 33287U, // SUBHNv8i16_v8i8 10773 197U, // SUBP 10774 197U, // SUBPS 10775 1029U, // SUBR_ZI_B 10776 1093U, // SUBR_ZI_D 10777 11U, // SUBR_ZI_H 10778 1157U, // SUBR_ZI_S 10779 533128U, // SUBR_ZPmZ_B 10780 1057160U, // SUBR_ZPmZ_D 10781 1614536U, // SUBR_ZPmZ_H 10782 2106120U, // SUBR_ZPmZ_S 10783 837U, // SUBSWri 10784 0U, // SUBSWrr 10785 901U, // SUBSWrs 10786 965U, // SUBSWrx 10787 837U, // SUBSXri 10788 0U, // SUBSXrr 10789 901U, // SUBSXrs 10790 965U, // SUBSXrx 10791 82117U, // SUBSXrx64 10792 837U, // SUBWri 10793 0U, // SUBWrr 10794 901U, // SUBWrs 10795 965U, // SUBWrx 10796 837U, // SUBXri 10797 0U, // SUBXrr 10798 901U, // SUBXrs 10799 965U, // SUBXrx 10800 82117U, // SUBXrx64 10801 1029U, // SUB_ZI_B 10802 1093U, // SUB_ZI_D 10803 11U, // SUB_ZI_H 10804 1157U, // SUB_ZI_S 10805 533128U, // SUB_ZPmZ_B 10806 1057160U, // SUB_ZPmZ_D 10807 1614536U, // SUB_ZPmZ_H 10808 2106120U, // SUB_ZPmZ_S 10809 645U, // SUB_ZZZ_B 10810 389U, // SUB_ZZZ_D 10811 8U, // SUB_ZZZ_H 10812 773U, // SUB_ZZZ_S 10813 49673U, // SUBv16i8 10814 197U, // SUBv1i64 10815 57865U, // SUBv2i32 10816 16902U, // SUBv2i64 10817 66058U, // SUBv4i16 10818 25095U, // SUBv4i32 10819 33287U, // SUBv8i16 10820 74250U, // SUBv8i8 10821 2U, // SUNPKHI_ZZ_D 10822 0U, // SUNPKHI_ZZ_H 10823 2U, // SUNPKHI_ZZ_S 10824 2U, // SUNPKLO_ZZ_D 10825 0U, // SUNPKLO_ZZ_H 10826 2U, // SUNPKLO_ZZ_S 10827 533128U, // SUQADD_ZPmZ_B 10828 1057160U, // SUQADD_ZPmZ_D 10829 1614536U, // SUQADD_ZPmZ_H 10830 2106120U, // SUQADD_ZPmZ_S 10831 1U, // SUQADDv16i8 10832 2U, // SUQADDv1i16 10833 2U, // SUQADDv1i32 10834 2U, // SUQADDv1i64 10835 2U, // SUQADDv1i8 10836 2U, // SUQADDv2i32 10837 3U, // SUQADDv2i64 10838 3U, // SUQADDv4i16 10839 4U, // SUQADDv4i32 10840 4U, // SUQADDv8i16 10841 5U, // SUQADDv8i8 10842 0U, // SVC 10843 0U, // SWPAB 10844 0U, // SWPAH 10845 0U, // SWPALB 10846 0U, // SWPALH 10847 0U, // SWPALW 10848 0U, // SWPALX 10849 0U, // SWPAW 10850 0U, // SWPAX 10851 0U, // SWPB 10852 0U, // SWPH 10853 0U, // SWPLB 10854 0U, // SWPLH 10855 0U, // SWPLW 10856 0U, // SWPLX 10857 0U, // SWPW 10858 0U, // SWPX 10859 0U, // SXTB_ZPmZ_D 10860 0U, // SXTB_ZPmZ_H 10861 1U, // SXTB_ZPmZ_S 10862 0U, // SXTH_ZPmZ_D 10863 1U, // SXTH_ZPmZ_S 10864 0U, // SXTW_ZPmZ_D 10865 5573U, // SYSLxt 10866 0U, // SYSxt 10867 0U, // SpeculationSafeValueW 10868 0U, // SpeculationSafeValueX 10869 0U, // TAGPstack 10870 30U, // TBL_ZZZZ_B 10871 0U, // TBL_ZZZZ_D 10872 0U, // TBL_ZZZZ_H 10873 0U, // TBL_ZZZZ_S 10874 30U, // TBL_ZZZ_B 10875 0U, // TBL_ZZZ_D 10876 0U, // TBL_ZZZ_H 10877 0U, // TBL_ZZZ_S 10878 1U, // TBLv16i8Four 10879 1U, // TBLv16i8One 10880 1U, // TBLv16i8Three 10881 1U, // TBLv16i8Two 10882 5U, // TBLv8i8Four 10883 5U, // TBLv8i8One 10884 5U, // TBLv8i8Three 10885 5U, // TBLv8i8Two 10886 5637U, // TBNZW 10887 5637U, // TBNZX 10888 0U, // TBX_ZZZ_B 10889 69U, // TBX_ZZZ_D 10890 17U, // TBX_ZZZ_H 10891 133U, // TBX_ZZZ_S 10892 1U, // TBXv16i8Four 10893 1U, // TBXv16i8One 10894 1U, // TBXv16i8Three 10895 1U, // TBXv16i8Two 10896 5U, // TBXv8i8Four 10897 5U, // TBXv8i8One 10898 5U, // TBXv8i8Three 10899 5U, // TBXv8i8Two 10900 5637U, // TBZW 10901 5637U, // TBZX 10902 0U, // TCANCEL 10903 0U, // TCOMMIT 10904 0U, // TCRETURNdi 10905 0U, // TCRETURNri 10906 0U, // TCRETURNriALL 10907 0U, // TCRETURNriBTI 10908 0U, // TLSDESCCALL 10909 0U, // TLSDESC_CALLSEQ 10910 645U, // TRN1_PPP_B 10911 389U, // TRN1_PPP_D 10912 8U, // TRN1_PPP_H 10913 773U, // TRN1_PPP_S 10914 645U, // TRN1_ZZZ_B 10915 389U, // TRN1_ZZZ_D 10916 8U, // TRN1_ZZZ_H 10917 773U, // TRN1_ZZZ_S 10918 49673U, // TRN1v16i8 10919 57865U, // TRN1v2i32 10920 16902U, // TRN1v2i64 10921 66058U, // TRN1v4i16 10922 25095U, // TRN1v4i32 10923 33287U, // TRN1v8i16 10924 74250U, // TRN1v8i8 10925 645U, // TRN2_PPP_B 10926 389U, // TRN2_PPP_D 10927 8U, // TRN2_PPP_H 10928 773U, // TRN2_PPP_S 10929 645U, // TRN2_ZZZ_B 10930 389U, // TRN2_ZZZ_D 10931 8U, // TRN2_ZZZ_H 10932 773U, // TRN2_ZZZ_S 10933 49673U, // TRN2v16i8 10934 57865U, // TRN2v2i32 10935 16902U, // TRN2v2i64 10936 66058U, // TRN2v4i16 10937 25095U, // TRN2v4i32 10938 33287U, // TRN2v8i16 10939 74250U, // TRN2v8i8 10940 0U, // TSB 10941 0U, // TSTART 10942 0U, // TTEST 10943 133U, // UABALB_ZZZ_D 10944 0U, // UABALB_ZZZ_H 10945 453U, // UABALB_ZZZ_S 10946 133U, // UABALT_ZZZ_D 10947 0U, // UABALT_ZZZ_H 10948 453U, // UABALT_ZZZ_S 10949 49737U, // UABALv16i8_v8i16 10950 57929U, // UABALv2i32_v2i64 10951 66122U, // UABALv4i16_v4i32 10952 25159U, // UABALv4i32_v2i64 10953 33351U, // UABALv8i16_v4i32 10954 74314U, // UABALv8i8_v8i16 10955 0U, // UABA_ZZZ_B 10956 69U, // UABA_ZZZ_D 10957 17U, // UABA_ZZZ_H 10958 133U, // UABA_ZZZ_S 10959 49737U, // UABAv16i8 10960 57929U, // UABAv2i32 10961 66122U, // UABAv4i16 10962 25159U, // UABAv4i32 10963 33351U, // UABAv8i16 10964 74314U, // UABAv8i8 10965 773U, // UABDLB_ZZZ_D 10966 30U, // UABDLB_ZZZ_H 10967 325U, // UABDLB_ZZZ_S 10968 773U, // UABDLT_ZZZ_D 10969 30U, // UABDLT_ZZZ_H 10970 325U, // UABDLT_ZZZ_S 10971 49673U, // UABDLv16i8_v8i16 10972 57865U, // UABDLv2i32_v2i64 10973 66058U, // UABDLv4i16_v4i32 10974 25095U, // UABDLv4i32_v2i64 10975 33287U, // UABDLv8i16_v4i32 10976 74250U, // UABDLv8i8_v8i16 10977 533128U, // UABD_ZPmZ_B 10978 1057160U, // UABD_ZPmZ_D 10979 1614536U, // UABD_ZPmZ_H 10980 2106120U, // UABD_ZPmZ_S 10981 49673U, // UABDv16i8 10982 57865U, // UABDv2i32 10983 66058U, // UABDv4i16 10984 25095U, // UABDv4i32 10985 33287U, // UABDv8i16 10986 74250U, // UABDv8i8 10987 136U, // UADALP_ZPmZ_D 10988 0U, // UADALP_ZPmZ_H 10989 456U, // UADALP_ZPmZ_S 10990 1U, // UADALPv16i8_v8i16 10991 2U, // UADALPv2i32_v1i64 10992 3U, // UADALPv4i16_v2i32 10993 4U, // UADALPv4i32_v2i64 10994 4U, // UADALPv8i16_v4i32 10995 5U, // UADALPv8i8_v4i16 10996 773U, // UADDLB_ZZZ_D 10997 30U, // UADDLB_ZZZ_H 10998 325U, // UADDLB_ZZZ_S 10999 1U, // UADDLPv16i8_v8i16 11000 2U, // UADDLPv2i32_v1i64 11001 3U, // UADDLPv4i16_v2i32 11002 4U, // UADDLPv4i32_v2i64 11003 4U, // UADDLPv8i16_v4i32 11004 5U, // UADDLPv8i8_v4i16 11005 773U, // UADDLT_ZZZ_D 11006 30U, // UADDLT_ZZZ_H 11007 325U, // UADDLT_ZZZ_S 11008 1U, // UADDLVv16i8v 11009 3U, // UADDLVv4i16v 11010 4U, // UADDLVv4i32v 11011 4U, // UADDLVv8i16v 11012 5U, // UADDLVv8i8v 11013 49673U, // UADDLv16i8_v8i16 11014 57865U, // UADDLv2i32_v2i64 11015 66058U, // UADDLv4i16_v4i32 11016 25095U, // UADDLv4i32_v2i64 11017 33287U, // UADDLv8i16_v4i32 11018 74250U, // UADDLv8i8_v8i16 11019 645U, // UADDV_VPZ_B 11020 389U, // UADDV_VPZ_D 11021 325U, // UADDV_VPZ_H 11022 773U, // UADDV_VPZ_S 11023 773U, // UADDWB_ZZZ_D 11024 30U, // UADDWB_ZZZ_H 11025 325U, // UADDWB_ZZZ_S 11026 773U, // UADDWT_ZZZ_D 11027 30U, // UADDWT_ZZZ_H 11028 325U, // UADDWT_ZZZ_S 11029 49671U, // UADDWv16i8_v8i16 11030 57862U, // UADDWv2i32_v2i64 11031 66055U, // UADDWv4i16_v4i32 11032 25094U, // UADDWv4i32_v2i64 11033 33287U, // UADDWv8i16_v4i32 11034 74247U, // UADDWv8i8_v8i16 11035 8389U, // UBFMWri 11036 8389U, // UBFMXri 11037 197U, // UCVTFSWDri 11038 197U, // UCVTFSWHri 11039 197U, // UCVTFSWSri 11040 197U, // UCVTFSXDri 11041 197U, // UCVTFSXHri 11042 197U, // UCVTFSXSri 11043 2U, // UCVTFUWDri 11044 2U, // UCVTFUWHri 11045 2U, // UCVTFUWSri 11046 2U, // UCVTFUXDri 11047 2U, // UCVTFUXHri 11048 2U, // UCVTFUXSri 11049 0U, // UCVTF_ZPmZ_DtoD 11050 0U, // UCVTF_ZPmZ_DtoH 11051 0U, // UCVTF_ZPmZ_DtoS 11052 0U, // UCVTF_ZPmZ_HtoH 11053 1U, // UCVTF_ZPmZ_StoD 11054 0U, // UCVTF_ZPmZ_StoH 11055 1U, // UCVTF_ZPmZ_StoS 11056 197U, // UCVTFd 11057 197U, // UCVTFh 11058 197U, // UCVTFs 11059 2U, // UCVTFv1i16 11060 2U, // UCVTFv1i32 11061 2U, // UCVTFv1i64 11062 2U, // UCVTFv2f32 11063 3U, // UCVTFv2f64 11064 201U, // UCVTFv2i32_shift 11065 198U, // UCVTFv2i64_shift 11066 3U, // UCVTFv4f16 11067 4U, // UCVTFv4f32 11068 202U, // UCVTFv4i16_shift 11069 199U, // UCVTFv4i32_shift 11070 4U, // UCVTFv8f16 11071 199U, // UCVTFv8i16_shift 11072 0U, // UDF 11073 1057160U, // UDIVR_ZPmZ_D 11074 2106120U, // UDIVR_ZPmZ_S 11075 197U, // UDIVWr 11076 197U, // UDIVXr 11077 1057160U, // UDIV_ZPmZ_D 11078 2106120U, // UDIV_ZPmZ_S 11079 1704389U, // UDOT_ZZZI_D 11080 2432U, // UDOT_ZZZI_S 11081 453U, // UDOT_ZZZ_D 11082 0U, // UDOT_ZZZ_S 11083 303689U, // UDOTlanev16i8 11084 303690U, // UDOTlanev8i8 11085 49737U, // UDOTv16i8 11086 74314U, // UDOTv8i8 11087 533128U, // UHADD_ZPmZ_B 11088 1057160U, // UHADD_ZPmZ_D 11089 1614536U, // UHADD_ZPmZ_H 11090 2106120U, // UHADD_ZPmZ_S 11091 49673U, // UHADDv16i8 11092 57865U, // UHADDv2i32 11093 66058U, // UHADDv4i16 11094 25095U, // UHADDv4i32 11095 33287U, // UHADDv8i16 11096 74250U, // UHADDv8i8 11097 533128U, // UHSUBR_ZPmZ_B 11098 1057160U, // UHSUBR_ZPmZ_D 11099 1614536U, // UHSUBR_ZPmZ_H 11100 2106120U, // UHSUBR_ZPmZ_S 11101 533128U, // UHSUB_ZPmZ_B 11102 1057160U, // UHSUB_ZPmZ_D 11103 1614536U, // UHSUB_ZPmZ_H 11104 2106120U, // UHSUB_ZPmZ_S 11105 49673U, // UHSUBv16i8 11106 57865U, // UHSUBv2i32 11107 66058U, // UHSUBv4i16 11108 25095U, // UHSUBv4i32 11109 33287U, // UHSUBv8i16 11110 74250U, // UHSUBv8i8 11111 8389U, // UMADDLrrr 11112 533128U, // UMAXP_ZPmZ_B 11113 1057160U, // UMAXP_ZPmZ_D 11114 1614536U, // UMAXP_ZPmZ_H 11115 2106120U, // UMAXP_ZPmZ_S 11116 49673U, // UMAXPv16i8 11117 57865U, // UMAXPv2i32 11118 66058U, // UMAXPv4i16 11119 25095U, // UMAXPv4i32 11120 33287U, // UMAXPv8i16 11121 74250U, // UMAXPv8i8 11122 645U, // UMAXV_VPZ_B 11123 389U, // UMAXV_VPZ_D 11124 325U, // UMAXV_VPZ_H 11125 773U, // UMAXV_VPZ_S 11126 1U, // UMAXVv16i8v 11127 3U, // UMAXVv4i16v 11128 4U, // UMAXVv4i32v 11129 4U, // UMAXVv8i16v 11130 5U, // UMAXVv8i8v 11131 5701U, // UMAX_ZI_B 11132 5701U, // UMAX_ZI_D 11133 23U, // UMAX_ZI_H 11134 5701U, // UMAX_ZI_S 11135 533128U, // UMAX_ZPmZ_B 11136 1057160U, // UMAX_ZPmZ_D 11137 1614536U, // UMAX_ZPmZ_H 11138 2106120U, // UMAX_ZPmZ_S 11139 49673U, // UMAXv16i8 11140 57865U, // UMAXv2i32 11141 66058U, // UMAXv4i16 11142 25095U, // UMAXv4i32 11143 33287U, // UMAXv8i16 11144 74250U, // UMAXv8i8 11145 533128U, // UMINP_ZPmZ_B 11146 1057160U, // UMINP_ZPmZ_D 11147 1614536U, // UMINP_ZPmZ_H 11148 2106120U, // UMINP_ZPmZ_S 11149 49673U, // UMINPv16i8 11150 57865U, // UMINPv2i32 11151 66058U, // UMINPv4i16 11152 25095U, // UMINPv4i32 11153 33287U, // UMINPv8i16 11154 74250U, // UMINPv8i8 11155 645U, // UMINV_VPZ_B 11156 389U, // UMINV_VPZ_D 11157 325U, // UMINV_VPZ_H 11158 773U, // UMINV_VPZ_S 11159 1U, // UMINVv16i8v 11160 3U, // UMINVv4i16v 11161 4U, // UMINVv4i32v 11162 4U, // UMINVv8i16v 11163 5U, // UMINVv8i8v 11164 5701U, // UMIN_ZI_B 11165 5701U, // UMIN_ZI_D 11166 23U, // UMIN_ZI_H 11167 5701U, // UMIN_ZI_S 11168 533128U, // UMIN_ZPmZ_B 11169 1057160U, // UMIN_ZPmZ_D 11170 1614536U, // UMIN_ZPmZ_H 11171 2106120U, // UMIN_ZPmZ_S 11172 49673U, // UMINv16i8 11173 57865U, // UMINv2i32 11174 66058U, // UMINv4i16 11175 25095U, // UMINv4i32 11176 33287U, // UMINv8i16 11177 74250U, // UMINv8i8 11178 1704069U, // UMLALB_ZZZI_D 11179 1704389U, // UMLALB_ZZZI_S 11180 133U, // UMLALB_ZZZ_D 11181 0U, // UMLALB_ZZZ_H 11182 453U, // UMLALB_ZZZ_S 11183 1704069U, // UMLALT_ZZZI_D 11184 1704389U, // UMLALT_ZZZI_S 11185 133U, // UMLALT_ZZZ_D 11186 0U, // UMLALT_ZZZ_H 11187 453U, // UMLALT_ZZZ_S 11188 49737U, // UMLALv16i8_v8i16 11189 9151049U, // UMLALv2i32_indexed 11190 57929U, // UMLALv2i32_v2i64 11191 9142858U, // UMLALv4i16_indexed 11192 66122U, // UMLALv4i16_v4i32 11193 9151047U, // UMLALv4i32_indexed 11194 25159U, // UMLALv4i32_v2i64 11195 9142855U, // UMLALv8i16_indexed 11196 33351U, // UMLALv8i16_v4i32 11197 74314U, // UMLALv8i8_v8i16 11198 1704069U, // UMLSLB_ZZZI_D 11199 1704389U, // UMLSLB_ZZZI_S 11200 133U, // UMLSLB_ZZZ_D 11201 0U, // UMLSLB_ZZZ_H 11202 453U, // UMLSLB_ZZZ_S 11203 1704069U, // UMLSLT_ZZZI_D 11204 1704389U, // UMLSLT_ZZZI_S 11205 133U, // UMLSLT_ZZZ_D 11206 0U, // UMLSLT_ZZZ_H 11207 453U, // UMLSLT_ZZZ_S 11208 49737U, // UMLSLv16i8_v8i16 11209 9151049U, // UMLSLv2i32_indexed 11210 57929U, // UMLSLv2i32_v2i64 11211 9142858U, // UMLSLv4i16_indexed 11212 66122U, // UMLSLv4i16_v4i32 11213 9151047U, // UMLSLv4i32_indexed 11214 25159U, // UMLSLv4i32_v2i64 11215 9142855U, // UMLSLv8i16_indexed 11216 33351U, // UMLSLv8i16_v4i32 11217 74314U, // UMLSLv8i8_v8i16 11218 2709U, // UMOVvi16 11219 2709U, // UMOVvi32 11220 2710U, // UMOVvi64 11221 2710U, // UMOVvi8 11222 8389U, // UMSUBLrrr 11223 533128U, // UMULH_ZPmZ_B 11224 1057160U, // UMULH_ZPmZ_D 11225 1614536U, // UMULH_ZPmZ_H 11226 2106120U, // UMULH_ZPmZ_S 11227 645U, // UMULH_ZZZ_B 11228 389U, // UMULH_ZZZ_D 11229 8U, // UMULH_ZZZ_H 11230 773U, // UMULH_ZZZ_S 11231 197U, // UMULHrr 11232 271109U, // UMULLB_ZZZI_D 11233 270661U, // UMULLB_ZZZI_S 11234 773U, // UMULLB_ZZZ_D 11235 30U, // UMULLB_ZZZ_H 11236 325U, // UMULLB_ZZZ_S 11237 271109U, // UMULLT_ZZZI_D 11238 270661U, // UMULLT_ZZZI_S 11239 773U, // UMULLT_ZZZ_D 11240 30U, // UMULLT_ZZZ_H 11241 325U, // UMULLT_ZZZ_S 11242 49673U, // UMULLv16i8_v8i16 11243 10199561U, // UMULLv2i32_indexed 11244 57865U, // UMULLv2i32_v2i64 11245 10191370U, // UMULLv4i16_indexed 11246 66058U, // UMULLv4i16_v4i32 11247 10199559U, // UMULLv4i32_indexed 11248 25095U, // UMULLv4i32_v2i64 11249 10191367U, // UMULLv8i16_indexed 11250 33287U, // UMULLv8i16_v4i32 11251 74250U, // UMULLv8i8_v8i16 11252 1029U, // UQADD_ZI_B 11253 1093U, // UQADD_ZI_D 11254 11U, // UQADD_ZI_H 11255 1157U, // UQADD_ZI_S 11256 533128U, // UQADD_ZPmZ_B 11257 1057160U, // UQADD_ZPmZ_D 11258 1614536U, // UQADD_ZPmZ_H 11259 2106120U, // UQADD_ZPmZ_S 11260 645U, // UQADD_ZZZ_B 11261 389U, // UQADD_ZZZ_D 11262 8U, // UQADD_ZZZ_H 11263 773U, // UQADD_ZZZ_S 11264 49673U, // UQADDv16i8 11265 197U, // UQADDv1i16 11266 197U, // UQADDv1i32 11267 197U, // UQADDv1i64 11268 197U, // UQADDv1i8 11269 57865U, // UQADDv2i32 11270 16902U, // UQADDv2i64 11271 66058U, // UQADDv4i16 11272 25095U, // UQADDv4i32 11273 33287U, // UQADDv8i16 11274 74250U, // UQADDv8i8 11275 0U, // UQDECB_WPiI 11276 0U, // UQDECB_XPiI 11277 0U, // UQDECD_WPiI 11278 0U, // UQDECD_XPiI 11279 0U, // UQDECD_ZPiI 11280 0U, // UQDECH_WPiI 11281 0U, // UQDECH_XPiI 11282 0U, // UQDECH_ZPiI 11283 2U, // UQDECP_WP_B 11284 2U, // UQDECP_WP_D 11285 2U, // UQDECP_WP_H 11286 2U, // UQDECP_WP_S 11287 2U, // UQDECP_XP_B 11288 2U, // UQDECP_XP_D 11289 2U, // UQDECP_XP_H 11290 2U, // UQDECP_XP_S 11291 2U, // UQDECP_ZP_D 11292 0U, // UQDECP_ZP_H 11293 2U, // UQDECP_ZP_S 11294 0U, // UQDECW_WPiI 11295 0U, // UQDECW_XPiI 11296 0U, // UQDECW_ZPiI 11297 0U, // UQINCB_WPiI 11298 0U, // UQINCB_XPiI 11299 0U, // UQINCD_WPiI 11300 0U, // UQINCD_XPiI 11301 0U, // UQINCD_ZPiI 11302 0U, // UQINCH_WPiI 11303 0U, // UQINCH_XPiI 11304 0U, // UQINCH_ZPiI 11305 2U, // UQINCP_WP_B 11306 2U, // UQINCP_WP_D 11307 2U, // UQINCP_WP_H 11308 2U, // UQINCP_WP_S 11309 2U, // UQINCP_XP_B 11310 2U, // UQINCP_XP_D 11311 2U, // UQINCP_XP_H 11312 2U, // UQINCP_XP_S 11313 2U, // UQINCP_ZP_D 11314 0U, // UQINCP_ZP_H 11315 2U, // UQINCP_ZP_S 11316 0U, // UQINCW_WPiI 11317 0U, // UQINCW_XPiI 11318 0U, // UQINCW_ZPiI 11319 533128U, // UQRSHLR_ZPmZ_B 11320 1057160U, // UQRSHLR_ZPmZ_D 11321 1614536U, // UQRSHLR_ZPmZ_H 11322 2106120U, // UQRSHLR_ZPmZ_S 11323 533128U, // UQRSHL_ZPmZ_B 11324 1057160U, // UQRSHL_ZPmZ_D 11325 1614536U, // UQRSHL_ZPmZ_H 11326 2106120U, // UQRSHL_ZPmZ_S 11327 49673U, // UQRSHLv16i8 11328 197U, // UQRSHLv1i16 11329 197U, // UQRSHLv1i32 11330 197U, // UQRSHLv1i64 11331 197U, // UQRSHLv1i8 11332 57865U, // UQRSHLv2i32 11333 16902U, // UQRSHLv2i64 11334 66058U, // UQRSHLv4i16 11335 25095U, // UQRSHLv4i32 11336 33287U, // UQRSHLv8i16 11337 74250U, // UQRSHLv8i8 11338 197U, // UQRSHRNB_ZZI_B 11339 12U, // UQRSHRNB_ZZI_H 11340 197U, // UQRSHRNB_ZZI_S 11341 2373U, // UQRSHRNT_ZZI_B 11342 20U, // UQRSHRNT_ZZI_H 11343 2373U, // UQRSHRNT_ZZI_S 11344 197U, // UQRSHRNb 11345 197U, // UQRSHRNh 11346 197U, // UQRSHRNs 11347 2375U, // UQRSHRNv16i8_shift 11348 198U, // UQRSHRNv2i32_shift 11349 199U, // UQRSHRNv4i16_shift 11350 2374U, // UQRSHRNv4i32_shift 11351 2375U, // UQRSHRNv8i16_shift 11352 199U, // UQRSHRNv8i8_shift 11353 533128U, // UQSHLR_ZPmZ_B 11354 1057160U, // UQSHLR_ZPmZ_D 11355 1614536U, // UQSHLR_ZPmZ_H 11356 2106120U, // UQSHLR_ZPmZ_S 11357 8840U, // UQSHL_ZPmI_B 11358 8584U, // UQSHL_ZPmI_D 11359 90824U, // UQSHL_ZPmI_H 11360 8968U, // UQSHL_ZPmI_S 11361 533128U, // UQSHL_ZPmZ_B 11362 1057160U, // UQSHL_ZPmZ_D 11363 1614536U, // UQSHL_ZPmZ_H 11364 2106120U, // UQSHL_ZPmZ_S 11365 197U, // UQSHLb 11366 197U, // UQSHLd 11367 197U, // UQSHLh 11368 197U, // UQSHLs 11369 49673U, // UQSHLv16i8 11370 201U, // UQSHLv16i8_shift 11371 197U, // UQSHLv1i16 11372 197U, // UQSHLv1i32 11373 197U, // UQSHLv1i64 11374 197U, // UQSHLv1i8 11375 57865U, // UQSHLv2i32 11376 201U, // UQSHLv2i32_shift 11377 16902U, // UQSHLv2i64 11378 198U, // UQSHLv2i64_shift 11379 66058U, // UQSHLv4i16 11380 202U, // UQSHLv4i16_shift 11381 25095U, // UQSHLv4i32 11382 199U, // UQSHLv4i32_shift 11383 33287U, // UQSHLv8i16 11384 199U, // UQSHLv8i16_shift 11385 74250U, // UQSHLv8i8 11386 202U, // UQSHLv8i8_shift 11387 197U, // UQSHRNB_ZZI_B 11388 12U, // UQSHRNB_ZZI_H 11389 197U, // UQSHRNB_ZZI_S 11390 2373U, // UQSHRNT_ZZI_B 11391 20U, // UQSHRNT_ZZI_H 11392 2373U, // UQSHRNT_ZZI_S 11393 197U, // UQSHRNb 11394 197U, // UQSHRNh 11395 197U, // UQSHRNs 11396 2375U, // UQSHRNv16i8_shift 11397 198U, // UQSHRNv2i32_shift 11398 199U, // UQSHRNv4i16_shift 11399 2374U, // UQSHRNv4i32_shift 11400 2375U, // UQSHRNv8i16_shift 11401 199U, // UQSHRNv8i8_shift 11402 533128U, // UQSUBR_ZPmZ_B 11403 1057160U, // UQSUBR_ZPmZ_D 11404 1614536U, // UQSUBR_ZPmZ_H 11405 2106120U, // UQSUBR_ZPmZ_S 11406 1029U, // UQSUB_ZI_B 11407 1093U, // UQSUB_ZI_D 11408 11U, // UQSUB_ZI_H 11409 1157U, // UQSUB_ZI_S 11410 533128U, // UQSUB_ZPmZ_B 11411 1057160U, // UQSUB_ZPmZ_D 11412 1614536U, // UQSUB_ZPmZ_H 11413 2106120U, // UQSUB_ZPmZ_S 11414 645U, // UQSUB_ZZZ_B 11415 389U, // UQSUB_ZZZ_D 11416 8U, // UQSUB_ZZZ_H 11417 773U, // UQSUB_ZZZ_S 11418 49673U, // UQSUBv16i8 11419 197U, // UQSUBv1i16 11420 197U, // UQSUBv1i32 11421 197U, // UQSUBv1i64 11422 197U, // UQSUBv1i8 11423 57865U, // UQSUBv2i32 11424 16902U, // UQSUBv2i64 11425 66058U, // UQSUBv4i16 11426 25095U, // UQSUBv4i32 11427 33287U, // UQSUBv8i16 11428 74250U, // UQSUBv8i8 11429 2U, // UQXTNB_ZZ_B 11430 0U, // UQXTNB_ZZ_H 11431 2U, // UQXTNB_ZZ_S 11432 2U, // UQXTNT_ZZ_B 11433 0U, // UQXTNT_ZZ_H 11434 2U, // UQXTNT_ZZ_S 11435 4U, // UQXTNv16i8 11436 2U, // UQXTNv1i16 11437 2U, // UQXTNv1i32 11438 2U, // UQXTNv1i8 11439 3U, // UQXTNv2i32 11440 4U, // UQXTNv4i16 11441 3U, // UQXTNv4i32 11442 4U, // UQXTNv8i16 11443 4U, // UQXTNv8i8 11444 1U, // URECPE_ZPmZ_S 11445 2U, // URECPEv2i32 11446 4U, // URECPEv4i32 11447 533128U, // URHADD_ZPmZ_B 11448 1057160U, // URHADD_ZPmZ_D 11449 1614536U, // URHADD_ZPmZ_H 11450 2106120U, // URHADD_ZPmZ_S 11451 49673U, // URHADDv16i8 11452 57865U, // URHADDv2i32 11453 66058U, // URHADDv4i16 11454 25095U, // URHADDv4i32 11455 33287U, // URHADDv8i16 11456 74250U, // URHADDv8i8 11457 533128U, // URSHLR_ZPmZ_B 11458 1057160U, // URSHLR_ZPmZ_D 11459 1614536U, // URSHLR_ZPmZ_H 11460 2106120U, // URSHLR_ZPmZ_S 11461 533128U, // URSHL_ZPmZ_B 11462 1057160U, // URSHL_ZPmZ_D 11463 1614536U, // URSHL_ZPmZ_H 11464 2106120U, // URSHL_ZPmZ_S 11465 49673U, // URSHLv16i8 11466 197U, // URSHLv1i64 11467 57865U, // URSHLv2i32 11468 16902U, // URSHLv2i64 11469 66058U, // URSHLv4i16 11470 25095U, // URSHLv4i32 11471 33287U, // URSHLv8i16 11472 74250U, // URSHLv8i8 11473 8840U, // URSHR_ZPmI_B 11474 8584U, // URSHR_ZPmI_D 11475 90824U, // URSHR_ZPmI_H 11476 8968U, // URSHR_ZPmI_S 11477 197U, // URSHRd 11478 201U, // URSHRv16i8_shift 11479 201U, // URSHRv2i32_shift 11480 198U, // URSHRv2i64_shift 11481 202U, // URSHRv4i16_shift 11482 199U, // URSHRv4i32_shift 11483 199U, // URSHRv8i16_shift 11484 202U, // URSHRv8i8_shift 11485 1U, // URSQRTE_ZPmZ_S 11486 2U, // URSQRTEv2i32 11487 4U, // URSQRTEv4i32 11488 20U, // URSRA_ZZI_B 11489 2373U, // URSRA_ZZI_D 11490 20U, // URSRA_ZZI_H 11491 2373U, // URSRA_ZZI_S 11492 2373U, // URSRAd 11493 2377U, // URSRAv16i8_shift 11494 2377U, // URSRAv2i32_shift 11495 2374U, // URSRAv2i64_shift 11496 2378U, // URSRAv4i16_shift 11497 2375U, // URSRAv4i32_shift 11498 2375U, // URSRAv8i16_shift 11499 2378U, // URSRAv8i8_shift 11500 197U, // USHLLB_ZZI_D 11501 12U, // USHLLB_ZZI_H 11502 197U, // USHLLB_ZZI_S 11503 197U, // USHLLT_ZZI_D 11504 12U, // USHLLT_ZZI_H 11505 197U, // USHLLT_ZZI_S 11506 201U, // USHLLv16i8_shift 11507 201U, // USHLLv2i32_shift 11508 202U, // USHLLv4i16_shift 11509 199U, // USHLLv4i32_shift 11510 199U, // USHLLv8i16_shift 11511 202U, // USHLLv8i8_shift 11512 49673U, // USHLv16i8 11513 197U, // USHLv1i64 11514 57865U, // USHLv2i32 11515 16902U, // USHLv2i64 11516 66058U, // USHLv4i16 11517 25095U, // USHLv4i32 11518 33287U, // USHLv8i16 11519 74250U, // USHLv8i8 11520 197U, // USHRd 11521 201U, // USHRv16i8_shift 11522 201U, // USHRv2i32_shift 11523 198U, // USHRv2i64_shift 11524 202U, // USHRv4i16_shift 11525 199U, // USHRv4i32_shift 11526 199U, // USHRv8i16_shift 11527 202U, // USHRv8i8_shift 11528 533128U, // USQADD_ZPmZ_B 11529 1057160U, // USQADD_ZPmZ_D 11530 1614536U, // USQADD_ZPmZ_H 11531 2106120U, // USQADD_ZPmZ_S 11532 1U, // USQADDv16i8 11533 2U, // USQADDv1i16 11534 2U, // USQADDv1i32 11535 2U, // USQADDv1i64 11536 2U, // USQADDv1i8 11537 2U, // USQADDv2i32 11538 3U, // USQADDv2i64 11539 3U, // USQADDv4i16 11540 4U, // USQADDv4i32 11541 4U, // USQADDv8i16 11542 5U, // USQADDv8i8 11543 20U, // USRA_ZZI_B 11544 2373U, // USRA_ZZI_D 11545 20U, // USRA_ZZI_H 11546 2373U, // USRA_ZZI_S 11547 2373U, // USRAd 11548 2377U, // USRAv16i8_shift 11549 2377U, // USRAv2i32_shift 11550 2374U, // USRAv2i64_shift 11551 2378U, // USRAv4i16_shift 11552 2375U, // USRAv4i32_shift 11553 2375U, // USRAv8i16_shift 11554 2378U, // USRAv8i8_shift 11555 773U, // USUBLB_ZZZ_D 11556 30U, // USUBLB_ZZZ_H 11557 325U, // USUBLB_ZZZ_S 11558 773U, // USUBLT_ZZZ_D 11559 30U, // USUBLT_ZZZ_H 11560 325U, // USUBLT_ZZZ_S 11561 49673U, // USUBLv16i8_v8i16 11562 57865U, // USUBLv2i32_v2i64 11563 66058U, // USUBLv4i16_v4i32 11564 25095U, // USUBLv4i32_v2i64 11565 33287U, // USUBLv8i16_v4i32 11566 74250U, // USUBLv8i8_v8i16 11567 773U, // USUBWB_ZZZ_D 11568 30U, // USUBWB_ZZZ_H 11569 325U, // USUBWB_ZZZ_S 11570 773U, // USUBWT_ZZZ_D 11571 30U, // USUBWT_ZZZ_H 11572 325U, // USUBWT_ZZZ_S 11573 49671U, // USUBWv16i8_v8i16 11574 57862U, // USUBWv2i32_v2i64 11575 66055U, // USUBWv4i16_v4i32 11576 25094U, // USUBWv4i32_v2i64 11577 33287U, // USUBWv8i16_v4i32 11578 74247U, // USUBWv8i8_v8i16 11579 2U, // UUNPKHI_ZZ_D 11580 0U, // UUNPKHI_ZZ_H 11581 2U, // UUNPKHI_ZZ_S 11582 2U, // UUNPKLO_ZZ_D 11583 0U, // UUNPKLO_ZZ_H 11584 2U, // UUNPKLO_ZZ_S 11585 0U, // UXTB_ZPmZ_D 11586 0U, // UXTB_ZPmZ_H 11587 1U, // UXTB_ZPmZ_S 11588 0U, // UXTH_ZPmZ_D 11589 1U, // UXTH_ZPmZ_S 11590 0U, // UXTW_ZPmZ_D 11591 645U, // UZP1_PPP_B 11592 389U, // UZP1_PPP_D 11593 8U, // UZP1_PPP_H 11594 773U, // UZP1_PPP_S 11595 645U, // UZP1_ZZZ_B 11596 389U, // UZP1_ZZZ_D 11597 8U, // UZP1_ZZZ_H 11598 773U, // UZP1_ZZZ_S 11599 49673U, // UZP1v16i8 11600 57865U, // UZP1v2i32 11601 16902U, // UZP1v2i64 11602 66058U, // UZP1v4i16 11603 25095U, // UZP1v4i32 11604 33287U, // UZP1v8i16 11605 74250U, // UZP1v8i8 11606 645U, // UZP2_PPP_B 11607 389U, // UZP2_PPP_D 11608 8U, // UZP2_PPP_H 11609 773U, // UZP2_PPP_S 11610 645U, // UZP2_ZZZ_B 11611 389U, // UZP2_ZZZ_D 11612 8U, // UZP2_ZZZ_H 11613 773U, // UZP2_ZZZ_S 11614 49673U, // UZP2v16i8 11615 57865U, // UZP2v2i32 11616 16902U, // UZP2v2i64 11617 66058U, // UZP2v4i16 11618 25095U, // UZP2v4i32 11619 33287U, // UZP2v8i16 11620 74250U, // UZP2v8i8 11621 197U, // WHILEGE_PWW_B 11622 197U, // WHILEGE_PWW_D 11623 12U, // WHILEGE_PWW_H 11624 197U, // WHILEGE_PWW_S 11625 197U, // WHILEGE_PXX_B 11626 197U, // WHILEGE_PXX_D 11627 12U, // WHILEGE_PXX_H 11628 197U, // WHILEGE_PXX_S 11629 197U, // WHILEGT_PWW_B 11630 197U, // WHILEGT_PWW_D 11631 12U, // WHILEGT_PWW_H 11632 197U, // WHILEGT_PWW_S 11633 197U, // WHILEGT_PXX_B 11634 197U, // WHILEGT_PXX_D 11635 12U, // WHILEGT_PXX_H 11636 197U, // WHILEGT_PXX_S 11637 197U, // WHILEHI_PWW_B 11638 197U, // WHILEHI_PWW_D 11639 12U, // WHILEHI_PWW_H 11640 197U, // WHILEHI_PWW_S 11641 197U, // WHILEHI_PXX_B 11642 197U, // WHILEHI_PXX_D 11643 12U, // WHILEHI_PXX_H 11644 197U, // WHILEHI_PXX_S 11645 197U, // WHILEHS_PWW_B 11646 197U, // WHILEHS_PWW_D 11647 12U, // WHILEHS_PWW_H 11648 197U, // WHILEHS_PWW_S 11649 197U, // WHILEHS_PXX_B 11650 197U, // WHILEHS_PXX_D 11651 12U, // WHILEHS_PXX_H 11652 197U, // WHILEHS_PXX_S 11653 197U, // WHILELE_PWW_B 11654 197U, // WHILELE_PWW_D 11655 12U, // WHILELE_PWW_H 11656 197U, // WHILELE_PWW_S 11657 197U, // WHILELE_PXX_B 11658 197U, // WHILELE_PXX_D 11659 12U, // WHILELE_PXX_H 11660 197U, // WHILELE_PXX_S 11661 197U, // WHILELO_PWW_B 11662 197U, // WHILELO_PWW_D 11663 12U, // WHILELO_PWW_H 11664 197U, // WHILELO_PWW_S 11665 197U, // WHILELO_PXX_B 11666 197U, // WHILELO_PXX_D 11667 12U, // WHILELO_PXX_H 11668 197U, // WHILELO_PXX_S 11669 197U, // WHILELS_PWW_B 11670 197U, // WHILELS_PWW_D 11671 12U, // WHILELS_PWW_H 11672 197U, // WHILELS_PWW_S 11673 197U, // WHILELS_PXX_B 11674 197U, // WHILELS_PXX_D 11675 12U, // WHILELS_PXX_H 11676 197U, // WHILELS_PXX_S 11677 197U, // WHILELT_PWW_B 11678 197U, // WHILELT_PWW_D 11679 12U, // WHILELT_PWW_H 11680 197U, // WHILELT_PWW_S 11681 197U, // WHILELT_PXX_B 11682 197U, // WHILELT_PXX_D 11683 12U, // WHILELT_PXX_H 11684 197U, // WHILELT_PXX_S 11685 197U, // WHILERW_PXX_B 11686 197U, // WHILERW_PXX_D 11687 12U, // WHILERW_PXX_H 11688 197U, // WHILERW_PXX_S 11689 197U, // WHILEWR_PXX_B 11690 197U, // WHILEWR_PXX_D 11691 12U, // WHILEWR_PXX_H 11692 197U, // WHILEWR_PXX_S 11693 0U, // WRFFR 11694 0U, // XAFLAG 11695 180742U, // XAR 11696 8837U, // XAR_ZZZI_B 11697 8581U, // XAR_ZZZI_D 11698 90824U, // XAR_ZZZI_H 11699 8965U, // XAR_ZZZI_S 11700 0U, // XPACD 11701 0U, // XPACI 11702 0U, // XPACLRI 11703 4U, // XTNv16i8 11704 3U, // XTNv2i32 11705 4U, // XTNv4i16 11706 3U, // XTNv4i32 11707 4U, // XTNv8i16 11708 4U, // XTNv8i8 11709 645U, // ZIP1_PPP_B 11710 389U, // ZIP1_PPP_D 11711 8U, // ZIP1_PPP_H 11712 773U, // ZIP1_PPP_S 11713 645U, // ZIP1_ZZZ_B 11714 389U, // ZIP1_ZZZ_D 11715 8U, // ZIP1_ZZZ_H 11716 773U, // ZIP1_ZZZ_S 11717 49673U, // ZIP1v16i8 11718 57865U, // ZIP1v2i32 11719 16902U, // ZIP1v2i64 11720 66058U, // ZIP1v4i16 11721 25095U, // ZIP1v4i32 11722 33287U, // ZIP1v8i16 11723 74250U, // ZIP1v8i8 11724 645U, // ZIP2_PPP_B 11725 389U, // ZIP2_PPP_D 11726 8U, // ZIP2_PPP_H 11727 773U, // ZIP2_PPP_S 11728 645U, // ZIP2_ZZZ_B 11729 389U, // ZIP2_ZZZ_D 11730 8U, // ZIP2_ZZZ_H 11731 773U, // ZIP2_ZZZ_S 11732 49673U, // ZIP2v16i8 11733 57865U, // ZIP2v2i32 11734 16902U, // ZIP2v2i64 11735 66058U, // ZIP2v4i16 11736 25095U, // ZIP2v4i32 11737 33287U, // ZIP2v8i16 11738 74250U, // ZIP2v8i8 11739 }; 11740 11741 O << "\t"; 11742 11743 // Emit the opcode for the instruction. 11744 uint64_t Bits = 0; 11745 Bits |= (uint64_t)OpInfo0[MI->getOpcode()] << 0; 11746 Bits |= (uint64_t)OpInfo1[MI->getOpcode()] << 32; 11747 assert(Bits != 0 && "Cannot print this instruction."); 11748 O << AsmStrs+(Bits & 8191)-1; 11749 11750 11751 // Fragment 0 encoded into 6 bits for 54 unique commands. 11752 switch ((Bits >> 13) & 63) { 11753 default: llvm_unreachable("Invalid command number."); 11754 case 0: 11755 // DBG_VALUE, DBG_LABEL, BUNDLE, LIFETIME_START, LIFETIME_END, FENTRY_CAL... 11756 return; 11757 break; 11758 case 1: 11759 // ABS_ZPmZ_B, ADDHNB_ZZZ_B, ADDHNT_ZZZ_B, ADDP_ZPmZ_B, ADD_ZI_B, ADD_ZPm... 11760 printSVERegOp<'b'>(MI, 0, STI, O); 11761 break; 11762 case 2: 11763 // ABS_ZPmZ_D, ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDP_ZPmZ_D, ADD_ZI_D, ADD_ZPmZ_... 11764 printSVERegOp<'d'>(MI, 0, STI, O); 11765 break; 11766 case 3: 11767 // ABS_ZPmZ_H, ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADDP_ZPmZ_H, ADD_ZI_H, ADD_ZPm... 11768 printSVERegOp<'h'>(MI, 0, STI, O); 11769 O << ", "; 11770 break; 11771 case 4: 11772 // ABS_ZPmZ_S, ADCLB_ZZZ_S, ADCLT_ZZZ_S, ADDHNB_ZZZ_S, ADDHNT_ZZZ_S, ADDP... 11773 printSVERegOp<'s'>(MI, 0, STI, O); 11774 break; 11775 case 5: 11776 // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... 11777 printVRegOperand(MI, 0, STI, O); 11778 break; 11779 case 6: 11780 // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDPv2i64p, A... 11781 printOperand(MI, 0, STI, O); 11782 break; 11783 case 7: 11784 // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... 11785 printVRegOperand(MI, 1, STI, O); 11786 break; 11787 case 8: 11788 // B, BL 11789 printAlignedLabel(MI, 0, STI, O); 11790 return; 11791 break; 11792 case 9: 11793 // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL 11794 printImmHex(MI, 0, STI, O); 11795 return; 11796 break; 11797 case 10: 11798 // Bcc 11799 printCondCode(MI, 0, STI, O); 11800 O << "\t"; 11801 printAlignedLabel(MI, 1, STI, O); 11802 return; 11803 break; 11804 case 11: 11805 // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH... 11806 printOperand(MI, 1, STI, O); 11807 break; 11808 case 12: 11809 // CASPALW, CASPAW, CASPLW, CASPW 11810 printGPRSeqPairsClassOperand<32>(MI, 1, STI, O); 11811 O << ", "; 11812 printGPRSeqPairsClassOperand<32>(MI, 2, STI, O); 11813 O << ", ["; 11814 printOperand(MI, 3, STI, O); 11815 O << ']'; 11816 return; 11817 break; 11818 case 13: 11819 // CASPALX, CASPAX, CASPLX, CASPX 11820 printGPRSeqPairsClassOperand<64>(MI, 1, STI, O); 11821 O << ", "; 11822 printGPRSeqPairsClassOperand<64>(MI, 2, STI, O); 11823 O << ", ["; 11824 printOperand(MI, 3, STI, O); 11825 O << ']'; 11826 return; 11827 break; 11828 case 14: 11829 // DMB, DSB, ISB, TSB 11830 printBarrierOption(MI, 0, STI, O); 11831 return; 11832 break; 11833 case 15: 11834 // DUP_ZZI_Q, PMULLB_ZZZ_Q, PMULLT_ZZZ_Q 11835 printSVERegOp<'q'>(MI, 0, STI, O); 11836 O << ", "; 11837 break; 11838 case 16: 11839 // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ... 11840 printTypedVectorList<0,'d'>(MI, 0, STI, O); 11841 O << ", "; 11842 printSVERegOp<>(MI, 1, STI, O); 11843 break; 11844 case 17: 11845 // GLD1B_S_IMM_REAL, GLD1B_S_SXTW_REAL, GLD1B_S_UXTW_REAL, GLD1H_S_IMM_RE... 11846 printTypedVectorList<0,'s'>(MI, 0, STI, O); 11847 O << ", "; 11848 printSVERegOp<>(MI, 1, STI, O); 11849 break; 11850 case 18: 11851 // HINT 11852 printImm(MI, 0, STI, O); 11853 return; 11854 break; 11855 case 19: 11856 // LD1B, LD1B_IMM, LD1RB_IMM, LD1RQ_B, LD1RQ_B_IMM, LD2B, LD2B_IMM, LD3B,... 11857 printTypedVectorList<0,'b'>(MI, 0, STI, O); 11858 O << ", "; 11859 printSVERegOp<>(MI, 1, STI, O); 11860 break; 11861 case 20: 11862 // LD1B_H, LD1B_H_IMM, LD1H, LD1H_IMM, LD1RB_H_IMM, LD1RH_IMM, LD1RQ_H, L... 11863 printTypedVectorList<0,'h'>(MI, 0, STI, O); 11864 O << ", "; 11865 printSVERegOp<>(MI, 1, STI, O); 11866 break; 11867 case 21: 11868 // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,... 11869 printTypedVectorList<16, 'b'>(MI, 0, STI, O); 11870 O << ", ["; 11871 printOperand(MI, 1, STI, O); 11872 O << ']'; 11873 return; 11874 break; 11875 case 22: 11876 // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L... 11877 printTypedVectorList<16, 'b'>(MI, 1, STI, O); 11878 O << ", ["; 11879 printOperand(MI, 2, STI, O); 11880 O << "], "; 11881 break; 11882 case 23: 11883 // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv... 11884 printTypedVectorList<1, 'd'>(MI, 0, STI, O); 11885 O << ", ["; 11886 printOperand(MI, 1, STI, O); 11887 O << ']'; 11888 return; 11889 break; 11890 case 24: 11891 // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw... 11892 printTypedVectorList<1, 'd'>(MI, 1, STI, O); 11893 O << ", ["; 11894 printOperand(MI, 2, STI, O); 11895 O << "], "; 11896 break; 11897 case 25: 11898 // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw... 11899 printTypedVectorList<2, 'd'>(MI, 0, STI, O); 11900 O << ", ["; 11901 printOperand(MI, 1, STI, O); 11902 O << ']'; 11903 return; 11904 break; 11905 case 26: 11906 // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw... 11907 printTypedVectorList<2, 'd'>(MI, 1, STI, O); 11908 O << ", ["; 11909 printOperand(MI, 2, STI, O); 11910 O << "], "; 11911 break; 11912 case 27: 11913 // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw... 11914 printTypedVectorList<2, 's'>(MI, 0, STI, O); 11915 O << ", ["; 11916 printOperand(MI, 1, STI, O); 11917 O << ']'; 11918 return; 11919 break; 11920 case 28: 11921 // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw... 11922 printTypedVectorList<2, 's'>(MI, 1, STI, O); 11923 O << ", ["; 11924 printOperand(MI, 2, STI, O); 11925 O << "], "; 11926 break; 11927 case 29: 11928 // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw... 11929 printTypedVectorList<4, 'h'>(MI, 0, STI, O); 11930 O << ", ["; 11931 printOperand(MI, 1, STI, O); 11932 O << ']'; 11933 return; 11934 break; 11935 case 30: 11936 // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw... 11937 printTypedVectorList<4, 'h'>(MI, 1, STI, O); 11938 O << ", ["; 11939 printOperand(MI, 2, STI, O); 11940 O << "], "; 11941 break; 11942 case 31: 11943 // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw... 11944 printTypedVectorList<4, 's'>(MI, 0, STI, O); 11945 O << ", ["; 11946 printOperand(MI, 1, STI, O); 11947 O << ']'; 11948 return; 11949 break; 11950 case 32: 11951 // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw... 11952 printTypedVectorList<4, 's'>(MI, 1, STI, O); 11953 O << ", ["; 11954 printOperand(MI, 2, STI, O); 11955 O << "], "; 11956 break; 11957 case 33: 11958 // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw... 11959 printTypedVectorList<8, 'b'>(MI, 0, STI, O); 11960 O << ", ["; 11961 printOperand(MI, 1, STI, O); 11962 O << ']'; 11963 return; 11964 break; 11965 case 34: 11966 // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw... 11967 printTypedVectorList<8, 'b'>(MI, 1, STI, O); 11968 O << ", ["; 11969 printOperand(MI, 2, STI, O); 11970 O << "], "; 11971 break; 11972 case 35: 11973 // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw... 11974 printTypedVectorList<8, 'h'>(MI, 0, STI, O); 11975 O << ", ["; 11976 printOperand(MI, 1, STI, O); 11977 O << ']'; 11978 return; 11979 break; 11980 case 36: 11981 // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw... 11982 printTypedVectorList<8, 'h'>(MI, 1, STI, O); 11983 O << ", ["; 11984 printOperand(MI, 2, STI, O); 11985 O << "], "; 11986 break; 11987 case 37: 11988 // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,... 11989 printTypedVectorList<0, 'h'>(MI, 1, STI, O); 11990 printVectorIndex(MI, 2, STI, O); 11991 O << ", ["; 11992 printOperand(MI, 3, STI, O); 11993 break; 11994 case 38: 11995 // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST 11996 printTypedVectorList<0, 'h'>(MI, 2, STI, O); 11997 printVectorIndex(MI, 3, STI, O); 11998 O << ", ["; 11999 printOperand(MI, 4, STI, O); 12000 O << "], "; 12001 break; 12002 case 39: 12003 // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,... 12004 printTypedVectorList<0, 's'>(MI, 1, STI, O); 12005 printVectorIndex(MI, 2, STI, O); 12006 O << ", ["; 12007 printOperand(MI, 3, STI, O); 12008 break; 12009 case 40: 12010 // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST 12011 printTypedVectorList<0, 's'>(MI, 2, STI, O); 12012 printVectorIndex(MI, 3, STI, O); 12013 O << ", ["; 12014 printOperand(MI, 4, STI, O); 12015 O << "], "; 12016 break; 12017 case 41: 12018 // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,... 12019 printTypedVectorList<0, 'd'>(MI, 1, STI, O); 12020 printVectorIndex(MI, 2, STI, O); 12021 O << ", ["; 12022 printOperand(MI, 3, STI, O); 12023 break; 12024 case 42: 12025 // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST 12026 printTypedVectorList<0, 'd'>(MI, 2, STI, O); 12027 printVectorIndex(MI, 3, STI, O); 12028 O << ", ["; 12029 printOperand(MI, 4, STI, O); 12030 O << "], "; 12031 break; 12032 case 43: 12033 // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_... 12034 printTypedVectorList<0, 'b'>(MI, 1, STI, O); 12035 printVectorIndex(MI, 2, STI, O); 12036 O << ", ["; 12037 printOperand(MI, 3, STI, O); 12038 break; 12039 case 44: 12040 // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST 12041 printTypedVectorList<0, 'b'>(MI, 2, STI, O); 12042 printVectorIndex(MI, 3, STI, O); 12043 O << ", ["; 12044 printOperand(MI, 4, STI, O); 12045 O << "], "; 12046 break; 12047 case 45: 12048 // LDR_PXI, LDR_ZXI, MOVPRFX_ZZ, PTEST_PP, STR_PXI, STR_ZXI 12049 printSVERegOp<>(MI, 0, STI, O); 12050 break; 12051 case 46: 12052 // MSR 12053 printMSRSystemRegister(MI, 0, STI, O); 12054 O << ", "; 12055 printOperand(MI, 1, STI, O); 12056 return; 12057 break; 12058 case 47: 12059 // MSRpstateImm1, MSRpstateImm4 12060 printSystemPStateField(MI, 0, STI, O); 12061 O << ", "; 12062 printOperand(MI, 1, STI, O); 12063 return; 12064 break; 12065 case 48: 12066 // PRFB_D_PZI, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRF... 12067 printPrefetchOp<true>(MI, 0, STI, O); 12068 O << ", "; 12069 printSVERegOp<>(MI, 1, STI, O); 12070 O << ", ["; 12071 break; 12072 case 49: 12073 // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi 12074 printPrefetchOp(MI, 0, STI, O); 12075 break; 12076 case 50: 12077 // ST1i16, ST2i16, ST3i16, ST4i16 12078 printTypedVectorList<0, 'h'>(MI, 0, STI, O); 12079 printVectorIndex(MI, 1, STI, O); 12080 O << ", ["; 12081 printOperand(MI, 2, STI, O); 12082 O << ']'; 12083 return; 12084 break; 12085 case 51: 12086 // ST1i32, ST2i32, ST3i32, ST4i32 12087 printTypedVectorList<0, 's'>(MI, 0, STI, O); 12088 printVectorIndex(MI, 1, STI, O); 12089 O << ", ["; 12090 printOperand(MI, 2, STI, O); 12091 O << ']'; 12092 return; 12093 break; 12094 case 52: 12095 // ST1i64, ST2i64, ST3i64, ST4i64 12096 printTypedVectorList<0, 'd'>(MI, 0, STI, O); 12097 printVectorIndex(MI, 1, STI, O); 12098 O << ", ["; 12099 printOperand(MI, 2, STI, O); 12100 O << ']'; 12101 return; 12102 break; 12103 case 53: 12104 // ST1i8, ST2i8, ST3i8, ST4i8 12105 printTypedVectorList<0, 'b'>(MI, 0, STI, O); 12106 printVectorIndex(MI, 1, STI, O); 12107 O << ", ["; 12108 printOperand(MI, 2, STI, O); 12109 O << ']'; 12110 return; 12111 break; 12112 } 12113 12114 12115 // Fragment 1 encoded into 6 bits for 60 unique commands. 12116 switch ((Bits >> 19) & 63) { 12117 default: llvm_unreachable("Invalid command number."); 12118 case 0: 12119 // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, ABSv1i64, ADCLB_ZZZ_D, ADCLB_ZZZ_S... 12120 O << ", "; 12121 break; 12122 case 1: 12123 // ABS_ZPmZ_H, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPmZ_H, CNT_ZPmZ_H, CPY_ZPmI_... 12124 printSVERegOp<>(MI, 2, STI, O); 12125 O << "/m, "; 12126 break; 12127 case 2: 12128 // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM... 12129 O << ".16b, "; 12130 break; 12131 case 3: 12132 // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BICv2i32, CLSv2i32, C... 12133 O << ".2s, "; 12134 break; 12135 case 4: 12136 // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE... 12137 O << ".2d, "; 12138 break; 12139 case 5: 12140 // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BICv4i16, CLSv4i16, C... 12141 O << ".4h, "; 12142 break; 12143 case 6: 12144 // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BICv4i32, CLSv4i32, C... 12145 O << ".4s, "; 12146 break; 12147 case 7: 12148 // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BICv8i16, CLSv8i16, C... 12149 O << ".8h, "; 12150 break; 12151 case 8: 12152 // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8... 12153 O << ".8b, "; 12154 break; 12155 case 9: 12156 // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSHRNB_ZZI_H, RSUBHNB_ZZZ_H, SHRNB_ZZI_H,... 12157 printSVERegOp<'s'>(MI, 1, STI, O); 12158 break; 12159 case 10: 12160 // ADDHNT_ZZZ_H, PRFB_S_PZI, PRFD_S_PZI, PRFH_S_PZI, PRFW_S_PZI, RADDHNT_... 12161 printSVERegOp<'s'>(MI, 2, STI, O); 12162 break; 12163 case 11: 12164 // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... 12165 printSVERegOp<>(MI, 1, STI, O); 12166 break; 12167 case 12: 12168 // ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_ZZI_H, BDEP_ZZZ_H, BEXT_ZZZ_H... 12169 printSVERegOp<'h'>(MI, 1, STI, O); 12170 break; 12171 case 13: 12172 // ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, ADR_LSL_ZZZ_D_2, ADR_LSL_ZZZ_D_3, AD... 12173 O << ", ["; 12174 break; 12175 case 14: 12176 // AUTDZA, AUTDZB, AUTIZA, AUTIZB, BLR, BLRAAZ, BLRABZ, BR, BRAAZ, BRABZ,... 12177 return; 12178 break; 12179 case 15: 12180 // CMLA_ZZZI_H, CMLA_ZZZ_H, DECP_ZP_H, EORBT_ZZZ_H, EORTB_ZZZ_H, FCMLA_ZZ... 12181 printSVERegOp<'h'>(MI, 2, STI, O); 12182 break; 12183 case 16: 12184 // DECH_ZPiI, INCH_ZPiI, SQDECH_ZPiI, SQINCH_ZPiI, UQDECH_ZPiI, UQINCH_ZP... 12185 printSVEPattern(MI, 2, STI, O); 12186 O << ", mul "; 12187 printOperand(MI, 3, STI, O); 12188 return; 12189 break; 12190 case 17: 12191 // DUP_ZI_H 12192 printImm8OptLsl<int16_t>(MI, 1, STI, O); 12193 return; 12194 break; 12195 case 18: 12196 // DUP_ZR_H, INDEX_II_H, INDEX_IR_H, INDEX_RI_H, INDEX_RR_H, WHILEGE_PWW_... 12197 printOperand(MI, 1, STI, O); 12198 break; 12199 case 19: 12200 // DUP_ZZI_Q 12201 printSVERegOp<'q'>(MI, 1, STI, O); 12202 printVectorIndex(MI, 2, STI, O); 12203 return; 12204 break; 12205 case 20: 12206 // FCMPDri, FCMPEDri, FCMPEHri, FCMPESri, FCMPHri, FCMPSri 12207 O << ", #0.0"; 12208 return; 12209 break; 12210 case 21: 12211 // FDUP_ZI_H 12212 printFPImmOperand(MI, 1, STI, O); 12213 return; 12214 break; 12215 case 22: 12216 // FMOVXDHighr, INSvi64gpr, INSvi64lane 12217 O << ".d"; 12218 printVectorIndex(MI, 2, STI, O); 12219 O << ", "; 12220 break; 12221 case 23: 12222 // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ... 12223 O << "/z, ["; 12224 break; 12225 case 24: 12226 // INSR_ZR_H, INSR_ZV_H, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_S... 12227 printOperand(MI, 2, STI, O); 12228 break; 12229 case 25: 12230 // INSvi16gpr, INSvi16lane 12231 O << ".h"; 12232 printVectorIndex(MI, 2, STI, O); 12233 O << ", "; 12234 break; 12235 case 26: 12236 // INSvi32gpr, INSvi32lane 12237 O << ".s"; 12238 printVectorIndex(MI, 2, STI, O); 12239 O << ", "; 12240 break; 12241 case 27: 12242 // INSvi8gpr, INSvi8lane 12243 O << ".b"; 12244 printVectorIndex(MI, 2, STI, O); 12245 O << ", "; 12246 break; 12247 case 28: 12248 // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L... 12249 printPostIncOperand<64>(MI, 3, STI, O); 12250 return; 12251 break; 12252 case 29: 12253 // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD... 12254 printPostIncOperand<32>(MI, 3, STI, O); 12255 return; 12256 break; 12257 case 30: 12258 // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw... 12259 printPostIncOperand<16>(MI, 3, STI, O); 12260 return; 12261 break; 12262 case 31: 12263 // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1... 12264 printPostIncOperand<8>(MI, 3, STI, O); 12265 return; 12266 break; 12267 case 32: 12268 // LD1Rv16b_POST, LD1Rv8b_POST 12269 printPostIncOperand<1>(MI, 3, STI, O); 12270 return; 12271 break; 12272 case 33: 12273 // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,... 12274 printPostIncOperand<4>(MI, 3, STI, O); 12275 return; 12276 break; 12277 case 34: 12278 // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST 12279 printPostIncOperand<2>(MI, 3, STI, O); 12280 return; 12281 break; 12282 case 35: 12283 // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS... 12284 printPostIncOperand<48>(MI, 3, STI, O); 12285 return; 12286 break; 12287 case 36: 12288 // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST... 12289 printPostIncOperand<24>(MI, 3, STI, O); 12290 return; 12291 break; 12292 case 37: 12293 // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ... 12294 O << ']'; 12295 return; 12296 break; 12297 case 38: 12298 // LD1i16_POST, LD2i8_POST 12299 printPostIncOperand<2>(MI, 5, STI, O); 12300 return; 12301 break; 12302 case 39: 12303 // LD1i32_POST, LD2i16_POST, LD4i8_POST 12304 printPostIncOperand<4>(MI, 5, STI, O); 12305 return; 12306 break; 12307 case 40: 12308 // LD1i64_POST, LD2i32_POST, LD4i16_POST 12309 printPostIncOperand<8>(MI, 5, STI, O); 12310 return; 12311 break; 12312 case 41: 12313 // LD1i8_POST 12314 printPostIncOperand<1>(MI, 5, STI, O); 12315 return; 12316 break; 12317 case 42: 12318 // LD2i64_POST, LD4i32_POST 12319 printPostIncOperand<16>(MI, 5, STI, O); 12320 return; 12321 break; 12322 case 43: 12323 // LD3Rv16b_POST, LD3Rv8b_POST 12324 printPostIncOperand<3>(MI, 3, STI, O); 12325 return; 12326 break; 12327 case 44: 12328 // LD3Rv2s_POST, LD3Rv4s_POST 12329 printPostIncOperand<12>(MI, 3, STI, O); 12330 return; 12331 break; 12332 case 45: 12333 // LD3Rv4h_POST, LD3Rv8h_POST 12334 printPostIncOperand<6>(MI, 3, STI, O); 12335 return; 12336 break; 12337 case 46: 12338 // LD3i16_POST 12339 printPostIncOperand<6>(MI, 5, STI, O); 12340 return; 12341 break; 12342 case 47: 12343 // LD3i32_POST 12344 printPostIncOperand<12>(MI, 5, STI, O); 12345 return; 12346 break; 12347 case 48: 12348 // LD3i64_POST 12349 printPostIncOperand<24>(MI, 5, STI, O); 12350 return; 12351 break; 12352 case 49: 12353 // LD3i8_POST 12354 printPostIncOperand<3>(MI, 5, STI, O); 12355 return; 12356 break; 12357 case 50: 12358 // LD4i64_POST 12359 printPostIncOperand<32>(MI, 5, STI, O); 12360 return; 12361 break; 12362 case 51: 12363 // PMULLB_ZZZ_H, PMULLT_ZZZ_H, PUNPKHI_PP, PUNPKLO_PP, SABDLB_ZZZ_H, SABD... 12364 printSVERegOp<'b'>(MI, 1, STI, O); 12365 break; 12366 case 52: 12367 // PMULLB_ZZZ_Q, PMULLT_ZZZ_Q 12368 printSVERegOp<'d'>(MI, 1, STI, O); 12369 O << ", "; 12370 printSVERegOp<'d'>(MI, 2, STI, O); 12371 return; 12372 break; 12373 case 53: 12374 // PMULLv1i64, PMULLv2i64 12375 O << ".1q, "; 12376 printVRegOperand(MI, 1, STI, O); 12377 break; 12378 case 54: 12379 // PRFB_D_PZI, PRFD_D_PZI, PRFH_D_PZI, PRFW_D_PZI 12380 printSVERegOp<'d'>(MI, 2, STI, O); 12381 O << ", "; 12382 break; 12383 case 55: 12384 // PTRUES_H, PTRUE_H 12385 printSVEPattern(MI, 1, STI, O); 12386 return; 12387 break; 12388 case 56: 12389 // SABALB_ZZZ_H, SABALT_ZZZ_H, SMLALB_ZZZ_H, SMLALT_ZZZ_H, SMLSLB_ZZZ_H, ... 12390 printSVERegOp<'b'>(MI, 2, STI, O); 12391 O << ", "; 12392 printSVERegOp<'b'>(MI, 3, STI, O); 12393 return; 12394 break; 12395 case 57: 12396 // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v... 12397 O << ".1d, "; 12398 break; 12399 case 58: 12400 // ST1i16_POST, ST1i32_POST, ST1i64_POST, ST1i8_POST, ST2i16_POST, ST2i32... 12401 O << "], "; 12402 break; 12403 case 59: 12404 // TBL_ZZZZ_H, TBL_ZZZ_H 12405 printTypedVectorList<0,'h'>(MI, 1, STI, O); 12406 O << ", "; 12407 printSVERegOp<'h'>(MI, 2, STI, O); 12408 return; 12409 break; 12410 } 12411 12412 12413 // Fragment 2 encoded into 6 bits for 62 unique commands. 12414 switch ((Bits >> 25) & 63) { 12415 default: llvm_unreachable("Invalid command number."); 12416 case 0: 12417 // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, BRKA_PPmP, BRKB_PPmP, CLS_ZPmZ_B, ... 12418 printSVERegOp<>(MI, 2, STI, O); 12419 O << "/m, "; 12420 break; 12421 case 1: 12422 // ABS_ZPmZ_H, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPmZ_H, CNT_ZPmZ_H, FABS_ZPmZ... 12423 printSVERegOp<'h'>(MI, 3, STI, O); 12424 return; 12425 break; 12426 case 2: 12427 // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... 12428 printVRegOperand(MI, 1, STI, O); 12429 break; 12430 case 3: 12431 // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDSWri, ADDS... 12432 printOperand(MI, 1, STI, O); 12433 break; 12434 case 4: 12435 // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, DECP_ZP_D, EORBT_Z... 12436 printSVERegOp<'d'>(MI, 2, STI, O); 12437 break; 12438 case 5: 12439 // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, DECP_ZP_S, EORBT_ZZ... 12440 printSVERegOp<'s'>(MI, 2, STI, O); 12441 break; 12442 case 6: 12443 // ADDHNB_ZZZ_B, DECP_XP_H, INCP_XP_H, RADDHNB_ZZZ_B, RSHRNB_ZZI_B, RSUBH... 12444 printSVERegOp<'h'>(MI, 1, STI, O); 12445 break; 12446 case 7: 12447 // ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_Z... 12448 O << ", "; 12449 break; 12450 case 8: 12451 // ADDHNB_ZZZ_S, ADD_ZI_D, ADD_ZZZ_D, ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, A... 12452 printSVERegOp<'d'>(MI, 1, STI, O); 12453 break; 12454 case 9: 12455 // ADDHNT_ZZZ_B, CDOT_ZZZI_D, CDOT_ZZZ_D, FMLALB_ZZZI_SHH, FMLALB_ZZZ_SHH... 12456 printSVERegOp<'h'>(MI, 2, STI, O); 12457 break; 12458 case 10: 12459 // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... 12460 printVRegOperand(MI, 2, STI, O); 12461 break; 12462 case 11: 12463 // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm... 12464 printSVERegOp<>(MI, 1, STI, O); 12465 break; 12466 case 12: 12467 // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... 12468 O << "/m, "; 12469 break; 12470 case 13: 12471 // ADD_ZI_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, AESIMC_ZZ_B, AESMC_ZZ_B, ... 12472 printSVERegOp<'b'>(MI, 1, STI, O); 12473 break; 12474 case 14: 12475 // ADD_ZI_S, ADD_ZZZ_S, ADR_LSL_ZZZ_S_0, ADR_LSL_ZZZ_S_1, ADR_LSL_ZZZ_S_2... 12476 printSVERegOp<'s'>(MI, 1, STI, O); 12477 break; 12478 case 15: 12479 // ADRP 12480 printAdrpLabel(MI, 1, STI, O); 12481 return; 12482 break; 12483 case 16: 12484 // BFMWri, BFMXri, CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, C... 12485 printOperand(MI, 2, STI, O); 12486 break; 12487 case 17: 12488 // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv... 12489 printImm(MI, 2, STI, O); 12490 printShifter(MI, 3, STI, O); 12491 return; 12492 break; 12493 case 18: 12494 // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P... 12495 printAlignedLabel(MI, 1, STI, O); 12496 return; 12497 break; 12498 case 19: 12499 // CDOT_ZZZI_S, CDOT_ZZZ_S, CMLA_ZZZ_B, EORBT_ZZZ_B, EORTB_ZZZ_B, SABA_ZZ... 12500 printSVERegOp<'b'>(MI, 2, STI, O); 12501 O << ", "; 12502 break; 12503 case 20: 12504 // CMPEQ_PPzZI_H, CMPEQ_PPzZZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_PPzZI_H, CMPGE... 12505 O << "/z, "; 12506 break; 12507 case 21: 12508 // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI, PTRUES_B, PTRUES_D, PTRUES... 12509 printSVEPattern(MI, 1, STI, O); 12510 break; 12511 case 22: 12512 // CPY_ZPmI_H 12513 printImm8OptLsl<int16_t>(MI, 3, STI, O); 12514 return; 12515 break; 12516 case 23: 12517 // CPY_ZPmR_H, CPY_ZPmV_H, INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr,... 12518 printOperand(MI, 3, STI, O); 12519 break; 12520 case 24: 12521 // DECB_XPiI, DECD_XPiI, DECD_ZPiI, DECH_XPiI, DECW_XPiI, DECW_ZPiI, INCB... 12522 printSVEPattern(MI, 2, STI, O); 12523 O << ", mul "; 12524 printOperand(MI, 3, STI, O); 12525 return; 12526 break; 12527 case 25: 12528 // DECP_ZP_H, DUP_ZR_H, FEXPA_ZZ_H, FRECPE_ZZ_H, FRSQRTE_ZZ_H, INCP_ZP_H,... 12529 return; 12530 break; 12531 case 26: 12532 // DUPM_ZI 12533 printLogicalImm<int64_t>(MI, 1, STI, O); 12534 return; 12535 break; 12536 case 27: 12537 // DUP_ZI_B 12538 printImm8OptLsl<int8_t>(MI, 1, STI, O); 12539 return; 12540 break; 12541 case 28: 12542 // DUP_ZI_D 12543 printImm8OptLsl<int64_t>(MI, 1, STI, O); 12544 return; 12545 break; 12546 case 29: 12547 // DUP_ZI_S 12548 printImm8OptLsl<int32_t>(MI, 1, STI, O); 12549 return; 12550 break; 12551 case 30: 12552 // DUP_ZZI_H 12553 printVectorIndex(MI, 2, STI, O); 12554 return; 12555 break; 12556 case 31: 12557 // EXT_ZZI_B, TBL_ZZZZ_B, TBL_ZZZ_B 12558 printTypedVectorList<0,'b'>(MI, 1, STI, O); 12559 O << ", "; 12560 break; 12561 case 32: 12562 // FCPY_ZPmI_H 12563 printFPImmOperand(MI, 3, STI, O); 12564 return; 12565 break; 12566 case 33: 12567 // FCVTNT_ZPmZ_StoH, FCVT_ZPmZ_StoH, SCVTF_ZPmZ_StoH, UCVTF_ZPmZ_StoH 12568 printSVERegOp<'s'>(MI, 3, STI, O); 12569 return; 12570 break; 12571 case 34: 12572 // FCVT_ZPmZ_DtoH, SCVTF_ZPmZ_DtoH, UCVTF_ZPmZ_DtoH 12573 printSVERegOp<'d'>(MI, 3, STI, O); 12574 return; 12575 break; 12576 case 35: 12577 // FDUP_ZI_D, FDUP_ZI_S, FMOVDi, FMOVHi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_... 12578 printFPImmOperand(MI, 1, STI, O); 12579 return; 12580 break; 12581 case 36: 12582 // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane 12583 printVRegOperand(MI, 3, STI, O); 12584 break; 12585 case 37: 12586 // LDADDAB, LDADDAH, LDADDALB, LDADDALH, LDADDALW, LDADDALX, LDADDAW, LDA... 12587 printOperand(MI, 0, STI, O); 12588 O << ", ["; 12589 printOperand(MI, 2, STI, O); 12590 O << ']'; 12591 return; 12592 break; 12593 case 38: 12594 // MOVID, MOVIv2d_ns 12595 printSIMDType10Operand(MI, 1, STI, O); 12596 return; 12597 break; 12598 case 39: 12599 // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl... 12600 printImm(MI, 1, STI, O); 12601 break; 12602 case 40: 12603 // MRS 12604 printMRSSystemRegister(MI, 1, STI, O); 12605 return; 12606 break; 12607 case 41: 12608 // PMULLv1i64 12609 O << ".1d, "; 12610 printVRegOperand(MI, 2, STI, O); 12611 O << ".1d"; 12612 return; 12613 break; 12614 case 42: 12615 // PMULLv2i64 12616 O << ".2d, "; 12617 printVRegOperand(MI, 2, STI, O); 12618 O << ".2d"; 12619 return; 12620 break; 12621 case 43: 12622 // PRFD_D_PZI 12623 printImmScale<8>(MI, 3, STI, O); 12624 O << ']'; 12625 return; 12626 break; 12627 case 44: 12628 // PRFH_D_PZI 12629 printImmScale<2>(MI, 3, STI, O); 12630 O << ']'; 12631 return; 12632 break; 12633 case 45: 12634 // PRFW_D_PZI 12635 printImmScale<4>(MI, 3, STI, O); 12636 O << ']'; 12637 return; 12638 break; 12639 case 46: 12640 // SQDECB_XPiWdI, SQDECD_XPiWdI, SQDECH_XPiWdI, SQDECW_XPiWdI, SQINCB_XPi... 12641 printGPR64as32(MI, 1, STI, O); 12642 O << ", "; 12643 printSVEPattern(MI, 2, STI, O); 12644 O << ", mul "; 12645 printOperand(MI, 3, STI, O); 12646 return; 12647 break; 12648 case 47: 12649 // ST1i16_POST, ST2i8_POST 12650 printPostIncOperand<2>(MI, 4, STI, O); 12651 return; 12652 break; 12653 case 48: 12654 // ST1i32_POST, ST2i16_POST, ST4i8_POST 12655 printPostIncOperand<4>(MI, 4, STI, O); 12656 return; 12657 break; 12658 case 49: 12659 // ST1i64_POST, ST2i32_POST, ST4i16_POST 12660 printPostIncOperand<8>(MI, 4, STI, O); 12661 return; 12662 break; 12663 case 50: 12664 // ST1i8_POST 12665 printPostIncOperand<1>(MI, 4, STI, O); 12666 return; 12667 break; 12668 case 51: 12669 // ST2i64_POST, ST4i32_POST 12670 printPostIncOperand<16>(MI, 4, STI, O); 12671 return; 12672 break; 12673 case 52: 12674 // ST3i16_POST 12675 printPostIncOperand<6>(MI, 4, STI, O); 12676 return; 12677 break; 12678 case 53: 12679 // ST3i32_POST 12680 printPostIncOperand<12>(MI, 4, STI, O); 12681 return; 12682 break; 12683 case 54: 12684 // ST3i64_POST 12685 printPostIncOperand<24>(MI, 4, STI, O); 12686 return; 12687 break; 12688 case 55: 12689 // ST3i8_POST 12690 printPostIncOperand<3>(MI, 4, STI, O); 12691 return; 12692 break; 12693 case 56: 12694 // ST4i64_POST 12695 printPostIncOperand<32>(MI, 4, STI, O); 12696 return; 12697 break; 12698 case 57: 12699 // SYSxt 12700 printSysCROperand(MI, 1, STI, O); 12701 O << ", "; 12702 printSysCROperand(MI, 2, STI, O); 12703 O << ", "; 12704 printOperand(MI, 3, STI, O); 12705 O << ", "; 12706 printOperand(MI, 4, STI, O); 12707 return; 12708 break; 12709 case 58: 12710 // TBL_ZZZZ_D, TBL_ZZZ_D 12711 printTypedVectorList<0,'d'>(MI, 1, STI, O); 12712 O << ", "; 12713 printSVERegOp<'d'>(MI, 2, STI, O); 12714 return; 12715 break; 12716 case 59: 12717 // TBL_ZZZZ_S, TBL_ZZZ_S 12718 printTypedVectorList<0,'s'>(MI, 1, STI, O); 12719 O << ", "; 12720 printSVERegOp<'s'>(MI, 2, STI, O); 12721 return; 12722 break; 12723 case 60: 12724 // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB... 12725 printTypedVectorList<16, 'b'>(MI, 1, STI, O); 12726 O << ", "; 12727 printVRegOperand(MI, 2, STI, O); 12728 break; 12729 case 61: 12730 // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB... 12731 printTypedVectorList<16, 'b'>(MI, 2, STI, O); 12732 O << ", "; 12733 printVRegOperand(MI, 3, STI, O); 12734 break; 12735 } 12736 12737 12738 // Fragment 3 encoded into 7 bits for 96 unique commands. 12739 switch ((Bits >> 31) & 127) { 12740 default: llvm_unreachable("Invalid command number."); 12741 case 0: 12742 // ABS_ZPmZ_B, BRKA_PPmP, BRKB_PPmP, CDOT_ZZZI_S, CDOT_ZZZ_S, CLS_ZPmZ_B,... 12743 printSVERegOp<'b'>(MI, 3, STI, O); 12744 break; 12745 case 1: 12746 // ABS_ZPmZ_D, CLS_ZPmZ_D, CLZ_ZPmZ_D, CNOT_ZPmZ_D, CNT_ZPmZ_D, FABS_ZPmZ... 12747 printSVERegOp<'d'>(MI, 3, STI, O); 12748 return; 12749 break; 12750 case 2: 12751 // ABS_ZPmZ_S, ADDHNT_ZZZ_H, CLS_ZPmZ_S, CLZ_ZPmZ_S, CNOT_ZPmZ_S, CNT_ZPm... 12752 printSVERegOp<'s'>(MI, 3, STI, O); 12753 return; 12754 break; 12755 case 3: 12756 // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ... 12757 O << ".16b"; 12758 return; 12759 break; 12760 case 4: 12761 // ABSv1i64, ADR, AESIMC_ZZ_B, AESMC_ZZ_B, AUTDA, AUTDB, AUTIA, AUTIB, BL... 12762 return; 12763 break; 12764 case 5: 12765 // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV... 12766 O << ".2s"; 12767 return; 12768 break; 12769 case 6: 12770 // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64... 12771 O << ".2d"; 12772 return; 12773 break; 12774 case 7: 12775 // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FABSv4f16, FCVTASv4f16, FCVT... 12776 O << ".4h"; 12777 return; 12778 break; 12779 case 8: 12780 // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT... 12781 O << ".4s"; 12782 return; 12783 break; 12784 case 9: 12785 // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FABSv8f16, FCVTASv8f16, FCVT... 12786 O << ".8h"; 12787 return; 12788 break; 12789 case 10: 12790 // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv... 12791 O << ".8b"; 12792 return; 12793 break; 12794 case 11: 12795 // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD... 12796 O << ", "; 12797 break; 12798 case 12: 12799 // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSUBHNB_ZZZ_H, SUBHNB_ZZZ_H 12800 printSVERegOp<'s'>(MI, 2, STI, O); 12801 return; 12802 break; 12803 case 13: 12804 // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... 12805 O << ".2d, "; 12806 break; 12807 case 14: 12808 // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... 12809 O << ".4s, "; 12810 break; 12811 case 15: 12812 // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... 12813 O << ".8h, "; 12814 break; 12815 case 16: 12816 // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm... 12817 O << "/m, "; 12818 break; 12819 case 17: 12820 // ADDP_ZPmZ_H, ADD_ZPmZ_H, ADD_ZZZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ... 12821 printSVERegOp<'h'>(MI, 2, STI, O); 12822 break; 12823 case 18: 12824 // ADDPv16i8, ADDv16i8, ANDv16i8, BCAX, BICv16i8, BIFv16i8, BITv16i8, BSL... 12825 O << ".16b, "; 12826 break; 12827 case 19: 12828 // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... 12829 O << ".2s, "; 12830 break; 12831 case 20: 12832 // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... 12833 O << ".4h, "; 12834 break; 12835 case 21: 12836 // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... 12837 O << ".8b, "; 12838 break; 12839 case 22: 12840 // ADD_ZI_H, SQADD_ZI_H, SQSUB_ZI_H, SUBR_ZI_H, SUB_ZI_H, UQADD_ZI_H, UQS... 12841 printImm8OptLsl<uint16_t>(MI, 2, STI, O); 12842 return; 12843 break; 12844 case 23: 12845 // ANDS_PPzPP, AND_PPzPP, BICS_PPzPP, BIC_PPzPP, BRKAS_PPzP, BRKA_PPzP, B... 12846 O << "/z, "; 12847 break; 12848 case 24: 12849 // ASR_WIDE_ZZZ_H, LSL_WIDE_ZZZ_H, LSR_WIDE_ZZZ_H 12850 printSVERegOp<'d'>(MI, 2, STI, O); 12851 return; 12852 break; 12853 case 25: 12854 // ASR_ZZI_H, INDEX_II_H, INDEX_IR_H, INDEX_RI_H, INDEX_RR_H, LSL_ZZI_H, ... 12855 printOperand(MI, 2, STI, O); 12856 return; 12857 break; 12858 case 26: 12859 // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH... 12860 O << ", ["; 12861 break; 12862 case 27: 12863 // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz 12864 O << ".16b, #0"; 12865 return; 12866 break; 12867 case 28: 12868 // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz 12869 O << ", #0"; 12870 return; 12871 break; 12872 case 29: 12873 // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz 12874 O << ".2s, #0"; 12875 return; 12876 break; 12877 case 30: 12878 // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz 12879 O << ".2d, #0"; 12880 return; 12881 break; 12882 case 31: 12883 // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz 12884 O << ".4h, #0"; 12885 return; 12886 break; 12887 case 32: 12888 // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz 12889 O << ".4s, #0"; 12890 return; 12891 break; 12892 case 33: 12893 // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz 12894 O << ".8h, #0"; 12895 return; 12896 break; 12897 case 34: 12898 // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz 12899 O << ".8b, #0"; 12900 return; 12901 break; 12902 case 35: 12903 // CMLA_ZZZI_H, CMLA_ZZZ_H, EORBT_ZZZ_H, EORTB_ZZZ_H, FCMLA_ZPmZZ_H, FCML... 12904 printSVERegOp<'h'>(MI, 3, STI, O); 12905 break; 12906 case 36: 12907 // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI 12908 O << ", mul "; 12909 printOperand(MI, 2, STI, O); 12910 return; 12911 break; 12912 case 37: 12913 // CPY_ZPmI_B 12914 printImm8OptLsl<int8_t>(MI, 3, STI, O); 12915 return; 12916 break; 12917 case 38: 12918 // CPY_ZPmI_D 12919 printImm8OptLsl<int64_t>(MI, 3, STI, O); 12920 return; 12921 break; 12922 case 39: 12923 // CPY_ZPmI_S 12924 printImm8OptLsl<int32_t>(MI, 3, STI, O); 12925 return; 12926 break; 12927 case 40: 12928 // CPY_ZPmR_B, CPY_ZPmR_D, CPY_ZPmR_S, CPY_ZPmV_B, CPY_ZPmV_D, CPY_ZPmV_S... 12929 printOperand(MI, 3, STI, O); 12930 break; 12931 case 41: 12932 // CPY_ZPzI_H 12933 printImm8OptLsl<int16_t>(MI, 2, STI, O); 12934 return; 12935 break; 12936 case 42: 12937 // CPYi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1... 12938 O << ".h"; 12939 break; 12940 case 43: 12941 // CPYi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, UMOVvi3... 12942 O << ".s"; 12943 break; 12944 case 44: 12945 // CPYi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64 12946 O << ".d"; 12947 break; 12948 case 45: 12949 // CPYi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to64... 12950 O << ".b"; 12951 break; 12952 case 46: 12953 // DUP_ZZI_B, DUP_ZZI_D, DUP_ZZI_S 12954 printVectorIndex(MI, 2, STI, O); 12955 return; 12956 break; 12957 case 47: 12958 // EXT_ZZI_B, UMAX_ZI_H, UMIN_ZI_H 12959 printImm(MI, 2, STI, O); 12960 return; 12961 break; 12962 case 48: 12963 // FADDPv2i16p, FMAXNMPv2i16p, FMAXPv2i16p, FMINNMPv2i16p, FMINPv2i16p 12964 O << ".2h"; 12965 return; 12966 break; 12967 case 49: 12968 // FCMEQv1i16rz, FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i16rz, FCMGEv1i32rz, ... 12969 O << ", #0.0"; 12970 return; 12971 break; 12972 case 50: 12973 // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz 12974 O << ".2s, #0.0"; 12975 return; 12976 break; 12977 case 51: 12978 // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz 12979 O << ".2d, #0.0"; 12980 return; 12981 break; 12982 case 52: 12983 // FCMEQv4i16rz, FCMGEv4i16rz, FCMGTv4i16rz, FCMLEv4i16rz, FCMLTv4i16rz 12984 O << ".4h, #0.0"; 12985 return; 12986 break; 12987 case 53: 12988 // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz 12989 O << ".4s, #0.0"; 12990 return; 12991 break; 12992 case 54: 12993 // FCMEQv8i16rz, FCMGEv8i16rz, FCMGTv8i16rz, FCMLEv8i16rz, FCMLTv8i16rz 12994 O << ".8h, #0.0"; 12995 return; 12996 break; 12997 case 55: 12998 // FCPY_ZPmI_D, FCPY_ZPmI_S 12999 printFPImmOperand(MI, 3, STI, O); 13000 return; 13001 break; 13002 case 56: 13003 // FMLAL2lanev4f16, FMLAL2v4f16, FMLALlanev4f16, FMLALv4f16, FMLSL2lanev4... 13004 O << ".2h, "; 13005 printVRegOperand(MI, 3, STI, O); 13006 break; 13007 case 57: 13008 // LDAPRB, LDAPRH, LDAPRW, LDAPRX, LDARB, LDARH, LDARW, LDARX, LDAXRB, LD... 13009 O << ']'; 13010 return; 13011 break; 13012 case 58: 13013 // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo... 13014 O << "], "; 13015 break; 13016 case 59: 13017 // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ... 13018 printShifter(MI, 2, STI, O); 13019 return; 13020 break; 13021 case 60: 13022 // PMULLB_ZZZ_H, PMULLT_ZZZ_H, SABDLB_ZZZ_H, SABDLT_ZZZ_H, SADDLBT_ZZZ_H,... 13023 printSVERegOp<'b'>(MI, 2, STI, O); 13024 return; 13025 break; 13026 case 61: 13027 // PRFB_D_SCALED 13028 printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 3, STI, O); 13029 O << ']'; 13030 return; 13031 break; 13032 case 62: 13033 // PRFB_D_SXTW_SCALED 13034 printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 3, STI, O); 13035 O << ']'; 13036 return; 13037 break; 13038 case 63: 13039 // PRFB_D_UXTW_SCALED 13040 printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 3, STI, O); 13041 O << ']'; 13042 return; 13043 break; 13044 case 64: 13045 // PRFB_PRR 13046 printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O); 13047 O << ']'; 13048 return; 13049 break; 13050 case 65: 13051 // PRFB_S_SXTW_SCALED 13052 printRegWithShiftExtend<true, 8, 'w', 's'>(MI, 3, STI, O); 13053 O << ']'; 13054 return; 13055 break; 13056 case 66: 13057 // PRFB_S_UXTW_SCALED 13058 printRegWithShiftExtend<false, 8, 'w', 's'>(MI, 3, STI, O); 13059 O << ']'; 13060 return; 13061 break; 13062 case 67: 13063 // PRFD_D_SCALED 13064 printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 3, STI, O); 13065 O << ']'; 13066 return; 13067 break; 13068 case 68: 13069 // PRFD_D_SXTW_SCALED 13070 printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 3, STI, O); 13071 O << ']'; 13072 return; 13073 break; 13074 case 69: 13075 // PRFD_D_UXTW_SCALED 13076 printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 3, STI, O); 13077 O << ']'; 13078 return; 13079 break; 13080 case 70: 13081 // PRFD_PRR 13082 printRegWithShiftExtend<false, 64, 'x', 0>(MI, 3, STI, O); 13083 O << ']'; 13084 return; 13085 break; 13086 case 71: 13087 // PRFD_S_PZI 13088 printImmScale<8>(MI, 3, STI, O); 13089 O << ']'; 13090 return; 13091 break; 13092 case 72: 13093 // PRFD_S_SXTW_SCALED 13094 printRegWithShiftExtend<true, 64, 'w', 's'>(MI, 3, STI, O); 13095 O << ']'; 13096 return; 13097 break; 13098 case 73: 13099 // PRFD_S_UXTW_SCALED 13100 printRegWithShiftExtend<false, 64, 'w', 's'>(MI, 3, STI, O); 13101 O << ']'; 13102 return; 13103 break; 13104 case 74: 13105 // PRFH_D_SCALED 13106 printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 3, STI, O); 13107 O << ']'; 13108 return; 13109 break; 13110 case 75: 13111 // PRFH_D_SXTW_SCALED 13112 printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 3, STI, O); 13113 O << ']'; 13114 return; 13115 break; 13116 case 76: 13117 // PRFH_D_UXTW_SCALED 13118 printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 3, STI, O); 13119 O << ']'; 13120 return; 13121 break; 13122 case 77: 13123 // PRFH_PRR 13124 printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O); 13125 O << ']'; 13126 return; 13127 break; 13128 case 78: 13129 // PRFH_S_PZI 13130 printImmScale<2>(MI, 3, STI, O); 13131 O << ']'; 13132 return; 13133 break; 13134 case 79: 13135 // PRFH_S_SXTW_SCALED 13136 printRegWithShiftExtend<true, 16, 'w', 's'>(MI, 3, STI, O); 13137 O << ']'; 13138 return; 13139 break; 13140 case 80: 13141 // PRFH_S_UXTW_SCALED 13142 printRegWithShiftExtend<false, 16, 'w', 's'>(MI, 3, STI, O); 13143 O << ']'; 13144 return; 13145 break; 13146 case 81: 13147 // PRFS_PRR 13148 printRegWithShiftExtend<false, 32, 'x', 0>(MI, 3, STI, O); 13149 O << ']'; 13150 return; 13151 break; 13152 case 82: 13153 // PRFW_D_SCALED 13154 printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 3, STI, O); 13155 O << ']'; 13156 return; 13157 break; 13158 case 83: 13159 // PRFW_D_SXTW_SCALED 13160 printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 3, STI, O); 13161 O << ']'; 13162 return; 13163 break; 13164 case 84: 13165 // PRFW_D_UXTW_SCALED 13166 printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 3, STI, O); 13167 O << ']'; 13168 return; 13169 break; 13170 case 85: 13171 // PRFW_S_PZI 13172 printImmScale<4>(MI, 3, STI, O); 13173 O << ']'; 13174 return; 13175 break; 13176 case 86: 13177 // PRFW_S_SXTW_SCALED 13178 printRegWithShiftExtend<true, 32, 'w', 's'>(MI, 3, STI, O); 13179 O << ']'; 13180 return; 13181 break; 13182 case 87: 13183 // PRFW_S_UXTW_SCALED 13184 printRegWithShiftExtend<false, 32, 'w', 's'>(MI, 3, STI, O); 13185 O << ']'; 13186 return; 13187 break; 13188 case 88: 13189 // RDFFRS_PPz, RDFFR_PPz 13190 O << "/z"; 13191 return; 13192 break; 13193 case 89: 13194 // SHLLv16i8 13195 O << ".16b, #8"; 13196 return; 13197 break; 13198 case 90: 13199 // SHLLv2i32 13200 O << ".2s, #32"; 13201 return; 13202 break; 13203 case 91: 13204 // SHLLv4i16 13205 O << ".4h, #16"; 13206 return; 13207 break; 13208 case 92: 13209 // SHLLv4i32 13210 O << ".4s, #32"; 13211 return; 13212 break; 13213 case 93: 13214 // SHLLv8i16 13215 O << ".8h, #16"; 13216 return; 13217 break; 13218 case 94: 13219 // SHLLv8i8 13220 O << ".8b, #8"; 13221 return; 13222 break; 13223 case 95: 13224 // SPLICE_ZPZZ_H 13225 printTypedVectorList<0,'h'>(MI, 2, STI, O); 13226 return; 13227 break; 13228 } 13229 13230 13231 // Fragment 4 encoded into 7 bits for 90 unique commands. 13232 switch ((Bits >> 38) & 127) { 13233 default: llvm_unreachable("Invalid command number."); 13234 case 0: 13235 // ABS_ZPmZ_B, ADD_ZZZ_H, BDEP_ZZZ_H, BEXT_ZZZ_H, BGRP_ZZZ_H, BRKA_PPmP, ... 13236 return; 13237 break; 13238 case 1: 13239 // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, EORBT_ZZZ_D, EORTB... 13240 printSVERegOp<'d'>(MI, 3, STI, O); 13241 break; 13242 case 2: 13243 // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, EORBT_ZZZ_S, EORTB_... 13244 printSVERegOp<'s'>(MI, 3, STI, O); 13245 break; 13246 case 3: 13247 // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPL_XXI, ADDSXrx64, ADDVL_XXI, ADDXrx6... 13248 printOperand(MI, 2, STI, O); 13249 break; 13250 case 4: 13251 // ADDG, ST2GOffset, STGOffset, STZ2GOffset, STZGOffset, SUBG 13252 printImmScale<16>(MI, 2, STI, O); 13253 break; 13254 case 5: 13255 // ADDHNB_ZZZ_B, ANDV_VPZ_H, CNTP_XPP_H, EORV_VPZ_H, FADDV_VPZ_H, FMAXNMV... 13256 printSVERegOp<'h'>(MI, 2, STI, O); 13257 break; 13258 case 6: 13259 // ADDHNB_ZZZ_S, ADDP_ZPmZ_D, ADD_ZPmZ_D, ADD_ZZZ_D, ANDV_VPZ_D, AND_ZPmZ... 13260 printSVERegOp<'d'>(MI, 2, STI, O); 13261 break; 13262 case 7: 13263 // ADDHNT_ZZZ_B, CDOT_ZZZI_D, CDOT_ZZZ_D, FMLALB_ZZZI_SHH, FMLALB_ZZZ_SHH... 13264 printSVERegOp<'h'>(MI, 3, STI, O); 13265 break; 13266 case 8: 13267 // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2... 13268 printVRegOperand(MI, 2, STI, O); 13269 break; 13270 case 9: 13271 // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BITv16i8, BITv8i... 13272 printVRegOperand(MI, 3, STI, O); 13273 break; 13274 case 10: 13275 // ADDP_ZPmZ_B, ADD_ZPmZ_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, ANDS_PPzPP... 13276 printSVERegOp<'b'>(MI, 2, STI, O); 13277 break; 13278 case 11: 13279 // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... 13280 O << ", "; 13281 break; 13282 case 12: 13283 // ADDP_ZPmZ_S, ADD_ZPmZ_S, ADD_ZZZ_S, ANDV_VPZ_S, AND_ZPmZ_S, ASRD_ZPmI_... 13284 printSVERegOp<'s'>(MI, 2, STI, O); 13285 break; 13286 case 13: 13287 // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri 13288 printAddSubImm(MI, 2, STI, O); 13289 return; 13290 break; 13291 case 14: 13292 // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI... 13293 printShiftedRegister(MI, 2, STI, O); 13294 return; 13295 break; 13296 case 15: 13297 // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx 13298 printExtendedRegister(MI, 2, STI, O); 13299 return; 13300 break; 13301 case 16: 13302 // ADD_ZI_B, SQADD_ZI_B, SQSUB_ZI_B, SUBR_ZI_B, SUB_ZI_B, UQADD_ZI_B, UQS... 13303 printImm8OptLsl<uint8_t>(MI, 2, STI, O); 13304 return; 13305 break; 13306 case 17: 13307 // ADD_ZI_D, SQADD_ZI_D, SQSUB_ZI_D, SUBR_ZI_D, SUB_ZI_D, UQADD_ZI_D, UQS... 13308 printImm8OptLsl<uint64_t>(MI, 2, STI, O); 13309 return; 13310 break; 13311 case 18: 13312 // ADD_ZI_S, SQADD_ZI_S, SQSUB_ZI_S, SUBR_ZI_S, SUB_ZI_S, UQADD_ZI_S, UQS... 13313 printImm8OptLsl<uint32_t>(MI, 2, STI, O); 13314 return; 13315 break; 13316 case 19: 13317 // ADR_LSL_ZZZ_D_0 13318 printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 2, STI, O); 13319 O << ']'; 13320 return; 13321 break; 13322 case 20: 13323 // ADR_LSL_ZZZ_D_1 13324 printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 2, STI, O); 13325 O << ']'; 13326 return; 13327 break; 13328 case 21: 13329 // ADR_LSL_ZZZ_D_2 13330 printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 2, STI, O); 13331 O << ']'; 13332 return; 13333 break; 13334 case 22: 13335 // ADR_LSL_ZZZ_D_3 13336 printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 2, STI, O); 13337 O << ']'; 13338 return; 13339 break; 13340 case 23: 13341 // ADR_LSL_ZZZ_S_0 13342 printRegWithShiftExtend<false, 8, 'x', 's'>(MI, 2, STI, O); 13343 O << ']'; 13344 return; 13345 break; 13346 case 24: 13347 // ADR_LSL_ZZZ_S_1 13348 printRegWithShiftExtend<false, 16, 'x', 's'>(MI, 2, STI, O); 13349 O << ']'; 13350 return; 13351 break; 13352 case 25: 13353 // ADR_LSL_ZZZ_S_2 13354 printRegWithShiftExtend<false, 32, 'x', 's'>(MI, 2, STI, O); 13355 O << ']'; 13356 return; 13357 break; 13358 case 26: 13359 // ADR_LSL_ZZZ_S_3 13360 printRegWithShiftExtend<false, 64, 'x', 's'>(MI, 2, STI, O); 13361 O << ']'; 13362 return; 13363 break; 13364 case 27: 13365 // ADR_SXTW_ZZZ_D_0 13366 printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 2, STI, O); 13367 O << ']'; 13368 return; 13369 break; 13370 case 28: 13371 // ADR_SXTW_ZZZ_D_1 13372 printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 2, STI, O); 13373 O << ']'; 13374 return; 13375 break; 13376 case 29: 13377 // ADR_SXTW_ZZZ_D_2 13378 printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 2, STI, O); 13379 O << ']'; 13380 return; 13381 break; 13382 case 30: 13383 // ADR_SXTW_ZZZ_D_3 13384 printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 2, STI, O); 13385 O << ']'; 13386 return; 13387 break; 13388 case 31: 13389 // ADR_UXTW_ZZZ_D_0 13390 printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 2, STI, O); 13391 O << ']'; 13392 return; 13393 break; 13394 case 32: 13395 // ADR_UXTW_ZZZ_D_1 13396 printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 2, STI, O); 13397 O << ']'; 13398 return; 13399 break; 13400 case 33: 13401 // ADR_UXTW_ZZZ_D_2 13402 printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 2, STI, O); 13403 O << ']'; 13404 return; 13405 break; 13406 case 34: 13407 // ADR_UXTW_ZZZ_D_3 13408 printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 2, STI, O); 13409 O << ']'; 13410 return; 13411 break; 13412 case 35: 13413 // ANDSWri, ANDWri, EORWri, ORRWri 13414 printLogicalImm<int32_t>(MI, 2, STI, O); 13415 return; 13416 break; 13417 case 36: 13418 // ANDSXri, ANDXri, AND_ZI, EORXri, EOR_ZI, ORRXri, ORR_ZI 13419 printLogicalImm<int64_t>(MI, 2, STI, O); 13420 return; 13421 break; 13422 case 37: 13423 // BFMWri, BFMXri, CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, C... 13424 printOperand(MI, 3, STI, O); 13425 break; 13426 case 38: 13427 // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, FMLA_ZZZI_H, FMLS_ZZZI_H, INSv... 13428 printVectorIndex(MI, 4, STI, O); 13429 break; 13430 case 39: 13431 // CPY_ZPzI_B 13432 printImm8OptLsl<int8_t>(MI, 2, STI, O); 13433 return; 13434 break; 13435 case 40: 13436 // CPY_ZPzI_D 13437 printImm8OptLsl<int64_t>(MI, 2, STI, O); 13438 return; 13439 break; 13440 case 41: 13441 // CPY_ZPzI_S 13442 printImm8OptLsl<int32_t>(MI, 2, STI, O); 13443 return; 13444 break; 13445 case 42: 13446 // CPYi16, CPYi32, CPYi64, CPYi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan... 13447 printVectorIndex(MI, 2, STI, O); 13448 return; 13449 break; 13450 case 43: 13451 // FCMEQ_PPzZ0_H, FCMGE_PPzZ0_H, FCMGT_PPzZ0_H, FCMLE_PPzZ0_H, FCMLT_PPzZ... 13452 O << ", #0.0"; 13453 return; 13454 break; 13455 case 44: 13456 // FMLAL2lanev4f16, FMLALlanev4f16, FMLSL2lanev4f16, FMLSLlanev4f16 13457 O << ".h"; 13458 printVectorIndex(MI, 4, STI, O); 13459 return; 13460 break; 13461 case 45: 13462 // FMLAL2v4f16, FMLALv4f16, FMLSL2v4f16, FMLSLv4f16 13463 O << ".2h"; 13464 return; 13465 break; 13466 case 46: 13467 // FMUL_ZZZI_H, MUL_ZZZI_H, SQDMULH_ZZZI_H, SQRDMULH_ZZZI_H 13468 printVectorIndex(MI, 3, STI, O); 13469 return; 13470 break; 13471 case 47: 13472 // GLD1B_D_REAL, GLD1D_REAL, GLD1H_D_REAL, GLD1SB_D_REAL, GLD1SH_D_REAL, ... 13473 printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 3, STI, O); 13474 O << ']'; 13475 return; 13476 break; 13477 case 48: 13478 // GLD1B_D_SXTW_REAL, GLD1D_SXTW_REAL, GLD1H_D_SXTW_REAL, GLD1SB_D_SXTW_R... 13479 printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 3, STI, O); 13480 O << ']'; 13481 return; 13482 break; 13483 case 49: 13484 // GLD1B_D_UXTW_REAL, GLD1D_UXTW_REAL, GLD1H_D_UXTW_REAL, GLD1SB_D_UXTW_R... 13485 printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 3, STI, O); 13486 O << ']'; 13487 return; 13488 break; 13489 case 50: 13490 // GLD1B_S_SXTW_REAL, GLD1H_S_SXTW_REAL, GLD1SB_S_SXTW_REAL, GLD1SH_S_SXT... 13491 printRegWithShiftExtend<true, 8, 'w', 's'>(MI, 3, STI, O); 13492 O << ']'; 13493 return; 13494 break; 13495 case 51: 13496 // GLD1B_S_UXTW_REAL, GLD1H_S_UXTW_REAL, GLD1SB_S_UXTW_REAL, GLD1SH_S_UXT... 13497 printRegWithShiftExtend<false, 8, 'w', 's'>(MI, 3, STI, O); 13498 O << ']'; 13499 return; 13500 break; 13501 case 52: 13502 // GLD1D_IMM_REAL, GLDFF1D_IMM_REAL, LD1RD_IMM, LDRAAwriteback, LDRABwrit... 13503 printImmScale<8>(MI, 3, STI, O); 13504 break; 13505 case 53: 13506 // GLD1D_SCALED_REAL, GLDFF1D_SCALED_REAL, SST1D_SCALED_SCALED_REAL 13507 printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 3, STI, O); 13508 O << ']'; 13509 return; 13510 break; 13511 case 54: 13512 // GLD1D_SXTW_SCALED_REAL, GLDFF1D_SXTW_SCALED_REAL, SST1D_SXTW_SCALED 13513 printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 3, STI, O); 13514 O << ']'; 13515 return; 13516 break; 13517 case 55: 13518 // GLD1D_UXTW_SCALED_REAL, GLDFF1D_UXTW_SCALED_REAL, SST1D_UXTW_SCALED 13519 printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 3, STI, O); 13520 O << ']'; 13521 return; 13522 break; 13523 case 56: 13524 // GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL, GLD1SH_D_IMM_REAL, GLD1SH_S_IMM_RE... 13525 printImmScale<2>(MI, 3, STI, O); 13526 break; 13527 case 57: 13528 // GLD1H_D_SCALED_REAL, GLD1SH_D_SCALED_REAL, GLDFF1H_D_SCALED_REAL, GLDF... 13529 printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 3, STI, O); 13530 O << ']'; 13531 return; 13532 break; 13533 case 58: 13534 // GLD1H_D_SXTW_SCALED_REAL, GLD1SH_D_SXTW_SCALED_REAL, GLDFF1H_D_SXTW_SC... 13535 printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 3, STI, O); 13536 O << ']'; 13537 return; 13538 break; 13539 case 59: 13540 // GLD1H_D_UXTW_SCALED_REAL, GLD1SH_D_UXTW_SCALED_REAL, GLDFF1H_D_UXTW_SC... 13541 printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 3, STI, O); 13542 O << ']'; 13543 return; 13544 break; 13545 case 60: 13546 // GLD1H_S_SXTW_SCALED_REAL, GLD1SH_S_SXTW_SCALED_REAL, GLDFF1H_S_SXTW_SC... 13547 printRegWithShiftExtend<true, 16, 'w', 's'>(MI, 3, STI, O); 13548 O << ']'; 13549 return; 13550 break; 13551 case 61: 13552 // GLD1H_S_UXTW_SCALED_REAL, GLD1SH_S_UXTW_SCALED_REAL, GLDFF1H_S_UXTW_SC... 13553 printRegWithShiftExtend<false, 16, 'w', 's'>(MI, 3, STI, O); 13554 O << ']'; 13555 return; 13556 break; 13557 case 62: 13558 // GLD1SW_D_IMM_REAL, GLD1W_D_IMM_REAL, GLD1W_IMM_REAL, GLDFF1SW_D_IMM_RE... 13559 printImmScale<4>(MI, 3, STI, O); 13560 break; 13561 case 63: 13562 // GLD1SW_D_SCALED_REAL, GLD1W_D_SCALED_REAL, GLDFF1SW_D_SCALED_REAL, GLD... 13563 printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 3, STI, O); 13564 O << ']'; 13565 return; 13566 break; 13567 case 64: 13568 // GLD1SW_D_SXTW_SCALED_REAL, GLD1W_D_SXTW_SCALED_REAL, GLDFF1SW_D_SXTW_S... 13569 printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 3, STI, O); 13570 O << ']'; 13571 return; 13572 break; 13573 case 65: 13574 // GLD1SW_D_UXTW_SCALED_REAL, GLD1W_D_UXTW_SCALED_REAL, GLDFF1SW_D_UXTW_S... 13575 printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 3, STI, O); 13576 O << ']'; 13577 return; 13578 break; 13579 case 66: 13580 // GLD1W_SXTW_SCALED_REAL, GLDFF1W_SXTW_SCALED_REAL, SST1W_SXTW_SCALED 13581 printRegWithShiftExtend<true, 32, 'w', 's'>(MI, 3, STI, O); 13582 O << ']'; 13583 return; 13584 break; 13585 case 67: 13586 // GLD1W_UXTW_SCALED_REAL, GLDFF1W_UXTW_SCALED_REAL, SST1W_UXTW_SCALED 13587 printRegWithShiftExtend<false, 32, 'w', 's'>(MI, 3, STI, O); 13588 O << ']'; 13589 return; 13590 break; 13591 case 68: 13592 // LD1B, LD1B_D, LD1B_H, LD1B_S, LD1RQ_B, LD1SB_D, LD1SB_H, LD1SB_S, LD2B... 13593 printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O); 13594 O << ']'; 13595 return; 13596 break; 13597 case 69: 13598 // LD1D, LD1RQ_D, LD2D, LD3D, LD4D, LDFF1D_REAL, LDNT1D_ZRR, ST1D, ST2D, ... 13599 printRegWithShiftExtend<false, 64, 'x', 0>(MI, 3, STI, O); 13600 O << ']'; 13601 return; 13602 break; 13603 case 70: 13604 // LD1H, LD1H_D, LD1H_S, LD1RQ_H, LD1SH_D, LD1SH_S, LD2H, LD3H, LD4H, LDF... 13605 printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O); 13606 O << ']'; 13607 return; 13608 break; 13609 case 71: 13610 // LD1RQ_B_IMM, LD1RQ_D_IMM, LD1RQ_H_IMM, LD1RQ_W_IMM, LDG, ST2GPostIndex... 13611 printImmScale<16>(MI, 3, STI, O); 13612 break; 13613 case 72: 13614 // LD1RQ_W, LD1SW_D, LD1W, LD1W_D, LD2W, LD3W, LD4W, LDFF1SW_D_REAL, LDFF... 13615 printRegWithShiftExtend<false, 32, 'x', 0>(MI, 3, STI, O); 13616 O << ']'; 13617 return; 13618 break; 13619 case 73: 13620 // LD3B_IMM, LD3D_IMM, LD3H_IMM, LD3W_IMM, ST3B_IMM, ST3D_IMM, ST3H_IMM, ... 13621 printImmScale<3>(MI, 3, STI, O); 13622 O << ", mul vl]"; 13623 return; 13624 break; 13625 case 74: 13626 // LDRAAindexed, LDRABindexed 13627 printImmScale<8>(MI, 2, STI, O); 13628 O << ']'; 13629 return; 13630 break; 13631 case 75: 13632 // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui 13633 printUImm12Offset<1>(MI, 2, STI, O); 13634 O << ']'; 13635 return; 13636 break; 13637 case 76: 13638 // LDRDui, LDRXui, PRFMui, STRDui, STRXui 13639 printUImm12Offset<8>(MI, 2, STI, O); 13640 O << ']'; 13641 return; 13642 break; 13643 case 77: 13644 // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui 13645 printUImm12Offset<2>(MI, 2, STI, O); 13646 O << ']'; 13647 return; 13648 break; 13649 case 78: 13650 // LDRQui, STRQui 13651 printUImm12Offset<16>(MI, 2, STI, O); 13652 O << ']'; 13653 return; 13654 break; 13655 case 79: 13656 // LDRSWui, LDRSui, LDRWui, STRSui, STRWui 13657 printUImm12Offset<4>(MI, 2, STI, O); 13658 O << ']'; 13659 return; 13660 break; 13661 case 80: 13662 // MAD_ZPmZZ_B, MLA_ZPmZZ_B, MLS_ZPmZZ_B, MSB_ZPmZZ_B 13663 printSVERegOp<'b'>(MI, 3, STI, O); 13664 O << ", "; 13665 printSVERegOp<'b'>(MI, 4, STI, O); 13666 return; 13667 break; 13668 case 81: 13669 // PRFB_PRI, PRFD_PRI, PRFH_PRI, PRFW_PRI 13670 O << ", mul vl]"; 13671 return; 13672 break; 13673 case 82: 13674 // PRFB_S_PZI 13675 O << ']'; 13676 return; 13677 break; 13678 case 83: 13679 // SPLICE_ZPZZ_B 13680 printTypedVectorList<0,'b'>(MI, 2, STI, O); 13681 return; 13682 break; 13683 case 84: 13684 // SPLICE_ZPZZ_D 13685 printTypedVectorList<0,'d'>(MI, 2, STI, O); 13686 return; 13687 break; 13688 case 85: 13689 // SPLICE_ZPZZ_S 13690 printTypedVectorList<0,'s'>(MI, 2, STI, O); 13691 return; 13692 break; 13693 case 86: 13694 // SQDECP_XPWd_B, SQDECP_XPWd_D, SQDECP_XPWd_H, SQDECP_XPWd_S, SQINCP_XPW... 13695 printGPR64as32(MI, 2, STI, O); 13696 return; 13697 break; 13698 case 87: 13699 // SYSLxt 13700 printSysCROperand(MI, 2, STI, O); 13701 O << ", "; 13702 printSysCROperand(MI, 3, STI, O); 13703 O << ", "; 13704 printOperand(MI, 4, STI, O); 13705 return; 13706 break; 13707 case 88: 13708 // TBNZW, TBNZX, TBZW, TBZX 13709 printAlignedLabel(MI, 2, STI, O); 13710 return; 13711 break; 13712 case 89: 13713 // UMAX_ZI_B, UMAX_ZI_D, UMAX_ZI_S, UMIN_ZI_B, UMIN_ZI_D, UMIN_ZI_S 13714 printImm(MI, 2, STI, O); 13715 return; 13716 break; 13717 } 13718 13719 13720 // Fragment 5 encoded into 6 bits for 39 unique commands. 13721 switch ((Bits >> 45) & 63) { 13722 default: llvm_unreachable("Invalid command number."); 13723 case 0: 13724 // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD... 13725 return; 13726 break; 13727 case 1: 13728 // ADDG, ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, A... 13729 O << ", "; 13730 break; 13731 case 2: 13732 // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... 13733 O << ".2d"; 13734 return; 13735 break; 13736 case 3: 13737 // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... 13738 O << ".4s"; 13739 return; 13740 break; 13741 case 4: 13742 // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... 13743 O << ".8h"; 13744 return; 13745 break; 13746 case 5: 13747 // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BIC_ZPmZ... 13748 printSVERegOp<'h'>(MI, 3, STI, O); 13749 break; 13750 case 6: 13751 // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... 13752 O << ".16b"; 13753 return; 13754 break; 13755 case 7: 13756 // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... 13757 O << ".2s"; 13758 return; 13759 break; 13760 case 8: 13761 // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... 13762 O << ".4h"; 13763 return; 13764 break; 13765 case 9: 13766 // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... 13767 O << ".8b"; 13768 return; 13769 break; 13770 case 10: 13771 // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64 13772 printArithExtend(MI, 3, STI, O); 13773 return; 13774 break; 13775 case 11: 13776 // ASRD_ZPmI_H, ASR_ZPmI_H, CMPEQ_PPzZI_H, CMPGE_PPzZI_H, CMPGT_PPzZI_H, ... 13777 printOperand(MI, 3, STI, O); 13778 return; 13779 break; 13780 case 12: 13781 // ASR_WIDE_ZPmZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_WIDE_PPzZZ_H, CMPGT_WIDE_PP... 13782 printSVERegOp<'d'>(MI, 3, STI, O); 13783 return; 13784 break; 13785 case 13: 13786 // BCAX, EOR3, EXTv16i8 13787 O << ".16b, "; 13788 break; 13789 case 14: 13790 // CADD_ZZI_H, SQCADD_ZZI_H 13791 printComplexRotationOp<180, 90>(MI, 3, STI, O); 13792 return; 13793 break; 13794 case 15: 13795 // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH... 13796 O << ']'; 13797 return; 13798 break; 13799 case 16: 13800 // CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA_ZZZI_S, FMLALB_ZZZI_SHH, FMLALT_ZZZI_S... 13801 printVectorIndex(MI, 4, STI, O); 13802 break; 13803 case 17: 13804 // CDOT_ZZZ_S, CMLA_ZZZ_B, CMLA_ZZZ_H, SQRDCMLAH_ZZZ_B, SQRDCMLAH_ZZZ_H 13805 printComplexRotationOp<90, 0>(MI, 4, STI, O); 13806 return; 13807 break; 13808 case 18: 13809 // CMPHI_PPzZI_H, CMPHS_PPzZI_H, CMPLO_PPzZI_H, CMPLS_PPzZI_H 13810 printImm(MI, 3, STI, O); 13811 return; 13812 break; 13813 case 19: 13814 // EXTv8i8 13815 O << ".8b, "; 13816 printOperand(MI, 3, STI, O); 13817 return; 13818 break; 13819 case 20: 13820 // FADD_ZPmI_H, FSUBR_ZPmI_H, FSUB_ZPmI_H 13821 printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::one>(MI, 3, STI, O); 13822 return; 13823 break; 13824 case 21: 13825 // FCADDv2f32, FCMLAv2f32 13826 O << ".2s, "; 13827 break; 13828 case 22: 13829 // FCADDv2f64, FCMLAv2f64, XAR 13830 O << ".2d, "; 13831 break; 13832 case 23: 13833 // FCADDv4f16, FCMLAv4f16 13834 O << ".4h, "; 13835 break; 13836 case 24: 13837 // FCADDv4f32, FCMLAv4f32, SM3SS1 13838 O << ".4s, "; 13839 break; 13840 case 25: 13841 // FCADDv8f16, FCMLAv8f16 13842 O << ".8h, "; 13843 break; 13844 case 26: 13845 // FCMEQ_PPzZ0_D, FCMEQ_PPzZ0_S, FCMGE_PPzZ0_D, FCMGE_PPzZ0_S, FCMGT_PPzZ... 13846 O << ", #0.0"; 13847 return; 13848 break; 13849 case 27: 13850 // FCMLA_ZPmZZ_H, FMAD_ZPmZZ_H, FMLA_ZPmZZ_H, FMLS_ZPmZZ_H, FMSB_ZPmZZ_H,... 13851 printSVERegOp<'h'>(MI, 4, STI, O); 13852 break; 13853 case 28: 13854 // FCMLAv4f16_indexed, FCMLAv8f16_indexed, FMLAL2lanev8f16, FMLALlanev8f1... 13855 O << ".h"; 13856 break; 13857 case 29: 13858 // FCMLAv4f32_indexed, FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_in... 13859 O << ".s"; 13860 break; 13861 case 30: 13862 // FMAXNM_ZPmI_H, FMAX_ZPmI_H, FMINNM_ZPmI_H, FMIN_ZPmI_H 13863 printExactFPImm<AArch64ExactFPImm::zero, AArch64ExactFPImm::one>(MI, 3, STI, O); 13864 return; 13865 break; 13866 case 31: 13867 // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind... 13868 O << ".d"; 13869 break; 13870 case 32: 13871 // FMUL_ZPmI_H 13872 printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::two>(MI, 3, STI, O); 13873 return; 13874 break; 13875 case 33: 13876 // FMUL_ZZZI_D, FMUL_ZZZI_S, MUL_ZZZI_D, MUL_ZZZI_S, SMULLB_ZZZI_D, SMULL... 13877 printVectorIndex(MI, 3, STI, O); 13878 return; 13879 break; 13880 case 34: 13881 // LD1B_D_IMM, LD1B_H_IMM, LD1B_IMM, LD1B_S_IMM, LD1D_IMM, LD1H_D_IMM, LD... 13882 O << ", mul vl]"; 13883 return; 13884 break; 13885 case 35: 13886 // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STGPpost,... 13887 O << "], "; 13888 break; 13889 case 36: 13890 // LDRAAwriteback, LDRABwriteback, LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, ... 13891 O << "]!"; 13892 return; 13893 break; 13894 case 37: 13895 // SDOTlanev16i8, SDOTlanev8i8, UDOTlanev16i8, UDOTlanev8i8 13896 O << ".4b"; 13897 printVectorIndex(MI, 4, STI, O); 13898 return; 13899 break; 13900 case 38: 13901 // STLXPW, STLXPX, STXPW, STXPX 13902 O << ", ["; 13903 printOperand(MI, 3, STI, O); 13904 O << ']'; 13905 return; 13906 break; 13907 } 13908 13909 13910 // Fragment 6 encoded into 6 bits for 37 unique commands. 13911 switch ((Bits >> 51) & 63) { 13912 default: llvm_unreachable("Invalid command number."); 13913 case 0: 13914 // ADDG, ASRD_ZPmI_B, ASRD_ZPmI_D, ASRD_ZPmI_S, ASR_ZPmI_B, ASR_ZPmI_D, A... 13915 printOperand(MI, 3, STI, O); 13916 return; 13917 break; 13918 case 1: 13919 // ADDP_ZPmZ_B, ADD_ZPmZ_B, ANDS_PPzPP, AND_PPzPP, AND_ZPmZ_B, ASRR_ZPmZ_... 13920 printSVERegOp<'b'>(MI, 3, STI, O); 13921 return; 13922 break; 13923 case 2: 13924 // ADDP_ZPmZ_D, ADD_ZPmZ_D, AND_ZPmZ_D, ASRR_ZPmZ_D, ASR_WIDE_ZPmZ_B, ASR... 13925 printSVERegOp<'d'>(MI, 3, STI, O); 13926 break; 13927 case 3: 13928 // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BIC_ZPmZ... 13929 return; 13930 break; 13931 case 4: 13932 // ADDP_ZPmZ_S, ADD_ZPmZ_S, AND_ZPmZ_S, ASRR_ZPmZ_S, ASR_ZPmZ_S, BIC_ZPmZ... 13933 printSVERegOp<'s'>(MI, 3, STI, O); 13934 break; 13935 case 5: 13936 // BCAX, EOR3, SM3SS1 13937 printVRegOperand(MI, 3, STI, O); 13938 break; 13939 case 6: 13940 // BFMWri, BFMXri 13941 printOperand(MI, 4, STI, O); 13942 return; 13943 break; 13944 case 7: 13945 // CADD_ZZI_B, CADD_ZZI_D, CADD_ZZI_S, FCADDv2f32, FCADDv2f64, FCADDv4f16... 13946 printComplexRotationOp<180, 90>(MI, 3, STI, O); 13947 return; 13948 break; 13949 case 8: 13950 // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr... 13951 printCondCode(MI, 3, STI, O); 13952 return; 13953 break; 13954 case 9: 13955 // CDOT_ZZZI_D, CMLA_ZZZI_S, FCADD_ZPmZ_H, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, S... 13956 O << ", "; 13957 break; 13958 case 10: 13959 // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, SQRDCMLAH_ZZZI_H 13960 printComplexRotationOp<90, 0>(MI, 5, STI, O); 13961 return; 13962 break; 13963 case 11: 13964 // CDOT_ZZZ_D, CMLA_ZZZ_D, CMLA_ZZZ_S, FCMLAv2f32, FCMLAv2f64, FCMLAv4f16... 13965 printComplexRotationOp<90, 0>(MI, 4, STI, O); 13966 return; 13967 break; 13968 case 12: 13969 // CLASTA_RPZ_H, CLASTA_VPZ_H, CLASTB_RPZ_H, CLASTB_VPZ_H, FADDA_VPZ_H 13970 printSVERegOp<'h'>(MI, 3, STI, O); 13971 return; 13972 break; 13973 case 13: 13974 // CMPHI_PPzZI_B, CMPHI_PPzZI_D, CMPHI_PPzZI_S, CMPHS_PPzZI_B, CMPHS_PPzZ... 13975 printImm(MI, 3, STI, O); 13976 return; 13977 break; 13978 case 14: 13979 // FADD_ZPmI_D, FADD_ZPmI_S, FSUBR_ZPmI_D, FSUBR_ZPmI_S, FSUB_ZPmI_D, FSU... 13980 printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::one>(MI, 3, STI, O); 13981 return; 13982 break; 13983 case 15: 13984 // FCMLA_ZPmZZ_D, FMAD_ZPmZZ_D, FMLA_ZPmZZ_D, FMLS_ZPmZZ_D, FMSB_ZPmZZ_D,... 13985 printSVERegOp<'d'>(MI, 4, STI, O); 13986 break; 13987 case 16: 13988 // FCMLA_ZPmZZ_S, FMAD_ZPmZZ_S, FMLA_ZPmZZ_S, FMLS_ZPmZZ_S, FMSB_ZPmZZ_S,... 13989 printSVERegOp<'s'>(MI, 4, STI, O); 13990 break; 13991 case 17: 13992 // FCMLAv4f16_indexed, FCMLAv4f32_indexed, FCMLAv8f16_indexed, FMLAL2lane... 13993 printVectorIndex(MI, 4, STI, O); 13994 break; 13995 case 18: 13996 // FMAXNM_ZPmI_D, FMAXNM_ZPmI_S, FMAX_ZPmI_D, FMAX_ZPmI_S, FMINNM_ZPmI_D,... 13997 printExactFPImm<AArch64ExactFPImm::zero, AArch64ExactFPImm::one>(MI, 3, STI, O); 13998 return; 13999 break; 14000 case 19: 14001 // FMULXv1i16_indexed, FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32... 14002 printVectorIndex(MI, 3, STI, O); 14003 return; 14004 break; 14005 case 20: 14006 // FMUL_ZPmI_D, FMUL_ZPmI_S 14007 printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::two>(MI, 3, STI, O); 14008 return; 14009 break; 14010 case 21: 14011 // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi 14012 printImmScale<8>(MI, 3, STI, O); 14013 O << ']'; 14014 return; 14015 break; 14016 case 22: 14017 // LDNPQi, LDPQi, STGPi, STNPQi, STPQi 14018 printImmScale<16>(MI, 3, STI, O); 14019 O << ']'; 14020 return; 14021 break; 14022 case 23: 14023 // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi 14024 printImmScale<4>(MI, 3, STI, O); 14025 O << ']'; 14026 return; 14027 break; 14028 case 24: 14029 // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP... 14030 printImmScale<8>(MI, 4, STI, O); 14031 break; 14032 case 25: 14033 // LDPQpost, LDPQpre, STGPpost, STGPpre, STPQpost, STPQpre 14034 printImmScale<16>(MI, 4, STI, O); 14035 break; 14036 case 26: 14037 // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S... 14038 printImmScale<4>(MI, 4, STI, O); 14039 break; 14040 case 27: 14041 // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW 14042 printMemExtend<'w', 8>(MI, 3, STI, O); 14043 O << ']'; 14044 return; 14045 break; 14046 case 28: 14047 // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX 14048 printMemExtend<'x', 8>(MI, 3, STI, O); 14049 O << ']'; 14050 return; 14051 break; 14052 case 29: 14053 // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW 14054 printMemExtend<'w', 64>(MI, 3, STI, O); 14055 O << ']'; 14056 return; 14057 break; 14058 case 30: 14059 // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX 14060 printMemExtend<'x', 64>(MI, 3, STI, O); 14061 O << ']'; 14062 return; 14063 break; 14064 case 31: 14065 // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW 14066 printMemExtend<'w', 16>(MI, 3, STI, O); 14067 O << ']'; 14068 return; 14069 break; 14070 case 32: 14071 // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX 14072 printMemExtend<'x', 16>(MI, 3, STI, O); 14073 O << ']'; 14074 return; 14075 break; 14076 case 33: 14077 // LDRQroW, STRQroW 14078 printMemExtend<'w', 128>(MI, 3, STI, O); 14079 O << ']'; 14080 return; 14081 break; 14082 case 34: 14083 // LDRQroX, STRQroX 14084 printMemExtend<'x', 128>(MI, 3, STI, O); 14085 O << ']'; 14086 return; 14087 break; 14088 case 35: 14089 // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW 14090 printMemExtend<'w', 32>(MI, 3, STI, O); 14091 O << ']'; 14092 return; 14093 break; 14094 case 36: 14095 // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX 14096 printMemExtend<'x', 32>(MI, 3, STI, O); 14097 O << ']'; 14098 return; 14099 break; 14100 } 14101 14102 14103 // Fragment 7 encoded into 3 bits for 7 unique commands. 14104 switch ((Bits >> 57) & 7) { 14105 default: llvm_unreachable("Invalid command number."); 14106 case 0: 14107 // ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_D, ADD_ZPmZ_S, AND_ZPmZ_D, AND_ZPmZ... 14108 return; 14109 break; 14110 case 1: 14111 // BCAX, EOR3 14112 O << ".16b"; 14113 return; 14114 break; 14115 case 2: 14116 // CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, SQRDCMLAH_ZZZI_... 14117 printComplexRotationOp<90, 0>(MI, 5, STI, O); 14118 return; 14119 break; 14120 case 3: 14121 // FCADD_ZPmZ_D, FCADD_ZPmZ_S, FCMLA_ZPmZZ_D, FCMLA_ZPmZZ_S, FCMLAv4f16_i... 14122 O << ", "; 14123 break; 14124 case 4: 14125 // FCADD_ZPmZ_H 14126 printComplexRotationOp<180, 90>(MI, 4, STI, O); 14127 return; 14128 break; 14129 case 5: 14130 // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STGPpre, STPDpr... 14131 O << "]!"; 14132 return; 14133 break; 14134 case 6: 14135 // SM3SS1 14136 O << ".4s"; 14137 return; 14138 break; 14139 } 14140 14141 14142 // Fragment 8 encoded into 1 bits for 2 unique commands. 14143 if ((Bits >> 60) & 1) { 14144 // FCMLA_ZPmZZ_D, FCMLA_ZPmZZ_S, FCMLAv4f16_indexed, FCMLAv4f32_indexed, ... 14145 printComplexRotationOp<90, 0>(MI, 5, STI, O); 14146 return; 14147 } else { 14148 // FCADD_ZPmZ_D, FCADD_ZPmZ_S 14149 printComplexRotationOp<180, 90>(MI, 4, STI, O); 14150 return; 14151 } 14152 14153} 14154 14155 14156/// getRegisterName - This method is automatically generated by tblgen 14157/// from the register set description. This returns the assembler name 14158/// for the specified register. 14159const char *AArch64InstPrinter:: 14160getRegisterName(unsigned RegNo, unsigned AltIdx) { 14161 assert(RegNo && RegNo < 629 && "Invalid register number!"); 14162 14163 static const char AsmStrsNoRegAltName[] = { 14164 /* 0 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, 14165 /* 13 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, 14166 /* 26 */ 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', 0, 14167 /* 39 */ 'b', '1', '0', 0, 14168 /* 43 */ 'd', '1', '0', 0, 14169 /* 47 */ 'h', '1', '0', 0, 14170 /* 51 */ 'p', '1', '0', 0, 14171 /* 55 */ 'q', '1', '0', 0, 14172 /* 59 */ 's', '1', '0', 0, 14173 /* 63 */ 'w', '1', '0', 0, 14174 /* 67 */ 'x', '1', '0', 0, 14175 /* 71 */ 'z', '1', '0', 0, 14176 /* 75 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, 14177 /* 91 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0, 14178 /* 107 */ 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', 0, 14179 /* 123 */ 'b', '2', '0', 0, 14180 /* 127 */ 'd', '2', '0', 0, 14181 /* 131 */ 'h', '2', '0', 0, 14182 /* 135 */ 'q', '2', '0', 0, 14183 /* 139 */ 's', '2', '0', 0, 14184 /* 143 */ 'w', '2', '0', 0, 14185 /* 147 */ 'x', '2', '0', 0, 14186 /* 151 */ 'z', '2', '0', 0, 14187 /* 155 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, 14188 /* 171 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0, 14189 /* 187 */ 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', 0, 14190 /* 203 */ 'b', '3', '0', 0, 14191 /* 207 */ 'd', '3', '0', 0, 14192 /* 211 */ 'h', '3', '0', 0, 14193 /* 215 */ 'q', '3', '0', 0, 14194 /* 219 */ 's', '3', '0', 0, 14195 /* 223 */ 'w', '3', '0', 0, 14196 /* 227 */ 'x', '3', '0', 0, 14197 /* 231 */ 'z', '3', '0', 0, 14198 /* 235 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0, 14199 /* 250 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0, 14200 /* 265 */ 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', 0, 14201 /* 280 */ 'b', '0', 0, 14202 /* 283 */ 'd', '0', 0, 14203 /* 286 */ 'h', '0', 0, 14204 /* 289 */ 'p', '0', 0, 14205 /* 292 */ 'q', '0', 0, 14206 /* 295 */ 's', '0', 0, 14207 /* 298 */ 'w', '0', 0, 14208 /* 301 */ 'x', '0', 0, 14209 /* 304 */ 'z', '0', 0, 14210 /* 307 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, 14211 /* 321 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, 14212 /* 335 */ 'W', '1', '0', '_', 'W', '1', '1', 0, 14213 /* 343 */ 'X', '1', '0', '_', 'X', '1', '1', 0, 14214 /* 351 */ 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', 0, 14215 /* 365 */ 'b', '1', '1', 0, 14216 /* 369 */ 'd', '1', '1', 0, 14217 /* 373 */ 'h', '1', '1', 0, 14218 /* 377 */ 'p', '1', '1', 0, 14219 /* 381 */ 'q', '1', '1', 0, 14220 /* 385 */ 's', '1', '1', 0, 14221 /* 389 */ 'w', '1', '1', 0, 14222 /* 393 */ 'x', '1', '1', 0, 14223 /* 397 */ 'z', '1', '1', 0, 14224 /* 401 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, 14225 /* 417 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0, 14226 /* 433 */ 'W', '2', '0', '_', 'W', '2', '1', 0, 14227 /* 441 */ 'X', '2', '0', '_', 'X', '2', '1', 0, 14228 /* 449 */ 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', 0, 14229 /* 465 */ 'b', '2', '1', 0, 14230 /* 469 */ 'd', '2', '1', 0, 14231 /* 473 */ 'h', '2', '1', 0, 14232 /* 477 */ 'q', '2', '1', 0, 14233 /* 481 */ 's', '2', '1', 0, 14234 /* 485 */ 'w', '2', '1', 0, 14235 /* 489 */ 'x', '2', '1', 0, 14236 /* 493 */ 'z', '2', '1', 0, 14237 /* 497 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, 14238 /* 513 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0, 14239 /* 529 */ 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', 0, 14240 /* 545 */ 'b', '3', '1', 0, 14241 /* 549 */ 'd', '3', '1', 0, 14242 /* 553 */ 'h', '3', '1', 0, 14243 /* 557 */ 'q', '3', '1', 0, 14244 /* 561 */ 's', '3', '1', 0, 14245 /* 565 */ 'z', '3', '1', 0, 14246 /* 569 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0, 14247 /* 583 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0, 14248 /* 597 */ 'W', '0', '_', 'W', '1', 0, 14249 /* 603 */ 'X', '0', '_', 'X', '1', 0, 14250 /* 609 */ 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', 0, 14251 /* 623 */ 'b', '1', 0, 14252 /* 626 */ 'd', '1', 0, 14253 /* 629 */ 'h', '1', 0, 14254 /* 632 */ 'p', '1', 0, 14255 /* 635 */ 'q', '1', 0, 14256 /* 638 */ 's', '1', 0, 14257 /* 641 */ 'w', '1', 0, 14258 /* 644 */ 'x', '1', 0, 14259 /* 647 */ 'z', '1', 0, 14260 /* 650 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, 14261 /* 665 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, 14262 /* 680 */ 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', 0, 14263 /* 695 */ 'b', '1', '2', 0, 14264 /* 699 */ 'd', '1', '2', 0, 14265 /* 703 */ 'h', '1', '2', 0, 14266 /* 707 */ 'p', '1', '2', 0, 14267 /* 711 */ 'q', '1', '2', 0, 14268 /* 715 */ 's', '1', '2', 0, 14269 /* 719 */ 'w', '1', '2', 0, 14270 /* 723 */ 'x', '1', '2', 0, 14271 /* 727 */ 'z', '1', '2', 0, 14272 /* 731 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, 14273 /* 747 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0, 14274 /* 763 */ 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', 0, 14275 /* 779 */ 'b', '2', '2', 0, 14276 /* 783 */ 'd', '2', '2', 0, 14277 /* 787 */ 'h', '2', '2', 0, 14278 /* 791 */ 'q', '2', '2', 0, 14279 /* 795 */ 's', '2', '2', 0, 14280 /* 799 */ 'w', '2', '2', 0, 14281 /* 803 */ 'x', '2', '2', 0, 14282 /* 807 */ 'z', '2', '2', 0, 14283 /* 811 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, 14284 /* 824 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0, 14285 /* 837 */ 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', 0, 14286 /* 850 */ 'b', '2', 0, 14287 /* 853 */ 'd', '2', 0, 14288 /* 856 */ 'h', '2', 0, 14289 /* 859 */ 'p', '2', 0, 14290 /* 862 */ 'q', '2', 0, 14291 /* 865 */ 's', '2', 0, 14292 /* 868 */ 'w', '2', 0, 14293 /* 871 */ 'x', '2', 0, 14294 /* 874 */ 'z', '2', 0, 14295 /* 877 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, 14296 /* 893 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, 14297 /* 909 */ 'W', '1', '2', '_', 'W', '1', '3', 0, 14298 /* 917 */ 'X', '1', '2', '_', 'X', '1', '3', 0, 14299 /* 925 */ 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', 0, 14300 /* 941 */ 'b', '1', '3', 0, 14301 /* 945 */ 'd', '1', '3', 0, 14302 /* 949 */ 'h', '1', '3', 0, 14303 /* 953 */ 'p', '1', '3', 0, 14304 /* 957 */ 'q', '1', '3', 0, 14305 /* 961 */ 's', '1', '3', 0, 14306 /* 965 */ 'w', '1', '3', 0, 14307 /* 969 */ 'x', '1', '3', 0, 14308 /* 973 */ 'z', '1', '3', 0, 14309 /* 977 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, 14310 /* 993 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0, 14311 /* 1009 */ 'W', '2', '2', '_', 'W', '2', '3', 0, 14312 /* 1017 */ 'X', '2', '2', '_', 'X', '2', '3', 0, 14313 /* 1025 */ 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', 0, 14314 /* 1041 */ 'b', '2', '3', 0, 14315 /* 1045 */ 'd', '2', '3', 0, 14316 /* 1049 */ 'h', '2', '3', 0, 14317 /* 1053 */ 'q', '2', '3', 0, 14318 /* 1057 */ 's', '2', '3', 0, 14319 /* 1061 */ 'w', '2', '3', 0, 14320 /* 1065 */ 'x', '2', '3', 0, 14321 /* 1069 */ 'z', '2', '3', 0, 14322 /* 1073 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, 14323 /* 1085 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, 14324 /* 1097 */ 'W', '2', '_', 'W', '3', 0, 14325 /* 1103 */ 'X', '2', '_', 'X', '3', 0, 14326 /* 1109 */ 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', 0, 14327 /* 1121 */ 'b', '3', 0, 14328 /* 1124 */ 'd', '3', 0, 14329 /* 1127 */ 'h', '3', 0, 14330 /* 1130 */ 'p', '3', 0, 14331 /* 1133 */ 'q', '3', 0, 14332 /* 1136 */ 's', '3', 0, 14333 /* 1139 */ 'w', '3', 0, 14334 /* 1142 */ 'x', '3', 0, 14335 /* 1145 */ 'z', '3', 0, 14336 /* 1148 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, 14337 /* 1164 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, 14338 /* 1180 */ 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', 0, 14339 /* 1196 */ 'b', '1', '4', 0, 14340 /* 1200 */ 'd', '1', '4', 0, 14341 /* 1204 */ 'h', '1', '4', 0, 14342 /* 1208 */ 'p', '1', '4', 0, 14343 /* 1212 */ 'q', '1', '4', 0, 14344 /* 1216 */ 's', '1', '4', 0, 14345 /* 1220 */ 'w', '1', '4', 0, 14346 /* 1224 */ 'x', '1', '4', 0, 14347 /* 1228 */ 'z', '1', '4', 0, 14348 /* 1232 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, 14349 /* 1248 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0, 14350 /* 1264 */ 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', 0, 14351 /* 1280 */ 'b', '2', '4', 0, 14352 /* 1284 */ 'd', '2', '4', 0, 14353 /* 1288 */ 'h', '2', '4', 0, 14354 /* 1292 */ 'q', '2', '4', 0, 14355 /* 1296 */ 's', '2', '4', 0, 14356 /* 1300 */ 'w', '2', '4', 0, 14357 /* 1304 */ 'x', '2', '4', 0, 14358 /* 1308 */ 'z', '2', '4', 0, 14359 /* 1312 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, 14360 /* 1324 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, 14361 /* 1336 */ 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', 0, 14362 /* 1348 */ 'b', '4', 0, 14363 /* 1351 */ 'd', '4', 0, 14364 /* 1354 */ 'h', '4', 0, 14365 /* 1357 */ 'p', '4', 0, 14366 /* 1360 */ 'q', '4', 0, 14367 /* 1363 */ 's', '4', 0, 14368 /* 1366 */ 'w', '4', 0, 14369 /* 1369 */ 'x', '4', 0, 14370 /* 1372 */ 'z', '4', 0, 14371 /* 1375 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, 14372 /* 1391 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, 14373 /* 1407 */ 'W', '1', '4', '_', 'W', '1', '5', 0, 14374 /* 1415 */ 'X', '1', '4', '_', 'X', '1', '5', 0, 14375 /* 1423 */ 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', 0, 14376 /* 1439 */ 'b', '1', '5', 0, 14377 /* 1443 */ 'd', '1', '5', 0, 14378 /* 1447 */ 'h', '1', '5', 0, 14379 /* 1451 */ 'p', '1', '5', 0, 14380 /* 1455 */ 'q', '1', '5', 0, 14381 /* 1459 */ 's', '1', '5', 0, 14382 /* 1463 */ 'w', '1', '5', 0, 14383 /* 1467 */ 'x', '1', '5', 0, 14384 /* 1471 */ 'z', '1', '5', 0, 14385 /* 1475 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, 14386 /* 1491 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0, 14387 /* 1507 */ 'W', '2', '4', '_', 'W', '2', '5', 0, 14388 /* 1515 */ 'X', '2', '4', '_', 'X', '2', '5', 0, 14389 /* 1523 */ 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', 0, 14390 /* 1539 */ 'b', '2', '5', 0, 14391 /* 1543 */ 'd', '2', '5', 0, 14392 /* 1547 */ 'h', '2', '5', 0, 14393 /* 1551 */ 'q', '2', '5', 0, 14394 /* 1555 */ 's', '2', '5', 0, 14395 /* 1559 */ 'w', '2', '5', 0, 14396 /* 1563 */ 'x', '2', '5', 0, 14397 /* 1567 */ 'z', '2', '5', 0, 14398 /* 1571 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, 14399 /* 1583 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, 14400 /* 1595 */ 'W', '4', '_', 'W', '5', 0, 14401 /* 1601 */ 'X', '4', '_', 'X', '5', 0, 14402 /* 1607 */ 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', 0, 14403 /* 1619 */ 'b', '5', 0, 14404 /* 1622 */ 'd', '5', 0, 14405 /* 1625 */ 'h', '5', 0, 14406 /* 1628 */ 'p', '5', 0, 14407 /* 1631 */ 'q', '5', 0, 14408 /* 1634 */ 's', '5', 0, 14409 /* 1637 */ 'w', '5', 0, 14410 /* 1640 */ 'x', '5', 0, 14411 /* 1643 */ 'z', '5', 0, 14412 /* 1646 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, 14413 /* 1662 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0, 14414 /* 1678 */ 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', 0, 14415 /* 1694 */ 'b', '1', '6', 0, 14416 /* 1698 */ 'd', '1', '6', 0, 14417 /* 1702 */ 'h', '1', '6', 0, 14418 /* 1706 */ 'q', '1', '6', 0, 14419 /* 1710 */ 's', '1', '6', 0, 14420 /* 1714 */ 'w', '1', '6', 0, 14421 /* 1718 */ 'x', '1', '6', 0, 14422 /* 1722 */ 'z', '1', '6', 0, 14423 /* 1726 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, 14424 /* 1742 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0, 14425 /* 1758 */ 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', 0, 14426 /* 1774 */ 'b', '2', '6', 0, 14427 /* 1778 */ 'd', '2', '6', 0, 14428 /* 1782 */ 'h', '2', '6', 0, 14429 /* 1786 */ 'q', '2', '6', 0, 14430 /* 1790 */ 's', '2', '6', 0, 14431 /* 1794 */ 'w', '2', '6', 0, 14432 /* 1798 */ 'x', '2', '6', 0, 14433 /* 1802 */ 'z', '2', '6', 0, 14434 /* 1806 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, 14435 /* 1818 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, 14436 /* 1830 */ 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', 0, 14437 /* 1842 */ 'b', '6', 0, 14438 /* 1845 */ 'd', '6', 0, 14439 /* 1848 */ 'h', '6', 0, 14440 /* 1851 */ 'p', '6', 0, 14441 /* 1854 */ 'q', '6', 0, 14442 /* 1857 */ 's', '6', 0, 14443 /* 1860 */ 'w', '6', 0, 14444 /* 1863 */ 'x', '6', 0, 14445 /* 1866 */ 'z', '6', 0, 14446 /* 1869 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, 14447 /* 1885 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0, 14448 /* 1901 */ 'W', '1', '6', '_', 'W', '1', '7', 0, 14449 /* 1909 */ 'X', '1', '6', '_', 'X', '1', '7', 0, 14450 /* 1917 */ 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', 0, 14451 /* 1933 */ 'b', '1', '7', 0, 14452 /* 1937 */ 'd', '1', '7', 0, 14453 /* 1941 */ 'h', '1', '7', 0, 14454 /* 1945 */ 'q', '1', '7', 0, 14455 /* 1949 */ 's', '1', '7', 0, 14456 /* 1953 */ 'w', '1', '7', 0, 14457 /* 1957 */ 'x', '1', '7', 0, 14458 /* 1961 */ 'z', '1', '7', 0, 14459 /* 1965 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, 14460 /* 1981 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0, 14461 /* 1997 */ 'W', '2', '6', '_', 'W', '2', '7', 0, 14462 /* 2005 */ 'X', '2', '6', '_', 'X', '2', '7', 0, 14463 /* 2013 */ 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', 0, 14464 /* 2029 */ 'b', '2', '7', 0, 14465 /* 2033 */ 'd', '2', '7', 0, 14466 /* 2037 */ 'h', '2', '7', 0, 14467 /* 2041 */ 'q', '2', '7', 0, 14468 /* 2045 */ 's', '2', '7', 0, 14469 /* 2049 */ 'w', '2', '7', 0, 14470 /* 2053 */ 'x', '2', '7', 0, 14471 /* 2057 */ 'z', '2', '7', 0, 14472 /* 2061 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, 14473 /* 2073 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, 14474 /* 2085 */ 'W', '6', '_', 'W', '7', 0, 14475 /* 2091 */ 'X', '6', '_', 'X', '7', 0, 14476 /* 2097 */ 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', 0, 14477 /* 2109 */ 'b', '7', 0, 14478 /* 2112 */ 'd', '7', 0, 14479 /* 2115 */ 'h', '7', 0, 14480 /* 2118 */ 'p', '7', 0, 14481 /* 2121 */ 'q', '7', 0, 14482 /* 2124 */ 's', '7', 0, 14483 /* 2127 */ 'w', '7', 0, 14484 /* 2130 */ 'x', '7', 0, 14485 /* 2133 */ 'z', '7', 0, 14486 /* 2136 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, 14487 /* 2152 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0, 14488 /* 2168 */ 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', 0, 14489 /* 2184 */ 'b', '1', '8', 0, 14490 /* 2188 */ 'd', '1', '8', 0, 14491 /* 2192 */ 'h', '1', '8', 0, 14492 /* 2196 */ 'q', '1', '8', 0, 14493 /* 2200 */ 's', '1', '8', 0, 14494 /* 2204 */ 'w', '1', '8', 0, 14495 /* 2208 */ 'x', '1', '8', 0, 14496 /* 2212 */ 'z', '1', '8', 0, 14497 /* 2216 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, 14498 /* 2232 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0, 14499 /* 2248 */ 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', 0, 14500 /* 2264 */ 'b', '2', '8', 0, 14501 /* 2268 */ 'd', '2', '8', 0, 14502 /* 2272 */ 'h', '2', '8', 0, 14503 /* 2276 */ 'q', '2', '8', 0, 14504 /* 2280 */ 's', '2', '8', 0, 14505 /* 2284 */ 'w', '2', '8', 0, 14506 /* 2288 */ 'x', '2', '8', 0, 14507 /* 2292 */ 'z', '2', '8', 0, 14508 /* 2296 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, 14509 /* 2308 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, 14510 /* 2320 */ 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', 0, 14511 /* 2332 */ 'b', '8', 0, 14512 /* 2335 */ 'd', '8', 0, 14513 /* 2338 */ 'h', '8', 0, 14514 /* 2341 */ 'p', '8', 0, 14515 /* 2344 */ 'q', '8', 0, 14516 /* 2347 */ 's', '8', 0, 14517 /* 2350 */ 'w', '8', 0, 14518 /* 2353 */ 'x', '8', 0, 14519 /* 2356 */ 'z', '8', 0, 14520 /* 2359 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, 14521 /* 2375 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0, 14522 /* 2391 */ 'W', '1', '8', '_', 'W', '1', '9', 0, 14523 /* 2399 */ 'X', '1', '8', '_', 'X', '1', '9', 0, 14524 /* 2407 */ 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', 0, 14525 /* 2423 */ 'b', '1', '9', 0, 14526 /* 2427 */ 'd', '1', '9', 0, 14527 /* 2431 */ 'h', '1', '9', 0, 14528 /* 2435 */ 'q', '1', '9', 0, 14529 /* 2439 */ 's', '1', '9', 0, 14530 /* 2443 */ 'w', '1', '9', 0, 14531 /* 2447 */ 'x', '1', '9', 0, 14532 /* 2451 */ 'z', '1', '9', 0, 14533 /* 2455 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, 14534 /* 2471 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0, 14535 /* 2487 */ 'W', '2', '8', '_', 'W', '2', '9', 0, 14536 /* 2495 */ 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', 0, 14537 /* 2511 */ 'b', '2', '9', 0, 14538 /* 2515 */ 'd', '2', '9', 0, 14539 /* 2519 */ 'h', '2', '9', 0, 14540 /* 2523 */ 'q', '2', '9', 0, 14541 /* 2527 */ 's', '2', '9', 0, 14542 /* 2531 */ 'w', '2', '9', 0, 14543 /* 2535 */ 'x', '2', '9', 0, 14544 /* 2539 */ 'z', '2', '9', 0, 14545 /* 2543 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, 14546 /* 2555 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, 14547 /* 2567 */ 'W', '8', '_', 'W', '9', 0, 14548 /* 2573 */ 'X', '8', '_', 'X', '9', 0, 14549 /* 2579 */ 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', 0, 14550 /* 2591 */ 'b', '9', 0, 14551 /* 2594 */ 'd', '9', 0, 14552 /* 2597 */ 'h', '9', 0, 14553 /* 2600 */ 'p', '9', 0, 14554 /* 2603 */ 'q', '9', 0, 14555 /* 2606 */ 's', '9', 0, 14556 /* 2609 */ 'w', '9', 0, 14557 /* 2612 */ 'x', '9', 0, 14558 /* 2615 */ 'z', '9', 0, 14559 /* 2618 */ 'X', '2', '8', '_', 'F', 'P', 0, 14560 /* 2625 */ 'W', '3', '0', '_', 'W', 'Z', 'R', 0, 14561 /* 2633 */ 'L', 'R', '_', 'X', 'Z', 'R', 0, 14562 /* 2640 */ 'z', '1', '0', '_', 'h', 'i', 0, 14563 /* 2647 */ 'z', '2', '0', '_', 'h', 'i', 0, 14564 /* 2654 */ 'z', '3', '0', '_', 'h', 'i', 0, 14565 /* 2661 */ 'z', '0', '_', 'h', 'i', 0, 14566 /* 2667 */ 'z', '1', '1', '_', 'h', 'i', 0, 14567 /* 2674 */ 'z', '2', '1', '_', 'h', 'i', 0, 14568 /* 2681 */ 'z', '3', '1', '_', 'h', 'i', 0, 14569 /* 2688 */ 'z', '1', '_', 'h', 'i', 0, 14570 /* 2694 */ 'z', '1', '2', '_', 'h', 'i', 0, 14571 /* 2701 */ 'z', '2', '2', '_', 'h', 'i', 0, 14572 /* 2708 */ 'z', '2', '_', 'h', 'i', 0, 14573 /* 2714 */ 'z', '1', '3', '_', 'h', 'i', 0, 14574 /* 2721 */ 'z', '2', '3', '_', 'h', 'i', 0, 14575 /* 2728 */ 'z', '3', '_', 'h', 'i', 0, 14576 /* 2734 */ 'z', '1', '4', '_', 'h', 'i', 0, 14577 /* 2741 */ 'z', '2', '4', '_', 'h', 'i', 0, 14578 /* 2748 */ 'z', '4', '_', 'h', 'i', 0, 14579 /* 2754 */ 'z', '1', '5', '_', 'h', 'i', 0, 14580 /* 2761 */ 'z', '2', '5', '_', 'h', 'i', 0, 14581 /* 2768 */ 'z', '5', '_', 'h', 'i', 0, 14582 /* 2774 */ 'z', '1', '6', '_', 'h', 'i', 0, 14583 /* 2781 */ 'z', '2', '6', '_', 'h', 'i', 0, 14584 /* 2788 */ 'z', '6', '_', 'h', 'i', 0, 14585 /* 2794 */ 'z', '1', '7', '_', 'h', 'i', 0, 14586 /* 2801 */ 'z', '2', '7', '_', 'h', 'i', 0, 14587 /* 2808 */ 'z', '7', '_', 'h', 'i', 0, 14588 /* 2814 */ 'z', '1', '8', '_', 'h', 'i', 0, 14589 /* 2821 */ 'z', '2', '8', '_', 'h', 'i', 0, 14590 /* 2828 */ 'z', '8', '_', 'h', 'i', 0, 14591 /* 2834 */ 'z', '1', '9', '_', 'h', 'i', 0, 14592 /* 2841 */ 'z', '2', '9', '_', 'h', 'i', 0, 14593 /* 2848 */ 'z', '9', '_', 'h', 'i', 0, 14594 /* 2854 */ 'w', 's', 'p', 0, 14595 /* 2858 */ 'f', 'f', 'r', 0, 14596 /* 2862 */ 'w', 'z', 'r', 0, 14597 /* 2866 */ 'x', 'z', 'r', 0, 14598 /* 2870 */ 'n', 'z', 'c', 'v', 0, 14599 }; 14600 14601 static const uint16_t RegAsmOffsetNoRegAltName[] = { 14602 2858, 2535, 227, 2870, 2855, 2854, 2862, 2866, 280, 623, 850, 1121, 1348, 1619, 14603 1842, 2109, 2332, 2591, 39, 365, 695, 941, 1196, 1439, 1694, 1933, 2184, 2423, 14604 123, 465, 779, 1041, 1280, 1539, 1774, 2029, 2264, 2511, 203, 545, 283, 626, 14605 853, 1124, 1351, 1622, 1845, 2112, 2335, 2594, 43, 369, 699, 945, 1200, 1443, 14606 1698, 1937, 2188, 2427, 127, 469, 783, 1045, 1284, 1543, 1778, 2033, 2268, 2515, 14607 207, 549, 286, 629, 856, 1127, 1354, 1625, 1848, 2115, 2338, 2597, 47, 373, 14608 703, 949, 1204, 1447, 1702, 1941, 2192, 2431, 131, 473, 787, 1049, 1288, 1547, 14609 1782, 2037, 2272, 2519, 211, 553, 289, 632, 859, 1130, 1357, 1628, 1851, 2118, 14610 2341, 2600, 51, 377, 707, 953, 1208, 1451, 292, 635, 862, 1133, 1360, 1631, 14611 1854, 2121, 2344, 2603, 55, 381, 711, 957, 1212, 1455, 1706, 1945, 2196, 2435, 14612 135, 477, 791, 1053, 1292, 1551, 1786, 2041, 2276, 2523, 215, 557, 295, 638, 14613 865, 1136, 1363, 1634, 1857, 2124, 2347, 2606, 59, 385, 715, 961, 1216, 1459, 14614 1710, 1949, 2200, 2439, 139, 481, 795, 1057, 1296, 1555, 1790, 2045, 2280, 2527, 14615 219, 561, 298, 641, 868, 1139, 1366, 1637, 1860, 2127, 2350, 2609, 63, 389, 14616 719, 965, 1220, 1463, 1714, 1953, 2204, 2443, 143, 485, 799, 1061, 1300, 1559, 14617 1794, 2049, 2284, 2531, 223, 301, 644, 871, 1142, 1369, 1640, 1863, 2130, 2353, 14618 2612, 67, 393, 723, 969, 1224, 1467, 1718, 1957, 2208, 2447, 147, 489, 803, 14619 1065, 1304, 1563, 1798, 2053, 2288, 304, 647, 874, 1145, 1372, 1643, 1866, 2133, 14620 2356, 2615, 71, 397, 727, 973, 1228, 1471, 1722, 1961, 2212, 2451, 151, 493, 14621 807, 1069, 1308, 1567, 1802, 2057, 2292, 2539, 231, 565, 2661, 2688, 2708, 2728, 14622 2748, 2768, 2788, 2808, 2828, 2848, 2640, 2667, 2694, 2714, 2734, 2754, 2774, 2794, 14623 2814, 2834, 2647, 2674, 2701, 2721, 2741, 2761, 2781, 2801, 2821, 2841, 2654, 2681, 14624 577, 818, 1079, 1318, 1577, 1812, 2067, 2302, 2549, 6, 313, 657, 885, 1156, 14625 1383, 1654, 1877, 2144, 2367, 83, 409, 739, 985, 1240, 1483, 1734, 1973, 2224, 14626 2463, 163, 505, 243, 1073, 1312, 1571, 1806, 2061, 2296, 2543, 0, 307, 650, 14627 877, 1148, 1375, 1646, 1869, 2136, 2359, 75, 401, 731, 977, 1232, 1475, 1726, 14628 1965, 2216, 2455, 155, 497, 235, 569, 811, 815, 1076, 1315, 1574, 1809, 2064, 14629 2299, 2546, 3, 310, 653, 881, 1152, 1379, 1650, 1873, 2140, 2363, 79, 405, 14630 735, 981, 1236, 1479, 1730, 1969, 2220, 2459, 159, 501, 239, 573, 591, 831, 14631 1091, 1330, 1589, 1824, 2079, 2314, 2561, 19, 327, 672, 901, 1172, 1399, 1670, 14632 1893, 2160, 2383, 99, 425, 755, 1001, 1256, 1499, 1750, 1989, 2240, 2479, 179, 14633 521, 258, 1085, 1324, 1583, 1818, 2073, 2308, 2555, 13, 321, 665, 893, 1164, 14634 1391, 1662, 1885, 2152, 2375, 91, 417, 747, 993, 1248, 1491, 1742, 1981, 2232, 14635 2471, 171, 513, 250, 583, 824, 828, 1088, 1327, 1586, 1821, 2076, 2311, 2558, 14636 16, 324, 668, 897, 1168, 1395, 1666, 1889, 2156, 2379, 95, 421, 751, 997, 14637 1252, 1495, 1746, 1985, 2236, 2475, 175, 517, 254, 587, 2625, 597, 1097, 1595, 14638 2085, 2567, 335, 909, 1407, 1901, 2391, 433, 1009, 1507, 1997, 2487, 2633, 2618, 14639 603, 1103, 1601, 2091, 2573, 343, 917, 1415, 1909, 2399, 441, 1017, 1515, 2005, 14640 617, 844, 1115, 1342, 1613, 1836, 2103, 2326, 2585, 32, 357, 687, 933, 1188, 14641 1431, 1686, 1925, 2176, 2415, 115, 457, 771, 1033, 1272, 1531, 1766, 2021, 2256, 14642 2503, 195, 537, 273, 1109, 1336, 1607, 1830, 2097, 2320, 2579, 26, 351, 680, 14643 925, 1180, 1423, 1678, 1917, 2168, 2407, 107, 449, 763, 1025, 1264, 1523, 1758, 14644 2013, 2248, 2495, 187, 529, 265, 609, 837, 841, 1112, 1339, 1610, 1833, 2100, 14645 2323, 2582, 29, 354, 683, 929, 1184, 1427, 1682, 1921, 2172, 2411, 111, 453, 14646 767, 1029, 1268, 1527, 1762, 2017, 2252, 2499, 191, 533, 269, 613, 14647 }; 14648 14649 static const char AsmStrsvlist1[] = { 14650 /* 0 */ 0, 14651 }; 14652 14653 static const uint8_t RegAsmOffsetvlist1[] = { 14654 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14655 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14656 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14657 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14658 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14659 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14660 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14661 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14662 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14663 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14664 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14665 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14666 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14667 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14668 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14669 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14670 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14671 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14672 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14673 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14674 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14675 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14676 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14677 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14678 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14679 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14680 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14681 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14682 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14683 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14684 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14685 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14686 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14687 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14688 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14689 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14690 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14691 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14692 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14693 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14694 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14695 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14696 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14697 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14698 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14699 }; 14700 14701 static const char AsmStrsvreg[] = { 14702 /* 0 */ 'v', '1', '0', 0, 14703 /* 4 */ 'v', '2', '0', 0, 14704 /* 8 */ 'v', '3', '0', 0, 14705 /* 12 */ 'v', '0', 0, 14706 /* 15 */ 'v', '1', '1', 0, 14707 /* 19 */ 'v', '2', '1', 0, 14708 /* 23 */ 'v', '3', '1', 0, 14709 /* 27 */ 'v', '1', 0, 14710 /* 30 */ 'v', '1', '2', 0, 14711 /* 34 */ 'v', '2', '2', 0, 14712 /* 38 */ 'v', '2', 0, 14713 /* 41 */ 'v', '1', '3', 0, 14714 /* 45 */ 'v', '2', '3', 0, 14715 /* 49 */ 'v', '3', 0, 14716 /* 52 */ 'v', '1', '4', 0, 14717 /* 56 */ 'v', '2', '4', 0, 14718 /* 60 */ 'v', '4', 0, 14719 /* 63 */ 'v', '1', '5', 0, 14720 /* 67 */ 'v', '2', '5', 0, 14721 /* 71 */ 'v', '5', 0, 14722 /* 74 */ 'v', '1', '6', 0, 14723 /* 78 */ 'v', '2', '6', 0, 14724 /* 82 */ 'v', '6', 0, 14725 /* 85 */ 'v', '1', '7', 0, 14726 /* 89 */ 'v', '2', '7', 0, 14727 /* 93 */ 'v', '7', 0, 14728 /* 96 */ 'v', '1', '8', 0, 14729 /* 100 */ 'v', '2', '8', 0, 14730 /* 104 */ 'v', '8', 0, 14731 /* 107 */ 'v', '1', '9', 0, 14732 /* 111 */ 'v', '2', '9', 0, 14733 /* 115 */ 'v', '9', 0, 14734 }; 14735 14736 static const uint8_t RegAsmOffsetvreg[] = { 14737 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14738 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14739 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 14740 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 14741 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 14742 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14743 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14744 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14745 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 14746 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 14747 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 14748 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14749 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14750 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14751 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14752 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14753 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14754 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14755 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14756 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14757 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14758 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14759 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 14760 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 14761 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 14762 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 14763 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 14764 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 14765 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 14766 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 14767 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 14768 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 14769 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 14770 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 14771 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 14772 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 14773 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14774 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14775 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14776 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14777 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14778 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14779 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14780 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14781 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 14782 }; 14783 14784 switch(AltIdx) { 14785 default: llvm_unreachable("Invalid register alt name index!"); 14786 case AArch64::NoRegAltName: 14787 assert(*(AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1]) && 14788 "Invalid alt name index for register!"); 14789 return AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1]; 14790 case AArch64::vlist1: 14791 assert(*(AsmStrsvlist1+RegAsmOffsetvlist1[RegNo-1]) && 14792 "Invalid alt name index for register!"); 14793 return AsmStrsvlist1+RegAsmOffsetvlist1[RegNo-1]; 14794 case AArch64::vreg: 14795 assert(*(AsmStrsvreg+RegAsmOffsetvreg[RegNo-1]) && 14796 "Invalid alt name index for register!"); 14797 return AsmStrsvreg+RegAsmOffsetvreg[RegNo-1]; 14798 } 14799} 14800 14801#ifdef PRINT_ALIAS_INSTR 14802#undef PRINT_ALIAS_INSTR 14803 14804static bool AArch64InstPrinterValidateMCOperand(const MCOperand &MCOp, 14805 const MCSubtargetInfo &STI, 14806 unsigned PredicateIndex); 14807bool AArch64InstPrinter::printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &OS) { 14808 static const PatternsForOpcode OpToPatterns[] = { 14809 {AArch64::ADDSWri, 0, 1 }, 14810 {AArch64::ADDSWrs, 1, 3 }, 14811 {AArch64::ADDSWrx, 4, 3 }, 14812 {AArch64::ADDSXri, 7, 1 }, 14813 {AArch64::ADDSXrs, 8, 3 }, 14814 {AArch64::ADDSXrx, 11, 1 }, 14815 {AArch64::ADDSXrx64, 12, 3 }, 14816 {AArch64::ADDWri, 15, 2 }, 14817 {AArch64::ADDWrs, 17, 1 }, 14818 {AArch64::ADDWrx, 18, 2 }, 14819 {AArch64::ADDXri, 20, 2 }, 14820 {AArch64::ADDXrs, 22, 1 }, 14821 {AArch64::ADDXrx64, 23, 2 }, 14822 {AArch64::ANDSWri, 25, 1 }, 14823 {AArch64::ANDSWrs, 26, 3 }, 14824 {AArch64::ANDSXri, 29, 1 }, 14825 {AArch64::ANDSXrs, 30, 3 }, 14826 {AArch64::ANDS_PPzPP, 33, 1 }, 14827 {AArch64::ANDWrs, 34, 1 }, 14828 {AArch64::ANDXrs, 35, 1 }, 14829 {AArch64::AND_PPzPP, 36, 1 }, 14830 {AArch64::AND_ZI, 37, 3 }, 14831 {AArch64::AUTIA1716, 40, 1 }, 14832 {AArch64::AUTIASP, 41, 1 }, 14833 {AArch64::AUTIAZ, 42, 1 }, 14834 {AArch64::AUTIB1716, 43, 1 }, 14835 {AArch64::AUTIBSP, 44, 1 }, 14836 {AArch64::AUTIBZ, 45, 1 }, 14837 {AArch64::BICSWrs, 46, 1 }, 14838 {AArch64::BICSXrs, 47, 1 }, 14839 {AArch64::BICWrs, 48, 1 }, 14840 {AArch64::BICXrs, 49, 1 }, 14841 {AArch64::CLREX, 50, 1 }, 14842 {AArch64::CNTB_XPiI, 51, 2 }, 14843 {AArch64::CNTD_XPiI, 53, 2 }, 14844 {AArch64::CNTH_XPiI, 55, 2 }, 14845 {AArch64::CNTW_XPiI, 57, 2 }, 14846 {AArch64::CPY_ZPmI_B, 59, 1 }, 14847 {AArch64::CPY_ZPmI_D, 60, 1 }, 14848 {AArch64::CPY_ZPmI_H, 61, 1 }, 14849 {AArch64::CPY_ZPmI_S, 62, 1 }, 14850 {AArch64::CPY_ZPmR_B, 63, 1 }, 14851 {AArch64::CPY_ZPmR_D, 64, 1 }, 14852 {AArch64::CPY_ZPmR_H, 65, 1 }, 14853 {AArch64::CPY_ZPmR_S, 66, 1 }, 14854 {AArch64::CPY_ZPmV_B, 67, 1 }, 14855 {AArch64::CPY_ZPmV_D, 68, 1 }, 14856 {AArch64::CPY_ZPmV_H, 69, 1 }, 14857 {AArch64::CPY_ZPmV_S, 70, 1 }, 14858 {AArch64::CPY_ZPzI_B, 71, 1 }, 14859 {AArch64::CPY_ZPzI_D, 72, 1 }, 14860 {AArch64::CPY_ZPzI_H, 73, 1 }, 14861 {AArch64::CPY_ZPzI_S, 74, 1 }, 14862 {AArch64::CSINCWr, 75, 2 }, 14863 {AArch64::CSINCXr, 77, 2 }, 14864 {AArch64::CSINVWr, 79, 2 }, 14865 {AArch64::CSINVXr, 81, 2 }, 14866 {AArch64::CSNEGWr, 83, 1 }, 14867 {AArch64::CSNEGXr, 84, 1 }, 14868 {AArch64::DCPS1, 85, 1 }, 14869 {AArch64::DCPS2, 86, 1 }, 14870 {AArch64::DCPS3, 87, 1 }, 14871 {AArch64::DECB_XPiI, 88, 2 }, 14872 {AArch64::DECD_XPiI, 90, 2 }, 14873 {AArch64::DECD_ZPiI, 92, 2 }, 14874 {AArch64::DECH_XPiI, 94, 2 }, 14875 {AArch64::DECH_ZPiI, 96, 2 }, 14876 {AArch64::DECW_XPiI, 98, 2 }, 14877 {AArch64::DECW_ZPiI, 100, 2 }, 14878 {AArch64::DSB, 102, 2 }, 14879 {AArch64::DUPM_ZI, 104, 6 }, 14880 {AArch64::DUP_ZI_B, 110, 1 }, 14881 {AArch64::DUP_ZI_D, 111, 2 }, 14882 {AArch64::DUP_ZI_H, 113, 2 }, 14883 {AArch64::DUP_ZI_S, 115, 2 }, 14884 {AArch64::DUP_ZR_B, 117, 1 }, 14885 {AArch64::DUP_ZR_D, 118, 1 }, 14886 {AArch64::DUP_ZR_H, 119, 1 }, 14887 {AArch64::DUP_ZR_S, 120, 1 }, 14888 {AArch64::DUP_ZZI_B, 121, 2 }, 14889 {AArch64::DUP_ZZI_D, 123, 2 }, 14890 {AArch64::DUP_ZZI_H, 125, 2 }, 14891 {AArch64::DUP_ZZI_Q, 127, 2 }, 14892 {AArch64::DUP_ZZI_S, 129, 2 }, 14893 {AArch64::EONWrs, 131, 1 }, 14894 {AArch64::EONXrs, 132, 1 }, 14895 {AArch64::EORS_PPzPP, 133, 1 }, 14896 {AArch64::EORWrs, 134, 1 }, 14897 {AArch64::EORXrs, 135, 1 }, 14898 {AArch64::EOR_PPzPP, 136, 1 }, 14899 {AArch64::EOR_ZI, 137, 3 }, 14900 {AArch64::EXTRWrri, 140, 1 }, 14901 {AArch64::EXTRXrri, 141, 1 }, 14902 {AArch64::FCPY_ZPmI_D, 142, 1 }, 14903 {AArch64::FCPY_ZPmI_H, 143, 1 }, 14904 {AArch64::FCPY_ZPmI_S, 144, 1 }, 14905 {AArch64::FDUP_ZI_D, 145, 1 }, 14906 {AArch64::FDUP_ZI_H, 146, 1 }, 14907 {AArch64::FDUP_ZI_S, 147, 1 }, 14908 {AArch64::GLD1B_D_IMM_REAL, 148, 1 }, 14909 {AArch64::GLD1B_S_IMM_REAL, 149, 1 }, 14910 {AArch64::GLD1D_IMM_REAL, 150, 1 }, 14911 {AArch64::GLD1H_D_IMM_REAL, 151, 1 }, 14912 {AArch64::GLD1H_S_IMM_REAL, 152, 1 }, 14913 {AArch64::GLD1SB_D_IMM_REAL, 153, 1 }, 14914 {AArch64::GLD1SB_S_IMM_REAL, 154, 1 }, 14915 {AArch64::GLD1SH_D_IMM_REAL, 155, 1 }, 14916 {AArch64::GLD1SH_S_IMM_REAL, 156, 1 }, 14917 {AArch64::GLD1SW_D_IMM_REAL, 157, 1 }, 14918 {AArch64::GLD1W_D_IMM_REAL, 158, 1 }, 14919 {AArch64::GLD1W_IMM_REAL, 159, 1 }, 14920 {AArch64::GLDFF1B_D_IMM_REAL, 160, 1 }, 14921 {AArch64::GLDFF1B_S_IMM_REAL, 161, 1 }, 14922 {AArch64::GLDFF1D_IMM_REAL, 162, 1 }, 14923 {AArch64::GLDFF1H_D_IMM_REAL, 163, 1 }, 14924 {AArch64::GLDFF1H_S_IMM_REAL, 164, 1 }, 14925 {AArch64::GLDFF1SB_D_IMM_REAL, 165, 1 }, 14926 {AArch64::GLDFF1SB_S_IMM_REAL, 166, 1 }, 14927 {AArch64::GLDFF1SH_D_IMM_REAL, 167, 1 }, 14928 {AArch64::GLDFF1SH_S_IMM_REAL, 168, 1 }, 14929 {AArch64::GLDFF1SW_D_IMM_REAL, 169, 1 }, 14930 {AArch64::GLDFF1W_D_IMM_REAL, 170, 1 }, 14931 {AArch64::GLDFF1W_IMM_REAL, 171, 1 }, 14932 {AArch64::HINT, 172, 11 }, 14933 {AArch64::INCB_XPiI, 183, 2 }, 14934 {AArch64::INCD_XPiI, 185, 2 }, 14935 {AArch64::INCD_ZPiI, 187, 2 }, 14936 {AArch64::INCH_XPiI, 189, 2 }, 14937 {AArch64::INCH_ZPiI, 191, 2 }, 14938 {AArch64::INCW_XPiI, 193, 2 }, 14939 {AArch64::INCW_ZPiI, 195, 2 }, 14940 {AArch64::INSvi16gpr, 197, 1 }, 14941 {AArch64::INSvi16lane, 198, 1 }, 14942 {AArch64::INSvi32gpr, 199, 1 }, 14943 {AArch64::INSvi32lane, 200, 1 }, 14944 {AArch64::INSvi64gpr, 201, 1 }, 14945 {AArch64::INSvi64lane, 202, 1 }, 14946 {AArch64::INSvi8gpr, 203, 1 }, 14947 {AArch64::INSvi8lane, 204, 1 }, 14948 {AArch64::IRG, 205, 1 }, 14949 {AArch64::ISB, 206, 1 }, 14950 {AArch64::LD1B_D_IMM, 207, 1 }, 14951 {AArch64::LD1B_H_IMM, 208, 1 }, 14952 {AArch64::LD1B_IMM, 209, 1 }, 14953 {AArch64::LD1B_S_IMM, 210, 1 }, 14954 {AArch64::LD1D_IMM, 211, 1 }, 14955 {AArch64::LD1Fourv16b_POST, 212, 1 }, 14956 {AArch64::LD1Fourv1d_POST, 213, 1 }, 14957 {AArch64::LD1Fourv2d_POST, 214, 1 }, 14958 {AArch64::LD1Fourv2s_POST, 215, 1 }, 14959 {AArch64::LD1Fourv4h_POST, 216, 1 }, 14960 {AArch64::LD1Fourv4s_POST, 217, 1 }, 14961 {AArch64::LD1Fourv8b_POST, 218, 1 }, 14962 {AArch64::LD1Fourv8h_POST, 219, 1 }, 14963 {AArch64::LD1H_D_IMM, 220, 1 }, 14964 {AArch64::LD1H_IMM, 221, 1 }, 14965 {AArch64::LD1H_S_IMM, 222, 1 }, 14966 {AArch64::LD1Onev16b_POST, 223, 1 }, 14967 {AArch64::LD1Onev1d_POST, 224, 1 }, 14968 {AArch64::LD1Onev2d_POST, 225, 1 }, 14969 {AArch64::LD1Onev2s_POST, 226, 1 }, 14970 {AArch64::LD1Onev4h_POST, 227, 1 }, 14971 {AArch64::LD1Onev4s_POST, 228, 1 }, 14972 {AArch64::LD1Onev8b_POST, 229, 1 }, 14973 {AArch64::LD1Onev8h_POST, 230, 1 }, 14974 {AArch64::LD1RB_D_IMM, 231, 1 }, 14975 {AArch64::LD1RB_H_IMM, 232, 1 }, 14976 {AArch64::LD1RB_IMM, 233, 1 }, 14977 {AArch64::LD1RB_S_IMM, 234, 1 }, 14978 {AArch64::LD1RD_IMM, 235, 1 }, 14979 {AArch64::LD1RH_D_IMM, 236, 1 }, 14980 {AArch64::LD1RH_IMM, 237, 1 }, 14981 {AArch64::LD1RH_S_IMM, 238, 1 }, 14982 {AArch64::LD1RQ_B_IMM, 239, 1 }, 14983 {AArch64::LD1RQ_D_IMM, 240, 1 }, 14984 {AArch64::LD1RQ_H_IMM, 241, 1 }, 14985 {AArch64::LD1RQ_W_IMM, 242, 1 }, 14986 {AArch64::LD1RSB_D_IMM, 243, 1 }, 14987 {AArch64::LD1RSB_H_IMM, 244, 1 }, 14988 {AArch64::LD1RSB_S_IMM, 245, 1 }, 14989 {AArch64::LD1RSH_D_IMM, 246, 1 }, 14990 {AArch64::LD1RSH_S_IMM, 247, 1 }, 14991 {AArch64::LD1RSW_IMM, 248, 1 }, 14992 {AArch64::LD1RW_D_IMM, 249, 1 }, 14993 {AArch64::LD1RW_IMM, 250, 1 }, 14994 {AArch64::LD1Rv16b_POST, 251, 1 }, 14995 {AArch64::LD1Rv1d_POST, 252, 1 }, 14996 {AArch64::LD1Rv2d_POST, 253, 1 }, 14997 {AArch64::LD1Rv2s_POST, 254, 1 }, 14998 {AArch64::LD1Rv4h_POST, 255, 1 }, 14999 {AArch64::LD1Rv4s_POST, 256, 1 }, 15000 {AArch64::LD1Rv8b_POST, 257, 1 }, 15001 {AArch64::LD1Rv8h_POST, 258, 1 }, 15002 {AArch64::LD1SB_D_IMM, 259, 1 }, 15003 {AArch64::LD1SB_H_IMM, 260, 1 }, 15004 {AArch64::LD1SB_S_IMM, 261, 1 }, 15005 {AArch64::LD1SH_D_IMM, 262, 1 }, 15006 {AArch64::LD1SH_S_IMM, 263, 1 }, 15007 {AArch64::LD1SW_D_IMM, 264, 1 }, 15008 {AArch64::LD1Threev16b_POST, 265, 1 }, 15009 {AArch64::LD1Threev1d_POST, 266, 1 }, 15010 {AArch64::LD1Threev2d_POST, 267, 1 }, 15011 {AArch64::LD1Threev2s_POST, 268, 1 }, 15012 {AArch64::LD1Threev4h_POST, 269, 1 }, 15013 {AArch64::LD1Threev4s_POST, 270, 1 }, 15014 {AArch64::LD1Threev8b_POST, 271, 1 }, 15015 {AArch64::LD1Threev8h_POST, 272, 1 }, 15016 {AArch64::LD1Twov16b_POST, 273, 1 }, 15017 {AArch64::LD1Twov1d_POST, 274, 1 }, 15018 {AArch64::LD1Twov2d_POST, 275, 1 }, 15019 {AArch64::LD1Twov2s_POST, 276, 1 }, 15020 {AArch64::LD1Twov4h_POST, 277, 1 }, 15021 {AArch64::LD1Twov4s_POST, 278, 1 }, 15022 {AArch64::LD1Twov8b_POST, 279, 1 }, 15023 {AArch64::LD1Twov8h_POST, 280, 1 }, 15024 {AArch64::LD1W_D_IMM, 281, 1 }, 15025 {AArch64::LD1W_IMM, 282, 1 }, 15026 {AArch64::LD1i16_POST, 283, 1 }, 15027 {AArch64::LD1i32_POST, 284, 1 }, 15028 {AArch64::LD1i64_POST, 285, 1 }, 15029 {AArch64::LD1i8_POST, 286, 1 }, 15030 {AArch64::LD2B_IMM, 287, 1 }, 15031 {AArch64::LD2D_IMM, 288, 1 }, 15032 {AArch64::LD2H_IMM, 289, 1 }, 15033 {AArch64::LD2Rv16b_POST, 290, 1 }, 15034 {AArch64::LD2Rv1d_POST, 291, 1 }, 15035 {AArch64::LD2Rv2d_POST, 292, 1 }, 15036 {AArch64::LD2Rv2s_POST, 293, 1 }, 15037 {AArch64::LD2Rv4h_POST, 294, 1 }, 15038 {AArch64::LD2Rv4s_POST, 295, 1 }, 15039 {AArch64::LD2Rv8b_POST, 296, 1 }, 15040 {AArch64::LD2Rv8h_POST, 297, 1 }, 15041 {AArch64::LD2Twov16b_POST, 298, 1 }, 15042 {AArch64::LD2Twov2d_POST, 299, 1 }, 15043 {AArch64::LD2Twov2s_POST, 300, 1 }, 15044 {AArch64::LD2Twov4h_POST, 301, 1 }, 15045 {AArch64::LD2Twov4s_POST, 302, 1 }, 15046 {AArch64::LD2Twov8b_POST, 303, 1 }, 15047 {AArch64::LD2Twov8h_POST, 304, 1 }, 15048 {AArch64::LD2W_IMM, 305, 1 }, 15049 {AArch64::LD2i16_POST, 306, 1 }, 15050 {AArch64::LD2i32_POST, 307, 1 }, 15051 {AArch64::LD2i64_POST, 308, 1 }, 15052 {AArch64::LD2i8_POST, 309, 1 }, 15053 {AArch64::LD3B_IMM, 310, 1 }, 15054 {AArch64::LD3D_IMM, 311, 1 }, 15055 {AArch64::LD3H_IMM, 312, 1 }, 15056 {AArch64::LD3Rv16b_POST, 313, 1 }, 15057 {AArch64::LD3Rv1d_POST, 314, 1 }, 15058 {AArch64::LD3Rv2d_POST, 315, 1 }, 15059 {AArch64::LD3Rv2s_POST, 316, 1 }, 15060 {AArch64::LD3Rv4h_POST, 317, 1 }, 15061 {AArch64::LD3Rv4s_POST, 318, 1 }, 15062 {AArch64::LD3Rv8b_POST, 319, 1 }, 15063 {AArch64::LD3Rv8h_POST, 320, 1 }, 15064 {AArch64::LD3Threev16b_POST, 321, 1 }, 15065 {AArch64::LD3Threev2d_POST, 322, 1 }, 15066 {AArch64::LD3Threev2s_POST, 323, 1 }, 15067 {AArch64::LD3Threev4h_POST, 324, 1 }, 15068 {AArch64::LD3Threev4s_POST, 325, 1 }, 15069 {AArch64::LD3Threev8b_POST, 326, 1 }, 15070 {AArch64::LD3Threev8h_POST, 327, 1 }, 15071 {AArch64::LD3W_IMM, 328, 1 }, 15072 {AArch64::LD3i16_POST, 329, 1 }, 15073 {AArch64::LD3i32_POST, 330, 1 }, 15074 {AArch64::LD3i64_POST, 331, 1 }, 15075 {AArch64::LD3i8_POST, 332, 1 }, 15076 {AArch64::LD4B_IMM, 333, 1 }, 15077 {AArch64::LD4D_IMM, 334, 1 }, 15078 {AArch64::LD4Fourv16b_POST, 335, 1 }, 15079 {AArch64::LD4Fourv2d_POST, 336, 1 }, 15080 {AArch64::LD4Fourv2s_POST, 337, 1 }, 15081 {AArch64::LD4Fourv4h_POST, 338, 1 }, 15082 {AArch64::LD4Fourv4s_POST, 339, 1 }, 15083 {AArch64::LD4Fourv8b_POST, 340, 1 }, 15084 {AArch64::LD4Fourv8h_POST, 341, 1 }, 15085 {AArch64::LD4H_IMM, 342, 1 }, 15086 {AArch64::LD4Rv16b_POST, 343, 1 }, 15087 {AArch64::LD4Rv1d_POST, 344, 1 }, 15088 {AArch64::LD4Rv2d_POST, 345, 1 }, 15089 {AArch64::LD4Rv2s_POST, 346, 1 }, 15090 {AArch64::LD4Rv4h_POST, 347, 1 }, 15091 {AArch64::LD4Rv4s_POST, 348, 1 }, 15092 {AArch64::LD4Rv8b_POST, 349, 1 }, 15093 {AArch64::LD4Rv8h_POST, 350, 1 }, 15094 {AArch64::LD4W_IMM, 351, 1 }, 15095 {AArch64::LD4i16_POST, 352, 1 }, 15096 {AArch64::LD4i32_POST, 353, 1 }, 15097 {AArch64::LD4i64_POST, 354, 1 }, 15098 {AArch64::LD4i8_POST, 355, 1 }, 15099 {AArch64::LDADDB, 356, 1 }, 15100 {AArch64::LDADDH, 357, 1 }, 15101 {AArch64::LDADDLB, 358, 1 }, 15102 {AArch64::LDADDLH, 359, 1 }, 15103 {AArch64::LDADDLW, 360, 1 }, 15104 {AArch64::LDADDLX, 361, 1 }, 15105 {AArch64::LDADDW, 362, 1 }, 15106 {AArch64::LDADDX, 363, 1 }, 15107 {AArch64::LDAPURBi, 364, 1 }, 15108 {AArch64::LDAPURHi, 365, 1 }, 15109 {AArch64::LDAPURSBWi, 366, 1 }, 15110 {AArch64::LDAPURSBXi, 367, 1 }, 15111 {AArch64::LDAPURSHWi, 368, 1 }, 15112 {AArch64::LDAPURSHXi, 369, 1 }, 15113 {AArch64::LDAPURSWi, 370, 1 }, 15114 {AArch64::LDAPURXi, 371, 1 }, 15115 {AArch64::LDAPURi, 372, 1 }, 15116 {AArch64::LDCLRB, 373, 1 }, 15117 {AArch64::LDCLRH, 374, 1 }, 15118 {AArch64::LDCLRLB, 375, 1 }, 15119 {AArch64::LDCLRLH, 376, 1 }, 15120 {AArch64::LDCLRLW, 377, 1 }, 15121 {AArch64::LDCLRLX, 378, 1 }, 15122 {AArch64::LDCLRW, 379, 1 }, 15123 {AArch64::LDCLRX, 380, 1 }, 15124 {AArch64::LDEORB, 381, 1 }, 15125 {AArch64::LDEORH, 382, 1 }, 15126 {AArch64::LDEORLB, 383, 1 }, 15127 {AArch64::LDEORLH, 384, 1 }, 15128 {AArch64::LDEORLW, 385, 1 }, 15129 {AArch64::LDEORLX, 386, 1 }, 15130 {AArch64::LDEORW, 387, 1 }, 15131 {AArch64::LDEORX, 388, 1 }, 15132 {AArch64::LDFF1B_D_REAL, 389, 1 }, 15133 {AArch64::LDFF1B_H_REAL, 390, 1 }, 15134 {AArch64::LDFF1B_REAL, 391, 1 }, 15135 {AArch64::LDFF1B_S_REAL, 392, 1 }, 15136 {AArch64::LDFF1D_REAL, 393, 1 }, 15137 {AArch64::LDFF1H_D_REAL, 394, 1 }, 15138 {AArch64::LDFF1H_REAL, 395, 1 }, 15139 {AArch64::LDFF1H_S_REAL, 396, 1 }, 15140 {AArch64::LDFF1SB_D_REAL, 397, 1 }, 15141 {AArch64::LDFF1SB_H_REAL, 398, 1 }, 15142 {AArch64::LDFF1SB_S_REAL, 399, 1 }, 15143 {AArch64::LDFF1SH_D_REAL, 400, 1 }, 15144 {AArch64::LDFF1SH_S_REAL, 401, 1 }, 15145 {AArch64::LDFF1SW_D_REAL, 402, 1 }, 15146 {AArch64::LDFF1W_D_REAL, 403, 1 }, 15147 {AArch64::LDFF1W_REAL, 404, 1 }, 15148 {AArch64::LDG, 405, 1 }, 15149 {AArch64::LDNF1B_D_IMM, 406, 1 }, 15150 {AArch64::LDNF1B_H_IMM, 407, 1 }, 15151 {AArch64::LDNF1B_IMM, 408, 1 }, 15152 {AArch64::LDNF1B_S_IMM, 409, 1 }, 15153 {AArch64::LDNF1D_IMM, 410, 1 }, 15154 {AArch64::LDNF1H_D_IMM, 411, 1 }, 15155 {AArch64::LDNF1H_IMM, 412, 1 }, 15156 {AArch64::LDNF1H_S_IMM, 413, 1 }, 15157 {AArch64::LDNF1SB_D_IMM, 414, 1 }, 15158 {AArch64::LDNF1SB_H_IMM, 415, 1 }, 15159 {AArch64::LDNF1SB_S_IMM, 416, 1 }, 15160 {AArch64::LDNF1SH_D_IMM, 417, 1 }, 15161 {AArch64::LDNF1SH_S_IMM, 418, 1 }, 15162 {AArch64::LDNF1SW_D_IMM, 419, 1 }, 15163 {AArch64::LDNF1W_D_IMM, 420, 1 }, 15164 {AArch64::LDNF1W_IMM, 421, 1 }, 15165 {AArch64::LDNPDi, 422, 1 }, 15166 {AArch64::LDNPQi, 423, 1 }, 15167 {AArch64::LDNPSi, 424, 1 }, 15168 {AArch64::LDNPWi, 425, 1 }, 15169 {AArch64::LDNPXi, 426, 1 }, 15170 {AArch64::LDNT1B_ZRI, 427, 1 }, 15171 {AArch64::LDNT1B_ZZR_D_REAL, 428, 1 }, 15172 {AArch64::LDNT1B_ZZR_S_REAL, 429, 1 }, 15173 {AArch64::LDNT1D_ZRI, 430, 1 }, 15174 {AArch64::LDNT1D_ZZR_D_REAL, 431, 1 }, 15175 {AArch64::LDNT1H_ZRI, 432, 1 }, 15176 {AArch64::LDNT1H_ZZR_D_REAL, 433, 1 }, 15177 {AArch64::LDNT1H_ZZR_S_REAL, 434, 1 }, 15178 {AArch64::LDNT1SB_ZZR_D_REAL, 435, 1 }, 15179 {AArch64::LDNT1SB_ZZR_S_REAL, 436, 1 }, 15180 {AArch64::LDNT1SH_ZZR_D_REAL, 437, 1 }, 15181 {AArch64::LDNT1SH_ZZR_S_REAL, 438, 1 }, 15182 {AArch64::LDNT1SW_ZZR_D_REAL, 439, 1 }, 15183 {AArch64::LDNT1W_ZRI, 440, 1 }, 15184 {AArch64::LDNT1W_ZZR_D_REAL, 441, 1 }, 15185 {AArch64::LDNT1W_ZZR_S_REAL, 442, 1 }, 15186 {AArch64::LDPDi, 443, 1 }, 15187 {AArch64::LDPQi, 444, 1 }, 15188 {AArch64::LDPSWi, 445, 1 }, 15189 {AArch64::LDPSi, 446, 1 }, 15190 {AArch64::LDPWi, 447, 1 }, 15191 {AArch64::LDPXi, 448, 1 }, 15192 {AArch64::LDRAAindexed, 449, 1 }, 15193 {AArch64::LDRABindexed, 450, 1 }, 15194 {AArch64::LDRBBroX, 451, 1 }, 15195 {AArch64::LDRBBui, 452, 1 }, 15196 {AArch64::LDRBroX, 453, 1 }, 15197 {AArch64::LDRBui, 454, 1 }, 15198 {AArch64::LDRDroX, 455, 1 }, 15199 {AArch64::LDRDui, 456, 1 }, 15200 {AArch64::LDRHHroX, 457, 1 }, 15201 {AArch64::LDRHHui, 458, 1 }, 15202 {AArch64::LDRHroX, 459, 1 }, 15203 {AArch64::LDRHui, 460, 1 }, 15204 {AArch64::LDRQroX, 461, 1 }, 15205 {AArch64::LDRQui, 462, 1 }, 15206 {AArch64::LDRSBWroX, 463, 1 }, 15207 {AArch64::LDRSBWui, 464, 1 }, 15208 {AArch64::LDRSBXroX, 465, 1 }, 15209 {AArch64::LDRSBXui, 466, 1 }, 15210 {AArch64::LDRSHWroX, 467, 1 }, 15211 {AArch64::LDRSHWui, 468, 1 }, 15212 {AArch64::LDRSHXroX, 469, 1 }, 15213 {AArch64::LDRSHXui, 470, 1 }, 15214 {AArch64::LDRSWroX, 471, 1 }, 15215 {AArch64::LDRSWui, 472, 1 }, 15216 {AArch64::LDRSroX, 473, 1 }, 15217 {AArch64::LDRSui, 474, 1 }, 15218 {AArch64::LDRWroX, 475, 1 }, 15219 {AArch64::LDRWui, 476, 1 }, 15220 {AArch64::LDRXroX, 477, 1 }, 15221 {AArch64::LDRXui, 478, 1 }, 15222 {AArch64::LDR_PXI, 479, 1 }, 15223 {AArch64::LDR_ZXI, 480, 1 }, 15224 {AArch64::LDSETB, 481, 1 }, 15225 {AArch64::LDSETH, 482, 1 }, 15226 {AArch64::LDSETLB, 483, 1 }, 15227 {AArch64::LDSETLH, 484, 1 }, 15228 {AArch64::LDSETLW, 485, 1 }, 15229 {AArch64::LDSETLX, 486, 1 }, 15230 {AArch64::LDSETW, 487, 1 }, 15231 {AArch64::LDSETX, 488, 1 }, 15232 {AArch64::LDSMAXB, 489, 1 }, 15233 {AArch64::LDSMAXH, 490, 1 }, 15234 {AArch64::LDSMAXLB, 491, 1 }, 15235 {AArch64::LDSMAXLH, 492, 1 }, 15236 {AArch64::LDSMAXLW, 493, 1 }, 15237 {AArch64::LDSMAXLX, 494, 1 }, 15238 {AArch64::LDSMAXW, 495, 1 }, 15239 {AArch64::LDSMAXX, 496, 1 }, 15240 {AArch64::LDSMINB, 497, 1 }, 15241 {AArch64::LDSMINH, 498, 1 }, 15242 {AArch64::LDSMINLB, 499, 1 }, 15243 {AArch64::LDSMINLH, 500, 1 }, 15244 {AArch64::LDSMINLW, 501, 1 }, 15245 {AArch64::LDSMINLX, 502, 1 }, 15246 {AArch64::LDSMINW, 503, 1 }, 15247 {AArch64::LDSMINX, 504, 1 }, 15248 {AArch64::LDTRBi, 505, 1 }, 15249 {AArch64::LDTRHi, 506, 1 }, 15250 {AArch64::LDTRSBWi, 507, 1 }, 15251 {AArch64::LDTRSBXi, 508, 1 }, 15252 {AArch64::LDTRSHWi, 509, 1 }, 15253 {AArch64::LDTRSHXi, 510, 1 }, 15254 {AArch64::LDTRSWi, 511, 1 }, 15255 {AArch64::LDTRWi, 512, 1 }, 15256 {AArch64::LDTRXi, 513, 1 }, 15257 {AArch64::LDUMAXB, 514, 1 }, 15258 {AArch64::LDUMAXH, 515, 1 }, 15259 {AArch64::LDUMAXLB, 516, 1 }, 15260 {AArch64::LDUMAXLH, 517, 1 }, 15261 {AArch64::LDUMAXLW, 518, 1 }, 15262 {AArch64::LDUMAXLX, 519, 1 }, 15263 {AArch64::LDUMAXW, 520, 1 }, 15264 {AArch64::LDUMAXX, 521, 1 }, 15265 {AArch64::LDUMINB, 522, 1 }, 15266 {AArch64::LDUMINH, 523, 1 }, 15267 {AArch64::LDUMINLB, 524, 1 }, 15268 {AArch64::LDUMINLH, 525, 1 }, 15269 {AArch64::LDUMINLW, 526, 1 }, 15270 {AArch64::LDUMINLX, 527, 1 }, 15271 {AArch64::LDUMINW, 528, 1 }, 15272 {AArch64::LDUMINX, 529, 1 }, 15273 {AArch64::LDURBBi, 530, 1 }, 15274 {AArch64::LDURBi, 531, 1 }, 15275 {AArch64::LDURDi, 532, 1 }, 15276 {AArch64::LDURHHi, 533, 1 }, 15277 {AArch64::LDURHi, 534, 1 }, 15278 {AArch64::LDURQi, 535, 1 }, 15279 {AArch64::LDURSBWi, 536, 1 }, 15280 {AArch64::LDURSBXi, 537, 1 }, 15281 {AArch64::LDURSHWi, 538, 1 }, 15282 {AArch64::LDURSHXi, 539, 1 }, 15283 {AArch64::LDURSWi, 540, 1 }, 15284 {AArch64::LDURSi, 541, 1 }, 15285 {AArch64::LDURWi, 542, 1 }, 15286 {AArch64::LDURXi, 543, 1 }, 15287 {AArch64::MADDWrrr, 544, 1 }, 15288 {AArch64::MADDXrrr, 545, 1 }, 15289 {AArch64::MSUBWrrr, 546, 1 }, 15290 {AArch64::MSUBXrrr, 547, 1 }, 15291 {AArch64::NOTv16i8, 548, 1 }, 15292 {AArch64::NOTv8i8, 549, 1 }, 15293 {AArch64::ORNWrs, 550, 3 }, 15294 {AArch64::ORNXrs, 553, 3 }, 15295 {AArch64::ORRS_PPzPP, 556, 1 }, 15296 {AArch64::ORRWrs, 557, 2 }, 15297 {AArch64::ORRXrs, 559, 2 }, 15298 {AArch64::ORR_PPzPP, 561, 1 }, 15299 {AArch64::ORR_ZI, 562, 3 }, 15300 {AArch64::ORR_ZZZ, 565, 1 }, 15301 {AArch64::ORRv16i8, 566, 1 }, 15302 {AArch64::ORRv8i8, 567, 1 }, 15303 {AArch64::PACIA1716, 568, 1 }, 15304 {AArch64::PACIASP, 569, 1 }, 15305 {AArch64::PACIAZ, 570, 1 }, 15306 {AArch64::PACIB1716, 571, 1 }, 15307 {AArch64::PACIBSP, 572, 1 }, 15308 {AArch64::PACIBZ, 573, 1 }, 15309 {AArch64::PRFB_D_PZI, 574, 1 }, 15310 {AArch64::PRFB_PRI, 575, 1 }, 15311 {AArch64::PRFB_S_PZI, 576, 1 }, 15312 {AArch64::PRFD_D_PZI, 577, 1 }, 15313 {AArch64::PRFD_PRI, 578, 1 }, 15314 {AArch64::PRFD_S_PZI, 579, 1 }, 15315 {AArch64::PRFH_D_PZI, 580, 1 }, 15316 {AArch64::PRFH_PRI, 581, 1 }, 15317 {AArch64::PRFH_S_PZI, 582, 1 }, 15318 {AArch64::PRFMroX, 583, 1 }, 15319 {AArch64::PRFMui, 584, 1 }, 15320 {AArch64::PRFUMi, 585, 1 }, 15321 {AArch64::PRFW_D_PZI, 586, 1 }, 15322 {AArch64::PRFW_PRI, 587, 1 }, 15323 {AArch64::PRFW_S_PZI, 588, 1 }, 15324 {AArch64::PTRUES_B, 589, 1 }, 15325 {AArch64::PTRUES_D, 590, 1 }, 15326 {AArch64::PTRUES_H, 591, 1 }, 15327 {AArch64::PTRUES_S, 592, 1 }, 15328 {AArch64::PTRUE_B, 593, 1 }, 15329 {AArch64::PTRUE_D, 594, 1 }, 15330 {AArch64::PTRUE_H, 595, 1 }, 15331 {AArch64::PTRUE_S, 596, 1 }, 15332 {AArch64::RET, 597, 1 }, 15333 {AArch64::SBCSWr, 598, 1 }, 15334 {AArch64::SBCSXr, 599, 1 }, 15335 {AArch64::SBCWr, 600, 1 }, 15336 {AArch64::SBCXr, 601, 1 }, 15337 {AArch64::SBFMWri, 602, 3 }, 15338 {AArch64::SBFMXri, 605, 4 }, 15339 {AArch64::SEL_PPPP, 609, 1 }, 15340 {AArch64::SEL_ZPZZ_B, 610, 1 }, 15341 {AArch64::SEL_ZPZZ_D, 611, 1 }, 15342 {AArch64::SEL_ZPZZ_H, 612, 1 }, 15343 {AArch64::SEL_ZPZZ_S, 613, 1 }, 15344 {AArch64::SMADDLrrr, 614, 1 }, 15345 {AArch64::SMSUBLrrr, 615, 1 }, 15346 {AArch64::SQDECB_XPiI, 616, 2 }, 15347 {AArch64::SQDECB_XPiWdI, 618, 2 }, 15348 {AArch64::SQDECD_XPiI, 620, 2 }, 15349 {AArch64::SQDECD_XPiWdI, 622, 2 }, 15350 {AArch64::SQDECD_ZPiI, 624, 2 }, 15351 {AArch64::SQDECH_XPiI, 626, 2 }, 15352 {AArch64::SQDECH_XPiWdI, 628, 2 }, 15353 {AArch64::SQDECH_ZPiI, 630, 2 }, 15354 {AArch64::SQDECW_XPiI, 632, 2 }, 15355 {AArch64::SQDECW_XPiWdI, 634, 2 }, 15356 {AArch64::SQDECW_ZPiI, 636, 2 }, 15357 {AArch64::SQINCB_XPiI, 638, 2 }, 15358 {AArch64::SQINCB_XPiWdI, 640, 2 }, 15359 {AArch64::SQINCD_XPiI, 642, 2 }, 15360 {AArch64::SQINCD_XPiWdI, 644, 2 }, 15361 {AArch64::SQINCD_ZPiI, 646, 2 }, 15362 {AArch64::SQINCH_XPiI, 648, 2 }, 15363 {AArch64::SQINCH_XPiWdI, 650, 2 }, 15364 {AArch64::SQINCH_ZPiI, 652, 2 }, 15365 {AArch64::SQINCW_XPiI, 654, 2 }, 15366 {AArch64::SQINCW_XPiWdI, 656, 2 }, 15367 {AArch64::SQINCW_ZPiI, 658, 2 }, 15368 {AArch64::SST1B_D_IMM, 660, 1 }, 15369 {AArch64::SST1B_S_IMM, 661, 1 }, 15370 {AArch64::SST1D_IMM, 662, 1 }, 15371 {AArch64::SST1H_D_IMM, 663, 1 }, 15372 {AArch64::SST1H_S_IMM, 664, 1 }, 15373 {AArch64::SST1W_D_IMM, 665, 1 }, 15374 {AArch64::SST1W_IMM, 666, 1 }, 15375 {AArch64::ST1B_D_IMM, 667, 1 }, 15376 {AArch64::ST1B_H_IMM, 668, 1 }, 15377 {AArch64::ST1B_IMM, 669, 1 }, 15378 {AArch64::ST1B_S_IMM, 670, 1 }, 15379 {AArch64::ST1D_IMM, 671, 1 }, 15380 {AArch64::ST1Fourv16b_POST, 672, 1 }, 15381 {AArch64::ST1Fourv1d_POST, 673, 1 }, 15382 {AArch64::ST1Fourv2d_POST, 674, 1 }, 15383 {AArch64::ST1Fourv2s_POST, 675, 1 }, 15384 {AArch64::ST1Fourv4h_POST, 676, 1 }, 15385 {AArch64::ST1Fourv4s_POST, 677, 1 }, 15386 {AArch64::ST1Fourv8b_POST, 678, 1 }, 15387 {AArch64::ST1Fourv8h_POST, 679, 1 }, 15388 {AArch64::ST1H_D_IMM, 680, 1 }, 15389 {AArch64::ST1H_IMM, 681, 1 }, 15390 {AArch64::ST1H_S_IMM, 682, 1 }, 15391 {AArch64::ST1Onev16b_POST, 683, 1 }, 15392 {AArch64::ST1Onev1d_POST, 684, 1 }, 15393 {AArch64::ST1Onev2d_POST, 685, 1 }, 15394 {AArch64::ST1Onev2s_POST, 686, 1 }, 15395 {AArch64::ST1Onev4h_POST, 687, 1 }, 15396 {AArch64::ST1Onev4s_POST, 688, 1 }, 15397 {AArch64::ST1Onev8b_POST, 689, 1 }, 15398 {AArch64::ST1Onev8h_POST, 690, 1 }, 15399 {AArch64::ST1Threev16b_POST, 691, 1 }, 15400 {AArch64::ST1Threev1d_POST, 692, 1 }, 15401 {AArch64::ST1Threev2d_POST, 693, 1 }, 15402 {AArch64::ST1Threev2s_POST, 694, 1 }, 15403 {AArch64::ST1Threev4h_POST, 695, 1 }, 15404 {AArch64::ST1Threev4s_POST, 696, 1 }, 15405 {AArch64::ST1Threev8b_POST, 697, 1 }, 15406 {AArch64::ST1Threev8h_POST, 698, 1 }, 15407 {AArch64::ST1Twov16b_POST, 699, 1 }, 15408 {AArch64::ST1Twov1d_POST, 700, 1 }, 15409 {AArch64::ST1Twov2d_POST, 701, 1 }, 15410 {AArch64::ST1Twov2s_POST, 702, 1 }, 15411 {AArch64::ST1Twov4h_POST, 703, 1 }, 15412 {AArch64::ST1Twov4s_POST, 704, 1 }, 15413 {AArch64::ST1Twov8b_POST, 705, 1 }, 15414 {AArch64::ST1Twov8h_POST, 706, 1 }, 15415 {AArch64::ST1W_D_IMM, 707, 1 }, 15416 {AArch64::ST1W_IMM, 708, 1 }, 15417 {AArch64::ST1i16_POST, 709, 1 }, 15418 {AArch64::ST1i32_POST, 710, 1 }, 15419 {AArch64::ST1i64_POST, 711, 1 }, 15420 {AArch64::ST1i8_POST, 712, 1 }, 15421 {AArch64::ST2B_IMM, 713, 1 }, 15422 {AArch64::ST2D_IMM, 714, 1 }, 15423 {AArch64::ST2GOffset, 715, 1 }, 15424 {AArch64::ST2H_IMM, 716, 1 }, 15425 {AArch64::ST2Twov16b_POST, 717, 1 }, 15426 {AArch64::ST2Twov2d_POST, 718, 1 }, 15427 {AArch64::ST2Twov2s_POST, 719, 1 }, 15428 {AArch64::ST2Twov4h_POST, 720, 1 }, 15429 {AArch64::ST2Twov4s_POST, 721, 1 }, 15430 {AArch64::ST2Twov8b_POST, 722, 1 }, 15431 {AArch64::ST2Twov8h_POST, 723, 1 }, 15432 {AArch64::ST2W_IMM, 724, 1 }, 15433 {AArch64::ST2i16_POST, 725, 1 }, 15434 {AArch64::ST2i32_POST, 726, 1 }, 15435 {AArch64::ST2i64_POST, 727, 1 }, 15436 {AArch64::ST2i8_POST, 728, 1 }, 15437 {AArch64::ST3B_IMM, 729, 1 }, 15438 {AArch64::ST3D_IMM, 730, 1 }, 15439 {AArch64::ST3H_IMM, 731, 1 }, 15440 {AArch64::ST3Threev16b_POST, 732, 1 }, 15441 {AArch64::ST3Threev2d_POST, 733, 1 }, 15442 {AArch64::ST3Threev2s_POST, 734, 1 }, 15443 {AArch64::ST3Threev4h_POST, 735, 1 }, 15444 {AArch64::ST3Threev4s_POST, 736, 1 }, 15445 {AArch64::ST3Threev8b_POST, 737, 1 }, 15446 {AArch64::ST3Threev8h_POST, 738, 1 }, 15447 {AArch64::ST3W_IMM, 739, 1 }, 15448 {AArch64::ST3i16_POST, 740, 1 }, 15449 {AArch64::ST3i32_POST, 741, 1 }, 15450 {AArch64::ST3i64_POST, 742, 1 }, 15451 {AArch64::ST3i8_POST, 743, 1 }, 15452 {AArch64::ST4B_IMM, 744, 1 }, 15453 {AArch64::ST4D_IMM, 745, 1 }, 15454 {AArch64::ST4Fourv16b_POST, 746, 1 }, 15455 {AArch64::ST4Fourv2d_POST, 747, 1 }, 15456 {AArch64::ST4Fourv2s_POST, 748, 1 }, 15457 {AArch64::ST4Fourv4h_POST, 749, 1 }, 15458 {AArch64::ST4Fourv4s_POST, 750, 1 }, 15459 {AArch64::ST4Fourv8b_POST, 751, 1 }, 15460 {AArch64::ST4Fourv8h_POST, 752, 1 }, 15461 {AArch64::ST4H_IMM, 753, 1 }, 15462 {AArch64::ST4W_IMM, 754, 1 }, 15463 {AArch64::ST4i16_POST, 755, 1 }, 15464 {AArch64::ST4i32_POST, 756, 1 }, 15465 {AArch64::ST4i64_POST, 757, 1 }, 15466 {AArch64::ST4i8_POST, 758, 1 }, 15467 {AArch64::STGOffset, 759, 1 }, 15468 {AArch64::STGPi, 760, 1 }, 15469 {AArch64::STLURBi, 761, 1 }, 15470 {AArch64::STLURHi, 762, 1 }, 15471 {AArch64::STLURWi, 763, 1 }, 15472 {AArch64::STLURXi, 764, 1 }, 15473 {AArch64::STNPDi, 765, 1 }, 15474 {AArch64::STNPQi, 766, 1 }, 15475 {AArch64::STNPSi, 767, 1 }, 15476 {AArch64::STNPWi, 768, 1 }, 15477 {AArch64::STNPXi, 769, 1 }, 15478 {AArch64::STNT1B_ZRI, 770, 1 }, 15479 {AArch64::STNT1B_ZZR_D_REAL, 771, 1 }, 15480 {AArch64::STNT1B_ZZR_S_REAL, 772, 1 }, 15481 {AArch64::STNT1D_ZRI, 773, 1 }, 15482 {AArch64::STNT1D_ZZR_D_REAL, 774, 1 }, 15483 {AArch64::STNT1H_ZRI, 775, 1 }, 15484 {AArch64::STNT1H_ZZR_D_REAL, 776, 1 }, 15485 {AArch64::STNT1H_ZZR_S_REAL, 777, 1 }, 15486 {AArch64::STNT1W_ZRI, 778, 1 }, 15487 {AArch64::STNT1W_ZZR_D_REAL, 779, 1 }, 15488 {AArch64::STNT1W_ZZR_S_REAL, 780, 1 }, 15489 {AArch64::STPDi, 781, 1 }, 15490 {AArch64::STPQi, 782, 1 }, 15491 {AArch64::STPSi, 783, 1 }, 15492 {AArch64::STPWi, 784, 1 }, 15493 {AArch64::STPXi, 785, 1 }, 15494 {AArch64::STRBBroX, 786, 1 }, 15495 {AArch64::STRBBui, 787, 1 }, 15496 {AArch64::STRBroX, 788, 1 }, 15497 {AArch64::STRBui, 789, 1 }, 15498 {AArch64::STRDroX, 790, 1 }, 15499 {AArch64::STRDui, 791, 1 }, 15500 {AArch64::STRHHroX, 792, 1 }, 15501 {AArch64::STRHHui, 793, 1 }, 15502 {AArch64::STRHroX, 794, 1 }, 15503 {AArch64::STRHui, 795, 1 }, 15504 {AArch64::STRQroX, 796, 1 }, 15505 {AArch64::STRQui, 797, 1 }, 15506 {AArch64::STRSroX, 798, 1 }, 15507 {AArch64::STRSui, 799, 1 }, 15508 {AArch64::STRWroX, 800, 1 }, 15509 {AArch64::STRWui, 801, 1 }, 15510 {AArch64::STRXroX, 802, 1 }, 15511 {AArch64::STRXui, 803, 1 }, 15512 {AArch64::STR_PXI, 804, 1 }, 15513 {AArch64::STR_ZXI, 805, 1 }, 15514 {AArch64::STTRBi, 806, 1 }, 15515 {AArch64::STTRHi, 807, 1 }, 15516 {AArch64::STTRWi, 808, 1 }, 15517 {AArch64::STTRXi, 809, 1 }, 15518 {AArch64::STURBBi, 810, 1 }, 15519 {AArch64::STURBi, 811, 1 }, 15520 {AArch64::STURDi, 812, 1 }, 15521 {AArch64::STURHHi, 813, 1 }, 15522 {AArch64::STURHi, 814, 1 }, 15523 {AArch64::STURQi, 815, 1 }, 15524 {AArch64::STURSi, 816, 1 }, 15525 {AArch64::STURWi, 817, 1 }, 15526 {AArch64::STURXi, 818, 1 }, 15527 {AArch64::STZ2GOffset, 819, 1 }, 15528 {AArch64::STZGOffset, 820, 1 }, 15529 {AArch64::SUBSWri, 821, 1 }, 15530 {AArch64::SUBSWrs, 822, 5 }, 15531 {AArch64::SUBSWrx, 827, 3 }, 15532 {AArch64::SUBSXri, 830, 1 }, 15533 {AArch64::SUBSXrs, 831, 5 }, 15534 {AArch64::SUBSXrx, 836, 1 }, 15535 {AArch64::SUBSXrx64, 837, 3 }, 15536 {AArch64::SUBWrs, 840, 3 }, 15537 {AArch64::SUBWrx, 843, 2 }, 15538 {AArch64::SUBXrs, 845, 3 }, 15539 {AArch64::SUBXrx64, 848, 2 }, 15540 {AArch64::SYSxt, 850, 1 }, 15541 {AArch64::UBFMWri, 851, 3 }, 15542 {AArch64::UBFMXri, 854, 4 }, 15543 {AArch64::UMADDLrrr, 858, 1 }, 15544 {AArch64::UMOVvi32, 859, 1 }, 15545 {AArch64::UMOVvi64, 860, 1 }, 15546 {AArch64::UMSUBLrrr, 861, 1 }, 15547 {AArch64::UQDECB_WPiI, 862, 2 }, 15548 {AArch64::UQDECB_XPiI, 864, 2 }, 15549 {AArch64::UQDECD_WPiI, 866, 2 }, 15550 {AArch64::UQDECD_XPiI, 868, 2 }, 15551 {AArch64::UQDECD_ZPiI, 870, 2 }, 15552 {AArch64::UQDECH_WPiI, 872, 2 }, 15553 {AArch64::UQDECH_XPiI, 874, 2 }, 15554 {AArch64::UQDECH_ZPiI, 876, 2 }, 15555 {AArch64::UQDECW_WPiI, 878, 2 }, 15556 {AArch64::UQDECW_XPiI, 880, 2 }, 15557 {AArch64::UQDECW_ZPiI, 882, 2 }, 15558 {AArch64::UQINCB_WPiI, 884, 2 }, 15559 {AArch64::UQINCB_XPiI, 886, 2 }, 15560 {AArch64::UQINCD_WPiI, 888, 2 }, 15561 {AArch64::UQINCD_XPiI, 890, 2 }, 15562 {AArch64::UQINCD_ZPiI, 892, 2 }, 15563 {AArch64::UQINCH_WPiI, 894, 2 }, 15564 {AArch64::UQINCH_XPiI, 896, 2 }, 15565 {AArch64::UQINCH_ZPiI, 898, 2 }, 15566 {AArch64::UQINCW_WPiI, 900, 2 }, 15567 {AArch64::UQINCW_XPiI, 902, 2 }, 15568 {AArch64::UQINCW_ZPiI, 904, 2 }, 15569 {AArch64::XPACLRI, 906, 1 }, 15570 }; 15571 15572 static const AliasPattern Patterns[] = { 15573 // AArch64::ADDSWri - 0 15574 {0, 0, 4, 2 }, 15575 // AArch64::ADDSWrs - 1 15576 {13, 2, 4, 4 }, 15577 {24, 6, 4, 3 }, 15578 {39, 9, 4, 4 }, 15579 // AArch64::ADDSWrx - 4 15580 {13, 13, 4, 4 }, 15581 {55, 17, 4, 3 }, 15582 {39, 20, 4, 4 }, 15583 // AArch64::ADDSXri - 7 15584 {0, 24, 4, 2 }, 15585 // AArch64::ADDSXrs - 8 15586 {13, 26, 4, 4 }, 15587 {24, 30, 4, 3 }, 15588 {39, 33, 4, 4 }, 15589 // AArch64::ADDSXrx - 11 15590 {55, 37, 4, 3 }, 15591 // AArch64::ADDSXrx64 - 12 15592 {13, 40, 4, 4 }, 15593 {55, 44, 4, 3 }, 15594 {39, 47, 4, 4 }, 15595 // AArch64::ADDWri - 15 15596 {70, 51, 4, 4 }, 15597 {70, 55, 4, 4 }, 15598 // AArch64::ADDWrs - 17 15599 {81, 59, 4, 4 }, 15600 // AArch64::ADDWrx - 18 15601 {81, 63, 4, 4 }, 15602 {81, 67, 4, 4 }, 15603 // AArch64::ADDXri - 20 15604 {70, 71, 4, 4 }, 15605 {70, 75, 4, 4 }, 15606 // AArch64::ADDXrs - 22 15607 {81, 79, 4, 4 }, 15608 // AArch64::ADDXrx64 - 23 15609 {81, 83, 4, 4 }, 15610 {81, 87, 4, 4 }, 15611 // AArch64::ANDSWri - 25 15612 {96, 91, 3, 2 }, 15613 // AArch64::ANDSWrs - 26 15614 {109, 93, 4, 4 }, 15615 {120, 97, 4, 3 }, 15616 {135, 100, 4, 4 }, 15617 // AArch64::ANDSXri - 29 15618 {151, 104, 3, 2 }, 15619 // AArch64::ANDSXrs - 30 15620 {109, 106, 4, 4 }, 15621 {120, 110, 4, 3 }, 15622 {135, 113, 4, 4 }, 15623 // AArch64::ANDS_PPzPP - 33 15624 {164, 117, 4, 5 }, 15625 // AArch64::ANDWrs - 34 15626 {188, 122, 4, 4 }, 15627 // AArch64::ANDXrs - 35 15628 {188, 126, 4, 4 }, 15629 // AArch64::AND_PPzPP - 36 15630 {203, 130, 4, 5 }, 15631 // AArch64::AND_ZI - 37 15632 {226, 135, 3, 4 }, 15633 {247, 139, 3, 4 }, 15634 {268, 143, 3, 4 }, 15635 // AArch64::AUTIA1716 - 40 15636 {289, 147, 0, 1 }, 15637 // AArch64::AUTIASP - 41 15638 {299, 148, 0, 1 }, 15639 // AArch64::AUTIAZ - 42 15640 {307, 149, 0, 1 }, 15641 // AArch64::AUTIB1716 - 43 15642 {314, 150, 0, 1 }, 15643 // AArch64::AUTIBSP - 44 15644 {324, 151, 0, 1 }, 15645 // AArch64::AUTIBZ - 45 15646 {332, 152, 0, 1 }, 15647 // AArch64::BICSWrs - 46 15648 {339, 153, 4, 4 }, 15649 // AArch64::BICSXrs - 47 15650 {339, 157, 4, 4 }, 15651 // AArch64::BICWrs - 48 15652 {355, 161, 4, 4 }, 15653 // AArch64::BICXrs - 49 15654 {355, 165, 4, 4 }, 15655 // AArch64::CLREX - 50 15656 {370, 169, 1, 1 }, 15657 // AArch64::CNTB_XPiI - 51 15658 {376, 170, 3, 4 }, 15659 {384, 174, 3, 4 }, 15660 // AArch64::CNTD_XPiI - 53 15661 {398, 178, 3, 4 }, 15662 {406, 182, 3, 4 }, 15663 // AArch64::CNTH_XPiI - 55 15664 {420, 186, 3, 4 }, 15665 {428, 190, 3, 4 }, 15666 // AArch64::CNTW_XPiI - 57 15667 {442, 194, 3, 4 }, 15668 {450, 198, 3, 4 }, 15669 // AArch64::CPY_ZPmI_B - 59 15670 {464, 202, 5, 4 }, 15671 // AArch64::CPY_ZPmI_D - 60 15672 {487, 206, 5, 4 }, 15673 // AArch64::CPY_ZPmI_H - 61 15674 {510, 210, 5, 4 }, 15675 // AArch64::CPY_ZPmI_S - 62 15676 {533, 214, 5, 4 }, 15677 // AArch64::CPY_ZPmR_B - 63 15678 {556, 218, 4, 5 }, 15679 // AArch64::CPY_ZPmR_D - 64 15680 {577, 223, 4, 5 }, 15681 // AArch64::CPY_ZPmR_H - 65 15682 {598, 228, 4, 5 }, 15683 // AArch64::CPY_ZPmR_S - 66 15684 {619, 233, 4, 5 }, 15685 // AArch64::CPY_ZPmV_B - 67 15686 {556, 238, 4, 5 }, 15687 // AArch64::CPY_ZPmV_D - 68 15688 {577, 243, 4, 5 }, 15689 // AArch64::CPY_ZPmV_H - 69 15690 {598, 248, 4, 5 }, 15691 // AArch64::CPY_ZPmV_S - 70 15692 {619, 253, 4, 5 }, 15693 // AArch64::CPY_ZPzI_B - 71 15694 {640, 258, 4, 3 }, 15695 // AArch64::CPY_ZPzI_D - 72 15696 {663, 261, 4, 3 }, 15697 // AArch64::CPY_ZPzI_H - 73 15698 {686, 264, 4, 3 }, 15699 // AArch64::CPY_ZPzI_S - 74 15700 {709, 267, 4, 3 }, 15701 // AArch64::CSINCWr - 75 15702 {732, 270, 4, 4 }, 15703 {746, 274, 4, 4 }, 15704 // AArch64::CSINCXr - 77 15705 {732, 278, 4, 4 }, 15706 {746, 282, 4, 4 }, 15707 // AArch64::CSINVWr - 79 15708 {764, 286, 4, 4 }, 15709 {779, 290, 4, 4 }, 15710 // AArch64::CSINVXr - 81 15711 {764, 294, 4, 4 }, 15712 {779, 298, 4, 4 }, 15713 // AArch64::CSNEGWr - 83 15714 {797, 302, 4, 4 }, 15715 // AArch64::CSNEGXr - 84 15716 {797, 306, 4, 4 }, 15717 // AArch64::DCPS1 - 85 15718 {815, 310, 1, 1 }, 15719 // AArch64::DCPS2 - 86 15720 {821, 311, 1, 1 }, 15721 // AArch64::DCPS3 - 87 15722 {827, 312, 1, 1 }, 15723 // AArch64::DECB_XPiI - 88 15724 {833, 313, 4, 5 }, 15725 {841, 318, 4, 5 }, 15726 // AArch64::DECD_XPiI - 90 15727 {855, 323, 4, 5 }, 15728 {863, 328, 4, 5 }, 15729 // AArch64::DECD_ZPiI - 92 15730 {877, 333, 4, 5 }, 15731 {887, 338, 4, 5 }, 15732 // AArch64::DECH_XPiI - 94 15733 {903, 343, 4, 5 }, 15734 {911, 348, 4, 5 }, 15735 // AArch64::DECH_ZPiI - 96 15736 {925, 353, 4, 5 }, 15737 {935, 358, 4, 5 }, 15738 // AArch64::DECW_XPiI - 98 15739 {951, 363, 4, 5 }, 15740 {959, 368, 4, 5 }, 15741 // AArch64::DECW_ZPiI - 100 15742 {973, 373, 4, 5 }, 15743 {983, 378, 4, 5 }, 15744 // AArch64::DSB - 102 15745 {999, 383, 1, 1 }, 15746 {1004, 384, 1, 1 }, 15747 // AArch64::DUPM_ZI - 104 15748 {1010, 385, 2, 3 }, 15749 {1025, 388, 2, 3 }, 15750 {1040, 391, 2, 3 }, 15751 {1055, 394, 2, 3 }, 15752 {1071, 397, 2, 3 }, 15753 {1087, 400, 2, 3 }, 15754 // AArch64::DUP_ZI_B - 110 15755 {1103, 403, 3, 2 }, 15756 // AArch64::DUP_ZI_D - 111 15757 {1118, 405, 3, 2 }, 15758 {1133, 407, 3, 4 }, 15759 // AArch64::DUP_ZI_H - 113 15760 {1149, 411, 3, 2 }, 15761 {1164, 413, 3, 4 }, 15762 // AArch64::DUP_ZI_S - 115 15763 {1180, 417, 3, 2 }, 15764 {1195, 419, 3, 4 }, 15765 // AArch64::DUP_ZR_B - 117 15766 {1211, 423, 2, 3 }, 15767 // AArch64::DUP_ZR_D - 118 15768 {1224, 426, 2, 3 }, 15769 // AArch64::DUP_ZR_H - 119 15770 {1237, 429, 2, 3 }, 15771 // AArch64::DUP_ZR_S - 120 15772 {1250, 432, 2, 3 }, 15773 // AArch64::DUP_ZZI_B - 121 15774 {1263, 435, 3, 4 }, 15775 {1278, 439, 3, 3 }, 15776 // AArch64::DUP_ZZI_D - 123 15777 {1297, 442, 3, 4 }, 15778 {1312, 446, 3, 3 }, 15779 // AArch64::DUP_ZZI_H - 125 15780 {1331, 449, 3, 4 }, 15781 {1346, 453, 3, 3 }, 15782 // AArch64::DUP_ZZI_Q - 127 15783 {1365, 456, 3, 4 }, 15784 {1380, 460, 3, 3 }, 15785 // AArch64::DUP_ZZI_S - 129 15786 {1399, 463, 3, 4 }, 15787 {1414, 467, 3, 3 }, 15788 // AArch64::EONWrs - 131 15789 {1433, 470, 4, 4 }, 15790 // AArch64::EONXrs - 132 15791 {1433, 474, 4, 4 }, 15792 // AArch64::EORS_PPzPP - 133 15793 {1448, 478, 4, 5 }, 15794 // AArch64::EORWrs - 134 15795 {1472, 483, 4, 4 }, 15796 // AArch64::EORXrs - 135 15797 {1472, 487, 4, 4 }, 15798 // AArch64::EOR_PPzPP - 136 15799 {1487, 491, 4, 5 }, 15800 // AArch64::EOR_ZI - 137 15801 {1510, 496, 3, 4 }, 15802 {1531, 500, 3, 4 }, 15803 {1552, 504, 3, 4 }, 15804 // AArch64::EXTRWrri - 140 15805 {1573, 508, 4, 3 }, 15806 // AArch64::EXTRXrri - 141 15807 {1573, 511, 4, 3 }, 15808 // AArch64::FCPY_ZPmI_D - 142 15809 {1588, 514, 4, 4 }, 15810 // AArch64::FCPY_ZPmI_H - 143 15811 {1612, 518, 4, 4 }, 15812 // AArch64::FCPY_ZPmI_S - 144 15813 {1636, 522, 4, 4 }, 15814 // AArch64::FDUP_ZI_D - 145 15815 {1660, 526, 2, 2 }, 15816 // AArch64::FDUP_ZI_H - 146 15817 {1676, 528, 2, 2 }, 15818 // AArch64::FDUP_ZI_S - 147 15819 {1692, 530, 2, 2 }, 15820 // AArch64::GLD1B_D_IMM_REAL - 148 15821 {1708, 532, 4, 5 }, 15822 // AArch64::GLD1B_S_IMM_REAL - 149 15823 {1734, 537, 4, 5 }, 15824 // AArch64::GLD1D_IMM_REAL - 150 15825 {1760, 542, 4, 5 }, 15826 // AArch64::GLD1H_D_IMM_REAL - 151 15827 {1786, 547, 4, 5 }, 15828 // AArch64::GLD1H_S_IMM_REAL - 152 15829 {1812, 552, 4, 5 }, 15830 // AArch64::GLD1SB_D_IMM_REAL - 153 15831 {1838, 557, 4, 5 }, 15832 // AArch64::GLD1SB_S_IMM_REAL - 154 15833 {1865, 562, 4, 5 }, 15834 // AArch64::GLD1SH_D_IMM_REAL - 155 15835 {1892, 567, 4, 5 }, 15836 // AArch64::GLD1SH_S_IMM_REAL - 156 15837 {1919, 572, 4, 5 }, 15838 // AArch64::GLD1SW_D_IMM_REAL - 157 15839 {1946, 577, 4, 5 }, 15840 // AArch64::GLD1W_D_IMM_REAL - 158 15841 {1973, 582, 4, 5 }, 15842 // AArch64::GLD1W_IMM_REAL - 159 15843 {1999, 587, 4, 5 }, 15844 // AArch64::GLDFF1B_D_IMM_REAL - 160 15845 {2025, 592, 4, 5 }, 15846 // AArch64::GLDFF1B_S_IMM_REAL - 161 15847 {2053, 597, 4, 5 }, 15848 // AArch64::GLDFF1D_IMM_REAL - 162 15849 {2081, 602, 4, 5 }, 15850 // AArch64::GLDFF1H_D_IMM_REAL - 163 15851 {2109, 607, 4, 5 }, 15852 // AArch64::GLDFF1H_S_IMM_REAL - 164 15853 {2137, 612, 4, 5 }, 15854 // AArch64::GLDFF1SB_D_IMM_REAL - 165 15855 {2165, 617, 4, 5 }, 15856 // AArch64::GLDFF1SB_S_IMM_REAL - 166 15857 {2194, 622, 4, 5 }, 15858 // AArch64::GLDFF1SH_D_IMM_REAL - 167 15859 {2223, 627, 4, 5 }, 15860 // AArch64::GLDFF1SH_S_IMM_REAL - 168 15861 {2252, 632, 4, 5 }, 15862 // AArch64::GLDFF1SW_D_IMM_REAL - 169 15863 {2281, 637, 4, 5 }, 15864 // AArch64::GLDFF1W_D_IMM_REAL - 170 15865 {2310, 642, 4, 5 }, 15866 // AArch64::GLDFF1W_IMM_REAL - 171 15867 {2338, 647, 4, 5 }, 15868 // AArch64::HINT - 172 15869 {2366, 652, 1, 1 }, 15870 {2370, 653, 1, 1 }, 15871 {2376, 654, 1, 1 }, 15872 {2380, 655, 1, 1 }, 15873 {2384, 656, 1, 1 }, 15874 {2388, 657, 1, 1 }, 15875 {2393, 658, 1, 2 }, 15876 {2397, 660, 1, 1 }, 15877 {2402, 661, 1, 2 }, 15878 {2406, 663, 1, 2 }, 15879 {2415, 665, 1, 2 }, 15880 // AArch64::INCB_XPiI - 183 15881 {2424, 667, 4, 5 }, 15882 {2432, 672, 4, 5 }, 15883 // AArch64::INCD_XPiI - 185 15884 {2446, 677, 4, 5 }, 15885 {2454, 682, 4, 5 }, 15886 // AArch64::INCD_ZPiI - 187 15887 {2468, 687, 4, 5 }, 15888 {2478, 692, 4, 5 }, 15889 // AArch64::INCH_XPiI - 189 15890 {2494, 697, 4, 5 }, 15891 {2502, 702, 4, 5 }, 15892 // AArch64::INCH_ZPiI - 191 15893 {2516, 707, 4, 5 }, 15894 {2526, 712, 4, 5 }, 15895 // AArch64::INCW_XPiI - 193 15896 {2542, 717, 4, 5 }, 15897 {2550, 722, 4, 5 }, 15898 // AArch64::INCW_ZPiI - 195 15899 {2564, 727, 4, 5 }, 15900 {2574, 732, 4, 5 }, 15901 // AArch64::INSvi16gpr - 197 15902 {2590, 737, 4, 5 }, 15903 // AArch64::INSvi16lane - 198 15904 {2609, 742, 5, 5 }, 15905 // AArch64::INSvi32gpr - 199 15906 {2636, 747, 4, 5 }, 15907 // AArch64::INSvi32lane - 200 15908 {2655, 752, 5, 5 }, 15909 // AArch64::INSvi64gpr - 201 15910 {2682, 757, 4, 5 }, 15911 // AArch64::INSvi64lane - 202 15912 {2701, 762, 5, 5 }, 15913 // AArch64::INSvi8gpr - 203 15914 {2728, 767, 4, 5 }, 15915 // AArch64::INSvi8lane - 204 15916 {2747, 772, 5, 5 }, 15917 // AArch64::IRG - 205 15918 {2774, 777, 3, 4 }, 15919 // AArch64::ISB - 206 15920 {2785, 781, 1, 1 }, 15921 // AArch64::LD1B_D_IMM - 207 15922 {2789, 782, 4, 5 }, 15923 // AArch64::LD1B_H_IMM - 208 15924 {2813, 787, 4, 5 }, 15925 // AArch64::LD1B_IMM - 209 15926 {2837, 792, 4, 5 }, 15927 // AArch64::LD1B_S_IMM - 210 15928 {2861, 797, 4, 5 }, 15929 // AArch64::LD1D_IMM - 211 15930 {2885, 802, 4, 5 }, 15931 // AArch64::LD1Fourv16b_POST - 212 15932 {2909, 807, 4, 5 }, 15933 // AArch64::LD1Fourv1d_POST - 213 15934 {2929, 812, 4, 5 }, 15935 // AArch64::LD1Fourv2d_POST - 214 15936 {2949, 817, 4, 5 }, 15937 // AArch64::LD1Fourv2s_POST - 215 15938 {2969, 822, 4, 5 }, 15939 // AArch64::LD1Fourv4h_POST - 216 15940 {2989, 827, 4, 5 }, 15941 // AArch64::LD1Fourv4s_POST - 217 15942 {3009, 832, 4, 5 }, 15943 // AArch64::LD1Fourv8b_POST - 218 15944 {3029, 837, 4, 5 }, 15945 // AArch64::LD1Fourv8h_POST - 219 15946 {3049, 842, 4, 5 }, 15947 // AArch64::LD1H_D_IMM - 220 15948 {3069, 847, 4, 5 }, 15949 // AArch64::LD1H_IMM - 221 15950 {3093, 852, 4, 5 }, 15951 // AArch64::LD1H_S_IMM - 222 15952 {3117, 857, 4, 5 }, 15953 // AArch64::LD1Onev16b_POST - 223 15954 {3141, 862, 4, 5 }, 15955 // AArch64::LD1Onev1d_POST - 224 15956 {3161, 867, 4, 5 }, 15957 // AArch64::LD1Onev2d_POST - 225 15958 {3180, 872, 4, 5 }, 15959 // AArch64::LD1Onev2s_POST - 226 15960 {3200, 877, 4, 5 }, 15961 // AArch64::LD1Onev4h_POST - 227 15962 {3219, 882, 4, 5 }, 15963 // AArch64::LD1Onev4s_POST - 228 15964 {3238, 887, 4, 5 }, 15965 // AArch64::LD1Onev8b_POST - 229 15966 {3258, 892, 4, 5 }, 15967 // AArch64::LD1Onev8h_POST - 230 15968 {3277, 897, 4, 5 }, 15969 // AArch64::LD1RB_D_IMM - 231 15970 {3297, 902, 4, 5 }, 15971 // AArch64::LD1RB_H_IMM - 232 15972 {3322, 907, 4, 5 }, 15973 // AArch64::LD1RB_IMM - 233 15974 {3347, 912, 4, 5 }, 15975 // AArch64::LD1RB_S_IMM - 234 15976 {3372, 917, 4, 5 }, 15977 // AArch64::LD1RD_IMM - 235 15978 {3397, 922, 4, 5 }, 15979 // AArch64::LD1RH_D_IMM - 236 15980 {3422, 927, 4, 5 }, 15981 // AArch64::LD1RH_IMM - 237 15982 {3447, 932, 4, 5 }, 15983 // AArch64::LD1RH_S_IMM - 238 15984 {3472, 937, 4, 5 }, 15985 // AArch64::LD1RQ_B_IMM - 239 15986 {3497, 942, 4, 5 }, 15987 // AArch64::LD1RQ_D_IMM - 240 15988 {3523, 947, 4, 5 }, 15989 // AArch64::LD1RQ_H_IMM - 241 15990 {3549, 952, 4, 5 }, 15991 // AArch64::LD1RQ_W_IMM - 242 15992 {3575, 957, 4, 5 }, 15993 // AArch64::LD1RSB_D_IMM - 243 15994 {3601, 962, 4, 5 }, 15995 // AArch64::LD1RSB_H_IMM - 244 15996 {3627, 967, 4, 5 }, 15997 // AArch64::LD1RSB_S_IMM - 245 15998 {3653, 972, 4, 5 }, 15999 // AArch64::LD1RSH_D_IMM - 246 16000 {3679, 977, 4, 5 }, 16001 // AArch64::LD1RSH_S_IMM - 247 16002 {3705, 982, 4, 5 }, 16003 // AArch64::LD1RSW_IMM - 248 16004 {3731, 987, 4, 5 }, 16005 // AArch64::LD1RW_D_IMM - 249 16006 {3757, 992, 4, 5 }, 16007 // AArch64::LD1RW_IMM - 250 16008 {3782, 997, 4, 5 }, 16009 // AArch64::LD1Rv16b_POST - 251 16010 {3807, 1002, 4, 5 }, 16011 // AArch64::LD1Rv1d_POST - 252 16012 {3827, 1007, 4, 5 }, 16013 // AArch64::LD1Rv2d_POST - 253 16014 {3847, 1012, 4, 5 }, 16015 // AArch64::LD1Rv2s_POST - 254 16016 {3867, 1017, 4, 5 }, 16017 // AArch64::LD1Rv4h_POST - 255 16018 {3887, 1022, 4, 5 }, 16019 // AArch64::LD1Rv4s_POST - 256 16020 {3907, 1027, 4, 5 }, 16021 // AArch64::LD1Rv8b_POST - 257 16022 {3927, 1032, 4, 5 }, 16023 // AArch64::LD1Rv8h_POST - 258 16024 {3947, 1037, 4, 5 }, 16025 // AArch64::LD1SB_D_IMM - 259 16026 {3967, 1042, 4, 5 }, 16027 // AArch64::LD1SB_H_IMM - 260 16028 {3992, 1047, 4, 5 }, 16029 // AArch64::LD1SB_S_IMM - 261 16030 {4017, 1052, 4, 5 }, 16031 // AArch64::LD1SH_D_IMM - 262 16032 {4042, 1057, 4, 5 }, 16033 // AArch64::LD1SH_S_IMM - 263 16034 {4067, 1062, 4, 5 }, 16035 // AArch64::LD1SW_D_IMM - 264 16036 {4092, 1067, 4, 5 }, 16037 // AArch64::LD1Threev16b_POST - 265 16038 {4117, 1072, 4, 5 }, 16039 // AArch64::LD1Threev1d_POST - 266 16040 {4137, 1077, 4, 5 }, 16041 // AArch64::LD1Threev2d_POST - 267 16042 {4157, 1082, 4, 5 }, 16043 // AArch64::LD1Threev2s_POST - 268 16044 {4177, 1087, 4, 5 }, 16045 // AArch64::LD1Threev4h_POST - 269 16046 {4197, 1092, 4, 5 }, 16047 // AArch64::LD1Threev4s_POST - 270 16048 {4217, 1097, 4, 5 }, 16049 // AArch64::LD1Threev8b_POST - 271 16050 {4237, 1102, 4, 5 }, 16051 // AArch64::LD1Threev8h_POST - 272 16052 {4257, 1107, 4, 5 }, 16053 // AArch64::LD1Twov16b_POST - 273 16054 {4277, 1112, 4, 5 }, 16055 // AArch64::LD1Twov1d_POST - 274 16056 {4297, 1117, 4, 5 }, 16057 // AArch64::LD1Twov2d_POST - 275 16058 {4317, 1122, 4, 5 }, 16059 // AArch64::LD1Twov2s_POST - 276 16060 {4337, 1127, 4, 5 }, 16061 // AArch64::LD1Twov4h_POST - 277 16062 {4357, 1132, 4, 5 }, 16063 // AArch64::LD1Twov4s_POST - 278 16064 {4377, 1137, 4, 5 }, 16065 // AArch64::LD1Twov8b_POST - 279 16066 {4397, 1142, 4, 5 }, 16067 // AArch64::LD1Twov8h_POST - 280 16068 {4417, 1147, 4, 5 }, 16069 // AArch64::LD1W_D_IMM - 281 16070 {4437, 1152, 4, 5 }, 16071 // AArch64::LD1W_IMM - 282 16072 {4461, 1157, 4, 5 }, 16073 // AArch64::LD1i16_POST - 283 16074 {4485, 1162, 6, 7 }, 16075 // AArch64::LD1i32_POST - 284 16076 {4508, 1169, 6, 7 }, 16077 // AArch64::LD1i64_POST - 285 16078 {4531, 1176, 6, 7 }, 16079 // AArch64::LD1i8_POST - 286 16080 {4554, 1183, 6, 7 }, 16081 // AArch64::LD2B_IMM - 287 16082 {4577, 1190, 4, 5 }, 16083 // AArch64::LD2D_IMM - 288 16084 {4601, 1195, 4, 5 }, 16085 // AArch64::LD2H_IMM - 289 16086 {4625, 1200, 4, 5 }, 16087 // AArch64::LD2Rv16b_POST - 290 16088 {4649, 1205, 4, 5 }, 16089 // AArch64::LD2Rv1d_POST - 291 16090 {4669, 1210, 4, 5 }, 16091 // AArch64::LD2Rv2d_POST - 292 16092 {4690, 1215, 4, 5 }, 16093 // AArch64::LD2Rv2s_POST - 293 16094 {4711, 1220, 4, 5 }, 16095 // AArch64::LD2Rv4h_POST - 294 16096 {4731, 1225, 4, 5 }, 16097 // AArch64::LD2Rv4s_POST - 295 16098 {4751, 1230, 4, 5 }, 16099 // AArch64::LD2Rv8b_POST - 296 16100 {4771, 1235, 4, 5 }, 16101 // AArch64::LD2Rv8h_POST - 297 16102 {4791, 1240, 4, 5 }, 16103 // AArch64::LD2Twov16b_POST - 298 16104 {4811, 1245, 4, 5 }, 16105 // AArch64::LD2Twov2d_POST - 299 16106 {4831, 1250, 4, 5 }, 16107 // AArch64::LD2Twov2s_POST - 300 16108 {4851, 1255, 4, 5 }, 16109 // AArch64::LD2Twov4h_POST - 301 16110 {4871, 1260, 4, 5 }, 16111 // AArch64::LD2Twov4s_POST - 302 16112 {4891, 1265, 4, 5 }, 16113 // AArch64::LD2Twov8b_POST - 303 16114 {4911, 1270, 4, 5 }, 16115 // AArch64::LD2Twov8h_POST - 304 16116 {4931, 1275, 4, 5 }, 16117 // AArch64::LD2W_IMM - 305 16118 {4951, 1280, 4, 5 }, 16119 // AArch64::LD2i16_POST - 306 16120 {4975, 1285, 6, 7 }, 16121 // AArch64::LD2i32_POST - 307 16122 {4998, 1292, 6, 7 }, 16123 // AArch64::LD2i64_POST - 308 16124 {5021, 1299, 6, 7 }, 16125 // AArch64::LD2i8_POST - 309 16126 {5045, 1306, 6, 7 }, 16127 // AArch64::LD3B_IMM - 310 16128 {5068, 1313, 4, 5 }, 16129 // AArch64::LD3D_IMM - 311 16130 {5092, 1318, 4, 5 }, 16131 // AArch64::LD3H_IMM - 312 16132 {5116, 1323, 4, 5 }, 16133 // AArch64::LD3Rv16b_POST - 313 16134 {5140, 1328, 4, 5 }, 16135 // AArch64::LD3Rv1d_POST - 314 16136 {5160, 1333, 4, 5 }, 16137 // AArch64::LD3Rv2d_POST - 315 16138 {5181, 1338, 4, 5 }, 16139 // AArch64::LD3Rv2s_POST - 316 16140 {5202, 1343, 4, 5 }, 16141 // AArch64::LD3Rv4h_POST - 317 16142 {5223, 1348, 4, 5 }, 16143 // AArch64::LD3Rv4s_POST - 318 16144 {5243, 1353, 4, 5 }, 16145 // AArch64::LD3Rv8b_POST - 319 16146 {5264, 1358, 4, 5 }, 16147 // AArch64::LD3Rv8h_POST - 320 16148 {5284, 1363, 4, 5 }, 16149 // AArch64::LD3Threev16b_POST - 321 16150 {5304, 1368, 4, 5 }, 16151 // AArch64::LD3Threev2d_POST - 322 16152 {5324, 1373, 4, 5 }, 16153 // AArch64::LD3Threev2s_POST - 323 16154 {5344, 1378, 4, 5 }, 16155 // AArch64::LD3Threev4h_POST - 324 16156 {5364, 1383, 4, 5 }, 16157 // AArch64::LD3Threev4s_POST - 325 16158 {5384, 1388, 4, 5 }, 16159 // AArch64::LD3Threev8b_POST - 326 16160 {5404, 1393, 4, 5 }, 16161 // AArch64::LD3Threev8h_POST - 327 16162 {5424, 1398, 4, 5 }, 16163 // AArch64::LD3W_IMM - 328 16164 {5444, 1403, 4, 5 }, 16165 // AArch64::LD3i16_POST - 329 16166 {5468, 1408, 6, 7 }, 16167 // AArch64::LD3i32_POST - 330 16168 {5491, 1415, 6, 7 }, 16169 // AArch64::LD3i64_POST - 331 16170 {5515, 1422, 6, 7 }, 16171 // AArch64::LD3i8_POST - 332 16172 {5539, 1429, 6, 7 }, 16173 // AArch64::LD4B_IMM - 333 16174 {5562, 1436, 4, 5 }, 16175 // AArch64::LD4D_IMM - 334 16176 {5586, 1441, 4, 5 }, 16177 // AArch64::LD4Fourv16b_POST - 335 16178 {5610, 1446, 4, 5 }, 16179 // AArch64::LD4Fourv2d_POST - 336 16180 {5630, 1451, 4, 5 }, 16181 // AArch64::LD4Fourv2s_POST - 337 16182 {5650, 1456, 4, 5 }, 16183 // AArch64::LD4Fourv4h_POST - 338 16184 {5670, 1461, 4, 5 }, 16185 // AArch64::LD4Fourv4s_POST - 339 16186 {5690, 1466, 4, 5 }, 16187 // AArch64::LD4Fourv8b_POST - 340 16188 {5710, 1471, 4, 5 }, 16189 // AArch64::LD4Fourv8h_POST - 341 16190 {5730, 1476, 4, 5 }, 16191 // AArch64::LD4H_IMM - 342 16192 {5750, 1481, 4, 5 }, 16193 // AArch64::LD4Rv16b_POST - 343 16194 {5774, 1486, 4, 5 }, 16195 // AArch64::LD4Rv1d_POST - 344 16196 {5794, 1491, 4, 5 }, 16197 // AArch64::LD4Rv2d_POST - 345 16198 {5815, 1496, 4, 5 }, 16199 // AArch64::LD4Rv2s_POST - 346 16200 {5836, 1501, 4, 5 }, 16201 // AArch64::LD4Rv4h_POST - 347 16202 {5857, 1506, 4, 5 }, 16203 // AArch64::LD4Rv4s_POST - 348 16204 {5877, 1511, 4, 5 }, 16205 // AArch64::LD4Rv8b_POST - 349 16206 {5898, 1516, 4, 5 }, 16207 // AArch64::LD4Rv8h_POST - 350 16208 {5918, 1521, 4, 5 }, 16209 // AArch64::LD4W_IMM - 351 16210 {5938, 1526, 4, 5 }, 16211 // AArch64::LD4i16_POST - 352 16212 {5962, 1531, 6, 7 }, 16213 // AArch64::LD4i32_POST - 353 16214 {5985, 1538, 6, 7 }, 16215 // AArch64::LD4i64_POST - 354 16216 {6009, 1545, 6, 7 }, 16217 // AArch64::LD4i8_POST - 355 16218 {6033, 1552, 6, 7 }, 16219 // AArch64::LDADDB - 356 16220 {6056, 1559, 3, 4 }, 16221 // AArch64::LDADDH - 357 16222 {6072, 1563, 3, 4 }, 16223 // AArch64::LDADDLB - 358 16224 {6088, 1567, 3, 4 }, 16225 // AArch64::LDADDLH - 359 16226 {6105, 1571, 3, 4 }, 16227 // AArch64::LDADDLW - 360 16228 {6122, 1575, 3, 4 }, 16229 // AArch64::LDADDLX - 361 16230 {6122, 1579, 3, 4 }, 16231 // AArch64::LDADDW - 362 16232 {6138, 1583, 3, 4 }, 16233 // AArch64::LDADDX - 363 16234 {6138, 1587, 3, 4 }, 16235 // AArch64::LDAPURBi - 364 16236 {6153, 1591, 3, 4 }, 16237 // AArch64::LDAPURHi - 365 16238 {6170, 1595, 3, 4 }, 16239 // AArch64::LDAPURSBWi - 366 16240 {6187, 1599, 3, 4 }, 16241 // AArch64::LDAPURSBXi - 367 16242 {6187, 1603, 3, 4 }, 16243 // AArch64::LDAPURSHWi - 368 16244 {6205, 1607, 3, 4 }, 16245 // AArch64::LDAPURSHXi - 369 16246 {6205, 1611, 3, 4 }, 16247 // AArch64::LDAPURSWi - 370 16248 {6223, 1615, 3, 4 }, 16249 // AArch64::LDAPURXi - 371 16250 {6241, 1619, 3, 4 }, 16251 // AArch64::LDAPURi - 372 16252 {6241, 1623, 3, 4 }, 16253 // AArch64::LDCLRB - 373 16254 {6257, 1627, 3, 4 }, 16255 // AArch64::LDCLRH - 374 16256 {6273, 1631, 3, 4 }, 16257 // AArch64::LDCLRLB - 375 16258 {6289, 1635, 3, 4 }, 16259 // AArch64::LDCLRLH - 376 16260 {6306, 1639, 3, 4 }, 16261 // AArch64::LDCLRLW - 377 16262 {6323, 1643, 3, 4 }, 16263 // AArch64::LDCLRLX - 378 16264 {6323, 1647, 3, 4 }, 16265 // AArch64::LDCLRW - 379 16266 {6339, 1651, 3, 4 }, 16267 // AArch64::LDCLRX - 380 16268 {6339, 1655, 3, 4 }, 16269 // AArch64::LDEORB - 381 16270 {6354, 1659, 3, 4 }, 16271 // AArch64::LDEORH - 382 16272 {6370, 1663, 3, 4 }, 16273 // AArch64::LDEORLB - 383 16274 {6386, 1667, 3, 4 }, 16275 // AArch64::LDEORLH - 384 16276 {6403, 1671, 3, 4 }, 16277 // AArch64::LDEORLW - 385 16278 {6420, 1675, 3, 4 }, 16279 // AArch64::LDEORLX - 386 16280 {6420, 1679, 3, 4 }, 16281 // AArch64::LDEORW - 387 16282 {6436, 1683, 3, 4 }, 16283 // AArch64::LDEORX - 388 16284 {6436, 1687, 3, 4 }, 16285 // AArch64::LDFF1B_D_REAL - 389 16286 {6451, 1691, 4, 5 }, 16287 // AArch64::LDFF1B_H_REAL - 390 16288 {6477, 1696, 4, 5 }, 16289 // AArch64::LDFF1B_REAL - 391 16290 {6503, 1701, 4, 5 }, 16291 // AArch64::LDFF1B_S_REAL - 392 16292 {6529, 1706, 4, 5 }, 16293 // AArch64::LDFF1D_REAL - 393 16294 {6555, 1711, 4, 5 }, 16295 // AArch64::LDFF1H_D_REAL - 394 16296 {6581, 1716, 4, 5 }, 16297 // AArch64::LDFF1H_REAL - 395 16298 {6607, 1721, 4, 5 }, 16299 // AArch64::LDFF1H_S_REAL - 396 16300 {6633, 1726, 4, 5 }, 16301 // AArch64::LDFF1SB_D_REAL - 397 16302 {6659, 1731, 4, 5 }, 16303 // AArch64::LDFF1SB_H_REAL - 398 16304 {6686, 1736, 4, 5 }, 16305 // AArch64::LDFF1SB_S_REAL - 399 16306 {6713, 1741, 4, 5 }, 16307 // AArch64::LDFF1SH_D_REAL - 400 16308 {6740, 1746, 4, 5 }, 16309 // AArch64::LDFF1SH_S_REAL - 401 16310 {6767, 1751, 4, 5 }, 16311 // AArch64::LDFF1SW_D_REAL - 402 16312 {6794, 1756, 4, 5 }, 16313 // AArch64::LDFF1W_D_REAL - 403 16314 {6821, 1761, 4, 5 }, 16315 // AArch64::LDFF1W_REAL - 404 16316 {6847, 1766, 4, 5 }, 16317 // AArch64::LDG - 405 16318 {6873, 1771, 4, 5 }, 16319 // AArch64::LDNF1B_D_IMM - 406 16320 {6886, 1776, 4, 5 }, 16321 // AArch64::LDNF1B_H_IMM - 407 16322 {6912, 1781, 4, 5 }, 16323 // AArch64::LDNF1B_IMM - 408 16324 {6938, 1786, 4, 5 }, 16325 // AArch64::LDNF1B_S_IMM - 409 16326 {6964, 1791, 4, 5 }, 16327 // AArch64::LDNF1D_IMM - 410 16328 {6990, 1796, 4, 5 }, 16329 // AArch64::LDNF1H_D_IMM - 411 16330 {7016, 1801, 4, 5 }, 16331 // AArch64::LDNF1H_IMM - 412 16332 {7042, 1806, 4, 5 }, 16333 // AArch64::LDNF1H_S_IMM - 413 16334 {7068, 1811, 4, 5 }, 16335 // AArch64::LDNF1SB_D_IMM - 414 16336 {7094, 1816, 4, 5 }, 16337 // AArch64::LDNF1SB_H_IMM - 415 16338 {7121, 1821, 4, 5 }, 16339 // AArch64::LDNF1SB_S_IMM - 416 16340 {7148, 1826, 4, 5 }, 16341 // AArch64::LDNF1SH_D_IMM - 417 16342 {7175, 1831, 4, 5 }, 16343 // AArch64::LDNF1SH_S_IMM - 418 16344 {7202, 1836, 4, 5 }, 16345 // AArch64::LDNF1SW_D_IMM - 419 16346 {7229, 1841, 4, 5 }, 16347 // AArch64::LDNF1W_D_IMM - 420 16348 {7256, 1846, 4, 5 }, 16349 // AArch64::LDNF1W_IMM - 421 16350 {7282, 1851, 4, 5 }, 16351 // AArch64::LDNPDi - 422 16352 {7308, 1856, 4, 4 }, 16353 // AArch64::LDNPQi - 423 16354 {7308, 1860, 4, 4 }, 16355 // AArch64::LDNPSi - 424 16356 {7308, 1864, 4, 4 }, 16357 // AArch64::LDNPWi - 425 16358 {7308, 1868, 4, 4 }, 16359 // AArch64::LDNPXi - 426 16360 {7308, 1872, 4, 4 }, 16361 // AArch64::LDNT1B_ZRI - 427 16362 {7326, 1876, 4, 5 }, 16363 // AArch64::LDNT1B_ZZR_D_REAL - 428 16364 {7352, 1881, 4, 5 }, 16365 // AArch64::LDNT1B_ZZR_S_REAL - 429 16366 {7380, 1886, 4, 5 }, 16367 // AArch64::LDNT1D_ZRI - 430 16368 {7408, 1891, 4, 5 }, 16369 // AArch64::LDNT1D_ZZR_D_REAL - 431 16370 {7434, 1896, 4, 5 }, 16371 // AArch64::LDNT1H_ZRI - 432 16372 {7462, 1901, 4, 5 }, 16373 // AArch64::LDNT1H_ZZR_D_REAL - 433 16374 {7488, 1906, 4, 5 }, 16375 // AArch64::LDNT1H_ZZR_S_REAL - 434 16376 {7516, 1911, 4, 5 }, 16377 // AArch64::LDNT1SB_ZZR_D_REAL - 435 16378 {7544, 1916, 4, 5 }, 16379 // AArch64::LDNT1SB_ZZR_S_REAL - 436 16380 {7573, 1921, 4, 5 }, 16381 // AArch64::LDNT1SH_ZZR_D_REAL - 437 16382 {7602, 1926, 4, 5 }, 16383 // AArch64::LDNT1SH_ZZR_S_REAL - 438 16384 {7631, 1931, 4, 5 }, 16385 // AArch64::LDNT1SW_ZZR_D_REAL - 439 16386 {7660, 1936, 4, 5 }, 16387 // AArch64::LDNT1W_ZRI - 440 16388 {7689, 1941, 4, 5 }, 16389 // AArch64::LDNT1W_ZZR_D_REAL - 441 16390 {7715, 1946, 4, 5 }, 16391 // AArch64::LDNT1W_ZZR_S_REAL - 442 16392 {7743, 1951, 4, 5 }, 16393 // AArch64::LDPDi - 443 16394 {7771, 1956, 4, 4 }, 16395 // AArch64::LDPQi - 444 16396 {7771, 1960, 4, 4 }, 16397 // AArch64::LDPSWi - 445 16398 {7788, 1964, 4, 4 }, 16399 // AArch64::LDPSi - 446 16400 {7771, 1968, 4, 4 }, 16401 // AArch64::LDPWi - 447 16402 {7771, 1972, 4, 4 }, 16403 // AArch64::LDPXi - 448 16404 {7771, 1976, 4, 4 }, 16405 // AArch64::LDRAAindexed - 449 16406 {7807, 1980, 3, 4 }, 16407 // AArch64::LDRABindexed - 450 16408 {7822, 1984, 3, 4 }, 16409 // AArch64::LDRBBroX - 451 16410 {7837, 1988, 5, 5 }, 16411 // AArch64::LDRBBui - 452 16412 {7855, 1993, 3, 3 }, 16413 // AArch64::LDRBroX - 453 16414 {7869, 1996, 5, 5 }, 16415 // AArch64::LDRBui - 454 16416 {7886, 2001, 3, 3 }, 16417 // AArch64::LDRDroX - 455 16418 {7869, 2004, 5, 5 }, 16419 // AArch64::LDRDui - 456 16420 {7886, 2009, 3, 3 }, 16421 // AArch64::LDRHHroX - 457 16422 {7899, 2012, 5, 5 }, 16423 // AArch64::LDRHHui - 458 16424 {7917, 2017, 3, 3 }, 16425 // AArch64::LDRHroX - 459 16426 {7869, 2020, 5, 5 }, 16427 // AArch64::LDRHui - 460 16428 {7886, 2025, 3, 3 }, 16429 // AArch64::LDRQroX - 461 16430 {7869, 2028, 5, 5 }, 16431 // AArch64::LDRQui - 462 16432 {7886, 2033, 3, 3 }, 16433 // AArch64::LDRSBWroX - 463 16434 {7931, 2036, 5, 5 }, 16435 // AArch64::LDRSBWui - 464 16436 {7950, 2041, 3, 3 }, 16437 // AArch64::LDRSBXroX - 465 16438 {7931, 2044, 5, 5 }, 16439 // AArch64::LDRSBXui - 466 16440 {7950, 2049, 3, 3 }, 16441 // AArch64::LDRSHWroX - 467 16442 {7965, 2052, 5, 5 }, 16443 // AArch64::LDRSHWui - 468 16444 {7984, 2057, 3, 3 }, 16445 // AArch64::LDRSHXroX - 469 16446 {7965, 2060, 5, 5 }, 16447 // AArch64::LDRSHXui - 470 16448 {7984, 2065, 3, 3 }, 16449 // AArch64::LDRSWroX - 471 16450 {7999, 2068, 5, 5 }, 16451 // AArch64::LDRSWui - 472 16452 {8018, 2073, 3, 3 }, 16453 // AArch64::LDRSroX - 473 16454 {7869, 2076, 5, 5 }, 16455 // AArch64::LDRSui - 474 16456 {7886, 2081, 3, 3 }, 16457 // AArch64::LDRWroX - 475 16458 {7869, 2084, 5, 5 }, 16459 // AArch64::LDRWui - 476 16460 {7886, 2089, 3, 3 }, 16461 // AArch64::LDRXroX - 477 16462 {7869, 2092, 5, 5 }, 16463 // AArch64::LDRXui - 478 16464 {7886, 2097, 3, 3 }, 16465 // AArch64::LDR_PXI - 479 16466 {8033, 2100, 3, 4 }, 16467 // AArch64::LDR_ZXI - 480 16468 {8033, 2104, 3, 4 }, 16469 // AArch64::LDSETB - 481 16470 {8048, 2108, 3, 4 }, 16471 // AArch64::LDSETH - 482 16472 {8064, 2112, 3, 4 }, 16473 // AArch64::LDSETLB - 483 16474 {8080, 2116, 3, 4 }, 16475 // AArch64::LDSETLH - 484 16476 {8097, 2120, 3, 4 }, 16477 // AArch64::LDSETLW - 485 16478 {8114, 2124, 3, 4 }, 16479 // AArch64::LDSETLX - 486 16480 {8114, 2128, 3, 4 }, 16481 // AArch64::LDSETW - 487 16482 {8130, 2132, 3, 4 }, 16483 // AArch64::LDSETX - 488 16484 {8130, 2136, 3, 4 }, 16485 // AArch64::LDSMAXB - 489 16486 {8145, 2140, 3, 4 }, 16487 // AArch64::LDSMAXH - 490 16488 {8162, 2144, 3, 4 }, 16489 // AArch64::LDSMAXLB - 491 16490 {8179, 2148, 3, 4 }, 16491 // AArch64::LDSMAXLH - 492 16492 {8197, 2152, 3, 4 }, 16493 // AArch64::LDSMAXLW - 493 16494 {8215, 2156, 3, 4 }, 16495 // AArch64::LDSMAXLX - 494 16496 {8215, 2160, 3, 4 }, 16497 // AArch64::LDSMAXW - 495 16498 {8232, 2164, 3, 4 }, 16499 // AArch64::LDSMAXX - 496 16500 {8232, 2168, 3, 4 }, 16501 // AArch64::LDSMINB - 497 16502 {8248, 2172, 3, 4 }, 16503 // AArch64::LDSMINH - 498 16504 {8265, 2176, 3, 4 }, 16505 // AArch64::LDSMINLB - 499 16506 {8282, 2180, 3, 4 }, 16507 // AArch64::LDSMINLH - 500 16508 {8300, 2184, 3, 4 }, 16509 // AArch64::LDSMINLW - 501 16510 {8318, 2188, 3, 4 }, 16511 // AArch64::LDSMINLX - 502 16512 {8318, 2192, 3, 4 }, 16513 // AArch64::LDSMINW - 503 16514 {8335, 2196, 3, 4 }, 16515 // AArch64::LDSMINX - 504 16516 {8335, 2200, 3, 4 }, 16517 // AArch64::LDTRBi - 505 16518 {8351, 2204, 3, 3 }, 16519 // AArch64::LDTRHi - 506 16520 {8366, 2207, 3, 3 }, 16521 // AArch64::LDTRSBWi - 507 16522 {8381, 2210, 3, 3 }, 16523 // AArch64::LDTRSBXi - 508 16524 {8381, 2213, 3, 3 }, 16525 // AArch64::LDTRSHWi - 509 16526 {8397, 2216, 3, 3 }, 16527 // AArch64::LDTRSHXi - 510 16528 {8397, 2219, 3, 3 }, 16529 // AArch64::LDTRSWi - 511 16530 {8413, 2222, 3, 3 }, 16531 // AArch64::LDTRWi - 512 16532 {8429, 2225, 3, 3 }, 16533 // AArch64::LDTRXi - 513 16534 {8429, 2228, 3, 3 }, 16535 // AArch64::LDUMAXB - 514 16536 {8443, 2231, 3, 4 }, 16537 // AArch64::LDUMAXH - 515 16538 {8460, 2235, 3, 4 }, 16539 // AArch64::LDUMAXLB - 516 16540 {8477, 2239, 3, 4 }, 16541 // AArch64::LDUMAXLH - 517 16542 {8495, 2243, 3, 4 }, 16543 // AArch64::LDUMAXLW - 518 16544 {8513, 2247, 3, 4 }, 16545 // AArch64::LDUMAXLX - 519 16546 {8513, 2251, 3, 4 }, 16547 // AArch64::LDUMAXW - 520 16548 {8530, 2255, 3, 4 }, 16549 // AArch64::LDUMAXX - 521 16550 {8530, 2259, 3, 4 }, 16551 // AArch64::LDUMINB - 522 16552 {8546, 2263, 3, 4 }, 16553 // AArch64::LDUMINH - 523 16554 {8563, 2267, 3, 4 }, 16555 // AArch64::LDUMINLB - 524 16556 {8580, 2271, 3, 4 }, 16557 // AArch64::LDUMINLH - 525 16558 {8598, 2275, 3, 4 }, 16559 // AArch64::LDUMINLW - 526 16560 {8616, 2279, 3, 4 }, 16561 // AArch64::LDUMINLX - 527 16562 {8616, 2283, 3, 4 }, 16563 // AArch64::LDUMINW - 528 16564 {8633, 2287, 3, 4 }, 16565 // AArch64::LDUMINX - 529 16566 {8633, 2291, 3, 4 }, 16567 // AArch64::LDURBBi - 530 16568 {8649, 2295, 3, 3 }, 16569 // AArch64::LDURBi - 531 16570 {8664, 2298, 3, 3 }, 16571 // AArch64::LDURDi - 532 16572 {8664, 2301, 3, 3 }, 16573 // AArch64::LDURHHi - 533 16574 {8678, 2304, 3, 3 }, 16575 // AArch64::LDURHi - 534 16576 {8664, 2307, 3, 3 }, 16577 // AArch64::LDURQi - 535 16578 {8664, 2310, 3, 3 }, 16579 // AArch64::LDURSBWi - 536 16580 {8693, 2313, 3, 3 }, 16581 // AArch64::LDURSBXi - 537 16582 {8693, 2316, 3, 3 }, 16583 // AArch64::LDURSHWi - 538 16584 {8709, 2319, 3, 3 }, 16585 // AArch64::LDURSHXi - 539 16586 {8709, 2322, 3, 3 }, 16587 // AArch64::LDURSWi - 540 16588 {8725, 2325, 3, 3 }, 16589 // AArch64::LDURSi - 541 16590 {8664, 2328, 3, 3 }, 16591 // AArch64::LDURWi - 542 16592 {8664, 2331, 3, 3 }, 16593 // AArch64::LDURXi - 543 16594 {8664, 2334, 3, 3 }, 16595 // AArch64::MADDWrrr - 544 16596 {8741, 2337, 4, 4 }, 16597 // AArch64::MADDXrrr - 545 16598 {8741, 2341, 4, 4 }, 16599 // AArch64::MSUBWrrr - 546 16600 {8756, 2345, 4, 4 }, 16601 // AArch64::MSUBXrrr - 547 16602 {8756, 2349, 4, 4 }, 16603 // AArch64::NOTv16i8 - 548 16604 {8772, 2353, 2, 2 }, 16605 // AArch64::NOTv8i8 - 549 16606 {8795, 2355, 2, 2 }, 16607 // AArch64::ORNWrs - 550 16608 {8816, 2357, 4, 4 }, 16609 {8827, 2361, 4, 3 }, 16610 {8842, 2364, 4, 4 }, 16611 // AArch64::ORNXrs - 553 16612 {8816, 2368, 4, 4 }, 16613 {8827, 2372, 4, 3 }, 16614 {8842, 2375, 4, 4 }, 16615 // AArch64::ORRS_PPzPP - 556 16616 {8857, 2379, 4, 5 }, 16617 // AArch64::ORRWrs - 557 16618 {8873, 2384, 4, 4 }, 16619 {8884, 2388, 4, 4 }, 16620 // AArch64::ORRXrs - 559 16621 {8873, 2392, 4, 4 }, 16622 {8884, 2396, 4, 4 }, 16623 // AArch64::ORR_PPzPP - 561 16624 {8899, 2400, 4, 5 }, 16625 // AArch64::ORR_ZI - 562 16626 {8914, 2405, 3, 4 }, 16627 {8935, 2409, 3, 4 }, 16628 {8956, 2413, 3, 4 }, 16629 // AArch64::ORR_ZZZ - 565 16630 {8977, 2417, 3, 4 }, 16631 // AArch64::ORRv16i8 - 566 16632 {8992, 2421, 3, 3 }, 16633 // AArch64::ORRv8i8 - 567 16634 {9015, 2424, 3, 3 }, 16635 // AArch64::PACIA1716 - 568 16636 {9036, 2427, 0, 1 }, 16637 // AArch64::PACIASP - 569 16638 {9046, 2428, 0, 1 }, 16639 // AArch64::PACIAZ - 570 16640 {9054, 2429, 0, 1 }, 16641 // AArch64::PACIB1716 - 571 16642 {9061, 2430, 0, 1 }, 16643 // AArch64::PACIBSP - 572 16644 {9071, 2431, 0, 1 }, 16645 // AArch64::PACIBZ - 573 16646 {9079, 2432, 0, 1 }, 16647 // AArch64::PRFB_D_PZI - 574 16648 {9086, 2433, 4, 5 }, 16649 // AArch64::PRFB_PRI - 575 16650 {9110, 2438, 4, 5 }, 16651 // AArch64::PRFB_S_PZI - 576 16652 {9132, 2443, 4, 5 }, 16653 // AArch64::PRFD_D_PZI - 577 16654 {9156, 2448, 4, 5 }, 16655 // AArch64::PRFD_PRI - 578 16656 {9180, 2453, 4, 5 }, 16657 // AArch64::PRFD_S_PZI - 579 16658 {9202, 2458, 4, 5 }, 16659 // AArch64::PRFH_D_PZI - 580 16660 {9226, 2463, 4, 5 }, 16661 // AArch64::PRFH_PRI - 581 16662 {9250, 2468, 4, 5 }, 16663 // AArch64::PRFH_S_PZI - 582 16664 {9272, 2473, 4, 5 }, 16665 // AArch64::PRFMroX - 583 16666 {9296, 2478, 5, 5 }, 16667 // AArch64::PRFMui - 584 16668 {9316, 2483, 3, 3 }, 16669 // AArch64::PRFUMi - 585 16670 {9332, 2486, 3, 3 }, 16671 // AArch64::PRFW_D_PZI - 586 16672 {9349, 2489, 4, 5 }, 16673 // AArch64::PRFW_PRI - 587 16674 {9373, 2494, 4, 5 }, 16675 // AArch64::PRFW_S_PZI - 588 16676 {9395, 2499, 4, 5 }, 16677 // AArch64::PTRUES_B - 589 16678 {9419, 2504, 2, 3 }, 16679 // AArch64::PTRUES_D - 590 16680 {9431, 2507, 2, 3 }, 16681 // AArch64::PTRUES_H - 591 16682 {9443, 2510, 2, 3 }, 16683 // AArch64::PTRUES_S - 592 16684 {9455, 2513, 2, 3 }, 16685 // AArch64::PTRUE_B - 593 16686 {9467, 2516, 2, 3 }, 16687 // AArch64::PTRUE_D - 594 16688 {9478, 2519, 2, 3 }, 16689 // AArch64::PTRUE_H - 595 16690 {9489, 2522, 2, 3 }, 16691 // AArch64::PTRUE_S - 596 16692 {9500, 2525, 2, 3 }, 16693 // AArch64::RET - 597 16694 {9511, 2528, 1, 1 }, 16695 // AArch64::SBCSWr - 598 16696 {9515, 2529, 3, 3 }, 16697 // AArch64::SBCSXr - 599 16698 {9515, 2532, 3, 3 }, 16699 // AArch64::SBCWr - 600 16700 {9527, 2535, 3, 3 }, 16701 // AArch64::SBCXr - 601 16702 {9527, 2538, 3, 3 }, 16703 // AArch64::SBFMWri - 602 16704 {9538, 2541, 4, 4 }, 16705 {9553, 2545, 4, 4 }, 16706 {9565, 2549, 4, 4 }, 16707 // AArch64::SBFMXri - 605 16708 {9538, 2553, 4, 4 }, 16709 {9553, 2557, 4, 4 }, 16710 {9565, 2561, 4, 4 }, 16711 {9577, 2565, 4, 4 }, 16712 // AArch64::SEL_PPPP - 609 16713 {9589, 2569, 4, 5 }, 16714 // AArch64::SEL_ZPZZ_B - 610 16715 {9589, 2574, 4, 5 }, 16716 // AArch64::SEL_ZPZZ_D - 611 16717 {9612, 2579, 4, 5 }, 16718 // AArch64::SEL_ZPZZ_H - 612 16719 {9635, 2584, 4, 5 }, 16720 // AArch64::SEL_ZPZZ_S - 613 16721 {9658, 2589, 4, 5 }, 16722 // AArch64::SMADDLrrr - 614 16723 {9681, 2594, 4, 4 }, 16724 // AArch64::SMSUBLrrr - 615 16725 {9698, 2598, 4, 4 }, 16726 // AArch64::SQDECB_XPiI - 616 16727 {9716, 2602, 4, 5 }, 16728 {9726, 2607, 4, 5 }, 16729 // AArch64::SQDECB_XPiWdI - 618 16730 {9742, 2612, 4, 5 }, 16731 {9758, 2617, 4, 5 }, 16732 // AArch64::SQDECD_XPiI - 620 16733 {9780, 2622, 4, 5 }, 16734 {9790, 2627, 4, 5 }, 16735 // AArch64::SQDECD_XPiWdI - 622 16736 {9806, 2632, 4, 5 }, 16737 {9822, 2637, 4, 5 }, 16738 // AArch64::SQDECD_ZPiI - 624 16739 {9844, 2642, 4, 5 }, 16740 {9856, 2647, 4, 5 }, 16741 // AArch64::SQDECH_XPiI - 626 16742 {9874, 2652, 4, 5 }, 16743 {9884, 2657, 4, 5 }, 16744 // AArch64::SQDECH_XPiWdI - 628 16745 {9900, 2662, 4, 5 }, 16746 {9916, 2667, 4, 5 }, 16747 // AArch64::SQDECH_ZPiI - 630 16748 {9938, 2672, 4, 5 }, 16749 {9950, 2677, 4, 5 }, 16750 // AArch64::SQDECW_XPiI - 632 16751 {9968, 2682, 4, 5 }, 16752 {9978, 2687, 4, 5 }, 16753 // AArch64::SQDECW_XPiWdI - 634 16754 {9994, 2692, 4, 5 }, 16755 {10010, 2697, 4, 5 }, 16756 // AArch64::SQDECW_ZPiI - 636 16757 {10032, 2702, 4, 5 }, 16758 {10044, 2707, 4, 5 }, 16759 // AArch64::SQINCB_XPiI - 638 16760 {10062, 2712, 4, 5 }, 16761 {10072, 2717, 4, 5 }, 16762 // AArch64::SQINCB_XPiWdI - 640 16763 {10088, 2722, 4, 5 }, 16764 {10104, 2727, 4, 5 }, 16765 // AArch64::SQINCD_XPiI - 642 16766 {10126, 2732, 4, 5 }, 16767 {10136, 2737, 4, 5 }, 16768 // AArch64::SQINCD_XPiWdI - 644 16769 {10152, 2742, 4, 5 }, 16770 {10168, 2747, 4, 5 }, 16771 // AArch64::SQINCD_ZPiI - 646 16772 {10190, 2752, 4, 5 }, 16773 {10202, 2757, 4, 5 }, 16774 // AArch64::SQINCH_XPiI - 648 16775 {10220, 2762, 4, 5 }, 16776 {10230, 2767, 4, 5 }, 16777 // AArch64::SQINCH_XPiWdI - 650 16778 {10246, 2772, 4, 5 }, 16779 {10262, 2777, 4, 5 }, 16780 // AArch64::SQINCH_ZPiI - 652 16781 {10284, 2782, 4, 5 }, 16782 {10296, 2787, 4, 5 }, 16783 // AArch64::SQINCW_XPiI - 654 16784 {10314, 2792, 4, 5 }, 16785 {10324, 2797, 4, 5 }, 16786 // AArch64::SQINCW_XPiWdI - 656 16787 {10340, 2802, 4, 5 }, 16788 {10356, 2807, 4, 5 }, 16789 // AArch64::SQINCW_ZPiI - 658 16790 {10378, 2812, 4, 5 }, 16791 {10390, 2817, 4, 5 }, 16792 // AArch64::SST1B_D_IMM - 660 16793 {10408, 2822, 4, 5 }, 16794 // AArch64::SST1B_S_IMM - 661 16795 {10432, 2827, 4, 5 }, 16796 // AArch64::SST1D_IMM - 662 16797 {10456, 2832, 4, 5 }, 16798 // AArch64::SST1H_D_IMM - 663 16799 {10480, 2837, 4, 5 }, 16800 // AArch64::SST1H_S_IMM - 664 16801 {10504, 2842, 4, 5 }, 16802 // AArch64::SST1W_D_IMM - 665 16803 {10528, 2847, 4, 5 }, 16804 // AArch64::SST1W_IMM - 666 16805 {10552, 2852, 4, 5 }, 16806 // AArch64::ST1B_D_IMM - 667 16807 {10576, 2857, 4, 5 }, 16808 // AArch64::ST1B_H_IMM - 668 16809 {10598, 2862, 4, 5 }, 16810 // AArch64::ST1B_IMM - 669 16811 {10620, 2867, 4, 5 }, 16812 // AArch64::ST1B_S_IMM - 670 16813 {10642, 2872, 4, 5 }, 16814 // AArch64::ST1D_IMM - 671 16815 {10664, 2877, 4, 5 }, 16816 // AArch64::ST1Fourv16b_POST - 672 16817 {10686, 2882, 4, 5 }, 16818 // AArch64::ST1Fourv1d_POST - 673 16819 {10706, 2887, 4, 5 }, 16820 // AArch64::ST1Fourv2d_POST - 674 16821 {10726, 2892, 4, 5 }, 16822 // AArch64::ST1Fourv2s_POST - 675 16823 {10746, 2897, 4, 5 }, 16824 // AArch64::ST1Fourv4h_POST - 676 16825 {10766, 2902, 4, 5 }, 16826 // AArch64::ST1Fourv4s_POST - 677 16827 {10786, 2907, 4, 5 }, 16828 // AArch64::ST1Fourv8b_POST - 678 16829 {10806, 2912, 4, 5 }, 16830 // AArch64::ST1Fourv8h_POST - 679 16831 {10826, 2917, 4, 5 }, 16832 // AArch64::ST1H_D_IMM - 680 16833 {10846, 2922, 4, 5 }, 16834 // AArch64::ST1H_IMM - 681 16835 {10868, 2927, 4, 5 }, 16836 // AArch64::ST1H_S_IMM - 682 16837 {10890, 2932, 4, 5 }, 16838 // AArch64::ST1Onev16b_POST - 683 16839 {10912, 2937, 4, 5 }, 16840 // AArch64::ST1Onev1d_POST - 684 16841 {10932, 2942, 4, 5 }, 16842 // AArch64::ST1Onev2d_POST - 685 16843 {10951, 2947, 4, 5 }, 16844 // AArch64::ST1Onev2s_POST - 686 16845 {10971, 2952, 4, 5 }, 16846 // AArch64::ST1Onev4h_POST - 687 16847 {10990, 2957, 4, 5 }, 16848 // AArch64::ST1Onev4s_POST - 688 16849 {11009, 2962, 4, 5 }, 16850 // AArch64::ST1Onev8b_POST - 689 16851 {11029, 2967, 4, 5 }, 16852 // AArch64::ST1Onev8h_POST - 690 16853 {11048, 2972, 4, 5 }, 16854 // AArch64::ST1Threev16b_POST - 691 16855 {11068, 2977, 4, 5 }, 16856 // AArch64::ST1Threev1d_POST - 692 16857 {11088, 2982, 4, 5 }, 16858 // AArch64::ST1Threev2d_POST - 693 16859 {11108, 2987, 4, 5 }, 16860 // AArch64::ST1Threev2s_POST - 694 16861 {11128, 2992, 4, 5 }, 16862 // AArch64::ST1Threev4h_POST - 695 16863 {11148, 2997, 4, 5 }, 16864 // AArch64::ST1Threev4s_POST - 696 16865 {11168, 3002, 4, 5 }, 16866 // AArch64::ST1Threev8b_POST - 697 16867 {11188, 3007, 4, 5 }, 16868 // AArch64::ST1Threev8h_POST - 698 16869 {11208, 3012, 4, 5 }, 16870 // AArch64::ST1Twov16b_POST - 699 16871 {11228, 3017, 4, 5 }, 16872 // AArch64::ST1Twov1d_POST - 700 16873 {11248, 3022, 4, 5 }, 16874 // AArch64::ST1Twov2d_POST - 701 16875 {11268, 3027, 4, 5 }, 16876 // AArch64::ST1Twov2s_POST - 702 16877 {11288, 3032, 4, 5 }, 16878 // AArch64::ST1Twov4h_POST - 703 16879 {11308, 3037, 4, 5 }, 16880 // AArch64::ST1Twov4s_POST - 704 16881 {11328, 3042, 4, 5 }, 16882 // AArch64::ST1Twov8b_POST - 705 16883 {11348, 3047, 4, 5 }, 16884 // AArch64::ST1Twov8h_POST - 706 16885 {11368, 3052, 4, 5 }, 16886 // AArch64::ST1W_D_IMM - 707 16887 {11388, 3057, 4, 5 }, 16888 // AArch64::ST1W_IMM - 708 16889 {11410, 3062, 4, 5 }, 16890 // AArch64::ST1i16_POST - 709 16891 {11432, 3067, 5, 6 }, 16892 // AArch64::ST1i32_POST - 710 16893 {11455, 3073, 5, 6 }, 16894 // AArch64::ST1i64_POST - 711 16895 {11478, 3079, 5, 6 }, 16896 // AArch64::ST1i8_POST - 712 16897 {11501, 3085, 5, 6 }, 16898 // AArch64::ST2B_IMM - 713 16899 {11524, 3091, 4, 5 }, 16900 // AArch64::ST2D_IMM - 714 16901 {11546, 3096, 4, 5 }, 16902 // AArch64::ST2GOffset - 715 16903 {11568, 3101, 3, 4 }, 16904 // AArch64::ST2H_IMM - 716 16905 {11582, 3105, 4, 5 }, 16906 // AArch64::ST2Twov16b_POST - 717 16907 {11604, 3110, 4, 5 }, 16908 // AArch64::ST2Twov2d_POST - 718 16909 {11624, 3115, 4, 5 }, 16910 // AArch64::ST2Twov2s_POST - 719 16911 {11644, 3120, 4, 5 }, 16912 // AArch64::ST2Twov4h_POST - 720 16913 {11664, 3125, 4, 5 }, 16914 // AArch64::ST2Twov4s_POST - 721 16915 {11684, 3130, 4, 5 }, 16916 // AArch64::ST2Twov8b_POST - 722 16917 {11704, 3135, 4, 5 }, 16918 // AArch64::ST2Twov8h_POST - 723 16919 {11724, 3140, 4, 5 }, 16920 // AArch64::ST2W_IMM - 724 16921 {11744, 3145, 4, 5 }, 16922 // AArch64::ST2i16_POST - 725 16923 {11766, 3150, 5, 6 }, 16924 // AArch64::ST2i32_POST - 726 16925 {11789, 3156, 5, 6 }, 16926 // AArch64::ST2i64_POST - 727 16927 {11812, 3162, 5, 6 }, 16928 // AArch64::ST2i8_POST - 728 16929 {11836, 3168, 5, 6 }, 16930 // AArch64::ST3B_IMM - 729 16931 {11859, 3174, 4, 5 }, 16932 // AArch64::ST3D_IMM - 730 16933 {11881, 3179, 4, 5 }, 16934 // AArch64::ST3H_IMM - 731 16935 {11903, 3184, 4, 5 }, 16936 // AArch64::ST3Threev16b_POST - 732 16937 {11925, 3189, 4, 5 }, 16938 // AArch64::ST3Threev2d_POST - 733 16939 {11945, 3194, 4, 5 }, 16940 // AArch64::ST3Threev2s_POST - 734 16941 {11965, 3199, 4, 5 }, 16942 // AArch64::ST3Threev4h_POST - 735 16943 {11985, 3204, 4, 5 }, 16944 // AArch64::ST3Threev4s_POST - 736 16945 {12005, 3209, 4, 5 }, 16946 // AArch64::ST3Threev8b_POST - 737 16947 {12025, 3214, 4, 5 }, 16948 // AArch64::ST3Threev8h_POST - 738 16949 {12045, 3219, 4, 5 }, 16950 // AArch64::ST3W_IMM - 739 16951 {12065, 3224, 4, 5 }, 16952 // AArch64::ST3i16_POST - 740 16953 {12087, 3229, 5, 6 }, 16954 // AArch64::ST3i32_POST - 741 16955 {12110, 3235, 5, 6 }, 16956 // AArch64::ST3i64_POST - 742 16957 {12134, 3241, 5, 6 }, 16958 // AArch64::ST3i8_POST - 743 16959 {12158, 3247, 5, 6 }, 16960 // AArch64::ST4B_IMM - 744 16961 {12181, 3253, 4, 5 }, 16962 // AArch64::ST4D_IMM - 745 16963 {12203, 3258, 4, 5 }, 16964 // AArch64::ST4Fourv16b_POST - 746 16965 {12225, 3263, 4, 5 }, 16966 // AArch64::ST4Fourv2d_POST - 747 16967 {12245, 3268, 4, 5 }, 16968 // AArch64::ST4Fourv2s_POST - 748 16969 {12265, 3273, 4, 5 }, 16970 // AArch64::ST4Fourv4h_POST - 749 16971 {12285, 3278, 4, 5 }, 16972 // AArch64::ST4Fourv4s_POST - 750 16973 {12305, 3283, 4, 5 }, 16974 // AArch64::ST4Fourv8b_POST - 751 16975 {12325, 3288, 4, 5 }, 16976 // AArch64::ST4Fourv8h_POST - 752 16977 {12345, 3293, 4, 5 }, 16978 // AArch64::ST4H_IMM - 753 16979 {12365, 3298, 4, 5 }, 16980 // AArch64::ST4W_IMM - 754 16981 {12387, 3303, 4, 5 }, 16982 // AArch64::ST4i16_POST - 755 16983 {12409, 3308, 5, 6 }, 16984 // AArch64::ST4i32_POST - 756 16985 {12432, 3314, 5, 6 }, 16986 // AArch64::ST4i64_POST - 757 16987 {12456, 3320, 5, 6 }, 16988 // AArch64::ST4i8_POST - 758 16989 {12480, 3326, 5, 6 }, 16990 // AArch64::STGOffset - 759 16991 {12503, 3332, 3, 4 }, 16992 // AArch64::STGPi - 760 16993 {12516, 3336, 4, 5 }, 16994 // AArch64::STLURBi - 761 16995 {12534, 3341, 3, 4 }, 16996 // AArch64::STLURHi - 762 16997 {12550, 3345, 3, 4 }, 16998 // AArch64::STLURWi - 763 16999 {12566, 3349, 3, 4 }, 17000 // AArch64::STLURXi - 764 17001 {12566, 3353, 3, 4 }, 17002 // AArch64::STNPDi - 765 17003 {12581, 3357, 4, 4 }, 17004 // AArch64::STNPQi - 766 17005 {12581, 3361, 4, 4 }, 17006 // AArch64::STNPSi - 767 17007 {12581, 3365, 4, 4 }, 17008 // AArch64::STNPWi - 768 17009 {12581, 3369, 4, 4 }, 17010 // AArch64::STNPXi - 769 17011 {12581, 3373, 4, 4 }, 17012 // AArch64::STNT1B_ZRI - 770 17013 {12599, 3377, 4, 5 }, 17014 // AArch64::STNT1B_ZZR_D_REAL - 771 17015 {12623, 3382, 4, 5 }, 17016 // AArch64::STNT1B_ZZR_S_REAL - 772 17017 {12649, 3387, 4, 5 }, 17018 // AArch64::STNT1D_ZRI - 773 17019 {12675, 3392, 4, 5 }, 17020 // AArch64::STNT1D_ZZR_D_REAL - 774 17021 {12699, 3397, 4, 5 }, 17022 // AArch64::STNT1H_ZRI - 775 17023 {12725, 3402, 4, 5 }, 17024 // AArch64::STNT1H_ZZR_D_REAL - 776 17025 {12749, 3407, 4, 5 }, 17026 // AArch64::STNT1H_ZZR_S_REAL - 777 17027 {12775, 3412, 4, 5 }, 17028 // AArch64::STNT1W_ZRI - 778 17029 {12801, 3417, 4, 5 }, 17030 // AArch64::STNT1W_ZZR_D_REAL - 779 17031 {12825, 3422, 4, 5 }, 17032 // AArch64::STNT1W_ZZR_S_REAL - 780 17033 {12851, 3427, 4, 5 }, 17034 // AArch64::STPDi - 781 17035 {12877, 3432, 4, 4 }, 17036 // AArch64::STPQi - 782 17037 {12877, 3436, 4, 4 }, 17038 // AArch64::STPSi - 783 17039 {12877, 3440, 4, 4 }, 17040 // AArch64::STPWi - 784 17041 {12877, 3444, 4, 4 }, 17042 // AArch64::STPXi - 785 17043 {12877, 3448, 4, 4 }, 17044 // AArch64::STRBBroX - 786 17045 {12894, 3452, 5, 5 }, 17046 // AArch64::STRBBui - 787 17047 {12912, 3457, 3, 3 }, 17048 // AArch64::STRBroX - 788 17049 {12926, 3460, 5, 5 }, 17050 // AArch64::STRBui - 789 17051 {12943, 3465, 3, 3 }, 17052 // AArch64::STRDroX - 790 17053 {12926, 3468, 5, 5 }, 17054 // AArch64::STRDui - 791 17055 {12943, 3473, 3, 3 }, 17056 // AArch64::STRHHroX - 792 17057 {12956, 3476, 5, 5 }, 17058 // AArch64::STRHHui - 793 17059 {12974, 3481, 3, 3 }, 17060 // AArch64::STRHroX - 794 17061 {12926, 3484, 5, 5 }, 17062 // AArch64::STRHui - 795 17063 {12943, 3489, 3, 3 }, 17064 // AArch64::STRQroX - 796 17065 {12926, 3492, 5, 5 }, 17066 // AArch64::STRQui - 797 17067 {12943, 3497, 3, 3 }, 17068 // AArch64::STRSroX - 798 17069 {12926, 3500, 5, 5 }, 17070 // AArch64::STRSui - 799 17071 {12943, 3505, 3, 3 }, 17072 // AArch64::STRWroX - 800 17073 {12926, 3508, 5, 5 }, 17074 // AArch64::STRWui - 801 17075 {12943, 3513, 3, 3 }, 17076 // AArch64::STRXroX - 802 17077 {12926, 3516, 5, 5 }, 17078 // AArch64::STRXui - 803 17079 {12943, 3521, 3, 3 }, 17080 // AArch64::STR_PXI - 804 17081 {12988, 3524, 3, 4 }, 17082 // AArch64::STR_ZXI - 805 17083 {12988, 3528, 3, 4 }, 17084 // AArch64::STTRBi - 806 17085 {13003, 3532, 3, 3 }, 17086 // AArch64::STTRHi - 807 17087 {13018, 3535, 3, 3 }, 17088 // AArch64::STTRWi - 808 17089 {13033, 3538, 3, 3 }, 17090 // AArch64::STTRXi - 809 17091 {13033, 3541, 3, 3 }, 17092 // AArch64::STURBBi - 810 17093 {13047, 3544, 3, 3 }, 17094 // AArch64::STURBi - 811 17095 {13062, 3547, 3, 3 }, 17096 // AArch64::STURDi - 812 17097 {13062, 3550, 3, 3 }, 17098 // AArch64::STURHHi - 813 17099 {13076, 3553, 3, 3 }, 17100 // AArch64::STURHi - 814 17101 {13062, 3556, 3, 3 }, 17102 // AArch64::STURQi - 815 17103 {13062, 3559, 3, 3 }, 17104 // AArch64::STURSi - 816 17105 {13062, 3562, 3, 3 }, 17106 // AArch64::STURWi - 817 17107 {13062, 3565, 3, 3 }, 17108 // AArch64::STURXi - 818 17109 {13062, 3568, 3, 3 }, 17110 // AArch64::STZ2GOffset - 819 17111 {13091, 3571, 3, 4 }, 17112 // AArch64::STZGOffset - 820 17113 {13106, 3575, 3, 4 }, 17114 // AArch64::SUBSWri - 821 17115 {13120, 3579, 4, 2 }, 17116 // AArch64::SUBSWrs - 822 17117 {13133, 3581, 4, 4 }, 17118 {13144, 3585, 4, 3 }, 17119 {13159, 3588, 4, 4 }, 17120 {13171, 3592, 4, 3 }, 17121 {13187, 3595, 4, 4 }, 17122 // AArch64::SUBSWrx - 827 17123 {13133, 3599, 4, 4 }, 17124 {13203, 3603, 4, 3 }, 17125 {13187, 3606, 4, 4 }, 17126 // AArch64::SUBSXri - 830 17127 {13120, 3610, 4, 2 }, 17128 // AArch64::SUBSXrs - 831 17129 {13133, 3612, 4, 4 }, 17130 {13144, 3616, 4, 3 }, 17131 {13159, 3619, 4, 4 }, 17132 {13171, 3623, 4, 3 }, 17133 {13187, 3626, 4, 4 }, 17134 // AArch64::SUBSXrx - 836 17135 {13203, 3630, 4, 3 }, 17136 // AArch64::SUBSXrx64 - 837 17137 {13133, 3633, 4, 4 }, 17138 {13203, 3637, 4, 3 }, 17139 {13187, 3640, 4, 4 }, 17140 // AArch64::SUBWrs - 840 17141 {13218, 3644, 4, 4 }, 17142 {13229, 3648, 4, 3 }, 17143 {13244, 3651, 4, 4 }, 17144 // AArch64::SUBWrx - 843 17145 {13244, 3655, 4, 4 }, 17146 {13244, 3659, 4, 4 }, 17147 // AArch64::SUBXrs - 845 17148 {13218, 3663, 4, 4 }, 17149 {13229, 3667, 4, 3 }, 17150 {13244, 3670, 4, 4 }, 17151 // AArch64::SUBXrx64 - 848 17152 {13244, 3674, 4, 4 }, 17153 {13244, 3678, 4, 4 }, 17154 // AArch64::SYSxt - 850 17155 {13259, 3682, 5, 5 }, 17156 // AArch64::UBFMWri - 851 17157 {13282, 3687, 4, 4 }, 17158 {13297, 3691, 4, 4 }, 17159 {13309, 3695, 4, 4 }, 17160 // AArch64::UBFMXri - 854 17161 {13282, 3699, 4, 4 }, 17162 {13297, 3703, 4, 4 }, 17163 {13309, 3707, 4, 4 }, 17164 {13321, 3711, 4, 4 }, 17165 // AArch64::UMADDLrrr - 858 17166 {13333, 3715, 4, 4 }, 17167 // AArch64::UMOVvi32 - 859 17168 {13350, 3719, 3, 3 }, 17169 // AArch64::UMOVvi64 - 860 17170 {13369, 3722, 3, 3 }, 17171 // AArch64::UMSUBLrrr - 861 17172 {13388, 3725, 4, 4 }, 17173 // AArch64::UQDECB_WPiI - 862 17174 {13406, 3729, 4, 5 }, 17175 {13416, 3734, 4, 5 }, 17176 // AArch64::UQDECB_XPiI - 864 17177 {13406, 3739, 4, 5 }, 17178 {13416, 3744, 4, 5 }, 17179 // AArch64::UQDECD_WPiI - 866 17180 {13432, 3749, 4, 5 }, 17181 {13442, 3754, 4, 5 }, 17182 // AArch64::UQDECD_XPiI - 868 17183 {13432, 3759, 4, 5 }, 17184 {13442, 3764, 4, 5 }, 17185 // AArch64::UQDECD_ZPiI - 870 17186 {13458, 3769, 4, 5 }, 17187 {13470, 3774, 4, 5 }, 17188 // AArch64::UQDECH_WPiI - 872 17189 {13488, 3779, 4, 5 }, 17190 {13498, 3784, 4, 5 }, 17191 // AArch64::UQDECH_XPiI - 874 17192 {13488, 3789, 4, 5 }, 17193 {13498, 3794, 4, 5 }, 17194 // AArch64::UQDECH_ZPiI - 876 17195 {13514, 3799, 4, 5 }, 17196 {13526, 3804, 4, 5 }, 17197 // AArch64::UQDECW_WPiI - 878 17198 {13544, 3809, 4, 5 }, 17199 {13554, 3814, 4, 5 }, 17200 // AArch64::UQDECW_XPiI - 880 17201 {13544, 3819, 4, 5 }, 17202 {13554, 3824, 4, 5 }, 17203 // AArch64::UQDECW_ZPiI - 882 17204 {13570, 3829, 4, 5 }, 17205 {13582, 3834, 4, 5 }, 17206 // AArch64::UQINCB_WPiI - 884 17207 {13600, 3839, 4, 5 }, 17208 {13610, 3844, 4, 5 }, 17209 // AArch64::UQINCB_XPiI - 886 17210 {13600, 3849, 4, 5 }, 17211 {13610, 3854, 4, 5 }, 17212 // AArch64::UQINCD_WPiI - 888 17213 {13626, 3859, 4, 5 }, 17214 {13636, 3864, 4, 5 }, 17215 // AArch64::UQINCD_XPiI - 890 17216 {13626, 3869, 4, 5 }, 17217 {13636, 3874, 4, 5 }, 17218 // AArch64::UQINCD_ZPiI - 892 17219 {13652, 3879, 4, 5 }, 17220 {13664, 3884, 4, 5 }, 17221 // AArch64::UQINCH_WPiI - 894 17222 {13682, 3889, 4, 5 }, 17223 {13692, 3894, 4, 5 }, 17224 // AArch64::UQINCH_XPiI - 896 17225 {13682, 3899, 4, 5 }, 17226 {13692, 3904, 4, 5 }, 17227 // AArch64::UQINCH_ZPiI - 898 17228 {13708, 3909, 4, 5 }, 17229 {13720, 3914, 4, 5 }, 17230 // AArch64::UQINCW_WPiI - 900 17231 {13738, 3919, 4, 5 }, 17232 {13748, 3924, 4, 5 }, 17233 // AArch64::UQINCW_XPiI - 902 17234 {13738, 3929, 4, 5 }, 17235 {13748, 3934, 4, 5 }, 17236 // AArch64::UQINCW_ZPiI - 904 17237 {13764, 3939, 4, 5 }, 17238 {13776, 3944, 4, 5 }, 17239 // AArch64::XPACLRI - 906 17240 {13794, 3949, 0, 1 }, 17241 }; 17242 17243 static const AliasPatternCond Conds[] = { 17244 // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 0 17245 {AliasPatternCond::K_Reg, AArch64::WZR}, 17246 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17247 // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 2 17248 {AliasPatternCond::K_Reg, AArch64::WZR}, 17249 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17250 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17251 {AliasPatternCond::K_Imm, uint32_t(0)}, 17252 // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 6 17253 {AliasPatternCond::K_Reg, AArch64::WZR}, 17254 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17255 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17256 // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 9 17257 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17258 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17259 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17260 {AliasPatternCond::K_Imm, uint32_t(0)}, 17261 // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 13 17262 {AliasPatternCond::K_Reg, AArch64::WZR}, 17263 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17264 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17265 {AliasPatternCond::K_Imm, uint32_t(16)}, 17266 // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 17 17267 {AliasPatternCond::K_Reg, AArch64::WZR}, 17268 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17269 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17270 // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 20 17271 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17272 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17273 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17274 {AliasPatternCond::K_Imm, uint32_t(16)}, 17275 // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 24 17276 {AliasPatternCond::K_Reg, AArch64::XZR}, 17277 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17278 // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 26 17279 {AliasPatternCond::K_Reg, AArch64::XZR}, 17280 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17281 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17282 {AliasPatternCond::K_Imm, uint32_t(0)}, 17283 // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 30 17284 {AliasPatternCond::K_Reg, AArch64::XZR}, 17285 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17286 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17287 // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 33 17288 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17289 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17290 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17291 {AliasPatternCond::K_Imm, uint32_t(0)}, 17292 // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 37 17293 {AliasPatternCond::K_Reg, AArch64::XZR}, 17294 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17295 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17296 // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 40 17297 {AliasPatternCond::K_Reg, AArch64::XZR}, 17298 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17299 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17300 {AliasPatternCond::K_Imm, uint32_t(24)}, 17301 // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 44 17302 {AliasPatternCond::K_Reg, AArch64::XZR}, 17303 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17304 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17305 // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 47 17306 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17307 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17308 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17309 {AliasPatternCond::K_Imm, uint32_t(24)}, 17310 // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) - 51 17311 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17312 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17313 {AliasPatternCond::K_Imm, uint32_t(0)}, 17314 {AliasPatternCond::K_Imm, uint32_t(0)}, 17315 // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) - 55 17316 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17317 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17318 {AliasPatternCond::K_Imm, uint32_t(0)}, 17319 {AliasPatternCond::K_Imm, uint32_t(0)}, 17320 // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 59 17321 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17322 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17323 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17324 {AliasPatternCond::K_Imm, uint32_t(0)}, 17325 // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 63 17326 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17327 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17328 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17329 {AliasPatternCond::K_Imm, uint32_t(16)}, 17330 // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 67 17331 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17332 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 17333 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17334 {AliasPatternCond::K_Imm, uint32_t(16)}, 17335 // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) - 71 17336 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17337 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17338 {AliasPatternCond::K_Imm, uint32_t(0)}, 17339 {AliasPatternCond::K_Imm, uint32_t(0)}, 17340 // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) - 75 17341 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17342 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17343 {AliasPatternCond::K_Imm, uint32_t(0)}, 17344 {AliasPatternCond::K_Imm, uint32_t(0)}, 17345 // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 79 17346 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17347 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17348 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17349 {AliasPatternCond::K_Imm, uint32_t(0)}, 17350 // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 83 17351 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17352 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17353 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17354 {AliasPatternCond::K_Imm, uint32_t(24)}, 17355 // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 87 17356 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17357 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 17358 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17359 {AliasPatternCond::K_Imm, uint32_t(24)}, 17360 // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) - 91 17361 {AliasPatternCond::K_Reg, AArch64::WZR}, 17362 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17363 // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 93 17364 {AliasPatternCond::K_Reg, AArch64::WZR}, 17365 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17366 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17367 {AliasPatternCond::K_Imm, uint32_t(0)}, 17368 // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) - 97 17369 {AliasPatternCond::K_Reg, AArch64::WZR}, 17370 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17371 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17372 // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 100 17373 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17374 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17375 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17376 {AliasPatternCond::K_Imm, uint32_t(0)}, 17377 // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) - 104 17378 {AliasPatternCond::K_Reg, AArch64::XZR}, 17379 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17380 // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 106 17381 {AliasPatternCond::K_Reg, AArch64::XZR}, 17382 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17383 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17384 {AliasPatternCond::K_Imm, uint32_t(0)}, 17385 // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) - 110 17386 {AliasPatternCond::K_Reg, AArch64::XZR}, 17387 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17388 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17389 // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 113 17390 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17391 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17392 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17393 {AliasPatternCond::K_Imm, uint32_t(0)}, 17394 // (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 117 17395 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17396 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17397 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17398 {AliasPatternCond::K_TiedReg, 2}, 17399 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17400 // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 122 17401 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17402 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17403 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17404 {AliasPatternCond::K_Imm, uint32_t(0)}, 17405 // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 126 17406 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17407 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17408 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17409 {AliasPatternCond::K_Imm, uint32_t(0)}, 17410 // (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 130 17411 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17412 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17413 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17414 {AliasPatternCond::K_TiedReg, 2}, 17415 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17416 // (AND_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 135 17417 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17418 {AliasPatternCond::K_Ignore, 0}, 17419 {AliasPatternCond::K_Custom, 1}, 17420 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17421 // (AND_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 139 17422 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17423 {AliasPatternCond::K_Ignore, 0}, 17424 {AliasPatternCond::K_Custom, 2}, 17425 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17426 // (AND_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 143 17427 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17428 {AliasPatternCond::K_Ignore, 0}, 17429 {AliasPatternCond::K_Custom, 3}, 17430 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17431 // (AUTIA1716) - 147 17432 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17433 // (AUTIASP) - 148 17434 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17435 // (AUTIAZ) - 149 17436 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17437 // (AUTIB1716) - 150 17438 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17439 // (AUTIBSP) - 151 17440 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17441 // (AUTIBZ) - 152 17442 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 17443 // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 153 17444 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17445 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17446 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17447 {AliasPatternCond::K_Imm, uint32_t(0)}, 17448 // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 157 17449 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17450 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17451 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17452 {AliasPatternCond::K_Imm, uint32_t(0)}, 17453 // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 161 17454 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17455 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17456 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17457 {AliasPatternCond::K_Imm, uint32_t(0)}, 17458 // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 165 17459 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17460 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17461 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17462 {AliasPatternCond::K_Imm, uint32_t(0)}, 17463 // (CLREX 15) - 169 17464 {AliasPatternCond::K_Imm, uint32_t(15)}, 17465 // (CNTB_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 170 17466 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17467 {AliasPatternCond::K_Imm, uint32_t(31)}, 17468 {AliasPatternCond::K_Imm, uint32_t(1)}, 17469 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17470 // (CNTB_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 174 17471 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17472 {AliasPatternCond::K_Ignore, 0}, 17473 {AliasPatternCond::K_Imm, uint32_t(1)}, 17474 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17475 // (CNTD_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 178 17476 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17477 {AliasPatternCond::K_Imm, uint32_t(31)}, 17478 {AliasPatternCond::K_Imm, uint32_t(1)}, 17479 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17480 // (CNTD_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 182 17481 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17482 {AliasPatternCond::K_Ignore, 0}, 17483 {AliasPatternCond::K_Imm, uint32_t(1)}, 17484 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17485 // (CNTH_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 186 17486 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17487 {AliasPatternCond::K_Imm, uint32_t(31)}, 17488 {AliasPatternCond::K_Imm, uint32_t(1)}, 17489 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17490 // (CNTH_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 190 17491 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17492 {AliasPatternCond::K_Ignore, 0}, 17493 {AliasPatternCond::K_Imm, uint32_t(1)}, 17494 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17495 // (CNTW_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 194 17496 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17497 {AliasPatternCond::K_Imm, uint32_t(31)}, 17498 {AliasPatternCond::K_Imm, uint32_t(1)}, 17499 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17500 // (CNTW_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 198 17501 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17502 {AliasPatternCond::K_Ignore, 0}, 17503 {AliasPatternCond::K_Imm, uint32_t(1)}, 17504 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17505 // (CPY_ZPmI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 202 17506 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17507 {AliasPatternCond::K_Ignore, 0}, 17508 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17509 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17510 // (CPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 206 17511 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17512 {AliasPatternCond::K_Ignore, 0}, 17513 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17514 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17515 // (CPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 210 17516 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17517 {AliasPatternCond::K_Ignore, 0}, 17518 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17519 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17520 // (CPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 214 17521 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17522 {AliasPatternCond::K_Ignore, 0}, 17523 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17524 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17525 // (CPY_ZPmR_B ZPR8:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 218 17526 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17527 {AliasPatternCond::K_Ignore, 0}, 17528 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17529 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17530 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17531 // (CPY_ZPmR_D ZPR64:$Zd, PPR3bAny:$Pg, GPR64sp:$Rn) - 223 17532 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17533 {AliasPatternCond::K_Ignore, 0}, 17534 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17535 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17536 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17537 // (CPY_ZPmR_H ZPR16:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 228 17538 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17539 {AliasPatternCond::K_Ignore, 0}, 17540 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17541 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17542 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17543 // (CPY_ZPmR_S ZPR32:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 233 17544 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17545 {AliasPatternCond::K_Ignore, 0}, 17546 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17547 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17548 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17549 // (CPY_ZPmV_B ZPR8:$Zd, PPR3bAny:$Pg, FPR8:$Vn) - 238 17550 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17551 {AliasPatternCond::K_Ignore, 0}, 17552 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17553 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 17554 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17555 // (CPY_ZPmV_D ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn) - 243 17556 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17557 {AliasPatternCond::K_Ignore, 0}, 17558 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17559 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 17560 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17561 // (CPY_ZPmV_H ZPR16:$Zd, PPR3bAny:$Pg, FPR16:$Vn) - 248 17562 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17563 {AliasPatternCond::K_Ignore, 0}, 17564 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17565 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 17566 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17567 // (CPY_ZPmV_S ZPR32:$Zd, PPR3bAny:$Pg, FPR32:$Vn) - 253 17568 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17569 {AliasPatternCond::K_Ignore, 0}, 17570 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17571 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 17572 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17573 // (CPY_ZPzI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 258 17574 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17575 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17576 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17577 // (CPY_ZPzI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 261 17578 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17579 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17580 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17581 // (CPY_ZPzI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 264 17582 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17583 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17584 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17585 // (CPY_ZPzI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 267 17586 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17587 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17588 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17589 // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 270 17590 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17591 {AliasPatternCond::K_Reg, AArch64::WZR}, 17592 {AliasPatternCond::K_Reg, AArch64::WZR}, 17593 {AliasPatternCond::K_Custom, 4}, 17594 // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 274 17595 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17596 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17597 {AliasPatternCond::K_TiedReg, 1}, 17598 {AliasPatternCond::K_Custom, 4}, 17599 // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 278 17600 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17601 {AliasPatternCond::K_Reg, AArch64::XZR}, 17602 {AliasPatternCond::K_Reg, AArch64::XZR}, 17603 {AliasPatternCond::K_Custom, 4}, 17604 // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 282 17605 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17606 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17607 {AliasPatternCond::K_TiedReg, 1}, 17608 {AliasPatternCond::K_Custom, 4}, 17609 // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 286 17610 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17611 {AliasPatternCond::K_Reg, AArch64::WZR}, 17612 {AliasPatternCond::K_Reg, AArch64::WZR}, 17613 {AliasPatternCond::K_Custom, 4}, 17614 // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 290 17615 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17616 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17617 {AliasPatternCond::K_TiedReg, 1}, 17618 {AliasPatternCond::K_Custom, 4}, 17619 // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 294 17620 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17621 {AliasPatternCond::K_Reg, AArch64::XZR}, 17622 {AliasPatternCond::K_Reg, AArch64::XZR}, 17623 {AliasPatternCond::K_Custom, 4}, 17624 // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 298 17625 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17626 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17627 {AliasPatternCond::K_TiedReg, 1}, 17628 {AliasPatternCond::K_Custom, 4}, 17629 // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 302 17630 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17631 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17632 {AliasPatternCond::K_TiedReg, 1}, 17633 {AliasPatternCond::K_Custom, 4}, 17634 // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 306 17635 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17636 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17637 {AliasPatternCond::K_TiedReg, 1}, 17638 {AliasPatternCond::K_Custom, 4}, 17639 // (DCPS1 0) - 310 17640 {AliasPatternCond::K_Imm, uint32_t(0)}, 17641 // (DCPS2 0) - 311 17642 {AliasPatternCond::K_Imm, uint32_t(0)}, 17643 // (DCPS3 0) - 312 17644 {AliasPatternCond::K_Imm, uint32_t(0)}, 17645 // (DECB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 313 17646 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17647 {AliasPatternCond::K_Ignore, 0}, 17648 {AliasPatternCond::K_Imm, uint32_t(31)}, 17649 {AliasPatternCond::K_Imm, uint32_t(1)}, 17650 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17651 // (DECB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 318 17652 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17653 {AliasPatternCond::K_Ignore, 0}, 17654 {AliasPatternCond::K_Ignore, 0}, 17655 {AliasPatternCond::K_Imm, uint32_t(1)}, 17656 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17657 // (DECD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 323 17658 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17659 {AliasPatternCond::K_Ignore, 0}, 17660 {AliasPatternCond::K_Imm, uint32_t(31)}, 17661 {AliasPatternCond::K_Imm, uint32_t(1)}, 17662 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17663 // (DECD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 328 17664 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17665 {AliasPatternCond::K_Ignore, 0}, 17666 {AliasPatternCond::K_Ignore, 0}, 17667 {AliasPatternCond::K_Imm, uint32_t(1)}, 17668 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17669 // (DECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 333 17670 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17671 {AliasPatternCond::K_Ignore, 0}, 17672 {AliasPatternCond::K_Imm, uint32_t(31)}, 17673 {AliasPatternCond::K_Imm, uint32_t(1)}, 17674 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17675 // (DECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 338 17676 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17677 {AliasPatternCond::K_Ignore, 0}, 17678 {AliasPatternCond::K_Ignore, 0}, 17679 {AliasPatternCond::K_Imm, uint32_t(1)}, 17680 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17681 // (DECH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 343 17682 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17683 {AliasPatternCond::K_Ignore, 0}, 17684 {AliasPatternCond::K_Imm, uint32_t(31)}, 17685 {AliasPatternCond::K_Imm, uint32_t(1)}, 17686 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17687 // (DECH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 348 17688 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17689 {AliasPatternCond::K_Ignore, 0}, 17690 {AliasPatternCond::K_Ignore, 0}, 17691 {AliasPatternCond::K_Imm, uint32_t(1)}, 17692 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17693 // (DECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 353 17694 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17695 {AliasPatternCond::K_Ignore, 0}, 17696 {AliasPatternCond::K_Imm, uint32_t(31)}, 17697 {AliasPatternCond::K_Imm, uint32_t(1)}, 17698 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17699 // (DECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 358 17700 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17701 {AliasPatternCond::K_Ignore, 0}, 17702 {AliasPatternCond::K_Ignore, 0}, 17703 {AliasPatternCond::K_Imm, uint32_t(1)}, 17704 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17705 // (DECW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 363 17706 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17707 {AliasPatternCond::K_Ignore, 0}, 17708 {AliasPatternCond::K_Imm, uint32_t(31)}, 17709 {AliasPatternCond::K_Imm, uint32_t(1)}, 17710 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17711 // (DECW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 368 17712 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17713 {AliasPatternCond::K_Ignore, 0}, 17714 {AliasPatternCond::K_Ignore, 0}, 17715 {AliasPatternCond::K_Imm, uint32_t(1)}, 17716 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17717 // (DECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 373 17718 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17719 {AliasPatternCond::K_Ignore, 0}, 17720 {AliasPatternCond::K_Imm, uint32_t(31)}, 17721 {AliasPatternCond::K_Imm, uint32_t(1)}, 17722 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17723 // (DECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 378 17724 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17725 {AliasPatternCond::K_Ignore, 0}, 17726 {AliasPatternCond::K_Ignore, 0}, 17727 {AliasPatternCond::K_Imm, uint32_t(1)}, 17728 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17729 // (DSB 0) - 383 17730 {AliasPatternCond::K_Imm, uint32_t(0)}, 17731 // (DSB 4) - 384 17732 {AliasPatternCond::K_Imm, uint32_t(4)}, 17733 // (DUPM_ZI ZPR16:$Zd, sve_preferred_logical_imm16:$imm) - 385 17734 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17735 {AliasPatternCond::K_Custom, 5}, 17736 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17737 // (DUPM_ZI ZPR32:$Zd, sve_preferred_logical_imm32:$imm) - 388 17738 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17739 {AliasPatternCond::K_Custom, 6}, 17740 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17741 // (DUPM_ZI ZPR64:$Zd, sve_preferred_logical_imm64:$imm) - 391 17742 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17743 {AliasPatternCond::K_Custom, 7}, 17744 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17745 // (DUPM_ZI ZPR8:$Zd, sve_logical_imm8:$imm) - 394 17746 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17747 {AliasPatternCond::K_Custom, 1}, 17748 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17749 // (DUPM_ZI ZPR16:$Zd, sve_logical_imm16:$imm) - 397 17750 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17751 {AliasPatternCond::K_Custom, 2}, 17752 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17753 // (DUPM_ZI ZPR32:$Zd, sve_logical_imm32:$imm) - 400 17754 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17755 {AliasPatternCond::K_Custom, 3}, 17756 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17757 // (DUP_ZI_B ZPR8:$Zd, cpy_imm8_opt_lsl_i8:$imm) - 403 17758 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17759 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17760 // (DUP_ZI_D ZPR64:$Zd, cpy_imm8_opt_lsl_i64:$imm) - 405 17761 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17762 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17763 // (DUP_ZI_D ZPR64:$Zd, 0, 0) - 407 17764 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17765 {AliasPatternCond::K_Imm, uint32_t(0)}, 17766 {AliasPatternCond::K_Imm, uint32_t(0)}, 17767 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17768 // (DUP_ZI_H ZPR16:$Zd, cpy_imm8_opt_lsl_i16:$imm) - 411 17769 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17770 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17771 // (DUP_ZI_H ZPR16:$Zd, 0, 0) - 413 17772 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17773 {AliasPatternCond::K_Imm, uint32_t(0)}, 17774 {AliasPatternCond::K_Imm, uint32_t(0)}, 17775 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17776 // (DUP_ZI_S ZPR32:$Zd, cpy_imm8_opt_lsl_i32:$imm) - 417 17777 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17778 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17779 // (DUP_ZI_S ZPR32:$Zd, 0, 0) - 419 17780 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17781 {AliasPatternCond::K_Imm, uint32_t(0)}, 17782 {AliasPatternCond::K_Imm, uint32_t(0)}, 17783 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17784 // (DUP_ZR_B ZPR8:$Zd, GPR32sp:$Rn) - 423 17785 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17786 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17787 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17788 // (DUP_ZR_D ZPR64:$Zd, GPR64sp:$Rn) - 426 17789 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17790 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 17791 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17792 // (DUP_ZR_H ZPR16:$Zd, GPR32sp:$Rn) - 429 17793 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17794 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17795 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17796 // (DUP_ZR_S ZPR32:$Zd, GPR32sp:$Rn) - 432 17797 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17798 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 17799 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17800 // (DUP_ZZI_B ZPR8:$Zd, FPR8asZPR:$Bn, 0) - 435 17801 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17802 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17803 {AliasPatternCond::K_Imm, uint32_t(0)}, 17804 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17805 // (DUP_ZZI_B ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx) - 439 17806 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17807 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17808 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17809 // (DUP_ZZI_D ZPR64:$Zd, FPR64asZPR:$Dn, 0) - 442 17810 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17811 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17812 {AliasPatternCond::K_Imm, uint32_t(0)}, 17813 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17814 // (DUP_ZZI_D ZPR64:$Zd, ZPR64:$Zn, sve_elm_idx_extdup_d:$idx) - 446 17815 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17816 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17817 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17818 // (DUP_ZZI_H ZPR16:$Zd, FPR16asZPR:$Hn, 0) - 449 17819 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17820 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17821 {AliasPatternCond::K_Imm, uint32_t(0)}, 17822 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17823 // (DUP_ZZI_H ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx) - 453 17824 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17825 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17826 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17827 // (DUP_ZZI_Q ZPR128:$Zd, FPR128asZPR:$Qn, 0) - 456 17828 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17829 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17830 {AliasPatternCond::K_Imm, uint32_t(0)}, 17831 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17832 // (DUP_ZZI_Q ZPR128:$Zd, ZPR128:$Zn, sve_elm_idx_extdup_q:$idx) - 460 17833 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17834 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17835 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17836 // (DUP_ZZI_S ZPR32:$Zd, FPR32asZPR:$Sn, 0) - 463 17837 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17838 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17839 {AliasPatternCond::K_Imm, uint32_t(0)}, 17840 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17841 // (DUP_ZZI_S ZPR32:$Zd, ZPR32:$Zn, sve_elm_idx_extdup_s:$idx) - 467 17842 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17843 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17844 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17845 // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 470 17846 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17847 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17848 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17849 {AliasPatternCond::K_Imm, uint32_t(0)}, 17850 // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 474 17851 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17852 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17853 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17854 {AliasPatternCond::K_Imm, uint32_t(0)}, 17855 // (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 478 17856 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17857 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17858 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17859 {AliasPatternCond::K_TiedReg, 1}, 17860 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17861 // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 483 17862 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17863 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17864 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17865 {AliasPatternCond::K_Imm, uint32_t(0)}, 17866 // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 487 17867 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17868 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17869 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17870 {AliasPatternCond::K_Imm, uint32_t(0)}, 17871 // (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 491 17872 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17873 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17874 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17875 {AliasPatternCond::K_TiedReg, 1}, 17876 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17877 // (EOR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 496 17878 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17879 {AliasPatternCond::K_Ignore, 0}, 17880 {AliasPatternCond::K_Custom, 1}, 17881 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17882 // (EOR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 500 17883 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17884 {AliasPatternCond::K_Ignore, 0}, 17885 {AliasPatternCond::K_Custom, 2}, 17886 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17887 // (EOR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 504 17888 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17889 {AliasPatternCond::K_Ignore, 0}, 17890 {AliasPatternCond::K_Custom, 3}, 17891 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17892 // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) - 508 17893 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17894 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 17895 {AliasPatternCond::K_TiedReg, 1}, 17896 // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) - 511 17897 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17898 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 17899 {AliasPatternCond::K_TiedReg, 1}, 17900 // (FCPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, fpimm64:$imm8) - 514 17901 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17902 {AliasPatternCond::K_Ignore, 0}, 17903 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17904 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17905 // (FCPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, fpimm16:$imm8) - 518 17906 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17907 {AliasPatternCond::K_Ignore, 0}, 17908 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17909 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17910 // (FCPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, fpimm32:$imm8) - 522 17911 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17912 {AliasPatternCond::K_Ignore, 0}, 17913 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 17914 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17915 // (FDUP_ZI_D ZPR64:$Zd, fpimm64:$imm8) - 526 17916 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17917 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17918 // (FDUP_ZI_H ZPR16:$Zd, fpimm16:$imm8) - 528 17919 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17920 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17921 // (FDUP_ZI_S ZPR32:$Zd, fpimm32:$imm8) - 530 17922 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17923 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17924 // (GLD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 532 17925 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17926 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17927 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17928 {AliasPatternCond::K_Imm, uint32_t(0)}, 17929 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17930 // (GLD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 537 17931 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17932 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17933 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17934 {AliasPatternCond::K_Imm, uint32_t(0)}, 17935 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17936 // (GLD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 542 17937 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17938 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17939 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17940 {AliasPatternCond::K_Imm, uint32_t(0)}, 17941 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17942 // (GLD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 547 17943 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17944 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17945 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17946 {AliasPatternCond::K_Imm, uint32_t(0)}, 17947 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17948 // (GLD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 552 17949 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17950 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17951 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17952 {AliasPatternCond::K_Imm, uint32_t(0)}, 17953 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17954 // (GLD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 557 17955 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17956 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17957 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17958 {AliasPatternCond::K_Imm, uint32_t(0)}, 17959 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17960 // (GLD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 562 17961 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17962 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17963 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17964 {AliasPatternCond::K_Imm, uint32_t(0)}, 17965 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17966 // (GLD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 567 17967 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17968 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17969 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17970 {AliasPatternCond::K_Imm, uint32_t(0)}, 17971 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17972 // (GLD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 572 17973 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17974 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17975 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17976 {AliasPatternCond::K_Imm, uint32_t(0)}, 17977 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17978 // (GLD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 577 17979 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17980 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17981 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17982 {AliasPatternCond::K_Imm, uint32_t(0)}, 17983 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17984 // (GLD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 582 17985 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17986 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17987 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17988 {AliasPatternCond::K_Imm, uint32_t(0)}, 17989 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17990 // (GLD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 587 17991 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17992 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17993 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17994 {AliasPatternCond::K_Imm, uint32_t(0)}, 17995 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 17996 // (GLDFF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 592 17997 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 17998 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 17999 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18000 {AliasPatternCond::K_Imm, uint32_t(0)}, 18001 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18002 // (GLDFF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 597 18003 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18004 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18005 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18006 {AliasPatternCond::K_Imm, uint32_t(0)}, 18007 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18008 // (GLDFF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 602 18009 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18010 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18011 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18012 {AliasPatternCond::K_Imm, uint32_t(0)}, 18013 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18014 // (GLDFF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 607 18015 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18016 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18017 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18018 {AliasPatternCond::K_Imm, uint32_t(0)}, 18019 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18020 // (GLDFF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 612 18021 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18022 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18023 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18024 {AliasPatternCond::K_Imm, uint32_t(0)}, 18025 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18026 // (GLDFF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 617 18027 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18028 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18029 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18030 {AliasPatternCond::K_Imm, uint32_t(0)}, 18031 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18032 // (GLDFF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 622 18033 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18034 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18035 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18036 {AliasPatternCond::K_Imm, uint32_t(0)}, 18037 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18038 // (GLDFF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 627 18039 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18040 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18041 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18042 {AliasPatternCond::K_Imm, uint32_t(0)}, 18043 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18044 // (GLDFF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 632 18045 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18046 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18047 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18048 {AliasPatternCond::K_Imm, uint32_t(0)}, 18049 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18050 // (GLDFF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 637 18051 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18052 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18053 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18054 {AliasPatternCond::K_Imm, uint32_t(0)}, 18055 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18056 // (GLDFF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 642 18057 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18058 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18059 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18060 {AliasPatternCond::K_Imm, uint32_t(0)}, 18061 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18062 // (GLDFF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 647 18063 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18064 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18065 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18066 {AliasPatternCond::K_Imm, uint32_t(0)}, 18067 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18068 // (HINT { 0, 0, 0 }) - 652 18069 {AliasPatternCond::K_Imm, uint32_t(0)}, 18070 // (HINT { 0, 0, 1 }) - 653 18071 {AliasPatternCond::K_Imm, uint32_t(1)}, 18072 // (HINT { 0, 1, 0 }) - 654 18073 {AliasPatternCond::K_Imm, uint32_t(2)}, 18074 // (HINT { 0, 1, 1 }) - 655 18075 {AliasPatternCond::K_Imm, uint32_t(3)}, 18076 // (HINT { 1, 0, 0 }) - 656 18077 {AliasPatternCond::K_Imm, uint32_t(4)}, 18078 // (HINT { 1, 0, 1 }) - 657 18079 {AliasPatternCond::K_Imm, uint32_t(5)}, 18080 // (HINT { 1, 0, 0, 0, 0 }) - 658 18081 {AliasPatternCond::K_Imm, uint32_t(16)}, 18082 {AliasPatternCond::K_Feature, AArch64::FeatureRAS}, 18083 // (HINT 20) - 660 18084 {AliasPatternCond::K_Imm, uint32_t(20)}, 18085 // (HINT 32) - 661 18086 {AliasPatternCond::K_Imm, uint32_t(32)}, 18087 {AliasPatternCond::K_Feature, AArch64::FeatureBranchTargetId}, 18088 // (HINT btihint_op:$op) - 663 18089 {AliasPatternCond::K_Custom, 8}, 18090 {AliasPatternCond::K_Feature, AArch64::FeatureBranchTargetId}, 18091 // (HINT psbhint_op:$op) - 665 18092 {AliasPatternCond::K_Custom, 9}, 18093 {AliasPatternCond::K_Feature, AArch64::FeatureSPE}, 18094 // (INCB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 667 18095 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18096 {AliasPatternCond::K_Ignore, 0}, 18097 {AliasPatternCond::K_Imm, uint32_t(31)}, 18098 {AliasPatternCond::K_Imm, uint32_t(1)}, 18099 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18100 // (INCB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 672 18101 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18102 {AliasPatternCond::K_Ignore, 0}, 18103 {AliasPatternCond::K_Ignore, 0}, 18104 {AliasPatternCond::K_Imm, uint32_t(1)}, 18105 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18106 // (INCD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 677 18107 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18108 {AliasPatternCond::K_Ignore, 0}, 18109 {AliasPatternCond::K_Imm, uint32_t(31)}, 18110 {AliasPatternCond::K_Imm, uint32_t(1)}, 18111 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18112 // (INCD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 682 18113 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18114 {AliasPatternCond::K_Ignore, 0}, 18115 {AliasPatternCond::K_Ignore, 0}, 18116 {AliasPatternCond::K_Imm, uint32_t(1)}, 18117 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18118 // (INCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 687 18119 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18120 {AliasPatternCond::K_Ignore, 0}, 18121 {AliasPatternCond::K_Imm, uint32_t(31)}, 18122 {AliasPatternCond::K_Imm, uint32_t(1)}, 18123 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18124 // (INCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 692 18125 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18126 {AliasPatternCond::K_Ignore, 0}, 18127 {AliasPatternCond::K_Ignore, 0}, 18128 {AliasPatternCond::K_Imm, uint32_t(1)}, 18129 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18130 // (INCH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 697 18131 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18132 {AliasPatternCond::K_Ignore, 0}, 18133 {AliasPatternCond::K_Imm, uint32_t(31)}, 18134 {AliasPatternCond::K_Imm, uint32_t(1)}, 18135 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18136 // (INCH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 702 18137 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18138 {AliasPatternCond::K_Ignore, 0}, 18139 {AliasPatternCond::K_Ignore, 0}, 18140 {AliasPatternCond::K_Imm, uint32_t(1)}, 18141 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18142 // (INCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 707 18143 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18144 {AliasPatternCond::K_Ignore, 0}, 18145 {AliasPatternCond::K_Imm, uint32_t(31)}, 18146 {AliasPatternCond::K_Imm, uint32_t(1)}, 18147 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18148 // (INCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 712 18149 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18150 {AliasPatternCond::K_Ignore, 0}, 18151 {AliasPatternCond::K_Ignore, 0}, 18152 {AliasPatternCond::K_Imm, uint32_t(1)}, 18153 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18154 // (INCW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 717 18155 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18156 {AliasPatternCond::K_Ignore, 0}, 18157 {AliasPatternCond::K_Imm, uint32_t(31)}, 18158 {AliasPatternCond::K_Imm, uint32_t(1)}, 18159 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18160 // (INCW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 722 18161 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18162 {AliasPatternCond::K_Ignore, 0}, 18163 {AliasPatternCond::K_Ignore, 0}, 18164 {AliasPatternCond::K_Imm, uint32_t(1)}, 18165 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18166 // (INCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 727 18167 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18168 {AliasPatternCond::K_Ignore, 0}, 18169 {AliasPatternCond::K_Imm, uint32_t(31)}, 18170 {AliasPatternCond::K_Imm, uint32_t(1)}, 18171 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18172 // (INCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 732 18173 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18174 {AliasPatternCond::K_Ignore, 0}, 18175 {AliasPatternCond::K_Ignore, 0}, 18176 {AliasPatternCond::K_Imm, uint32_t(1)}, 18177 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18178 // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) - 737 18179 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18180 {AliasPatternCond::K_Ignore, 0}, 18181 {AliasPatternCond::K_Ignore, 0}, 18182 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 18183 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18184 // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) - 742 18185 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18186 {AliasPatternCond::K_Ignore, 0}, 18187 {AliasPatternCond::K_Ignore, 0}, 18188 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18189 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18190 // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) - 747 18191 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18192 {AliasPatternCond::K_Ignore, 0}, 18193 {AliasPatternCond::K_Ignore, 0}, 18194 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 18195 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18196 // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) - 752 18197 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18198 {AliasPatternCond::K_Ignore, 0}, 18199 {AliasPatternCond::K_Ignore, 0}, 18200 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18201 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18202 // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) - 757 18203 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18204 {AliasPatternCond::K_Ignore, 0}, 18205 {AliasPatternCond::K_Ignore, 0}, 18206 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 18207 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18208 // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) - 762 18209 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18210 {AliasPatternCond::K_Ignore, 0}, 18211 {AliasPatternCond::K_Ignore, 0}, 18212 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18213 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18214 // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) - 767 18215 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18216 {AliasPatternCond::K_Ignore, 0}, 18217 {AliasPatternCond::K_Ignore, 0}, 18218 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 18219 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18220 // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) - 772 18221 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18222 {AliasPatternCond::K_Ignore, 0}, 18223 {AliasPatternCond::K_Ignore, 0}, 18224 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18225 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18226 // (IRG GPR64sp:$dst, GPR64sp:$src, XZR) - 777 18227 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18228 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18229 {AliasPatternCond::K_Reg, AArch64::XZR}, 18230 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 18231 // (ISB 15) - 781 18232 {AliasPatternCond::K_Imm, uint32_t(15)}, 18233 // (LD1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 782 18234 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18235 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18236 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18237 {AliasPatternCond::K_Imm, uint32_t(0)}, 18238 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18239 // (LD1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 787 18240 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18241 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18242 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18243 {AliasPatternCond::K_Imm, uint32_t(0)}, 18244 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18245 // (LD1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 792 18246 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18247 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18248 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18249 {AliasPatternCond::K_Imm, uint32_t(0)}, 18250 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18251 // (LD1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 797 18252 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18253 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18254 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18255 {AliasPatternCond::K_Imm, uint32_t(0)}, 18256 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18257 // (LD1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 802 18258 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18259 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18260 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18261 {AliasPatternCond::K_Imm, uint32_t(0)}, 18262 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18263 // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 807 18264 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18265 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 18266 {AliasPatternCond::K_Ignore, 0}, 18267 {AliasPatternCond::K_Reg, AArch64::XZR}, 18268 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18269 // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 812 18270 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18271 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 18272 {AliasPatternCond::K_Ignore, 0}, 18273 {AliasPatternCond::K_Reg, AArch64::XZR}, 18274 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18275 // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 817 18276 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18277 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 18278 {AliasPatternCond::K_Ignore, 0}, 18279 {AliasPatternCond::K_Reg, AArch64::XZR}, 18280 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18281 // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 822 18282 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18283 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 18284 {AliasPatternCond::K_Ignore, 0}, 18285 {AliasPatternCond::K_Reg, AArch64::XZR}, 18286 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18287 // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 827 18288 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18289 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 18290 {AliasPatternCond::K_Ignore, 0}, 18291 {AliasPatternCond::K_Reg, AArch64::XZR}, 18292 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18293 // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 832 18294 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18295 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 18296 {AliasPatternCond::K_Ignore, 0}, 18297 {AliasPatternCond::K_Reg, AArch64::XZR}, 18298 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18299 // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 837 18300 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18301 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 18302 {AliasPatternCond::K_Ignore, 0}, 18303 {AliasPatternCond::K_Reg, AArch64::XZR}, 18304 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18305 // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 842 18306 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18307 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 18308 {AliasPatternCond::K_Ignore, 0}, 18309 {AliasPatternCond::K_Reg, AArch64::XZR}, 18310 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18311 // (LD1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 847 18312 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18313 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18314 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18315 {AliasPatternCond::K_Imm, uint32_t(0)}, 18316 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18317 // (LD1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 852 18318 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18319 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18320 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18321 {AliasPatternCond::K_Imm, uint32_t(0)}, 18322 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18323 // (LD1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 857 18324 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18325 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18326 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18327 {AliasPatternCond::K_Imm, uint32_t(0)}, 18328 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18329 // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 862 18330 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18331 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18332 {AliasPatternCond::K_Ignore, 0}, 18333 {AliasPatternCond::K_Reg, AArch64::XZR}, 18334 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18335 // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 867 18336 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18337 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18338 {AliasPatternCond::K_Ignore, 0}, 18339 {AliasPatternCond::K_Reg, AArch64::XZR}, 18340 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18341 // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 872 18342 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18343 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18344 {AliasPatternCond::K_Ignore, 0}, 18345 {AliasPatternCond::K_Reg, AArch64::XZR}, 18346 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18347 // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 877 18348 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18349 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18350 {AliasPatternCond::K_Ignore, 0}, 18351 {AliasPatternCond::K_Reg, AArch64::XZR}, 18352 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18353 // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 882 18354 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18355 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18356 {AliasPatternCond::K_Ignore, 0}, 18357 {AliasPatternCond::K_Reg, AArch64::XZR}, 18358 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18359 // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 887 18360 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18361 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18362 {AliasPatternCond::K_Ignore, 0}, 18363 {AliasPatternCond::K_Reg, AArch64::XZR}, 18364 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18365 // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 892 18366 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18367 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18368 {AliasPatternCond::K_Ignore, 0}, 18369 {AliasPatternCond::K_Reg, AArch64::XZR}, 18370 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18371 // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 897 18372 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18373 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18374 {AliasPatternCond::K_Ignore, 0}, 18375 {AliasPatternCond::K_Reg, AArch64::XZR}, 18376 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18377 // (LD1RB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 902 18378 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18379 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18380 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18381 {AliasPatternCond::K_Imm, uint32_t(0)}, 18382 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18383 // (LD1RB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 907 18384 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18385 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18386 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18387 {AliasPatternCond::K_Imm, uint32_t(0)}, 18388 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18389 // (LD1RB_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 912 18390 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18391 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18392 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18393 {AliasPatternCond::K_Imm, uint32_t(0)}, 18394 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18395 // (LD1RB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 917 18396 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18397 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18398 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18399 {AliasPatternCond::K_Imm, uint32_t(0)}, 18400 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18401 // (LD1RD_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 922 18402 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18403 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18404 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18405 {AliasPatternCond::K_Imm, uint32_t(0)}, 18406 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18407 // (LD1RH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 927 18408 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18409 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18410 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18411 {AliasPatternCond::K_Imm, uint32_t(0)}, 18412 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18413 // (LD1RH_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 932 18414 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18415 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18416 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18417 {AliasPatternCond::K_Imm, uint32_t(0)}, 18418 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18419 // (LD1RH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 937 18420 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18421 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18422 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18423 {AliasPatternCond::K_Imm, uint32_t(0)}, 18424 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18425 // (LD1RQ_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 942 18426 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18427 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18428 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18429 {AliasPatternCond::K_Imm, uint32_t(0)}, 18430 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18431 // (LD1RQ_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 947 18432 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18433 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18434 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18435 {AliasPatternCond::K_Imm, uint32_t(0)}, 18436 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18437 // (LD1RQ_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 952 18438 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18439 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18440 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18441 {AliasPatternCond::K_Imm, uint32_t(0)}, 18442 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18443 // (LD1RQ_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 957 18444 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18445 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18446 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18447 {AliasPatternCond::K_Imm, uint32_t(0)}, 18448 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18449 // (LD1RSB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 962 18450 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18451 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18452 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18453 {AliasPatternCond::K_Imm, uint32_t(0)}, 18454 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18455 // (LD1RSB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 967 18456 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18457 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18458 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18459 {AliasPatternCond::K_Imm, uint32_t(0)}, 18460 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18461 // (LD1RSB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 972 18462 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18463 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18464 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18465 {AliasPatternCond::K_Imm, uint32_t(0)}, 18466 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18467 // (LD1RSH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 977 18468 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18469 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18470 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18471 {AliasPatternCond::K_Imm, uint32_t(0)}, 18472 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18473 // (LD1RSH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 982 18474 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18475 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18476 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18477 {AliasPatternCond::K_Imm, uint32_t(0)}, 18478 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18479 // (LD1RSW_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 987 18480 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18481 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18482 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18483 {AliasPatternCond::K_Imm, uint32_t(0)}, 18484 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18485 // (LD1RW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 992 18486 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18487 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18488 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18489 {AliasPatternCond::K_Imm, uint32_t(0)}, 18490 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18491 // (LD1RW_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 997 18492 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18493 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18494 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18495 {AliasPatternCond::K_Imm, uint32_t(0)}, 18496 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18497 // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1002 18498 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18499 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18500 {AliasPatternCond::K_Ignore, 0}, 18501 {AliasPatternCond::K_Reg, AArch64::XZR}, 18502 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18503 // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1007 18504 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18505 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18506 {AliasPatternCond::K_Ignore, 0}, 18507 {AliasPatternCond::K_Reg, AArch64::XZR}, 18508 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18509 // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1012 18510 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18511 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18512 {AliasPatternCond::K_Ignore, 0}, 18513 {AliasPatternCond::K_Reg, AArch64::XZR}, 18514 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18515 // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1017 18516 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18517 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18518 {AliasPatternCond::K_Ignore, 0}, 18519 {AliasPatternCond::K_Reg, AArch64::XZR}, 18520 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18521 // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1022 18522 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18523 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18524 {AliasPatternCond::K_Ignore, 0}, 18525 {AliasPatternCond::K_Reg, AArch64::XZR}, 18526 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18527 // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1027 18528 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18529 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18530 {AliasPatternCond::K_Ignore, 0}, 18531 {AliasPatternCond::K_Reg, AArch64::XZR}, 18532 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18533 // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1032 18534 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18535 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 18536 {AliasPatternCond::K_Ignore, 0}, 18537 {AliasPatternCond::K_Reg, AArch64::XZR}, 18538 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18539 // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1037 18540 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18541 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18542 {AliasPatternCond::K_Ignore, 0}, 18543 {AliasPatternCond::K_Reg, AArch64::XZR}, 18544 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18545 // (LD1SB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1042 18546 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18547 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18548 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18549 {AliasPatternCond::K_Imm, uint32_t(0)}, 18550 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18551 // (LD1SB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1047 18552 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18553 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18554 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18555 {AliasPatternCond::K_Imm, uint32_t(0)}, 18556 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18557 // (LD1SB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1052 18558 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18559 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18560 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18561 {AliasPatternCond::K_Imm, uint32_t(0)}, 18562 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18563 // (LD1SH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1057 18564 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18565 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18566 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18567 {AliasPatternCond::K_Imm, uint32_t(0)}, 18568 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18569 // (LD1SH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1062 18570 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18571 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18572 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18573 {AliasPatternCond::K_Imm, uint32_t(0)}, 18574 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18575 // (LD1SW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1067 18576 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18577 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18578 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18579 {AliasPatternCond::K_Imm, uint32_t(0)}, 18580 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18581 // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1072 18582 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18583 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18584 {AliasPatternCond::K_Ignore, 0}, 18585 {AliasPatternCond::K_Reg, AArch64::XZR}, 18586 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18587 // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1077 18588 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18589 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18590 {AliasPatternCond::K_Ignore, 0}, 18591 {AliasPatternCond::K_Reg, AArch64::XZR}, 18592 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18593 // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1082 18594 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18595 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18596 {AliasPatternCond::K_Ignore, 0}, 18597 {AliasPatternCond::K_Reg, AArch64::XZR}, 18598 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18599 // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1087 18600 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18601 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18602 {AliasPatternCond::K_Ignore, 0}, 18603 {AliasPatternCond::K_Reg, AArch64::XZR}, 18604 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18605 // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1092 18606 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18607 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18608 {AliasPatternCond::K_Ignore, 0}, 18609 {AliasPatternCond::K_Reg, AArch64::XZR}, 18610 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18611 // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1097 18612 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18613 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18614 {AliasPatternCond::K_Ignore, 0}, 18615 {AliasPatternCond::K_Reg, AArch64::XZR}, 18616 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18617 // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1102 18618 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18619 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18620 {AliasPatternCond::K_Ignore, 0}, 18621 {AliasPatternCond::K_Reg, AArch64::XZR}, 18622 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18623 // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1107 18624 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18625 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18626 {AliasPatternCond::K_Ignore, 0}, 18627 {AliasPatternCond::K_Reg, AArch64::XZR}, 18628 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18629 // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1112 18630 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18631 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18632 {AliasPatternCond::K_Ignore, 0}, 18633 {AliasPatternCond::K_Reg, AArch64::XZR}, 18634 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18635 // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1117 18636 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18637 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18638 {AliasPatternCond::K_Ignore, 0}, 18639 {AliasPatternCond::K_Reg, AArch64::XZR}, 18640 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18641 // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1122 18642 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18643 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18644 {AliasPatternCond::K_Ignore, 0}, 18645 {AliasPatternCond::K_Reg, AArch64::XZR}, 18646 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18647 // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1127 18648 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18649 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18650 {AliasPatternCond::K_Ignore, 0}, 18651 {AliasPatternCond::K_Reg, AArch64::XZR}, 18652 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18653 // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1132 18654 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18655 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18656 {AliasPatternCond::K_Ignore, 0}, 18657 {AliasPatternCond::K_Reg, AArch64::XZR}, 18658 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18659 // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1137 18660 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18661 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18662 {AliasPatternCond::K_Ignore, 0}, 18663 {AliasPatternCond::K_Reg, AArch64::XZR}, 18664 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18665 // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1142 18666 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18667 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18668 {AliasPatternCond::K_Ignore, 0}, 18669 {AliasPatternCond::K_Reg, AArch64::XZR}, 18670 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18671 // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1147 18672 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18673 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18674 {AliasPatternCond::K_Ignore, 0}, 18675 {AliasPatternCond::K_Reg, AArch64::XZR}, 18676 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18677 // (LD1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1152 18678 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18679 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18680 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18681 {AliasPatternCond::K_Imm, uint32_t(0)}, 18682 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18683 // (LD1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1157 18684 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 18685 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18686 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18687 {AliasPatternCond::K_Imm, uint32_t(0)}, 18688 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18689 // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 1162 18690 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18691 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18692 {AliasPatternCond::K_Ignore, 0}, 18693 {AliasPatternCond::K_Ignore, 0}, 18694 {AliasPatternCond::K_Ignore, 0}, 18695 {AliasPatternCond::K_Reg, AArch64::XZR}, 18696 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18697 // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 1169 18698 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18699 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18700 {AliasPatternCond::K_Ignore, 0}, 18701 {AliasPatternCond::K_Ignore, 0}, 18702 {AliasPatternCond::K_Ignore, 0}, 18703 {AliasPatternCond::K_Reg, AArch64::XZR}, 18704 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18705 // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 1176 18706 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18707 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18708 {AliasPatternCond::K_Ignore, 0}, 18709 {AliasPatternCond::K_Ignore, 0}, 18710 {AliasPatternCond::K_Ignore, 0}, 18711 {AliasPatternCond::K_Reg, AArch64::XZR}, 18712 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18713 // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 1183 18714 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18715 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 18716 {AliasPatternCond::K_Ignore, 0}, 18717 {AliasPatternCond::K_Ignore, 0}, 18718 {AliasPatternCond::K_Ignore, 0}, 18719 {AliasPatternCond::K_Reg, AArch64::XZR}, 18720 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18721 // (LD2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1190 18722 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 18723 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18724 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18725 {AliasPatternCond::K_Imm, uint32_t(0)}, 18726 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18727 // (LD2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1195 18728 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 18729 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18730 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18731 {AliasPatternCond::K_Imm, uint32_t(0)}, 18732 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18733 // (LD2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1200 18734 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 18735 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18736 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18737 {AliasPatternCond::K_Imm, uint32_t(0)}, 18738 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18739 // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1205 18740 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18741 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18742 {AliasPatternCond::K_Ignore, 0}, 18743 {AliasPatternCond::K_Reg, AArch64::XZR}, 18744 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18745 // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1210 18746 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18747 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18748 {AliasPatternCond::K_Ignore, 0}, 18749 {AliasPatternCond::K_Reg, AArch64::XZR}, 18750 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18751 // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1215 18752 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18753 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18754 {AliasPatternCond::K_Ignore, 0}, 18755 {AliasPatternCond::K_Reg, AArch64::XZR}, 18756 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18757 // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1220 18758 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18759 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18760 {AliasPatternCond::K_Ignore, 0}, 18761 {AliasPatternCond::K_Reg, AArch64::XZR}, 18762 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18763 // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1225 18764 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18765 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18766 {AliasPatternCond::K_Ignore, 0}, 18767 {AliasPatternCond::K_Reg, AArch64::XZR}, 18768 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18769 // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1230 18770 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18771 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18772 {AliasPatternCond::K_Ignore, 0}, 18773 {AliasPatternCond::K_Reg, AArch64::XZR}, 18774 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18775 // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1235 18776 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18777 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18778 {AliasPatternCond::K_Ignore, 0}, 18779 {AliasPatternCond::K_Reg, AArch64::XZR}, 18780 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18781 // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1240 18782 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18783 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18784 {AliasPatternCond::K_Ignore, 0}, 18785 {AliasPatternCond::K_Reg, AArch64::XZR}, 18786 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18787 // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1245 18788 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18789 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18790 {AliasPatternCond::K_Ignore, 0}, 18791 {AliasPatternCond::K_Reg, AArch64::XZR}, 18792 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18793 // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1250 18794 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18795 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18796 {AliasPatternCond::K_Ignore, 0}, 18797 {AliasPatternCond::K_Reg, AArch64::XZR}, 18798 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18799 // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1255 18800 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18801 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18802 {AliasPatternCond::K_Ignore, 0}, 18803 {AliasPatternCond::K_Reg, AArch64::XZR}, 18804 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18805 // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1260 18806 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18807 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18808 {AliasPatternCond::K_Ignore, 0}, 18809 {AliasPatternCond::K_Reg, AArch64::XZR}, 18810 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18811 // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1265 18812 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18813 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18814 {AliasPatternCond::K_Ignore, 0}, 18815 {AliasPatternCond::K_Reg, AArch64::XZR}, 18816 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18817 // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1270 18818 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18819 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 18820 {AliasPatternCond::K_Ignore, 0}, 18821 {AliasPatternCond::K_Reg, AArch64::XZR}, 18822 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18823 // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1275 18824 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18825 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18826 {AliasPatternCond::K_Ignore, 0}, 18827 {AliasPatternCond::K_Reg, AArch64::XZR}, 18828 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18829 // (LD2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1280 18830 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 18831 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18832 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18833 {AliasPatternCond::K_Imm, uint32_t(0)}, 18834 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18835 // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 1285 18836 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18837 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18838 {AliasPatternCond::K_Ignore, 0}, 18839 {AliasPatternCond::K_Ignore, 0}, 18840 {AliasPatternCond::K_Ignore, 0}, 18841 {AliasPatternCond::K_Reg, AArch64::XZR}, 18842 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18843 // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 1292 18844 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18845 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18846 {AliasPatternCond::K_Ignore, 0}, 18847 {AliasPatternCond::K_Ignore, 0}, 18848 {AliasPatternCond::K_Ignore, 0}, 18849 {AliasPatternCond::K_Reg, AArch64::XZR}, 18850 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18851 // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 1299 18852 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18853 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18854 {AliasPatternCond::K_Ignore, 0}, 18855 {AliasPatternCond::K_Ignore, 0}, 18856 {AliasPatternCond::K_Ignore, 0}, 18857 {AliasPatternCond::K_Reg, AArch64::XZR}, 18858 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18859 // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 1306 18860 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18861 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 18862 {AliasPatternCond::K_Ignore, 0}, 18863 {AliasPatternCond::K_Ignore, 0}, 18864 {AliasPatternCond::K_Ignore, 0}, 18865 {AliasPatternCond::K_Reg, AArch64::XZR}, 18866 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18867 // (LD3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1313 18868 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 18869 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18870 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18871 {AliasPatternCond::K_Imm, uint32_t(0)}, 18872 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18873 // (LD3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1318 18874 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 18875 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18876 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18877 {AliasPatternCond::K_Imm, uint32_t(0)}, 18878 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18879 // (LD3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1323 18880 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 18881 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18882 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18883 {AliasPatternCond::K_Imm, uint32_t(0)}, 18884 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18885 // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1328 18886 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18887 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18888 {AliasPatternCond::K_Ignore, 0}, 18889 {AliasPatternCond::K_Reg, AArch64::XZR}, 18890 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18891 // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1333 18892 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18893 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18894 {AliasPatternCond::K_Ignore, 0}, 18895 {AliasPatternCond::K_Reg, AArch64::XZR}, 18896 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18897 // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1338 18898 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18899 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18900 {AliasPatternCond::K_Ignore, 0}, 18901 {AliasPatternCond::K_Reg, AArch64::XZR}, 18902 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18903 // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1343 18904 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18905 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18906 {AliasPatternCond::K_Ignore, 0}, 18907 {AliasPatternCond::K_Reg, AArch64::XZR}, 18908 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18909 // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1348 18910 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18911 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18912 {AliasPatternCond::K_Ignore, 0}, 18913 {AliasPatternCond::K_Reg, AArch64::XZR}, 18914 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18915 // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1353 18916 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18917 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18918 {AliasPatternCond::K_Ignore, 0}, 18919 {AliasPatternCond::K_Reg, AArch64::XZR}, 18920 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18921 // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1358 18922 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18923 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18924 {AliasPatternCond::K_Ignore, 0}, 18925 {AliasPatternCond::K_Reg, AArch64::XZR}, 18926 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18927 // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1363 18928 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18929 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18930 {AliasPatternCond::K_Ignore, 0}, 18931 {AliasPatternCond::K_Reg, AArch64::XZR}, 18932 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18933 // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1368 18934 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18935 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18936 {AliasPatternCond::K_Ignore, 0}, 18937 {AliasPatternCond::K_Reg, AArch64::XZR}, 18938 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18939 // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1373 18940 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18941 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18942 {AliasPatternCond::K_Ignore, 0}, 18943 {AliasPatternCond::K_Reg, AArch64::XZR}, 18944 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18945 // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1378 18946 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18947 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18948 {AliasPatternCond::K_Ignore, 0}, 18949 {AliasPatternCond::K_Reg, AArch64::XZR}, 18950 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18951 // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1383 18952 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18953 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18954 {AliasPatternCond::K_Ignore, 0}, 18955 {AliasPatternCond::K_Reg, AArch64::XZR}, 18956 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18957 // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1388 18958 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18959 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18960 {AliasPatternCond::K_Ignore, 0}, 18961 {AliasPatternCond::K_Reg, AArch64::XZR}, 18962 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18963 // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1393 18964 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18965 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 18966 {AliasPatternCond::K_Ignore, 0}, 18967 {AliasPatternCond::K_Reg, AArch64::XZR}, 18968 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18969 // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1398 18970 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18971 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18972 {AliasPatternCond::K_Ignore, 0}, 18973 {AliasPatternCond::K_Reg, AArch64::XZR}, 18974 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18975 // (LD3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1403 18976 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 18977 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 18978 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18979 {AliasPatternCond::K_Imm, uint32_t(0)}, 18980 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 18981 // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 1408 18982 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18983 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18984 {AliasPatternCond::K_Ignore, 0}, 18985 {AliasPatternCond::K_Ignore, 0}, 18986 {AliasPatternCond::K_Ignore, 0}, 18987 {AliasPatternCond::K_Reg, AArch64::XZR}, 18988 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18989 // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 1415 18990 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18991 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 18992 {AliasPatternCond::K_Ignore, 0}, 18993 {AliasPatternCond::K_Ignore, 0}, 18994 {AliasPatternCond::K_Ignore, 0}, 18995 {AliasPatternCond::K_Reg, AArch64::XZR}, 18996 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 18997 // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 1422 18998 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 18999 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 19000 {AliasPatternCond::K_Ignore, 0}, 19001 {AliasPatternCond::K_Ignore, 0}, 19002 {AliasPatternCond::K_Ignore, 0}, 19003 {AliasPatternCond::K_Reg, AArch64::XZR}, 19004 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19005 // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 1429 19006 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19007 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 19008 {AliasPatternCond::K_Ignore, 0}, 19009 {AliasPatternCond::K_Ignore, 0}, 19010 {AliasPatternCond::K_Ignore, 0}, 19011 {AliasPatternCond::K_Reg, AArch64::XZR}, 19012 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19013 // (LD4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1436 19014 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 19015 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19016 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19017 {AliasPatternCond::K_Imm, uint32_t(0)}, 19018 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19019 // (LD4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1441 19020 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 19021 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19022 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19023 {AliasPatternCond::K_Imm, uint32_t(0)}, 19024 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19025 // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1446 19026 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19027 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19028 {AliasPatternCond::K_Ignore, 0}, 19029 {AliasPatternCond::K_Reg, AArch64::XZR}, 19030 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19031 // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1451 19032 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19033 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19034 {AliasPatternCond::K_Ignore, 0}, 19035 {AliasPatternCond::K_Reg, AArch64::XZR}, 19036 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19037 // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1456 19038 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19039 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19040 {AliasPatternCond::K_Ignore, 0}, 19041 {AliasPatternCond::K_Reg, AArch64::XZR}, 19042 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19043 // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1461 19044 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19045 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19046 {AliasPatternCond::K_Ignore, 0}, 19047 {AliasPatternCond::K_Reg, AArch64::XZR}, 19048 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19049 // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1466 19050 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19051 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19052 {AliasPatternCond::K_Ignore, 0}, 19053 {AliasPatternCond::K_Reg, AArch64::XZR}, 19054 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19055 // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1471 19056 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19057 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19058 {AliasPatternCond::K_Ignore, 0}, 19059 {AliasPatternCond::K_Reg, AArch64::XZR}, 19060 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19061 // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1476 19062 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19063 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19064 {AliasPatternCond::K_Ignore, 0}, 19065 {AliasPatternCond::K_Reg, AArch64::XZR}, 19066 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19067 // (LD4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1481 19068 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 19069 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19070 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19071 {AliasPatternCond::K_Imm, uint32_t(0)}, 19072 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19073 // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1486 19074 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19075 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19076 {AliasPatternCond::K_Ignore, 0}, 19077 {AliasPatternCond::K_Reg, AArch64::XZR}, 19078 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19079 // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1491 19080 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19081 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19082 {AliasPatternCond::K_Ignore, 0}, 19083 {AliasPatternCond::K_Reg, AArch64::XZR}, 19084 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19085 // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1496 19086 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19087 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19088 {AliasPatternCond::K_Ignore, 0}, 19089 {AliasPatternCond::K_Reg, AArch64::XZR}, 19090 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19091 // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1501 19092 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19093 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19094 {AliasPatternCond::K_Ignore, 0}, 19095 {AliasPatternCond::K_Reg, AArch64::XZR}, 19096 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19097 // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1506 19098 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19099 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19100 {AliasPatternCond::K_Ignore, 0}, 19101 {AliasPatternCond::K_Reg, AArch64::XZR}, 19102 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19103 // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1511 19104 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19105 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19106 {AliasPatternCond::K_Ignore, 0}, 19107 {AliasPatternCond::K_Reg, AArch64::XZR}, 19108 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19109 // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1516 19110 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19111 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 19112 {AliasPatternCond::K_Ignore, 0}, 19113 {AliasPatternCond::K_Reg, AArch64::XZR}, 19114 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19115 // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1521 19116 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19117 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19118 {AliasPatternCond::K_Ignore, 0}, 19119 {AliasPatternCond::K_Reg, AArch64::XZR}, 19120 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19121 // (LD4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1526 19122 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 19123 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19124 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19125 {AliasPatternCond::K_Imm, uint32_t(0)}, 19126 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19127 // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 1531 19128 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19129 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19130 {AliasPatternCond::K_Ignore, 0}, 19131 {AliasPatternCond::K_Ignore, 0}, 19132 {AliasPatternCond::K_Ignore, 0}, 19133 {AliasPatternCond::K_Reg, AArch64::XZR}, 19134 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19135 // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 1538 19136 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19137 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19138 {AliasPatternCond::K_Ignore, 0}, 19139 {AliasPatternCond::K_Ignore, 0}, 19140 {AliasPatternCond::K_Ignore, 0}, 19141 {AliasPatternCond::K_Reg, AArch64::XZR}, 19142 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19143 // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 1545 19144 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19145 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19146 {AliasPatternCond::K_Ignore, 0}, 19147 {AliasPatternCond::K_Ignore, 0}, 19148 {AliasPatternCond::K_Ignore, 0}, 19149 {AliasPatternCond::K_Reg, AArch64::XZR}, 19150 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19151 // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 1552 19152 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19153 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 19154 {AliasPatternCond::K_Ignore, 0}, 19155 {AliasPatternCond::K_Ignore, 0}, 19156 {AliasPatternCond::K_Ignore, 0}, 19157 {AliasPatternCond::K_Reg, AArch64::XZR}, 19158 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 19159 // (LDADDB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1559 19160 {AliasPatternCond::K_Reg, AArch64::WZR}, 19161 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19162 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19163 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19164 // (LDADDH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1563 19165 {AliasPatternCond::K_Reg, AArch64::WZR}, 19166 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19167 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19168 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19169 // (LDADDLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1567 19170 {AliasPatternCond::K_Reg, AArch64::WZR}, 19171 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19172 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19173 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19174 // (LDADDLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1571 19175 {AliasPatternCond::K_Reg, AArch64::WZR}, 19176 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19177 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19178 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19179 // (LDADDLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1575 19180 {AliasPatternCond::K_Reg, AArch64::WZR}, 19181 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19182 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19183 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19184 // (LDADDLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1579 19185 {AliasPatternCond::K_Reg, AArch64::XZR}, 19186 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19187 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19188 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19189 // (LDADDW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1583 19190 {AliasPatternCond::K_Reg, AArch64::WZR}, 19191 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19192 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19193 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19194 // (LDADDX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1587 19195 {AliasPatternCond::K_Reg, AArch64::XZR}, 19196 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19197 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19198 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19199 // (LDAPURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 1591 19200 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19201 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19202 {AliasPatternCond::K_Imm, uint32_t(0)}, 19203 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19204 // (LDAPURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 1595 19205 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19206 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19207 {AliasPatternCond::K_Imm, uint32_t(0)}, 19208 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19209 // (LDAPURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 1599 19210 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19211 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19212 {AliasPatternCond::K_Imm, uint32_t(0)}, 19213 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19214 // (LDAPURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 1603 19215 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19216 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19217 {AliasPatternCond::K_Imm, uint32_t(0)}, 19218 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19219 // (LDAPURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 1607 19220 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19221 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19222 {AliasPatternCond::K_Imm, uint32_t(0)}, 19223 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19224 // (LDAPURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 1611 19225 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19226 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19227 {AliasPatternCond::K_Imm, uint32_t(0)}, 19228 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19229 // (LDAPURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 1615 19230 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19231 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19232 {AliasPatternCond::K_Imm, uint32_t(0)}, 19233 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19234 // (LDAPURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 1619 19235 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19236 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19237 {AliasPatternCond::K_Imm, uint32_t(0)}, 19238 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19239 // (LDAPURi GPR32:$Rt, GPR64sp:$Rn, 0) - 1623 19240 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19241 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19242 {AliasPatternCond::K_Imm, uint32_t(0)}, 19243 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 19244 // (LDCLRB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1627 19245 {AliasPatternCond::K_Reg, AArch64::WZR}, 19246 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19247 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19248 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19249 // (LDCLRH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1631 19250 {AliasPatternCond::K_Reg, AArch64::WZR}, 19251 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19252 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19253 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19254 // (LDCLRLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1635 19255 {AliasPatternCond::K_Reg, AArch64::WZR}, 19256 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19257 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19258 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19259 // (LDCLRLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1639 19260 {AliasPatternCond::K_Reg, AArch64::WZR}, 19261 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19262 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19263 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19264 // (LDCLRLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1643 19265 {AliasPatternCond::K_Reg, AArch64::WZR}, 19266 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19267 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19268 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19269 // (LDCLRLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1647 19270 {AliasPatternCond::K_Reg, AArch64::XZR}, 19271 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19272 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19273 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19274 // (LDCLRW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1651 19275 {AliasPatternCond::K_Reg, AArch64::WZR}, 19276 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19277 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19278 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19279 // (LDCLRX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1655 19280 {AliasPatternCond::K_Reg, AArch64::XZR}, 19281 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19282 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19283 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19284 // (LDEORB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1659 19285 {AliasPatternCond::K_Reg, AArch64::WZR}, 19286 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19287 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19288 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19289 // (LDEORH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1663 19290 {AliasPatternCond::K_Reg, AArch64::WZR}, 19291 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19292 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19293 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19294 // (LDEORLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 1667 19295 {AliasPatternCond::K_Reg, AArch64::WZR}, 19296 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19297 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19298 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19299 // (LDEORLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 1671 19300 {AliasPatternCond::K_Reg, AArch64::WZR}, 19301 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19302 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19303 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19304 // (LDEORLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1675 19305 {AliasPatternCond::K_Reg, AArch64::WZR}, 19306 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19307 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19308 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19309 // (LDEORLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1679 19310 {AliasPatternCond::K_Reg, AArch64::XZR}, 19311 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19312 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19313 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19314 // (LDEORW WZR, GPR32:$Rs, GPR64sp:$Rn) - 1683 19315 {AliasPatternCond::K_Reg, AArch64::WZR}, 19316 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19317 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19318 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19319 // (LDEORX XZR, GPR64:$Rs, GPR64sp:$Rn) - 1687 19320 {AliasPatternCond::K_Reg, AArch64::XZR}, 19321 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19322 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19323 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19324 // (LDFF1B_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1691 19325 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19326 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19327 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19328 {AliasPatternCond::K_Reg, AArch64::XZR}, 19329 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19330 // (LDFF1B_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1696 19331 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19332 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19333 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19334 {AliasPatternCond::K_Reg, AArch64::XZR}, 19335 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19336 // (LDFF1B_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1701 19337 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19338 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19339 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19340 {AliasPatternCond::K_Reg, AArch64::XZR}, 19341 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19342 // (LDFF1B_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1706 19343 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19344 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19345 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19346 {AliasPatternCond::K_Reg, AArch64::XZR}, 19347 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19348 // (LDFF1D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1711 19349 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19350 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19351 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19352 {AliasPatternCond::K_Reg, AArch64::XZR}, 19353 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19354 // (LDFF1H_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1716 19355 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19356 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19357 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19358 {AliasPatternCond::K_Reg, AArch64::XZR}, 19359 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19360 // (LDFF1H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1721 19361 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19362 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19363 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19364 {AliasPatternCond::K_Reg, AArch64::XZR}, 19365 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19366 // (LDFF1H_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1726 19367 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19368 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19369 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19370 {AliasPatternCond::K_Reg, AArch64::XZR}, 19371 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19372 // (LDFF1SB_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1731 19373 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19374 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19375 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19376 {AliasPatternCond::K_Reg, AArch64::XZR}, 19377 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19378 // (LDFF1SB_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1736 19379 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19380 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19381 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19382 {AliasPatternCond::K_Reg, AArch64::XZR}, 19383 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19384 // (LDFF1SB_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1741 19385 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19386 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19387 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19388 {AliasPatternCond::K_Reg, AArch64::XZR}, 19389 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19390 // (LDFF1SH_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1746 19391 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19392 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19393 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19394 {AliasPatternCond::K_Reg, AArch64::XZR}, 19395 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19396 // (LDFF1SH_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1751 19397 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19398 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19399 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19400 {AliasPatternCond::K_Reg, AArch64::XZR}, 19401 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19402 // (LDFF1SW_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1756 19403 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19404 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19405 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19406 {AliasPatternCond::K_Reg, AArch64::XZR}, 19407 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19408 // (LDFF1W_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1761 19409 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19410 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19411 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19412 {AliasPatternCond::K_Reg, AArch64::XZR}, 19413 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19414 // (LDFF1W_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1766 19415 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19416 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19417 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19418 {AliasPatternCond::K_Reg, AArch64::XZR}, 19419 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19420 // (LDG GPR64:$Rt, GPR64sp:$Rn, 0) - 1771 19421 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19422 {AliasPatternCond::K_Ignore, 0}, 19423 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19424 {AliasPatternCond::K_Imm, uint32_t(0)}, 19425 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 19426 // (LDNF1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1776 19427 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19428 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19429 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19430 {AliasPatternCond::K_Imm, uint32_t(0)}, 19431 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19432 // (LDNF1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1781 19433 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19434 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19435 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19436 {AliasPatternCond::K_Imm, uint32_t(0)}, 19437 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19438 // (LDNF1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1786 19439 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19440 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19441 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19442 {AliasPatternCond::K_Imm, uint32_t(0)}, 19443 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19444 // (LDNF1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1791 19445 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19446 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19447 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19448 {AliasPatternCond::K_Imm, uint32_t(0)}, 19449 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19450 // (LDNF1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1796 19451 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19452 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19453 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19454 {AliasPatternCond::K_Imm, uint32_t(0)}, 19455 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19456 // (LDNF1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1801 19457 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19458 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19459 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19460 {AliasPatternCond::K_Imm, uint32_t(0)}, 19461 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19462 // (LDNF1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1806 19463 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19464 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19465 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19466 {AliasPatternCond::K_Imm, uint32_t(0)}, 19467 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19468 // (LDNF1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1811 19469 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19470 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19471 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19472 {AliasPatternCond::K_Imm, uint32_t(0)}, 19473 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19474 // (LDNF1SB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1816 19475 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19476 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19477 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19478 {AliasPatternCond::K_Imm, uint32_t(0)}, 19479 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19480 // (LDNF1SB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1821 19481 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19482 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19483 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19484 {AliasPatternCond::K_Imm, uint32_t(0)}, 19485 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19486 // (LDNF1SB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1826 19487 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19488 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19489 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19490 {AliasPatternCond::K_Imm, uint32_t(0)}, 19491 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19492 // (LDNF1SH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1831 19493 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19494 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19495 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19496 {AliasPatternCond::K_Imm, uint32_t(0)}, 19497 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19498 // (LDNF1SH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1836 19499 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19500 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19501 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19502 {AliasPatternCond::K_Imm, uint32_t(0)}, 19503 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19504 // (LDNF1SW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1841 19505 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19506 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19507 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19508 {AliasPatternCond::K_Imm, uint32_t(0)}, 19509 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19510 // (LDNF1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1846 19511 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19512 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19513 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19514 {AliasPatternCond::K_Imm, uint32_t(0)}, 19515 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19516 // (LDNF1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1851 19517 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19518 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19519 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19520 {AliasPatternCond::K_Imm, uint32_t(0)}, 19521 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19522 // (LDNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 1856 19523 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19524 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19525 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19526 {AliasPatternCond::K_Imm, uint32_t(0)}, 19527 // (LDNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 1860 19528 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19529 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19530 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19531 {AliasPatternCond::K_Imm, uint32_t(0)}, 19532 // (LDNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 1864 19533 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19534 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19535 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19536 {AliasPatternCond::K_Imm, uint32_t(0)}, 19537 // (LDNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 1868 19538 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19539 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19540 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19541 {AliasPatternCond::K_Imm, uint32_t(0)}, 19542 // (LDNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 1872 19543 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19544 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19545 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19546 {AliasPatternCond::K_Imm, uint32_t(0)}, 19547 // (LDNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1876 19548 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19549 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19550 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19551 {AliasPatternCond::K_Imm, uint32_t(0)}, 19552 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19553 // (LDNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1881 19554 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19555 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19556 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19557 {AliasPatternCond::K_Reg, AArch64::XZR}, 19558 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19559 // (LDNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 1886 19560 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19561 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19562 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19563 {AliasPatternCond::K_Reg, AArch64::XZR}, 19564 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19565 // (LDNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1891 19566 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19567 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19568 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19569 {AliasPatternCond::K_Imm, uint32_t(0)}, 19570 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19571 // (LDNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1896 19572 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19573 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19574 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19575 {AliasPatternCond::K_Reg, AArch64::XZR}, 19576 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19577 // (LDNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1901 19578 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19579 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19580 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19581 {AliasPatternCond::K_Imm, uint32_t(0)}, 19582 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19583 // (LDNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1906 19584 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19585 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19586 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19587 {AliasPatternCond::K_Reg, AArch64::XZR}, 19588 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19589 // (LDNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 1911 19590 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19591 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19592 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19593 {AliasPatternCond::K_Reg, AArch64::XZR}, 19594 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19595 // (LDNT1SB_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1916 19596 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19597 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19598 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19599 {AliasPatternCond::K_Reg, AArch64::XZR}, 19600 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19601 // (LDNT1SB_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 1921 19602 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19603 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19604 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19605 {AliasPatternCond::K_Reg, AArch64::XZR}, 19606 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19607 // (LDNT1SH_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1926 19608 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19609 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19610 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19611 {AliasPatternCond::K_Reg, AArch64::XZR}, 19612 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19613 // (LDNT1SH_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 1931 19614 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19615 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19616 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19617 {AliasPatternCond::K_Reg, AArch64::XZR}, 19618 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19619 // (LDNT1SW_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1936 19620 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19621 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19622 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19623 {AliasPatternCond::K_Reg, AArch64::XZR}, 19624 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19625 // (LDNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1941 19626 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19627 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19628 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19629 {AliasPatternCond::K_Imm, uint32_t(0)}, 19630 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19631 // (LDNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 1946 19632 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19633 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19634 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19635 {AliasPatternCond::K_Reg, AArch64::XZR}, 19636 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19637 // (LDNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 1951 19638 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19639 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 19640 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19641 {AliasPatternCond::K_Reg, AArch64::XZR}, 19642 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 19643 // (LDPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 1956 19644 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19645 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19646 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19647 {AliasPatternCond::K_Imm, uint32_t(0)}, 19648 // (LDPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 1960 19649 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19650 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19651 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19652 {AliasPatternCond::K_Imm, uint32_t(0)}, 19653 // (LDPSWi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 1964 19654 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19655 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19656 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19657 {AliasPatternCond::K_Imm, uint32_t(0)}, 19658 // (LDPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 1968 19659 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19660 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19661 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19662 {AliasPatternCond::K_Imm, uint32_t(0)}, 19663 // (LDPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 1972 19664 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19665 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19666 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19667 {AliasPatternCond::K_Imm, uint32_t(0)}, 19668 // (LDPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 1976 19669 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19670 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19671 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19672 {AliasPatternCond::K_Imm, uint32_t(0)}, 19673 // (LDRAAindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 1980 19674 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19675 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19676 {AliasPatternCond::K_Imm, uint32_t(0)}, 19677 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 19678 // (LDRABindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 1984 19679 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19680 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19681 {AliasPatternCond::K_Imm, uint32_t(0)}, 19682 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 19683 // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 1988 19684 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19685 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19686 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19687 {AliasPatternCond::K_Imm, uint32_t(0)}, 19688 {AliasPatternCond::K_Imm, uint32_t(0)}, 19689 // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) - 1993 19690 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19691 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19692 {AliasPatternCond::K_Imm, uint32_t(0)}, 19693 // (LDRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 1996 19694 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 19695 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19696 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19697 {AliasPatternCond::K_Imm, uint32_t(0)}, 19698 {AliasPatternCond::K_Imm, uint32_t(0)}, 19699 // (LDRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2001 19700 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 19701 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19702 {AliasPatternCond::K_Imm, uint32_t(0)}, 19703 // (LDRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2004 19704 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19705 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19706 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19707 {AliasPatternCond::K_Imm, uint32_t(0)}, 19708 {AliasPatternCond::K_Imm, uint32_t(0)}, 19709 // (LDRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2009 19710 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 19711 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19712 {AliasPatternCond::K_Imm, uint32_t(0)}, 19713 // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2012 19714 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19715 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19716 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19717 {AliasPatternCond::K_Imm, uint32_t(0)}, 19718 {AliasPatternCond::K_Imm, uint32_t(0)}, 19719 // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) - 2017 19720 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19721 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19722 {AliasPatternCond::K_Imm, uint32_t(0)}, 19723 // (LDRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2020 19724 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 19725 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19726 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19727 {AliasPatternCond::K_Imm, uint32_t(0)}, 19728 {AliasPatternCond::K_Imm, uint32_t(0)}, 19729 // (LDRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2025 19730 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 19731 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19732 {AliasPatternCond::K_Imm, uint32_t(0)}, 19733 // (LDRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2028 19734 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19735 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19736 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19737 {AliasPatternCond::K_Imm, uint32_t(0)}, 19738 {AliasPatternCond::K_Imm, uint32_t(0)}, 19739 // (LDRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2033 19740 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 19741 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19742 {AliasPatternCond::K_Imm, uint32_t(0)}, 19743 // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2036 19744 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19745 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19746 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19747 {AliasPatternCond::K_Imm, uint32_t(0)}, 19748 {AliasPatternCond::K_Imm, uint32_t(0)}, 19749 // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2041 19750 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19751 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19752 {AliasPatternCond::K_Imm, uint32_t(0)}, 19753 // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2044 19754 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19755 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19756 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19757 {AliasPatternCond::K_Imm, uint32_t(0)}, 19758 {AliasPatternCond::K_Imm, uint32_t(0)}, 19759 // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2049 19760 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19761 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19762 {AliasPatternCond::K_Imm, uint32_t(0)}, 19763 // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2052 19764 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19765 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19766 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19767 {AliasPatternCond::K_Imm, uint32_t(0)}, 19768 {AliasPatternCond::K_Imm, uint32_t(0)}, 19769 // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2057 19770 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19771 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19772 {AliasPatternCond::K_Imm, uint32_t(0)}, 19773 // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2060 19774 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19775 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19776 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19777 {AliasPatternCond::K_Imm, uint32_t(0)}, 19778 {AliasPatternCond::K_Imm, uint32_t(0)}, 19779 // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2065 19780 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19781 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19782 {AliasPatternCond::K_Imm, uint32_t(0)}, 19783 // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2068 19784 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19785 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19786 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19787 {AliasPatternCond::K_Imm, uint32_t(0)}, 19788 {AliasPatternCond::K_Imm, uint32_t(0)}, 19789 // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) - 2073 19790 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19791 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19792 {AliasPatternCond::K_Imm, uint32_t(0)}, 19793 // (LDRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2076 19794 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19795 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19796 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19797 {AliasPatternCond::K_Imm, uint32_t(0)}, 19798 {AliasPatternCond::K_Imm, uint32_t(0)}, 19799 // (LDRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2081 19800 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 19801 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19802 {AliasPatternCond::K_Imm, uint32_t(0)}, 19803 // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2084 19804 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19805 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19806 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19807 {AliasPatternCond::K_Imm, uint32_t(0)}, 19808 {AliasPatternCond::K_Imm, uint32_t(0)}, 19809 // (LDRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 2089 19810 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19811 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19812 {AliasPatternCond::K_Imm, uint32_t(0)}, 19813 // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2092 19814 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19815 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19816 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19817 {AliasPatternCond::K_Imm, uint32_t(0)}, 19818 {AliasPatternCond::K_Imm, uint32_t(0)}, 19819 // (LDRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 2097 19820 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19821 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19822 {AliasPatternCond::K_Imm, uint32_t(0)}, 19823 // (LDR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 2100 19824 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 19825 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19826 {AliasPatternCond::K_Imm, uint32_t(0)}, 19827 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19828 // (LDR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 2104 19829 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 19830 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19831 {AliasPatternCond::K_Imm, uint32_t(0)}, 19832 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 19833 // (LDSETB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2108 19834 {AliasPatternCond::K_Reg, AArch64::WZR}, 19835 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19836 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19837 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19838 // (LDSETH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2112 19839 {AliasPatternCond::K_Reg, AArch64::WZR}, 19840 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19841 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19842 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19843 // (LDSETLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2116 19844 {AliasPatternCond::K_Reg, AArch64::WZR}, 19845 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19846 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19847 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19848 // (LDSETLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2120 19849 {AliasPatternCond::K_Reg, AArch64::WZR}, 19850 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19851 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19852 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19853 // (LDSETLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2124 19854 {AliasPatternCond::K_Reg, AArch64::WZR}, 19855 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19856 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19857 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19858 // (LDSETLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2128 19859 {AliasPatternCond::K_Reg, AArch64::XZR}, 19860 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19861 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19862 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19863 // (LDSETW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2132 19864 {AliasPatternCond::K_Reg, AArch64::WZR}, 19865 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19866 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19867 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19868 // (LDSETX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2136 19869 {AliasPatternCond::K_Reg, AArch64::XZR}, 19870 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19871 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19872 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19873 // (LDSMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2140 19874 {AliasPatternCond::K_Reg, AArch64::WZR}, 19875 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19876 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19877 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19878 // (LDSMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2144 19879 {AliasPatternCond::K_Reg, AArch64::WZR}, 19880 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19881 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19882 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19883 // (LDSMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2148 19884 {AliasPatternCond::K_Reg, AArch64::WZR}, 19885 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19886 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19887 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19888 // (LDSMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2152 19889 {AliasPatternCond::K_Reg, AArch64::WZR}, 19890 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19891 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19892 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19893 // (LDSMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2156 19894 {AliasPatternCond::K_Reg, AArch64::WZR}, 19895 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19896 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19897 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19898 // (LDSMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2160 19899 {AliasPatternCond::K_Reg, AArch64::XZR}, 19900 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19901 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19902 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19903 // (LDSMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2164 19904 {AliasPatternCond::K_Reg, AArch64::WZR}, 19905 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19906 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19907 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19908 // (LDSMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2168 19909 {AliasPatternCond::K_Reg, AArch64::XZR}, 19910 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19911 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19912 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19913 // (LDSMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2172 19914 {AliasPatternCond::K_Reg, AArch64::WZR}, 19915 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19916 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19917 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19918 // (LDSMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2176 19919 {AliasPatternCond::K_Reg, AArch64::WZR}, 19920 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19921 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19922 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19923 // (LDSMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2180 19924 {AliasPatternCond::K_Reg, AArch64::WZR}, 19925 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19926 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19927 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19928 // (LDSMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2184 19929 {AliasPatternCond::K_Reg, AArch64::WZR}, 19930 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19931 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19932 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19933 // (LDSMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2188 19934 {AliasPatternCond::K_Reg, AArch64::WZR}, 19935 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19936 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19937 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19938 // (LDSMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2192 19939 {AliasPatternCond::K_Reg, AArch64::XZR}, 19940 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19941 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19942 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19943 // (LDSMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2196 19944 {AliasPatternCond::K_Reg, AArch64::WZR}, 19945 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19946 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19947 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19948 // (LDSMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2200 19949 {AliasPatternCond::K_Reg, AArch64::XZR}, 19950 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19951 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19952 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19953 // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2204 19954 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19955 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19956 {AliasPatternCond::K_Imm, uint32_t(0)}, 19957 // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2207 19958 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19959 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19960 {AliasPatternCond::K_Imm, uint32_t(0)}, 19961 // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2210 19962 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19963 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19964 {AliasPatternCond::K_Imm, uint32_t(0)}, 19965 // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2213 19966 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19967 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19968 {AliasPatternCond::K_Imm, uint32_t(0)}, 19969 // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2216 19970 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19971 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19972 {AliasPatternCond::K_Imm, uint32_t(0)}, 19973 // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2219 19974 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19975 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19976 {AliasPatternCond::K_Imm, uint32_t(0)}, 19977 // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2222 19978 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19979 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19980 {AliasPatternCond::K_Imm, uint32_t(0)}, 19981 // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2225 19982 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19983 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19984 {AliasPatternCond::K_Imm, uint32_t(0)}, 19985 // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2228 19986 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 19987 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19988 {AliasPatternCond::K_Imm, uint32_t(0)}, 19989 // (LDUMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2231 19990 {AliasPatternCond::K_Reg, AArch64::WZR}, 19991 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19992 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19993 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19994 // (LDUMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2235 19995 {AliasPatternCond::K_Reg, AArch64::WZR}, 19996 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 19997 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 19998 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 19999 // (LDUMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2239 20000 {AliasPatternCond::K_Reg, AArch64::WZR}, 20001 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20002 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20003 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20004 // (LDUMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2243 20005 {AliasPatternCond::K_Reg, AArch64::WZR}, 20006 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20007 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20008 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20009 // (LDUMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2247 20010 {AliasPatternCond::K_Reg, AArch64::WZR}, 20011 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20012 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20013 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20014 // (LDUMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2251 20015 {AliasPatternCond::K_Reg, AArch64::XZR}, 20016 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20017 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20018 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20019 // (LDUMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2255 20020 {AliasPatternCond::K_Reg, AArch64::WZR}, 20021 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20022 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20023 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20024 // (LDUMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2259 20025 {AliasPatternCond::K_Reg, AArch64::XZR}, 20026 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20027 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20028 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20029 // (LDUMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2263 20030 {AliasPatternCond::K_Reg, AArch64::WZR}, 20031 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20032 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20033 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20034 // (LDUMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2267 20035 {AliasPatternCond::K_Reg, AArch64::WZR}, 20036 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20037 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20038 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20039 // (LDUMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2271 20040 {AliasPatternCond::K_Reg, AArch64::WZR}, 20041 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20042 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20043 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20044 // (LDUMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2275 20045 {AliasPatternCond::K_Reg, AArch64::WZR}, 20046 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20047 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20048 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20049 // (LDUMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2279 20050 {AliasPatternCond::K_Reg, AArch64::WZR}, 20051 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20052 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20053 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20054 // (LDUMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2283 20055 {AliasPatternCond::K_Reg, AArch64::XZR}, 20056 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20057 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20058 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20059 // (LDUMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2287 20060 {AliasPatternCond::K_Reg, AArch64::WZR}, 20061 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20062 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20063 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20064 // (LDUMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2291 20065 {AliasPatternCond::K_Reg, AArch64::XZR}, 20066 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20067 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20068 {AliasPatternCond::K_Feature, AArch64::FeatureLSE}, 20069 // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2295 20070 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20071 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20072 {AliasPatternCond::K_Imm, uint32_t(0)}, 20073 // (LDURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2298 20074 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 20075 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20076 {AliasPatternCond::K_Imm, uint32_t(0)}, 20077 // (LDURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2301 20078 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20079 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20080 {AliasPatternCond::K_Imm, uint32_t(0)}, 20081 // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2304 20082 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20083 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20084 {AliasPatternCond::K_Imm, uint32_t(0)}, 20085 // (LDURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2307 20086 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 20087 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20088 {AliasPatternCond::K_Imm, uint32_t(0)}, 20089 // (LDURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2310 20090 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20091 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20092 {AliasPatternCond::K_Imm, uint32_t(0)}, 20093 // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2313 20094 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20095 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20096 {AliasPatternCond::K_Imm, uint32_t(0)}, 20097 // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2316 20098 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20099 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20100 {AliasPatternCond::K_Imm, uint32_t(0)}, 20101 // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2319 20102 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20103 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20104 {AliasPatternCond::K_Imm, uint32_t(0)}, 20105 // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2322 20106 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20107 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20108 {AliasPatternCond::K_Imm, uint32_t(0)}, 20109 // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2325 20110 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20111 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20112 {AliasPatternCond::K_Imm, uint32_t(0)}, 20113 // (LDURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2328 20114 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 20115 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20116 {AliasPatternCond::K_Imm, uint32_t(0)}, 20117 // (LDURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 2331 20118 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20119 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20120 {AliasPatternCond::K_Imm, uint32_t(0)}, 20121 // (LDURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 2334 20122 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20123 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20124 {AliasPatternCond::K_Imm, uint32_t(0)}, 20125 // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2337 20126 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20127 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20128 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20129 {AliasPatternCond::K_Reg, AArch64::WZR}, 20130 // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2341 20131 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20132 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20133 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20134 {AliasPatternCond::K_Reg, AArch64::XZR}, 20135 // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2345 20136 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20137 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20138 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20139 {AliasPatternCond::K_Reg, AArch64::WZR}, 20140 // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2349 20141 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20142 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20143 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20144 {AliasPatternCond::K_Reg, AArch64::XZR}, 20145 // (NOTv16i8 V128:$Vd, V128:$Vn) - 2353 20146 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20147 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20148 // (NOTv8i8 V64:$Vd, V64:$Vn) - 2355 20149 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20150 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20151 // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) - 2357 20152 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20153 {AliasPatternCond::K_Reg, AArch64::WZR}, 20154 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20155 {AliasPatternCond::K_Imm, uint32_t(0)}, 20156 // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) - 2361 20157 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20158 {AliasPatternCond::K_Reg, AArch64::WZR}, 20159 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20160 // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2364 20161 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20162 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20163 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20164 {AliasPatternCond::K_Imm, uint32_t(0)}, 20165 // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) - 2368 20166 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20167 {AliasPatternCond::K_Reg, AArch64::XZR}, 20168 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20169 {AliasPatternCond::K_Imm, uint32_t(0)}, 20170 // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) - 2372 20171 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20172 {AliasPatternCond::K_Reg, AArch64::XZR}, 20173 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20174 // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2375 20175 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20176 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20177 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20178 {AliasPatternCond::K_Imm, uint32_t(0)}, 20179 // (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2379 20180 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20181 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20182 {AliasPatternCond::K_TiedReg, 1}, 20183 {AliasPatternCond::K_TiedReg, 1}, 20184 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20185 // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) - 2384 20186 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20187 {AliasPatternCond::K_Reg, AArch64::WZR}, 20188 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20189 {AliasPatternCond::K_Imm, uint32_t(0)}, 20190 // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2388 20191 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20192 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20193 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20194 {AliasPatternCond::K_Imm, uint32_t(0)}, 20195 // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) - 2392 20196 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20197 {AliasPatternCond::K_Reg, AArch64::XZR}, 20198 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20199 {AliasPatternCond::K_Imm, uint32_t(0)}, 20200 // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2396 20201 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20202 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20203 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20204 {AliasPatternCond::K_Imm, uint32_t(0)}, 20205 // (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2400 20206 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20207 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20208 {AliasPatternCond::K_TiedReg, 1}, 20209 {AliasPatternCond::K_TiedReg, 1}, 20210 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20211 // (ORR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 2405 20212 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20213 {AliasPatternCond::K_Ignore, 0}, 20214 {AliasPatternCond::K_Custom, 1}, 20215 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20216 // (ORR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 2409 20217 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20218 {AliasPatternCond::K_Ignore, 0}, 20219 {AliasPatternCond::K_Custom, 2}, 20220 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20221 // (ORR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 2413 20222 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20223 {AliasPatternCond::K_Ignore, 0}, 20224 {AliasPatternCond::K_Custom, 3}, 20225 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20226 // (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn) - 2417 20227 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20228 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20229 {AliasPatternCond::K_TiedReg, 1}, 20230 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20231 // (ORRv16i8 V128:$dst, V128:$src, V128:$src) - 2421 20232 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20233 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20234 {AliasPatternCond::K_TiedReg, 1}, 20235 // (ORRv8i8 V64:$dst, V64:$src, V64:$src) - 2424 20236 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20237 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20238 {AliasPatternCond::K_TiedReg, 1}, 20239 // (PACIA1716) - 2427 20240 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20241 // (PACIASP) - 2428 20242 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20243 // (PACIAZ) - 2429 20244 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20245 // (PACIB1716) - 2430 20246 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20247 // (PACIBSP) - 2431 20248 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20249 // (PACIBZ) - 2432 20250 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 20251 // (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2433 20252 {AliasPatternCond::K_Ignore, 0}, 20253 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20254 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20255 {AliasPatternCond::K_Imm, uint32_t(0)}, 20256 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20257 // (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2438 20258 {AliasPatternCond::K_Ignore, 0}, 20259 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20260 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20261 {AliasPatternCond::K_Imm, uint32_t(0)}, 20262 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20263 // (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2443 20264 {AliasPatternCond::K_Ignore, 0}, 20265 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20266 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20267 {AliasPatternCond::K_Imm, uint32_t(0)}, 20268 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20269 // (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2448 20270 {AliasPatternCond::K_Ignore, 0}, 20271 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20272 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20273 {AliasPatternCond::K_Imm, uint32_t(0)}, 20274 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20275 // (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2453 20276 {AliasPatternCond::K_Ignore, 0}, 20277 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20278 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20279 {AliasPatternCond::K_Imm, uint32_t(0)}, 20280 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20281 // (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2458 20282 {AliasPatternCond::K_Ignore, 0}, 20283 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20284 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20285 {AliasPatternCond::K_Imm, uint32_t(0)}, 20286 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20287 // (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2463 20288 {AliasPatternCond::K_Ignore, 0}, 20289 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20290 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20291 {AliasPatternCond::K_Imm, uint32_t(0)}, 20292 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20293 // (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2468 20294 {AliasPatternCond::K_Ignore, 0}, 20295 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20296 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20297 {AliasPatternCond::K_Imm, uint32_t(0)}, 20298 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20299 // (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2473 20300 {AliasPatternCond::K_Ignore, 0}, 20301 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20302 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20303 {AliasPatternCond::K_Imm, uint32_t(0)}, 20304 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20305 // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2478 20306 {AliasPatternCond::K_Ignore, 0}, 20307 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20308 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20309 {AliasPatternCond::K_Imm, uint32_t(0)}, 20310 {AliasPatternCond::K_Imm, uint32_t(0)}, 20311 // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) - 2483 20312 {AliasPatternCond::K_Ignore, 0}, 20313 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20314 {AliasPatternCond::K_Imm, uint32_t(0)}, 20315 // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) - 2486 20316 {AliasPatternCond::K_Ignore, 0}, 20317 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20318 {AliasPatternCond::K_Imm, uint32_t(0)}, 20319 // (PRFW_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2489 20320 {AliasPatternCond::K_Ignore, 0}, 20321 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20322 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20323 {AliasPatternCond::K_Imm, uint32_t(0)}, 20324 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20325 // (PRFW_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2494 20326 {AliasPatternCond::K_Ignore, 0}, 20327 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20328 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20329 {AliasPatternCond::K_Imm, uint32_t(0)}, 20330 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20331 // (PRFW_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2499 20332 {AliasPatternCond::K_Ignore, 0}, 20333 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20334 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20335 {AliasPatternCond::K_Imm, uint32_t(0)}, 20336 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20337 // (PTRUES_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 2504 20338 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20339 {AliasPatternCond::K_Imm, uint32_t(31)}, 20340 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20341 // (PTRUES_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 2507 20342 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20343 {AliasPatternCond::K_Imm, uint32_t(31)}, 20344 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20345 // (PTRUES_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 2510 20346 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20347 {AliasPatternCond::K_Imm, uint32_t(31)}, 20348 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20349 // (PTRUES_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 2513 20350 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20351 {AliasPatternCond::K_Imm, uint32_t(31)}, 20352 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20353 // (PTRUE_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 2516 20354 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20355 {AliasPatternCond::K_Imm, uint32_t(31)}, 20356 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20357 // (PTRUE_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 2519 20358 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20359 {AliasPatternCond::K_Imm, uint32_t(31)}, 20360 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20361 // (PTRUE_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 2522 20362 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20363 {AliasPatternCond::K_Imm, uint32_t(31)}, 20364 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20365 // (PTRUE_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 2525 20366 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20367 {AliasPatternCond::K_Imm, uint32_t(31)}, 20368 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20369 // (RET LR) - 2528 20370 {AliasPatternCond::K_Reg, AArch64::LR}, 20371 // (SBCSWr GPR32:$dst, WZR, GPR32:$src) - 2529 20372 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20373 {AliasPatternCond::K_Reg, AArch64::WZR}, 20374 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20375 // (SBCSXr GPR64:$dst, XZR, GPR64:$src) - 2532 20376 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20377 {AliasPatternCond::K_Reg, AArch64::XZR}, 20378 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20379 // (SBCWr GPR32:$dst, WZR, GPR32:$src) - 2535 20380 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20381 {AliasPatternCond::K_Reg, AArch64::WZR}, 20382 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20383 // (SBCXr GPR64:$dst, XZR, GPR64:$src) - 2538 20384 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20385 {AliasPatternCond::K_Reg, AArch64::XZR}, 20386 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20387 // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 2541 20388 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20389 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20390 {AliasPatternCond::K_Ignore, 0}, 20391 {AliasPatternCond::K_Imm, uint32_t(31)}, 20392 // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 2545 20393 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20394 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20395 {AliasPatternCond::K_Imm, uint32_t(0)}, 20396 {AliasPatternCond::K_Imm, uint32_t(7)}, 20397 // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 2549 20398 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20399 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20400 {AliasPatternCond::K_Imm, uint32_t(0)}, 20401 {AliasPatternCond::K_Imm, uint32_t(15)}, 20402 // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 2553 20403 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20404 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20405 {AliasPatternCond::K_Ignore, 0}, 20406 {AliasPatternCond::K_Imm, uint32_t(63)}, 20407 // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 2557 20408 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20409 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20410 {AliasPatternCond::K_Imm, uint32_t(0)}, 20411 {AliasPatternCond::K_Imm, uint32_t(7)}, 20412 // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 2561 20413 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20414 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20415 {AliasPatternCond::K_Imm, uint32_t(0)}, 20416 {AliasPatternCond::K_Imm, uint32_t(15)}, 20417 // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 2565 20418 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20419 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20420 {AliasPatternCond::K_Imm, uint32_t(0)}, 20421 {AliasPatternCond::K_Imm, uint32_t(31)}, 20422 // (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd) - 2569 20423 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20424 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20425 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20426 {AliasPatternCond::K_TiedReg, 0}, 20427 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20428 // (SEL_ZPZZ_B ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd) - 2574 20429 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20430 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20431 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20432 {AliasPatternCond::K_TiedReg, 0}, 20433 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20434 // (SEL_ZPZZ_D ZPR64:$Zd, PPRAny:$Pg, ZPR64:$Zn, ZPR64:$Zd) - 2579 20435 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20436 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20437 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20438 {AliasPatternCond::K_TiedReg, 0}, 20439 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20440 // (SEL_ZPZZ_H ZPR16:$Zd, PPRAny:$Pg, ZPR16:$Zn, ZPR16:$Zd) - 2584 20441 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20442 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20443 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20444 {AliasPatternCond::K_TiedReg, 0}, 20445 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20446 // (SEL_ZPZZ_S ZPR32:$Zd, PPRAny:$Pg, ZPR32:$Zn, ZPR32:$Zd) - 2589 20447 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20448 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 20449 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20450 {AliasPatternCond::K_TiedReg, 0}, 20451 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20452 // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 2594 20453 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20454 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20455 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20456 {AliasPatternCond::K_Reg, AArch64::XZR}, 20457 // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 2598 20458 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20459 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20460 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 20461 {AliasPatternCond::K_Reg, AArch64::XZR}, 20462 // (SQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2602 20463 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20464 {AliasPatternCond::K_Ignore, 0}, 20465 {AliasPatternCond::K_Imm, uint32_t(31)}, 20466 {AliasPatternCond::K_Imm, uint32_t(1)}, 20467 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20468 // (SQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2607 20469 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20470 {AliasPatternCond::K_Ignore, 0}, 20471 {AliasPatternCond::K_Ignore, 0}, 20472 {AliasPatternCond::K_Imm, uint32_t(1)}, 20473 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20474 // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2612 20475 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20476 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20477 {AliasPatternCond::K_Imm, uint32_t(31)}, 20478 {AliasPatternCond::K_Imm, uint32_t(1)}, 20479 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20480 // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2617 20481 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20482 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20483 {AliasPatternCond::K_Ignore, 0}, 20484 {AliasPatternCond::K_Imm, uint32_t(1)}, 20485 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20486 // (SQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2622 20487 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20488 {AliasPatternCond::K_Ignore, 0}, 20489 {AliasPatternCond::K_Imm, uint32_t(31)}, 20490 {AliasPatternCond::K_Imm, uint32_t(1)}, 20491 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20492 // (SQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2627 20493 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20494 {AliasPatternCond::K_Ignore, 0}, 20495 {AliasPatternCond::K_Ignore, 0}, 20496 {AliasPatternCond::K_Imm, uint32_t(1)}, 20497 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20498 // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2632 20499 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20500 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20501 {AliasPatternCond::K_Imm, uint32_t(31)}, 20502 {AliasPatternCond::K_Imm, uint32_t(1)}, 20503 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20504 // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2637 20505 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20506 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20507 {AliasPatternCond::K_Ignore, 0}, 20508 {AliasPatternCond::K_Imm, uint32_t(1)}, 20509 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20510 // (SQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2642 20511 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20512 {AliasPatternCond::K_Ignore, 0}, 20513 {AliasPatternCond::K_Imm, uint32_t(31)}, 20514 {AliasPatternCond::K_Imm, uint32_t(1)}, 20515 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20516 // (SQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 2647 20517 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20518 {AliasPatternCond::K_Ignore, 0}, 20519 {AliasPatternCond::K_Ignore, 0}, 20520 {AliasPatternCond::K_Imm, uint32_t(1)}, 20521 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20522 // (SQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2652 20523 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20524 {AliasPatternCond::K_Ignore, 0}, 20525 {AliasPatternCond::K_Imm, uint32_t(31)}, 20526 {AliasPatternCond::K_Imm, uint32_t(1)}, 20527 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20528 // (SQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2657 20529 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20530 {AliasPatternCond::K_Ignore, 0}, 20531 {AliasPatternCond::K_Ignore, 0}, 20532 {AliasPatternCond::K_Imm, uint32_t(1)}, 20533 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20534 // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2662 20535 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20536 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20537 {AliasPatternCond::K_Imm, uint32_t(31)}, 20538 {AliasPatternCond::K_Imm, uint32_t(1)}, 20539 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20540 // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2667 20541 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20542 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20543 {AliasPatternCond::K_Ignore, 0}, 20544 {AliasPatternCond::K_Imm, uint32_t(1)}, 20545 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20546 // (SQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2672 20547 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20548 {AliasPatternCond::K_Ignore, 0}, 20549 {AliasPatternCond::K_Imm, uint32_t(31)}, 20550 {AliasPatternCond::K_Imm, uint32_t(1)}, 20551 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20552 // (SQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 2677 20553 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20554 {AliasPatternCond::K_Ignore, 0}, 20555 {AliasPatternCond::K_Ignore, 0}, 20556 {AliasPatternCond::K_Imm, uint32_t(1)}, 20557 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20558 // (SQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2682 20559 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20560 {AliasPatternCond::K_Ignore, 0}, 20561 {AliasPatternCond::K_Imm, uint32_t(31)}, 20562 {AliasPatternCond::K_Imm, uint32_t(1)}, 20563 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20564 // (SQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2687 20565 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20566 {AliasPatternCond::K_Ignore, 0}, 20567 {AliasPatternCond::K_Ignore, 0}, 20568 {AliasPatternCond::K_Imm, uint32_t(1)}, 20569 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20570 // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2692 20571 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20572 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20573 {AliasPatternCond::K_Imm, uint32_t(31)}, 20574 {AliasPatternCond::K_Imm, uint32_t(1)}, 20575 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20576 // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2697 20577 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20578 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20579 {AliasPatternCond::K_Ignore, 0}, 20580 {AliasPatternCond::K_Imm, uint32_t(1)}, 20581 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20582 // (SQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2702 20583 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20584 {AliasPatternCond::K_Ignore, 0}, 20585 {AliasPatternCond::K_Imm, uint32_t(31)}, 20586 {AliasPatternCond::K_Imm, uint32_t(1)}, 20587 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20588 // (SQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 2707 20589 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20590 {AliasPatternCond::K_Ignore, 0}, 20591 {AliasPatternCond::K_Ignore, 0}, 20592 {AliasPatternCond::K_Imm, uint32_t(1)}, 20593 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20594 // (SQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2712 20595 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20596 {AliasPatternCond::K_Ignore, 0}, 20597 {AliasPatternCond::K_Imm, uint32_t(31)}, 20598 {AliasPatternCond::K_Imm, uint32_t(1)}, 20599 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20600 // (SQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2717 20601 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20602 {AliasPatternCond::K_Ignore, 0}, 20603 {AliasPatternCond::K_Ignore, 0}, 20604 {AliasPatternCond::K_Imm, uint32_t(1)}, 20605 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20606 // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2722 20607 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20608 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20609 {AliasPatternCond::K_Imm, uint32_t(31)}, 20610 {AliasPatternCond::K_Imm, uint32_t(1)}, 20611 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20612 // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2727 20613 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20614 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20615 {AliasPatternCond::K_Ignore, 0}, 20616 {AliasPatternCond::K_Imm, uint32_t(1)}, 20617 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20618 // (SQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2732 20619 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20620 {AliasPatternCond::K_Ignore, 0}, 20621 {AliasPatternCond::K_Imm, uint32_t(31)}, 20622 {AliasPatternCond::K_Imm, uint32_t(1)}, 20623 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20624 // (SQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2737 20625 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20626 {AliasPatternCond::K_Ignore, 0}, 20627 {AliasPatternCond::K_Ignore, 0}, 20628 {AliasPatternCond::K_Imm, uint32_t(1)}, 20629 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20630 // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2742 20631 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20632 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20633 {AliasPatternCond::K_Imm, uint32_t(31)}, 20634 {AliasPatternCond::K_Imm, uint32_t(1)}, 20635 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20636 // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2747 20637 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20638 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20639 {AliasPatternCond::K_Ignore, 0}, 20640 {AliasPatternCond::K_Imm, uint32_t(1)}, 20641 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20642 // (SQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2752 20643 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20644 {AliasPatternCond::K_Ignore, 0}, 20645 {AliasPatternCond::K_Imm, uint32_t(31)}, 20646 {AliasPatternCond::K_Imm, uint32_t(1)}, 20647 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20648 // (SQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 2757 20649 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20650 {AliasPatternCond::K_Ignore, 0}, 20651 {AliasPatternCond::K_Ignore, 0}, 20652 {AliasPatternCond::K_Imm, uint32_t(1)}, 20653 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20654 // (SQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2762 20655 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20656 {AliasPatternCond::K_Ignore, 0}, 20657 {AliasPatternCond::K_Imm, uint32_t(31)}, 20658 {AliasPatternCond::K_Imm, uint32_t(1)}, 20659 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20660 // (SQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2767 20661 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20662 {AliasPatternCond::K_Ignore, 0}, 20663 {AliasPatternCond::K_Ignore, 0}, 20664 {AliasPatternCond::K_Imm, uint32_t(1)}, 20665 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20666 // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2772 20667 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20668 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20669 {AliasPatternCond::K_Imm, uint32_t(31)}, 20670 {AliasPatternCond::K_Imm, uint32_t(1)}, 20671 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20672 // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2777 20673 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20674 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20675 {AliasPatternCond::K_Ignore, 0}, 20676 {AliasPatternCond::K_Imm, uint32_t(1)}, 20677 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20678 // (SQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2782 20679 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20680 {AliasPatternCond::K_Ignore, 0}, 20681 {AliasPatternCond::K_Imm, uint32_t(31)}, 20682 {AliasPatternCond::K_Imm, uint32_t(1)}, 20683 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20684 // (SQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 2787 20685 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20686 {AliasPatternCond::K_Ignore, 0}, 20687 {AliasPatternCond::K_Ignore, 0}, 20688 {AliasPatternCond::K_Imm, uint32_t(1)}, 20689 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20690 // (SQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 2792 20691 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20692 {AliasPatternCond::K_Ignore, 0}, 20693 {AliasPatternCond::K_Imm, uint32_t(31)}, 20694 {AliasPatternCond::K_Imm, uint32_t(1)}, 20695 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20696 // (SQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 2797 20697 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20698 {AliasPatternCond::K_Ignore, 0}, 20699 {AliasPatternCond::K_Ignore, 0}, 20700 {AliasPatternCond::K_Imm, uint32_t(1)}, 20701 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20702 // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 2802 20703 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20704 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20705 {AliasPatternCond::K_Imm, uint32_t(31)}, 20706 {AliasPatternCond::K_Imm, uint32_t(1)}, 20707 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20708 // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 2807 20709 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20710 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 20711 {AliasPatternCond::K_Ignore, 0}, 20712 {AliasPatternCond::K_Imm, uint32_t(1)}, 20713 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20714 // (SQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 2812 20715 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20716 {AliasPatternCond::K_Ignore, 0}, 20717 {AliasPatternCond::K_Imm, uint32_t(31)}, 20718 {AliasPatternCond::K_Imm, uint32_t(1)}, 20719 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20720 // (SQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 2817 20721 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20722 {AliasPatternCond::K_Ignore, 0}, 20723 {AliasPatternCond::K_Ignore, 0}, 20724 {AliasPatternCond::K_Imm, uint32_t(1)}, 20725 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20726 // (SST1B_D_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2822 20727 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20728 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20729 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20730 {AliasPatternCond::K_Imm, uint32_t(0)}, 20731 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20732 // (SST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2827 20733 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20734 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20735 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20736 {AliasPatternCond::K_Imm, uint32_t(0)}, 20737 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20738 // (SST1D_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2832 20739 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20740 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20741 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20742 {AliasPatternCond::K_Imm, uint32_t(0)}, 20743 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20744 // (SST1H_D_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2837 20745 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20746 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20747 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20748 {AliasPatternCond::K_Imm, uint32_t(0)}, 20749 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20750 // (SST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2842 20751 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20752 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20753 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20754 {AliasPatternCond::K_Imm, uint32_t(0)}, 20755 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20756 // (SST1W_D_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2847 20757 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20758 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20759 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20760 {AliasPatternCond::K_Imm, uint32_t(0)}, 20761 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20762 // (SST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2852 20763 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20764 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20765 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20766 {AliasPatternCond::K_Imm, uint32_t(0)}, 20767 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20768 // (ST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2857 20769 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20770 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20771 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20772 {AliasPatternCond::K_Imm, uint32_t(0)}, 20773 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20774 // (ST1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2862 20775 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20776 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20777 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20778 {AliasPatternCond::K_Imm, uint32_t(0)}, 20779 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20780 // (ST1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2867 20781 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20782 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20783 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20784 {AliasPatternCond::K_Imm, uint32_t(0)}, 20785 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20786 // (ST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2872 20787 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20788 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20789 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20790 {AliasPatternCond::K_Imm, uint32_t(0)}, 20791 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20792 // (ST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2877 20793 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20794 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20795 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20796 {AliasPatternCond::K_Imm, uint32_t(0)}, 20797 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20798 // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 2882 20799 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20800 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 20801 {AliasPatternCond::K_Ignore, 0}, 20802 {AliasPatternCond::K_Reg, AArch64::XZR}, 20803 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20804 // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 2887 20805 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20806 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 20807 {AliasPatternCond::K_Ignore, 0}, 20808 {AliasPatternCond::K_Reg, AArch64::XZR}, 20809 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20810 // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 2892 20811 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20812 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 20813 {AliasPatternCond::K_Ignore, 0}, 20814 {AliasPatternCond::K_Reg, AArch64::XZR}, 20815 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20816 // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 2897 20817 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20818 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 20819 {AliasPatternCond::K_Ignore, 0}, 20820 {AliasPatternCond::K_Reg, AArch64::XZR}, 20821 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20822 // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 2902 20823 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20824 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 20825 {AliasPatternCond::K_Ignore, 0}, 20826 {AliasPatternCond::K_Reg, AArch64::XZR}, 20827 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20828 // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 2907 20829 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20830 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 20831 {AliasPatternCond::K_Ignore, 0}, 20832 {AliasPatternCond::K_Reg, AArch64::XZR}, 20833 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20834 // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 2912 20835 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20836 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 20837 {AliasPatternCond::K_Ignore, 0}, 20838 {AliasPatternCond::K_Reg, AArch64::XZR}, 20839 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20840 // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 2917 20841 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20842 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 20843 {AliasPatternCond::K_Ignore, 0}, 20844 {AliasPatternCond::K_Reg, AArch64::XZR}, 20845 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20846 // (ST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2922 20847 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20848 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20849 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20850 {AliasPatternCond::K_Imm, uint32_t(0)}, 20851 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20852 // (ST1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2927 20853 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20854 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20855 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20856 {AliasPatternCond::K_Imm, uint32_t(0)}, 20857 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20858 // (ST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2932 20859 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 20860 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 20861 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20862 {AliasPatternCond::K_Imm, uint32_t(0)}, 20863 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 20864 // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 2937 20865 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20866 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20867 {AliasPatternCond::K_Ignore, 0}, 20868 {AliasPatternCond::K_Reg, AArch64::XZR}, 20869 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20870 // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 2942 20871 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20872 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20873 {AliasPatternCond::K_Ignore, 0}, 20874 {AliasPatternCond::K_Reg, AArch64::XZR}, 20875 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20876 // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 2947 20877 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20878 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20879 {AliasPatternCond::K_Ignore, 0}, 20880 {AliasPatternCond::K_Reg, AArch64::XZR}, 20881 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20882 // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 2952 20883 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20884 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20885 {AliasPatternCond::K_Ignore, 0}, 20886 {AliasPatternCond::K_Reg, AArch64::XZR}, 20887 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20888 // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 2957 20889 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20890 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20891 {AliasPatternCond::K_Ignore, 0}, 20892 {AliasPatternCond::K_Reg, AArch64::XZR}, 20893 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20894 // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 2962 20895 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20896 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20897 {AliasPatternCond::K_Ignore, 0}, 20898 {AliasPatternCond::K_Reg, AArch64::XZR}, 20899 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20900 // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 2967 20901 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20902 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 20903 {AliasPatternCond::K_Ignore, 0}, 20904 {AliasPatternCond::K_Reg, AArch64::XZR}, 20905 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20906 // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 2972 20907 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20908 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 20909 {AliasPatternCond::K_Ignore, 0}, 20910 {AliasPatternCond::K_Reg, AArch64::XZR}, 20911 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20912 // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 2977 20913 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20914 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 20915 {AliasPatternCond::K_Ignore, 0}, 20916 {AliasPatternCond::K_Reg, AArch64::XZR}, 20917 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20918 // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 2982 20919 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20920 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 20921 {AliasPatternCond::K_Ignore, 0}, 20922 {AliasPatternCond::K_Reg, AArch64::XZR}, 20923 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20924 // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 2987 20925 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20926 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 20927 {AliasPatternCond::K_Ignore, 0}, 20928 {AliasPatternCond::K_Reg, AArch64::XZR}, 20929 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20930 // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 2992 20931 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20932 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 20933 {AliasPatternCond::K_Ignore, 0}, 20934 {AliasPatternCond::K_Reg, AArch64::XZR}, 20935 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20936 // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 2997 20937 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20938 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 20939 {AliasPatternCond::K_Ignore, 0}, 20940 {AliasPatternCond::K_Reg, AArch64::XZR}, 20941 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20942 // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3002 20943 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20944 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 20945 {AliasPatternCond::K_Ignore, 0}, 20946 {AliasPatternCond::K_Reg, AArch64::XZR}, 20947 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20948 // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3007 20949 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20950 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 20951 {AliasPatternCond::K_Ignore, 0}, 20952 {AliasPatternCond::K_Reg, AArch64::XZR}, 20953 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20954 // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3012 20955 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20956 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 20957 {AliasPatternCond::K_Ignore, 0}, 20958 {AliasPatternCond::K_Reg, AArch64::XZR}, 20959 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20960 // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3017 20961 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20962 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 20963 {AliasPatternCond::K_Ignore, 0}, 20964 {AliasPatternCond::K_Reg, AArch64::XZR}, 20965 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20966 // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 3022 20967 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20968 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 20969 {AliasPatternCond::K_Ignore, 0}, 20970 {AliasPatternCond::K_Reg, AArch64::XZR}, 20971 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20972 // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3027 20973 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20974 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 20975 {AliasPatternCond::K_Ignore, 0}, 20976 {AliasPatternCond::K_Reg, AArch64::XZR}, 20977 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20978 // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3032 20979 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20980 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 20981 {AliasPatternCond::K_Ignore, 0}, 20982 {AliasPatternCond::K_Reg, AArch64::XZR}, 20983 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20984 // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3037 20985 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20986 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 20987 {AliasPatternCond::K_Ignore, 0}, 20988 {AliasPatternCond::K_Reg, AArch64::XZR}, 20989 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20990 // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3042 20991 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20992 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 20993 {AliasPatternCond::K_Ignore, 0}, 20994 {AliasPatternCond::K_Reg, AArch64::XZR}, 20995 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 20996 // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3047 20997 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 20998 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 20999 {AliasPatternCond::K_Ignore, 0}, 21000 {AliasPatternCond::K_Reg, AArch64::XZR}, 21001 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21002 // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3052 21003 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21004 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21005 {AliasPatternCond::K_Ignore, 0}, 21006 {AliasPatternCond::K_Reg, AArch64::XZR}, 21007 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21008 // (ST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3057 21009 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21010 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21011 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21012 {AliasPatternCond::K_Imm, uint32_t(0)}, 21013 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21014 // (ST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3062 21015 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21016 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21017 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21018 {AliasPatternCond::K_Imm, uint32_t(0)}, 21019 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21020 // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 3067 21021 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21022 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21023 {AliasPatternCond::K_Ignore, 0}, 21024 {AliasPatternCond::K_Ignore, 0}, 21025 {AliasPatternCond::K_Reg, AArch64::XZR}, 21026 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21027 // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 3073 21028 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21029 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21030 {AliasPatternCond::K_Ignore, 0}, 21031 {AliasPatternCond::K_Ignore, 0}, 21032 {AliasPatternCond::K_Reg, AArch64::XZR}, 21033 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21034 // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 3079 21035 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21036 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21037 {AliasPatternCond::K_Ignore, 0}, 21038 {AliasPatternCond::K_Ignore, 0}, 21039 {AliasPatternCond::K_Reg, AArch64::XZR}, 21040 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21041 // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 3085 21042 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21043 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21044 {AliasPatternCond::K_Ignore, 0}, 21045 {AliasPatternCond::K_Ignore, 0}, 21046 {AliasPatternCond::K_Reg, AArch64::XZR}, 21047 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21048 // (ST2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3091 21049 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 21050 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21051 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21052 {AliasPatternCond::K_Imm, uint32_t(0)}, 21053 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21054 // (ST2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3096 21055 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 21056 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21057 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21058 {AliasPatternCond::K_Imm, uint32_t(0)}, 21059 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21060 // (ST2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3101 21061 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21062 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21063 {AliasPatternCond::K_Imm, uint32_t(0)}, 21064 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 21065 // (ST2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3105 21066 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 21067 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21068 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21069 {AliasPatternCond::K_Imm, uint32_t(0)}, 21070 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21071 // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3110 21072 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21073 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21074 {AliasPatternCond::K_Ignore, 0}, 21075 {AliasPatternCond::K_Reg, AArch64::XZR}, 21076 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21077 // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3115 21078 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21079 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21080 {AliasPatternCond::K_Ignore, 0}, 21081 {AliasPatternCond::K_Reg, AArch64::XZR}, 21082 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21083 // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3120 21084 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21085 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 21086 {AliasPatternCond::K_Ignore, 0}, 21087 {AliasPatternCond::K_Reg, AArch64::XZR}, 21088 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21089 // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3125 21090 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21091 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 21092 {AliasPatternCond::K_Ignore, 0}, 21093 {AliasPatternCond::K_Reg, AArch64::XZR}, 21094 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21095 // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3130 21096 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21097 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21098 {AliasPatternCond::K_Ignore, 0}, 21099 {AliasPatternCond::K_Reg, AArch64::XZR}, 21100 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21101 // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3135 21102 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21103 {AliasPatternCond::K_RegClass, AArch64::DDRegClassID}, 21104 {AliasPatternCond::K_Ignore, 0}, 21105 {AliasPatternCond::K_Reg, AArch64::XZR}, 21106 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21107 // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3140 21108 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21109 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21110 {AliasPatternCond::K_Ignore, 0}, 21111 {AliasPatternCond::K_Reg, AArch64::XZR}, 21112 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21113 // (ST2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3145 21114 {AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID}, 21115 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21116 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21117 {AliasPatternCond::K_Imm, uint32_t(0)}, 21118 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21119 // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 3150 21120 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21121 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21122 {AliasPatternCond::K_Ignore, 0}, 21123 {AliasPatternCond::K_Ignore, 0}, 21124 {AliasPatternCond::K_Reg, AArch64::XZR}, 21125 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21126 // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 3156 21127 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21128 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21129 {AliasPatternCond::K_Ignore, 0}, 21130 {AliasPatternCond::K_Ignore, 0}, 21131 {AliasPatternCond::K_Reg, AArch64::XZR}, 21132 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21133 // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 3162 21134 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21135 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21136 {AliasPatternCond::K_Ignore, 0}, 21137 {AliasPatternCond::K_Ignore, 0}, 21138 {AliasPatternCond::K_Reg, AArch64::XZR}, 21139 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21140 // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 3168 21141 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21142 {AliasPatternCond::K_RegClass, AArch64::QQRegClassID}, 21143 {AliasPatternCond::K_Ignore, 0}, 21144 {AliasPatternCond::K_Ignore, 0}, 21145 {AliasPatternCond::K_Reg, AArch64::XZR}, 21146 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21147 // (ST3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3174 21148 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 21149 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21150 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21151 {AliasPatternCond::K_Imm, uint32_t(0)}, 21152 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21153 // (ST3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3179 21154 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 21155 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21156 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21157 {AliasPatternCond::K_Imm, uint32_t(0)}, 21158 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21159 // (ST3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3184 21160 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 21161 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21162 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21163 {AliasPatternCond::K_Imm, uint32_t(0)}, 21164 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21165 // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 3189 21166 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21167 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21168 {AliasPatternCond::K_Ignore, 0}, 21169 {AliasPatternCond::K_Reg, AArch64::XZR}, 21170 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21171 // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 3194 21172 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21173 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21174 {AliasPatternCond::K_Ignore, 0}, 21175 {AliasPatternCond::K_Reg, AArch64::XZR}, 21176 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21177 // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 3199 21178 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21179 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 21180 {AliasPatternCond::K_Ignore, 0}, 21181 {AliasPatternCond::K_Reg, AArch64::XZR}, 21182 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21183 // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 3204 21184 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21185 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 21186 {AliasPatternCond::K_Ignore, 0}, 21187 {AliasPatternCond::K_Reg, AArch64::XZR}, 21188 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21189 // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3209 21190 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21191 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21192 {AliasPatternCond::K_Ignore, 0}, 21193 {AliasPatternCond::K_Reg, AArch64::XZR}, 21194 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21195 // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3214 21196 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21197 {AliasPatternCond::K_RegClass, AArch64::DDDRegClassID}, 21198 {AliasPatternCond::K_Ignore, 0}, 21199 {AliasPatternCond::K_Reg, AArch64::XZR}, 21200 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21201 // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3219 21202 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21203 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21204 {AliasPatternCond::K_Ignore, 0}, 21205 {AliasPatternCond::K_Reg, AArch64::XZR}, 21206 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21207 // (ST3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3224 21208 {AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID}, 21209 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21210 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21211 {AliasPatternCond::K_Imm, uint32_t(0)}, 21212 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21213 // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 3229 21214 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21215 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21216 {AliasPatternCond::K_Ignore, 0}, 21217 {AliasPatternCond::K_Ignore, 0}, 21218 {AliasPatternCond::K_Reg, AArch64::XZR}, 21219 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21220 // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 3235 21221 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21222 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21223 {AliasPatternCond::K_Ignore, 0}, 21224 {AliasPatternCond::K_Ignore, 0}, 21225 {AliasPatternCond::K_Reg, AArch64::XZR}, 21226 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21227 // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 3241 21228 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21229 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21230 {AliasPatternCond::K_Ignore, 0}, 21231 {AliasPatternCond::K_Ignore, 0}, 21232 {AliasPatternCond::K_Reg, AArch64::XZR}, 21233 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21234 // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 3247 21235 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21236 {AliasPatternCond::K_RegClass, AArch64::QQQRegClassID}, 21237 {AliasPatternCond::K_Ignore, 0}, 21238 {AliasPatternCond::K_Ignore, 0}, 21239 {AliasPatternCond::K_Reg, AArch64::XZR}, 21240 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21241 // (ST4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3253 21242 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 21243 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21244 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21245 {AliasPatternCond::K_Imm, uint32_t(0)}, 21246 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21247 // (ST4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3258 21248 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 21249 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21250 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21251 {AliasPatternCond::K_Imm, uint32_t(0)}, 21252 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21253 // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 3263 21254 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21255 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21256 {AliasPatternCond::K_Ignore, 0}, 21257 {AliasPatternCond::K_Reg, AArch64::XZR}, 21258 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21259 // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 3268 21260 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21261 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21262 {AliasPatternCond::K_Ignore, 0}, 21263 {AliasPatternCond::K_Reg, AArch64::XZR}, 21264 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21265 // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 3273 21266 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21267 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 21268 {AliasPatternCond::K_Ignore, 0}, 21269 {AliasPatternCond::K_Reg, AArch64::XZR}, 21270 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21271 // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 3278 21272 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21273 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 21274 {AliasPatternCond::K_Ignore, 0}, 21275 {AliasPatternCond::K_Reg, AArch64::XZR}, 21276 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21277 // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 3283 21278 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21279 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21280 {AliasPatternCond::K_Ignore, 0}, 21281 {AliasPatternCond::K_Reg, AArch64::XZR}, 21282 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21283 // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 3288 21284 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21285 {AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID}, 21286 {AliasPatternCond::K_Ignore, 0}, 21287 {AliasPatternCond::K_Reg, AArch64::XZR}, 21288 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21289 // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 3293 21290 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21291 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21292 {AliasPatternCond::K_Ignore, 0}, 21293 {AliasPatternCond::K_Reg, AArch64::XZR}, 21294 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21295 // (ST4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3298 21296 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 21297 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21298 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21299 {AliasPatternCond::K_Imm, uint32_t(0)}, 21300 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21301 // (ST4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3303 21302 {AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID}, 21303 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21304 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21305 {AliasPatternCond::K_Imm, uint32_t(0)}, 21306 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21307 // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 3308 21308 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21309 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21310 {AliasPatternCond::K_Ignore, 0}, 21311 {AliasPatternCond::K_Ignore, 0}, 21312 {AliasPatternCond::K_Reg, AArch64::XZR}, 21313 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21314 // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 3314 21315 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21316 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21317 {AliasPatternCond::K_Ignore, 0}, 21318 {AliasPatternCond::K_Ignore, 0}, 21319 {AliasPatternCond::K_Reg, AArch64::XZR}, 21320 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21321 // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 3320 21322 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21323 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21324 {AliasPatternCond::K_Ignore, 0}, 21325 {AliasPatternCond::K_Ignore, 0}, 21326 {AliasPatternCond::K_Reg, AArch64::XZR}, 21327 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21328 // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 3326 21329 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21330 {AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID}, 21331 {AliasPatternCond::K_Ignore, 0}, 21332 {AliasPatternCond::K_Ignore, 0}, 21333 {AliasPatternCond::K_Reg, AArch64::XZR}, 21334 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21335 // (STGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3332 21336 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21337 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21338 {AliasPatternCond::K_Imm, uint32_t(0)}, 21339 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 21340 // (STGPi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3336 21341 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21342 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21343 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21344 {AliasPatternCond::K_Imm, uint32_t(0)}, 21345 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 21346 // (STLURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 3341 21347 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21348 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21349 {AliasPatternCond::K_Imm, uint32_t(0)}, 21350 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 21351 // (STLURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 3345 21352 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21353 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21354 {AliasPatternCond::K_Imm, uint32_t(0)}, 21355 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 21356 // (STLURWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3349 21357 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21358 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21359 {AliasPatternCond::K_Imm, uint32_t(0)}, 21360 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 21361 // (STLURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3353 21362 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21363 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21364 {AliasPatternCond::K_Imm, uint32_t(0)}, 21365 {AliasPatternCond::K_Feature, AArch64::FeatureRCPC_IMMO}, 21366 // (STNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 3357 21367 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21368 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21369 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21370 {AliasPatternCond::K_Imm, uint32_t(0)}, 21371 // (STNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 3361 21372 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21373 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21374 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21375 {AliasPatternCond::K_Imm, uint32_t(0)}, 21376 // (STNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 3365 21377 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21378 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21379 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21380 {AliasPatternCond::K_Imm, uint32_t(0)}, 21381 // (STNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 3369 21382 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21383 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21384 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21385 {AliasPatternCond::K_Imm, uint32_t(0)}, 21386 // (STNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3373 21387 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21388 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21389 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21390 {AliasPatternCond::K_Imm, uint32_t(0)}, 21391 // (STNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3377 21392 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21393 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21394 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21395 {AliasPatternCond::K_Imm, uint32_t(0)}, 21396 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21397 // (STNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3382 21398 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21399 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21400 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21401 {AliasPatternCond::K_Reg, AArch64::XZR}, 21402 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21403 // (STNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3387 21404 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21405 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21406 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21407 {AliasPatternCond::K_Reg, AArch64::XZR}, 21408 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21409 // (STNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3392 21410 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21411 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21412 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21413 {AliasPatternCond::K_Imm, uint32_t(0)}, 21414 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21415 // (STNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3397 21416 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21417 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21418 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21419 {AliasPatternCond::K_Reg, AArch64::XZR}, 21420 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21421 // (STNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3402 21422 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21423 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21424 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21425 {AliasPatternCond::K_Imm, uint32_t(0)}, 21426 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21427 // (STNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3407 21428 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21429 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21430 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21431 {AliasPatternCond::K_Reg, AArch64::XZR}, 21432 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21433 // (STNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3412 21434 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21435 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21436 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21437 {AliasPatternCond::K_Reg, AArch64::XZR}, 21438 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21439 // (STNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3417 21440 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21441 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21442 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21443 {AliasPatternCond::K_Imm, uint32_t(0)}, 21444 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21445 // (STNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3422 21446 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21447 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21448 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21449 {AliasPatternCond::K_Reg, AArch64::XZR}, 21450 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21451 // (STNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3427 21452 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21453 {AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID}, 21454 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21455 {AliasPatternCond::K_Reg, AArch64::XZR}, 21456 {AliasPatternCond::K_Feature, AArch64::FeatureSVE2}, 21457 // (STPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 3432 21458 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21459 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21460 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21461 {AliasPatternCond::K_Imm, uint32_t(0)}, 21462 // (STPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 3436 21463 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21464 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21465 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21466 {AliasPatternCond::K_Imm, uint32_t(0)}, 21467 // (STPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 3440 21468 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21469 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21470 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21471 {AliasPatternCond::K_Imm, uint32_t(0)}, 21472 // (STPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 3444 21473 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21474 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21475 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21476 {AliasPatternCond::K_Imm, uint32_t(0)}, 21477 // (STPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3448 21478 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21479 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21480 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21481 {AliasPatternCond::K_Imm, uint32_t(0)}, 21482 // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3452 21483 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21484 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21485 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21486 {AliasPatternCond::K_Imm, uint32_t(0)}, 21487 {AliasPatternCond::K_Imm, uint32_t(0)}, 21488 // (STRBBui GPR32z:$Rt, GPR64sp:$Rn, 0) - 3457 21489 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21490 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21491 {AliasPatternCond::K_Imm, uint32_t(0)}, 21492 // (STRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3460 21493 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 21494 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21495 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21496 {AliasPatternCond::K_Imm, uint32_t(0)}, 21497 {AliasPatternCond::K_Imm, uint32_t(0)}, 21498 // (STRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 3465 21499 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 21500 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21501 {AliasPatternCond::K_Imm, uint32_t(0)}, 21502 // (STRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3468 21503 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21504 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21505 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21506 {AliasPatternCond::K_Imm, uint32_t(0)}, 21507 {AliasPatternCond::K_Imm, uint32_t(0)}, 21508 // (STRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 3473 21509 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21510 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21511 {AliasPatternCond::K_Imm, uint32_t(0)}, 21512 // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3476 21513 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21514 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21515 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21516 {AliasPatternCond::K_Imm, uint32_t(0)}, 21517 {AliasPatternCond::K_Imm, uint32_t(0)}, 21518 // (STRHHui GPR32z:$Rt, GPR64sp:$Rn, 0) - 3481 21519 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21520 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21521 {AliasPatternCond::K_Imm, uint32_t(0)}, 21522 // (STRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3484 21523 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 21524 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21525 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21526 {AliasPatternCond::K_Imm, uint32_t(0)}, 21527 {AliasPatternCond::K_Imm, uint32_t(0)}, 21528 // (STRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 3489 21529 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 21530 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21531 {AliasPatternCond::K_Imm, uint32_t(0)}, 21532 // (STRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3492 21533 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21534 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21535 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21536 {AliasPatternCond::K_Imm, uint32_t(0)}, 21537 {AliasPatternCond::K_Imm, uint32_t(0)}, 21538 // (STRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 3497 21539 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21540 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21541 {AliasPatternCond::K_Imm, uint32_t(0)}, 21542 // (STRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3500 21543 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21544 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21545 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21546 {AliasPatternCond::K_Imm, uint32_t(0)}, 21547 {AliasPatternCond::K_Imm, uint32_t(0)}, 21548 // (STRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 3505 21549 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21550 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21551 {AliasPatternCond::K_Imm, uint32_t(0)}, 21552 // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3508 21553 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21554 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21555 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21556 {AliasPatternCond::K_Imm, uint32_t(0)}, 21557 {AliasPatternCond::K_Imm, uint32_t(0)}, 21558 // (STRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 3513 21559 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21560 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21561 {AliasPatternCond::K_Imm, uint32_t(0)}, 21562 // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3516 21563 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21564 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21565 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21566 {AliasPatternCond::K_Imm, uint32_t(0)}, 21567 {AliasPatternCond::K_Imm, uint32_t(0)}, 21568 // (STRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 3521 21569 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21570 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21571 {AliasPatternCond::K_Imm, uint32_t(0)}, 21572 // (STR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 3524 21573 {AliasPatternCond::K_RegClass, AArch64::PPRRegClassID}, 21574 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21575 {AliasPatternCond::K_Imm, uint32_t(0)}, 21576 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21577 // (STR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 3528 21578 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21579 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21580 {AliasPatternCond::K_Imm, uint32_t(0)}, 21581 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21582 // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 3532 21583 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21584 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21585 {AliasPatternCond::K_Imm, uint32_t(0)}, 21586 // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 3535 21587 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21588 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21589 {AliasPatternCond::K_Imm, uint32_t(0)}, 21590 // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3538 21591 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21592 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21593 {AliasPatternCond::K_Imm, uint32_t(0)}, 21594 // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3541 21595 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21596 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21597 {AliasPatternCond::K_Imm, uint32_t(0)}, 21598 // (STURBBi GPR32z:$Rt, GPR64sp:$Rn, 0) - 3544 21599 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21600 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21601 {AliasPatternCond::K_Imm, uint32_t(0)}, 21602 // (STURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 3547 21603 {AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID}, 21604 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21605 {AliasPatternCond::K_Imm, uint32_t(0)}, 21606 // (STURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 3550 21607 {AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID}, 21608 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21609 {AliasPatternCond::K_Imm, uint32_t(0)}, 21610 // (STURHHi GPR32z:$Rt, GPR64sp:$Rn, 0) - 3553 21611 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21612 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21613 {AliasPatternCond::K_Imm, uint32_t(0)}, 21614 // (STURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 3556 21615 {AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID}, 21616 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21617 {AliasPatternCond::K_Imm, uint32_t(0)}, 21618 // (STURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 3559 21619 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21620 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21621 {AliasPatternCond::K_Imm, uint32_t(0)}, 21622 // (STURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 3562 21623 {AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID}, 21624 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21625 {AliasPatternCond::K_Imm, uint32_t(0)}, 21626 // (STURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 3565 21627 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21628 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21629 {AliasPatternCond::K_Imm, uint32_t(0)}, 21630 // (STURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 3568 21631 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21632 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21633 {AliasPatternCond::K_Imm, uint32_t(0)}, 21634 // (STZ2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3571 21635 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21636 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21637 {AliasPatternCond::K_Imm, uint32_t(0)}, 21638 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 21639 // (STZGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3575 21640 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21641 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21642 {AliasPatternCond::K_Imm, uint32_t(0)}, 21643 {AliasPatternCond::K_Feature, AArch64::FeatureMTE}, 21644 // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 3579 21645 {AliasPatternCond::K_Reg, AArch64::WZR}, 21646 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 21647 // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 3581 21648 {AliasPatternCond::K_Reg, AArch64::WZR}, 21649 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21650 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21651 {AliasPatternCond::K_Imm, uint32_t(0)}, 21652 // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 3585 21653 {AliasPatternCond::K_Reg, AArch64::WZR}, 21654 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21655 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21656 // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) - 3588 21657 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21658 {AliasPatternCond::K_Reg, AArch64::WZR}, 21659 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21660 {AliasPatternCond::K_Imm, uint32_t(0)}, 21661 // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 3592 21662 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21663 {AliasPatternCond::K_Reg, AArch64::WZR}, 21664 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21665 // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 3595 21666 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21667 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21668 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21669 {AliasPatternCond::K_Imm, uint32_t(0)}, 21670 // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 3599 21671 {AliasPatternCond::K_Reg, AArch64::WZR}, 21672 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 21673 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21674 {AliasPatternCond::K_Imm, uint32_t(16)}, 21675 // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 3603 21676 {AliasPatternCond::K_Reg, AArch64::WZR}, 21677 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 21678 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21679 // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 3606 21680 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21681 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 21682 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21683 {AliasPatternCond::K_Imm, uint32_t(16)}, 21684 // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 3610 21685 {AliasPatternCond::K_Reg, AArch64::XZR}, 21686 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21687 // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 3612 21688 {AliasPatternCond::K_Reg, AArch64::XZR}, 21689 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21690 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21691 {AliasPatternCond::K_Imm, uint32_t(0)}, 21692 // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 3616 21693 {AliasPatternCond::K_Reg, AArch64::XZR}, 21694 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21695 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21696 // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) - 3619 21697 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21698 {AliasPatternCond::K_Reg, AArch64::XZR}, 21699 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21700 {AliasPatternCond::K_Imm, uint32_t(0)}, 21701 // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 3623 21702 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21703 {AliasPatternCond::K_Reg, AArch64::XZR}, 21704 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21705 // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 3626 21706 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21707 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21708 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21709 {AliasPatternCond::K_Imm, uint32_t(0)}, 21710 // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 3630 21711 {AliasPatternCond::K_Reg, AArch64::XZR}, 21712 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21713 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21714 // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 3633 21715 {AliasPatternCond::K_Reg, AArch64::XZR}, 21716 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 21717 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21718 {AliasPatternCond::K_Imm, uint32_t(24)}, 21719 // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 3637 21720 {AliasPatternCond::K_Reg, AArch64::XZR}, 21721 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21722 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21723 // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 3640 21724 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21725 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 21726 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21727 {AliasPatternCond::K_Imm, uint32_t(24)}, 21728 // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) - 3644 21729 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21730 {AliasPatternCond::K_Reg, AArch64::WZR}, 21731 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21732 {AliasPatternCond::K_Imm, uint32_t(0)}, 21733 // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 3648 21734 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21735 {AliasPatternCond::K_Reg, AArch64::WZR}, 21736 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21737 // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 3651 21738 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21739 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21740 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21741 {AliasPatternCond::K_Imm, uint32_t(0)}, 21742 // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 3655 21743 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 21744 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 21745 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21746 {AliasPatternCond::K_Imm, uint32_t(16)}, 21747 // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 3659 21748 {AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID}, 21749 {AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID}, 21750 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21751 {AliasPatternCond::K_Imm, uint32_t(16)}, 21752 // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) - 3663 21753 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21754 {AliasPatternCond::K_Reg, AArch64::XZR}, 21755 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21756 {AliasPatternCond::K_Imm, uint32_t(0)}, 21757 // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 3667 21758 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21759 {AliasPatternCond::K_Reg, AArch64::XZR}, 21760 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21761 // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 3670 21762 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21763 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21764 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21765 {AliasPatternCond::K_Imm, uint32_t(0)}, 21766 // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 3674 21767 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 21768 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21769 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21770 {AliasPatternCond::K_Imm, uint32_t(24)}, 21771 // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 3678 21772 {AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID}, 21773 {AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID}, 21774 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21775 {AliasPatternCond::K_Imm, uint32_t(24)}, 21776 // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) - 3682 21777 {AliasPatternCond::K_Ignore, 0}, 21778 {AliasPatternCond::K_Ignore, 0}, 21779 {AliasPatternCond::K_Ignore, 0}, 21780 {AliasPatternCond::K_Ignore, 0}, 21781 {AliasPatternCond::K_Reg, AArch64::XZR}, 21782 // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 3687 21783 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21784 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21785 {AliasPatternCond::K_Ignore, 0}, 21786 {AliasPatternCond::K_Imm, uint32_t(31)}, 21787 // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 3691 21788 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21789 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21790 {AliasPatternCond::K_Imm, uint32_t(0)}, 21791 {AliasPatternCond::K_Imm, uint32_t(7)}, 21792 // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 3695 21793 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21794 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21795 {AliasPatternCond::K_Imm, uint32_t(0)}, 21796 {AliasPatternCond::K_Imm, uint32_t(15)}, 21797 // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 3699 21798 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21799 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21800 {AliasPatternCond::K_Ignore, 0}, 21801 {AliasPatternCond::K_Imm, uint32_t(63)}, 21802 // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 3703 21803 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21804 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21805 {AliasPatternCond::K_Imm, uint32_t(0)}, 21806 {AliasPatternCond::K_Imm, uint32_t(7)}, 21807 // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 3707 21808 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21809 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21810 {AliasPatternCond::K_Imm, uint32_t(0)}, 21811 {AliasPatternCond::K_Imm, uint32_t(15)}, 21812 // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 3711 21813 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21814 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21815 {AliasPatternCond::K_Imm, uint32_t(0)}, 21816 {AliasPatternCond::K_Imm, uint32_t(31)}, 21817 // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3715 21818 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21819 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21820 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21821 {AliasPatternCond::K_Reg, AArch64::XZR}, 21822 // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) - 3719 21823 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21824 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21825 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21826 // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) - 3722 21827 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21828 {AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID}, 21829 {AliasPatternCond::K_Feature, AArch64::FeatureNEON}, 21830 // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3725 21831 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21832 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21833 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21834 {AliasPatternCond::K_Reg, AArch64::XZR}, 21835 // (UQDECB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3729 21836 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21837 {AliasPatternCond::K_Ignore, 0}, 21838 {AliasPatternCond::K_Imm, uint32_t(31)}, 21839 {AliasPatternCond::K_Imm, uint32_t(1)}, 21840 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21841 // (UQDECB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3734 21842 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21843 {AliasPatternCond::K_Ignore, 0}, 21844 {AliasPatternCond::K_Ignore, 0}, 21845 {AliasPatternCond::K_Imm, uint32_t(1)}, 21846 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21847 // (UQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3739 21848 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21849 {AliasPatternCond::K_Ignore, 0}, 21850 {AliasPatternCond::K_Imm, uint32_t(31)}, 21851 {AliasPatternCond::K_Imm, uint32_t(1)}, 21852 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21853 // (UQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3744 21854 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21855 {AliasPatternCond::K_Ignore, 0}, 21856 {AliasPatternCond::K_Ignore, 0}, 21857 {AliasPatternCond::K_Imm, uint32_t(1)}, 21858 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21859 // (UQDECD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3749 21860 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21861 {AliasPatternCond::K_Ignore, 0}, 21862 {AliasPatternCond::K_Imm, uint32_t(31)}, 21863 {AliasPatternCond::K_Imm, uint32_t(1)}, 21864 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21865 // (UQDECD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3754 21866 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21867 {AliasPatternCond::K_Ignore, 0}, 21868 {AliasPatternCond::K_Ignore, 0}, 21869 {AliasPatternCond::K_Imm, uint32_t(1)}, 21870 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21871 // (UQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3759 21872 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21873 {AliasPatternCond::K_Ignore, 0}, 21874 {AliasPatternCond::K_Imm, uint32_t(31)}, 21875 {AliasPatternCond::K_Imm, uint32_t(1)}, 21876 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21877 // (UQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3764 21878 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21879 {AliasPatternCond::K_Ignore, 0}, 21880 {AliasPatternCond::K_Ignore, 0}, 21881 {AliasPatternCond::K_Imm, uint32_t(1)}, 21882 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21883 // (UQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3769 21884 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21885 {AliasPatternCond::K_Ignore, 0}, 21886 {AliasPatternCond::K_Imm, uint32_t(31)}, 21887 {AliasPatternCond::K_Imm, uint32_t(1)}, 21888 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21889 // (UQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3774 21890 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21891 {AliasPatternCond::K_Ignore, 0}, 21892 {AliasPatternCond::K_Ignore, 0}, 21893 {AliasPatternCond::K_Imm, uint32_t(1)}, 21894 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21895 // (UQDECH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3779 21896 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21897 {AliasPatternCond::K_Ignore, 0}, 21898 {AliasPatternCond::K_Imm, uint32_t(31)}, 21899 {AliasPatternCond::K_Imm, uint32_t(1)}, 21900 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21901 // (UQDECH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3784 21902 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21903 {AliasPatternCond::K_Ignore, 0}, 21904 {AliasPatternCond::K_Ignore, 0}, 21905 {AliasPatternCond::K_Imm, uint32_t(1)}, 21906 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21907 // (UQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3789 21908 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21909 {AliasPatternCond::K_Ignore, 0}, 21910 {AliasPatternCond::K_Imm, uint32_t(31)}, 21911 {AliasPatternCond::K_Imm, uint32_t(1)}, 21912 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21913 // (UQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3794 21914 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21915 {AliasPatternCond::K_Ignore, 0}, 21916 {AliasPatternCond::K_Ignore, 0}, 21917 {AliasPatternCond::K_Imm, uint32_t(1)}, 21918 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21919 // (UQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3799 21920 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21921 {AliasPatternCond::K_Ignore, 0}, 21922 {AliasPatternCond::K_Imm, uint32_t(31)}, 21923 {AliasPatternCond::K_Imm, uint32_t(1)}, 21924 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21925 // (UQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3804 21926 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21927 {AliasPatternCond::K_Ignore, 0}, 21928 {AliasPatternCond::K_Ignore, 0}, 21929 {AliasPatternCond::K_Imm, uint32_t(1)}, 21930 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21931 // (UQDECW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3809 21932 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21933 {AliasPatternCond::K_Ignore, 0}, 21934 {AliasPatternCond::K_Imm, uint32_t(31)}, 21935 {AliasPatternCond::K_Imm, uint32_t(1)}, 21936 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21937 // (UQDECW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3814 21938 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21939 {AliasPatternCond::K_Ignore, 0}, 21940 {AliasPatternCond::K_Ignore, 0}, 21941 {AliasPatternCond::K_Imm, uint32_t(1)}, 21942 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21943 // (UQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3819 21944 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21945 {AliasPatternCond::K_Ignore, 0}, 21946 {AliasPatternCond::K_Imm, uint32_t(31)}, 21947 {AliasPatternCond::K_Imm, uint32_t(1)}, 21948 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21949 // (UQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3824 21950 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21951 {AliasPatternCond::K_Ignore, 0}, 21952 {AliasPatternCond::K_Ignore, 0}, 21953 {AliasPatternCond::K_Imm, uint32_t(1)}, 21954 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21955 // (UQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3829 21956 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21957 {AliasPatternCond::K_Ignore, 0}, 21958 {AliasPatternCond::K_Imm, uint32_t(31)}, 21959 {AliasPatternCond::K_Imm, uint32_t(1)}, 21960 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21961 // (UQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3834 21962 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 21963 {AliasPatternCond::K_Ignore, 0}, 21964 {AliasPatternCond::K_Ignore, 0}, 21965 {AliasPatternCond::K_Imm, uint32_t(1)}, 21966 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21967 // (UQINCB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3839 21968 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21969 {AliasPatternCond::K_Ignore, 0}, 21970 {AliasPatternCond::K_Imm, uint32_t(31)}, 21971 {AliasPatternCond::K_Imm, uint32_t(1)}, 21972 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21973 // (UQINCB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3844 21974 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21975 {AliasPatternCond::K_Ignore, 0}, 21976 {AliasPatternCond::K_Ignore, 0}, 21977 {AliasPatternCond::K_Imm, uint32_t(1)}, 21978 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21979 // (UQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3849 21980 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21981 {AliasPatternCond::K_Ignore, 0}, 21982 {AliasPatternCond::K_Imm, uint32_t(31)}, 21983 {AliasPatternCond::K_Imm, uint32_t(1)}, 21984 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21985 // (UQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3854 21986 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 21987 {AliasPatternCond::K_Ignore, 0}, 21988 {AliasPatternCond::K_Ignore, 0}, 21989 {AliasPatternCond::K_Imm, uint32_t(1)}, 21990 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21991 // (UQINCD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3859 21992 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21993 {AliasPatternCond::K_Ignore, 0}, 21994 {AliasPatternCond::K_Imm, uint32_t(31)}, 21995 {AliasPatternCond::K_Imm, uint32_t(1)}, 21996 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 21997 // (UQINCD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3864 21998 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 21999 {AliasPatternCond::K_Ignore, 0}, 22000 {AliasPatternCond::K_Ignore, 0}, 22001 {AliasPatternCond::K_Imm, uint32_t(1)}, 22002 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22003 // (UQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3869 22004 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22005 {AliasPatternCond::K_Ignore, 0}, 22006 {AliasPatternCond::K_Imm, uint32_t(31)}, 22007 {AliasPatternCond::K_Imm, uint32_t(1)}, 22008 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22009 // (UQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3874 22010 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22011 {AliasPatternCond::K_Ignore, 0}, 22012 {AliasPatternCond::K_Ignore, 0}, 22013 {AliasPatternCond::K_Imm, uint32_t(1)}, 22014 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22015 // (UQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3879 22016 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22017 {AliasPatternCond::K_Ignore, 0}, 22018 {AliasPatternCond::K_Imm, uint32_t(31)}, 22019 {AliasPatternCond::K_Imm, uint32_t(1)}, 22020 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22021 // (UQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3884 22022 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22023 {AliasPatternCond::K_Ignore, 0}, 22024 {AliasPatternCond::K_Ignore, 0}, 22025 {AliasPatternCond::K_Imm, uint32_t(1)}, 22026 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22027 // (UQINCH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3889 22028 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 22029 {AliasPatternCond::K_Ignore, 0}, 22030 {AliasPatternCond::K_Imm, uint32_t(31)}, 22031 {AliasPatternCond::K_Imm, uint32_t(1)}, 22032 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22033 // (UQINCH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3894 22034 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 22035 {AliasPatternCond::K_Ignore, 0}, 22036 {AliasPatternCond::K_Ignore, 0}, 22037 {AliasPatternCond::K_Imm, uint32_t(1)}, 22038 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22039 // (UQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3899 22040 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22041 {AliasPatternCond::K_Ignore, 0}, 22042 {AliasPatternCond::K_Imm, uint32_t(31)}, 22043 {AliasPatternCond::K_Imm, uint32_t(1)}, 22044 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22045 // (UQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3904 22046 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22047 {AliasPatternCond::K_Ignore, 0}, 22048 {AliasPatternCond::K_Ignore, 0}, 22049 {AliasPatternCond::K_Imm, uint32_t(1)}, 22050 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22051 // (UQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3909 22052 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22053 {AliasPatternCond::K_Ignore, 0}, 22054 {AliasPatternCond::K_Imm, uint32_t(31)}, 22055 {AliasPatternCond::K_Imm, uint32_t(1)}, 22056 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22057 // (UQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3914 22058 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22059 {AliasPatternCond::K_Ignore, 0}, 22060 {AliasPatternCond::K_Ignore, 0}, 22061 {AliasPatternCond::K_Imm, uint32_t(1)}, 22062 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22063 // (UQINCW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3919 22064 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 22065 {AliasPatternCond::K_Ignore, 0}, 22066 {AliasPatternCond::K_Imm, uint32_t(31)}, 22067 {AliasPatternCond::K_Imm, uint32_t(1)}, 22068 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22069 // (UQINCW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 3924 22070 {AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID}, 22071 {AliasPatternCond::K_Ignore, 0}, 22072 {AliasPatternCond::K_Ignore, 0}, 22073 {AliasPatternCond::K_Imm, uint32_t(1)}, 22074 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22075 // (UQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3929 22076 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22077 {AliasPatternCond::K_Ignore, 0}, 22078 {AliasPatternCond::K_Imm, uint32_t(31)}, 22079 {AliasPatternCond::K_Imm, uint32_t(1)}, 22080 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22081 // (UQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3934 22082 {AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID}, 22083 {AliasPatternCond::K_Ignore, 0}, 22084 {AliasPatternCond::K_Ignore, 0}, 22085 {AliasPatternCond::K_Imm, uint32_t(1)}, 22086 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22087 // (UQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3939 22088 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22089 {AliasPatternCond::K_Ignore, 0}, 22090 {AliasPatternCond::K_Imm, uint32_t(31)}, 22091 {AliasPatternCond::K_Imm, uint32_t(1)}, 22092 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22093 // (UQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3944 22094 {AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID}, 22095 {AliasPatternCond::K_Ignore, 0}, 22096 {AliasPatternCond::K_Ignore, 0}, 22097 {AliasPatternCond::K_Imm, uint32_t(1)}, 22098 {AliasPatternCond::K_Feature, AArch64::FeatureSVE}, 22099 // (XPACLRI) - 3949 22100 {AliasPatternCond::K_Feature, AArch64::FeaturePA}, 22101 }; 22102 22103 static const char AsmStrings[] = 22104 /* 0 */ "cmn $\x02, $\xFF\x03\x01\0" 22105 /* 13 */ "cmn $\x02, $\x03\0" 22106 /* 24 */ "cmn $\x02, $\x03$\xFF\x04\x02\0" 22107 /* 39 */ "adds $\x01, $\x02, $\x03\0" 22108 /* 55 */ "cmn $\x02, $\x03$\xFF\x04\x03\0" 22109 /* 70 */ "mov $\x01, $\x02\0" 22110 /* 81 */ "add $\x01, $\x02, $\x03\0" 22111 /* 96 */ "tst $\x02, $\xFF\x03\x04\0" 22112 /* 109 */ "tst $\x02, $\x03\0" 22113 /* 120 */ "tst $\x02, $\x03$\xFF\x04\x02\0" 22114 /* 135 */ "ands $\x01, $\x02, $\x03\0" 22115 /* 151 */ "tst $\x02, $\xFF\x03\x05\0" 22116 /* 164 */ "movs $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" 22117 /* 188 */ "and $\x01, $\x02, $\x03\0" 22118 /* 203 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" 22119 /* 226 */ "and $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" 22120 /* 247 */ "and $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" 22121 /* 268 */ "and $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" 22122 /* 289 */ "autia1716\0" 22123 /* 299 */ "autiasp\0" 22124 /* 307 */ "autiaz\0" 22125 /* 314 */ "autib1716\0" 22126 /* 324 */ "autibsp\0" 22127 /* 332 */ "autibz\0" 22128 /* 339 */ "bics $\x01, $\x02, $\x03\0" 22129 /* 355 */ "bic $\x01, $\x02, $\x03\0" 22130 /* 370 */ "clrex\0" 22131 /* 376 */ "cntb $\x01\0" 22132 /* 384 */ "cntb $\x01, $\xFF\x02\x0E\0" 22133 /* 398 */ "cntd $\x01\0" 22134 /* 406 */ "cntd $\x01, $\xFF\x02\x0E\0" 22135 /* 420 */ "cnth $\x01\0" 22136 /* 428 */ "cnth $\x01, $\xFF\x02\x0E\0" 22137 /* 442 */ "cntw $\x01\0" 22138 /* 450 */ "cntw $\x01, $\xFF\x02\x0E\0" 22139 /* 464 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x0F\0" 22140 /* 487 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x11\0" 22141 /* 510 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x12\0" 22142 /* 533 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x13\0" 22143 /* 556 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\x04\0" 22144 /* 577 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\x04\0" 22145 /* 598 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\x04\0" 22146 /* 619 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\x04\0" 22147 /* 640 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x0F\0" 22148 /* 663 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/z, $\xFF\x03\x11\0" 22149 /* 686 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/z, $\xFF\x03\x12\0" 22150 /* 709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/z, $\xFF\x03\x13\0" 22151 /* 732 */ "cset $\x01, $\xFF\x04\x14\0" 22152 /* 746 */ "cinc $\x01, $\x02, $\xFF\x04\x14\0" 22153 /* 764 */ "csetm $\x01, $\xFF\x04\x14\0" 22154 /* 779 */ "cinv $\x01, $\x02, $\xFF\x04\x14\0" 22155 /* 797 */ "cneg $\x01, $\x02, $\xFF\x04\x14\0" 22156 /* 815 */ "dcps1\0" 22157 /* 821 */ "dcps2\0" 22158 /* 827 */ "dcps3\0" 22159 /* 833 */ "decb $\x01\0" 22160 /* 841 */ "decb $\x01, $\xFF\x03\x0E\0" 22161 /* 855 */ "decd $\x01\0" 22162 /* 863 */ "decd $\x01, $\xFF\x03\x0E\0" 22163 /* 877 */ "decd $\xFF\x01\x10\0" 22164 /* 887 */ "decd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22165 /* 903 */ "dech $\x01\0" 22166 /* 911 */ "dech $\x01, $\xFF\x03\x0E\0" 22167 /* 925 */ "dech $\xFF\x01\x09\0" 22168 /* 935 */ "dech $\xFF\x01\x09, $\xFF\x03\x0E\0" 22169 /* 951 */ "decw $\x01\0" 22170 /* 959 */ "decw $\x01, $\xFF\x03\x0E\0" 22171 /* 973 */ "decw $\xFF\x01\x0B\0" 22172 /* 983 */ "decw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22173 /* 999 */ "ssbb\0" 22174 /* 1004 */ "pssbb\0" 22175 /* 1010 */ "mov $\xFF\x01\x09, $\xFF\x02\x15\0" 22176 /* 1025 */ "mov $\xFF\x01\x0B, $\xFF\x02\x16\0" 22177 /* 1040 */ "mov $\xFF\x01\x10, $\xFF\x02\x17\0" 22178 /* 1055 */ "dupm $\xFF\x01\x06, $\xFF\x02\x08\0" 22179 /* 1071 */ "dupm $\xFF\x01\x09, $\xFF\x02\x0A\0" 22180 /* 1087 */ "dupm $\xFF\x01\x0B, $\xFF\x02\x04\0" 22181 /* 1103 */ "mov $\xFF\x01\x06, $\xFF\x02\x0F\0" 22182 /* 1118 */ "mov $\xFF\x01\x10, $\xFF\x02\x11\0" 22183 /* 1133 */ "fmov $\xFF\x01\x10, #0.0\0" 22184 /* 1149 */ "mov $\xFF\x01\x09, $\xFF\x02\x12\0" 22185 /* 1164 */ "fmov $\xFF\x01\x09, #0.0\0" 22186 /* 1180 */ "mov $\xFF\x01\x0B, $\xFF\x02\x13\0" 22187 /* 1195 */ "fmov $\xFF\x01\x0B, #0.0\0" 22188 /* 1211 */ "mov $\xFF\x01\x06, $\x02\0" 22189 /* 1224 */ "mov $\xFF\x01\x10, $\x02\0" 22190 /* 1237 */ "mov $\xFF\x01\x09, $\x02\0" 22191 /* 1250 */ "mov $\xFF\x01\x0B, $\x02\0" 22192 /* 1263 */ "mov $\xFF\x01\x06, $\xFF\x02\x18\0" 22193 /* 1278 */ "mov $\xFF\x01\x06, $\xFF\x02\x06$\xFF\x03\x19\0" 22194 /* 1297 */ "mov $\xFF\x01\x10, $\xFF\x02\x1A\0" 22195 /* 1312 */ "mov $\xFF\x01\x10, $\xFF\x02\x10$\xFF\x03\x19\0" 22196 /* 1331 */ "mov $\xFF\x01\x09, $\xFF\x02\x1B\0" 22197 /* 1346 */ "mov $\xFF\x01\x09, $\xFF\x02\x09$\xFF\x03\x19\0" 22198 /* 1365 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1D\0" 22199 /* 1380 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1C$\xFF\x03\x19\0" 22200 /* 1399 */ "mov $\xFF\x01\x0B, $\xFF\x02\x1E\0" 22201 /* 1414 */ "mov $\xFF\x01\x0B, $\xFF\x02\x0B$\xFF\x03\x19\0" 22202 /* 1433 */ "eon $\x01, $\x02, $\x03\0" 22203 /* 1448 */ "nots $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" 22204 /* 1472 */ "eor $\x01, $\x02, $\x03\0" 22205 /* 1487 */ "not $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" 22206 /* 1510 */ "eor $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" 22207 /* 1531 */ "eor $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" 22208 /* 1552 */ "eor $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" 22209 /* 1573 */ "ror $\x01, $\x02, $\x04\0" 22210 /* 1588 */ "fmov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x1F\0" 22211 /* 1612 */ "fmov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x1F\0" 22212 /* 1636 */ "fmov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x1F\0" 22213 /* 1660 */ "fmov $\xFF\x01\x10, $\xFF\x02\x1F\0" 22214 /* 1676 */ "fmov $\xFF\x01\x09, $\xFF\x02\x1F\0" 22215 /* 1692 */ "fmov $\xFF\x01\x0B, $\xFF\x02\x1F\0" 22216 /* 1708 */ "ld1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22217 /* 1734 */ "ld1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22218 /* 1760 */ "ld1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22219 /* 1786 */ "ld1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22220 /* 1812 */ "ld1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22221 /* 1838 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22222 /* 1865 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22223 /* 1892 */ "ld1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22224 /* 1919 */ "ld1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22225 /* 1946 */ "ld1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22226 /* 1973 */ "ld1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22227 /* 1999 */ "ld1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22228 /* 2025 */ "ldff1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22229 /* 2053 */ "ldff1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22230 /* 2081 */ "ldff1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22231 /* 2109 */ "ldff1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22232 /* 2137 */ "ldff1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22233 /* 2165 */ "ldff1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22234 /* 2194 */ "ldff1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22235 /* 2223 */ "ldff1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22236 /* 2252 */ "ldff1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22237 /* 2281 */ "ldff1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22238 /* 2310 */ "ldff1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22239 /* 2338 */ "ldff1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22240 /* 2366 */ "nop\0" 22241 /* 2370 */ "yield\0" 22242 /* 2376 */ "wfe\0" 22243 /* 2380 */ "wfi\0" 22244 /* 2384 */ "sev\0" 22245 /* 2388 */ "sevl\0" 22246 /* 2393 */ "esb\0" 22247 /* 2397 */ "csdb\0" 22248 /* 2402 */ "bti\0" 22249 /* 2406 */ "bti $\xFF\x01\x22\0" 22250 /* 2415 */ "psb $\xFF\x01\x23\0" 22251 /* 2424 */ "incb $\x01\0" 22252 /* 2432 */ "incb $\x01, $\xFF\x03\x0E\0" 22253 /* 2446 */ "incd $\x01\0" 22254 /* 2454 */ "incd $\x01, $\xFF\x03\x0E\0" 22255 /* 2468 */ "incd $\xFF\x01\x10\0" 22256 /* 2478 */ "incd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22257 /* 2494 */ "inch $\x01\0" 22258 /* 2502 */ "inch $\x01, $\xFF\x03\x0E\0" 22259 /* 2516 */ "inch $\xFF\x01\x09\0" 22260 /* 2526 */ "inch $\xFF\x01\x09, $\xFF\x03\x0E\0" 22261 /* 2542 */ "incw $\x01\0" 22262 /* 2550 */ "incw $\x01, $\xFF\x03\x0E\0" 22263 /* 2564 */ "incw $\xFF\x01\x0B\0" 22264 /* 2574 */ "incw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22265 /* 2590 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\x04\0" 22266 /* 2609 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\xFF\x04\x0C.h$\xFF\x05\x19\0" 22267 /* 2636 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\x04\0" 22268 /* 2655 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\xFF\x04\x0C.s$\xFF\x05\x19\0" 22269 /* 2682 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\x04\0" 22270 /* 2701 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\xFF\x04\x0C.d$\xFF\x05\x19\0" 22271 /* 2728 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\x04\0" 22272 /* 2747 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\xFF\x04\x0C.b$\xFF\x05\x19\0" 22273 /* 2774 */ "irg $\x01, $\x02\0" 22274 /* 2785 */ "isb\0" 22275 /* 2789 */ "ld1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22276 /* 2813 */ "ld1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22277 /* 2837 */ "ld1b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22278 /* 2861 */ "ld1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22279 /* 2885 */ "ld1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22280 /* 2909 */ "ld1 $\xFF\x02\x26, [$\x01], #64\0" 22281 /* 2929 */ "ld1 $\xFF\x02\x27, [$\x01], #32\0" 22282 /* 2949 */ "ld1 $\xFF\x02\x28, [$\x01], #64\0" 22283 /* 2969 */ "ld1 $\xFF\x02\x29, [$\x01], #32\0" 22284 /* 2989 */ "ld1 $\xFF\x02\x2A, [$\x01], #32\0" 22285 /* 3009 */ "ld1 $\xFF\x02\x2B, [$\x01], #64\0" 22286 /* 3029 */ "ld1 $\xFF\x02\x2C, [$\x01], #32\0" 22287 /* 3049 */ "ld1 $\xFF\x02\x2D, [$\x01], #64\0" 22288 /* 3069 */ "ld1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22289 /* 3093 */ "ld1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22290 /* 3117 */ "ld1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22291 /* 3141 */ "ld1 $\xFF\x02\x26, [$\x01], #16\0" 22292 /* 3161 */ "ld1 $\xFF\x02\x27, [$\x01], #8\0" 22293 /* 3180 */ "ld1 $\xFF\x02\x28, [$\x01], #16\0" 22294 /* 3200 */ "ld1 $\xFF\x02\x29, [$\x01], #8\0" 22295 /* 3219 */ "ld1 $\xFF\x02\x2A, [$\x01], #8\0" 22296 /* 3238 */ "ld1 $\xFF\x02\x2B, [$\x01], #16\0" 22297 /* 3258 */ "ld1 $\xFF\x02\x2C, [$\x01], #8\0" 22298 /* 3277 */ "ld1 $\xFF\x02\x2D, [$\x01], #16\0" 22299 /* 3297 */ "ld1rb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22300 /* 3322 */ "ld1rb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22301 /* 3347 */ "ld1rb $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22302 /* 3372 */ "ld1rb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22303 /* 3397 */ "ld1rd $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22304 /* 3422 */ "ld1rh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22305 /* 3447 */ "ld1rh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22306 /* 3472 */ "ld1rh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22307 /* 3497 */ "ld1rqb $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22308 /* 3523 */ "ld1rqd $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22309 /* 3549 */ "ld1rqh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22310 /* 3575 */ "ld1rqw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22311 /* 3601 */ "ld1rsb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22312 /* 3627 */ "ld1rsb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22313 /* 3653 */ "ld1rsb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22314 /* 3679 */ "ld1rsh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22315 /* 3705 */ "ld1rsh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22316 /* 3731 */ "ld1rsw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22317 /* 3757 */ "ld1rw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22318 /* 3782 */ "ld1rw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22319 /* 3807 */ "ld1r $\xFF\x02\x26, [$\x01], #1\0" 22320 /* 3827 */ "ld1r $\xFF\x02\x27, [$\x01], #8\0" 22321 /* 3847 */ "ld1r $\xFF\x02\x28, [$\x01], #8\0" 22322 /* 3867 */ "ld1r $\xFF\x02\x29, [$\x01], #4\0" 22323 /* 3887 */ "ld1r $\xFF\x02\x2A, [$\x01], #2\0" 22324 /* 3907 */ "ld1r $\xFF\x02\x2B, [$\x01], #4\0" 22325 /* 3927 */ "ld1r $\xFF\x02\x2C, [$\x01], #1\0" 22326 /* 3947 */ "ld1r $\xFF\x02\x2D, [$\x01], #2\0" 22327 /* 3967 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22328 /* 3992 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22329 /* 4017 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22330 /* 4042 */ "ld1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22331 /* 4067 */ "ld1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22332 /* 4092 */ "ld1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22333 /* 4117 */ "ld1 $\xFF\x02\x26, [$\x01], #48\0" 22334 /* 4137 */ "ld1 $\xFF\x02\x27, [$\x01], #24\0" 22335 /* 4157 */ "ld1 $\xFF\x02\x28, [$\x01], #48\0" 22336 /* 4177 */ "ld1 $\xFF\x02\x29, [$\x01], #24\0" 22337 /* 4197 */ "ld1 $\xFF\x02\x2A, [$\x01], #24\0" 22338 /* 4217 */ "ld1 $\xFF\x02\x2B, [$\x01], #48\0" 22339 /* 4237 */ "ld1 $\xFF\x02\x2C, [$\x01], #24\0" 22340 /* 4257 */ "ld1 $\xFF\x02\x2D, [$\x01], #48\0" 22341 /* 4277 */ "ld1 $\xFF\x02\x26, [$\x01], #32\0" 22342 /* 4297 */ "ld1 $\xFF\x02\x27, [$\x01], #16\0" 22343 /* 4317 */ "ld1 $\xFF\x02\x28, [$\x01], #32\0" 22344 /* 4337 */ "ld1 $\xFF\x02\x29, [$\x01], #16\0" 22345 /* 4357 */ "ld1 $\xFF\x02\x2A, [$\x01], #16\0" 22346 /* 4377 */ "ld1 $\xFF\x02\x2B, [$\x01], #32\0" 22347 /* 4397 */ "ld1 $\xFF\x02\x2C, [$\x01], #16\0" 22348 /* 4417 */ "ld1 $\xFF\x02\x2D, [$\x01], #32\0" 22349 /* 4437 */ "ld1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22350 /* 4461 */ "ld1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22351 /* 4485 */ "ld1 $\xFF\x02\x2E$\xFF\x04\x19, [$\x01], #2\0" 22352 /* 4508 */ "ld1 $\xFF\x02\x2F$\xFF\x04\x19, [$\x01], #4\0" 22353 /* 4531 */ "ld1 $\xFF\x02\x30$\xFF\x04\x19, [$\x01], #8\0" 22354 /* 4554 */ "ld1 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #1\0" 22355 /* 4577 */ "ld2b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22356 /* 4601 */ "ld2d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22357 /* 4625 */ "ld2h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22358 /* 4649 */ "ld2r $\xFF\x02\x26, [$\x01], #2\0" 22359 /* 4669 */ "ld2r $\xFF\x02\x27, [$\x01], #16\0" 22360 /* 4690 */ "ld2r $\xFF\x02\x28, [$\x01], #16\0" 22361 /* 4711 */ "ld2r $\xFF\x02\x29, [$\x01], #8\0" 22362 /* 4731 */ "ld2r $\xFF\x02\x2A, [$\x01], #4\0" 22363 /* 4751 */ "ld2r $\xFF\x02\x2B, [$\x01], #8\0" 22364 /* 4771 */ "ld2r $\xFF\x02\x2C, [$\x01], #2\0" 22365 /* 4791 */ "ld2r $\xFF\x02\x2D, [$\x01], #4\0" 22366 /* 4811 */ "ld2 $\xFF\x02\x26, [$\x01], #32\0" 22367 /* 4831 */ "ld2 $\xFF\x02\x28, [$\x01], #32\0" 22368 /* 4851 */ "ld2 $\xFF\x02\x29, [$\x01], #16\0" 22369 /* 4871 */ "ld2 $\xFF\x02\x2A, [$\x01], #16\0" 22370 /* 4891 */ "ld2 $\xFF\x02\x2B, [$\x01], #32\0" 22371 /* 4911 */ "ld2 $\xFF\x02\x2C, [$\x01], #16\0" 22372 /* 4931 */ "ld2 $\xFF\x02\x2D, [$\x01], #32\0" 22373 /* 4951 */ "ld2w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22374 /* 4975 */ "ld2 $\xFF\x02\x2E$\xFF\x04\x19, [$\x01], #4\0" 22375 /* 4998 */ "ld2 $\xFF\x02\x2F$\xFF\x04\x19, [$\x01], #8\0" 22376 /* 5021 */ "ld2 $\xFF\x02\x30$\xFF\x04\x19, [$\x01], #16\0" 22377 /* 5045 */ "ld2 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #2\0" 22378 /* 5068 */ "ld3b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22379 /* 5092 */ "ld3d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22380 /* 5116 */ "ld3h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22381 /* 5140 */ "ld3r $\xFF\x02\x26, [$\x01], #3\0" 22382 /* 5160 */ "ld3r $\xFF\x02\x27, [$\x01], #24\0" 22383 /* 5181 */ "ld3r $\xFF\x02\x28, [$\x01], #24\0" 22384 /* 5202 */ "ld3r $\xFF\x02\x29, [$\x01], #12\0" 22385 /* 5223 */ "ld3r $\xFF\x02\x2A, [$\x01], #6\0" 22386 /* 5243 */ "ld3r $\xFF\x02\x2B, [$\x01], #12\0" 22387 /* 5264 */ "ld3r $\xFF\x02\x2C, [$\x01], #3\0" 22388 /* 5284 */ "ld3r $\xFF\x02\x2D, [$\x01], #6\0" 22389 /* 5304 */ "ld3 $\xFF\x02\x26, [$\x01], #48\0" 22390 /* 5324 */ "ld3 $\xFF\x02\x28, [$\x01], #48\0" 22391 /* 5344 */ "ld3 $\xFF\x02\x29, [$\x01], #24\0" 22392 /* 5364 */ "ld3 $\xFF\x02\x2A, [$\x01], #24\0" 22393 /* 5384 */ "ld3 $\xFF\x02\x2B, [$\x01], #48\0" 22394 /* 5404 */ "ld3 $\xFF\x02\x2C, [$\x01], #24\0" 22395 /* 5424 */ "ld3 $\xFF\x02\x2D, [$\x01], #48\0" 22396 /* 5444 */ "ld3w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22397 /* 5468 */ "ld3 $\xFF\x02\x2E$\xFF\x04\x19, [$\x01], #6\0" 22398 /* 5491 */ "ld3 $\xFF\x02\x2F$\xFF\x04\x19, [$\x01], #12\0" 22399 /* 5515 */ "ld3 $\xFF\x02\x30$\xFF\x04\x19, [$\x01], #24\0" 22400 /* 5539 */ "ld3 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #3\0" 22401 /* 5562 */ "ld4b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22402 /* 5586 */ "ld4d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22403 /* 5610 */ "ld4 $\xFF\x02\x26, [$\x01], #64\0" 22404 /* 5630 */ "ld4 $\xFF\x02\x28, [$\x01], #64\0" 22405 /* 5650 */ "ld4 $\xFF\x02\x29, [$\x01], #32\0" 22406 /* 5670 */ "ld4 $\xFF\x02\x2A, [$\x01], #32\0" 22407 /* 5690 */ "ld4 $\xFF\x02\x2B, [$\x01], #64\0" 22408 /* 5710 */ "ld4 $\xFF\x02\x2C, [$\x01], #32\0" 22409 /* 5730 */ "ld4 $\xFF\x02\x2D, [$\x01], #64\0" 22410 /* 5750 */ "ld4h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22411 /* 5774 */ "ld4r $\xFF\x02\x26, [$\x01], #4\0" 22412 /* 5794 */ "ld4r $\xFF\x02\x27, [$\x01], #32\0" 22413 /* 5815 */ "ld4r $\xFF\x02\x28, [$\x01], #32\0" 22414 /* 5836 */ "ld4r $\xFF\x02\x29, [$\x01], #16\0" 22415 /* 5857 */ "ld4r $\xFF\x02\x2A, [$\x01], #8\0" 22416 /* 5877 */ "ld4r $\xFF\x02\x2B, [$\x01], #16\0" 22417 /* 5898 */ "ld4r $\xFF\x02\x2C, [$\x01], #4\0" 22418 /* 5918 */ "ld4r $\xFF\x02\x2D, [$\x01], #8\0" 22419 /* 5938 */ "ld4w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22420 /* 5962 */ "ld4 $\xFF\x02\x2E$\xFF\x04\x19, [$\x01], #8\0" 22421 /* 5985 */ "ld4 $\xFF\x02\x2F$\xFF\x04\x19, [$\x01], #16\0" 22422 /* 6009 */ "ld4 $\xFF\x02\x30$\xFF\x04\x19, [$\x01], #32\0" 22423 /* 6033 */ "ld4 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #4\0" 22424 /* 6056 */ "staddb $\x02, [$\x03]\0" 22425 /* 6072 */ "staddh $\x02, [$\x03]\0" 22426 /* 6088 */ "staddlb $\x02, [$\x03]\0" 22427 /* 6105 */ "staddlh $\x02, [$\x03]\0" 22428 /* 6122 */ "staddl $\x02, [$\x03]\0" 22429 /* 6138 */ "stadd $\x02, [$\x03]\0" 22430 /* 6153 */ "ldapurb $\x01, [$\x02]\0" 22431 /* 6170 */ "ldapurh $\x01, [$\x02]\0" 22432 /* 6187 */ "ldapursb $\x01, [$\x02]\0" 22433 /* 6205 */ "ldapursh $\x01, [$\x02]\0" 22434 /* 6223 */ "ldapursw $\x01, [$\x02]\0" 22435 /* 6241 */ "ldapur $\x01, [$\x02]\0" 22436 /* 6257 */ "stclrb $\x02, [$\x03]\0" 22437 /* 6273 */ "stclrh $\x02, [$\x03]\0" 22438 /* 6289 */ "stclrlb $\x02, [$\x03]\0" 22439 /* 6306 */ "stclrlh $\x02, [$\x03]\0" 22440 /* 6323 */ "stclrl $\x02, [$\x03]\0" 22441 /* 6339 */ "stclr $\x02, [$\x03]\0" 22442 /* 6354 */ "steorb $\x02, [$\x03]\0" 22443 /* 6370 */ "steorh $\x02, [$\x03]\0" 22444 /* 6386 */ "steorlb $\x02, [$\x03]\0" 22445 /* 6403 */ "steorlh $\x02, [$\x03]\0" 22446 /* 6420 */ "steorl $\x02, [$\x03]\0" 22447 /* 6436 */ "steor $\x02, [$\x03]\0" 22448 /* 6451 */ "ldff1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22449 /* 6477 */ "ldff1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22450 /* 6503 */ "ldff1b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22451 /* 6529 */ "ldff1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22452 /* 6555 */ "ldff1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22453 /* 6581 */ "ldff1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22454 /* 6607 */ "ldff1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22455 /* 6633 */ "ldff1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22456 /* 6659 */ "ldff1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22457 /* 6686 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22458 /* 6713 */ "ldff1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22459 /* 6740 */ "ldff1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22460 /* 6767 */ "ldff1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22461 /* 6794 */ "ldff1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22462 /* 6821 */ "ldff1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22463 /* 6847 */ "ldff1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22464 /* 6873 */ "ldg $\x01, [$\x03]\0" 22465 /* 6886 */ "ldnf1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22466 /* 6912 */ "ldnf1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22467 /* 6938 */ "ldnf1b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22468 /* 6964 */ "ldnf1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22469 /* 6990 */ "ldnf1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22470 /* 7016 */ "ldnf1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22471 /* 7042 */ "ldnf1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22472 /* 7068 */ "ldnf1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22473 /* 7094 */ "ldnf1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22474 /* 7121 */ "ldnf1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22475 /* 7148 */ "ldnf1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22476 /* 7175 */ "ldnf1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22477 /* 7202 */ "ldnf1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22478 /* 7229 */ "ldnf1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22479 /* 7256 */ "ldnf1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22480 /* 7282 */ "ldnf1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22481 /* 7308 */ "ldnp $\x01, $\x02, [$\x03]\0" 22482 /* 7326 */ "ldnt1b $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0" 22483 /* 7352 */ "ldnt1b $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22484 /* 7380 */ "ldnt1b $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22485 /* 7408 */ "ldnt1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22486 /* 7434 */ "ldnt1d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22487 /* 7462 */ "ldnt1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22488 /* 7488 */ "ldnt1h $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22489 /* 7516 */ "ldnt1h $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22490 /* 7544 */ "ldnt1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22491 /* 7573 */ "ldnt1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22492 /* 7602 */ "ldnt1sh $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22493 /* 7631 */ "ldnt1sh $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22494 /* 7660 */ "ldnt1sw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22495 /* 7689 */ "ldnt1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0" 22496 /* 7715 */ "ldnt1w $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" 22497 /* 7743 */ "ldnt1w $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" 22498 /* 7771 */ "ldp $\x01, $\x02, [$\x03]\0" 22499 /* 7788 */ "ldpsw $\x01, $\x02, [$\x03]\0" 22500 /* 7807 */ "ldraa $\x01, [$\x02]\0" 22501 /* 7822 */ "ldrab $\x01, [$\x02]\0" 22502 /* 7837 */ "ldrb $\x01, [$\x02, $\x03]\0" 22503 /* 7855 */ "ldrb $\x01, [$\x02]\0" 22504 /* 7869 */ "ldr $\x01, [$\x02, $\x03]\0" 22505 /* 7886 */ "ldr $\x01, [$\x02]\0" 22506 /* 7899 */ "ldrh $\x01, [$\x02, $\x03]\0" 22507 /* 7917 */ "ldrh $\x01, [$\x02]\0" 22508 /* 7931 */ "ldrsb $\x01, [$\x02, $\x03]\0" 22509 /* 7950 */ "ldrsb $\x01, [$\x02]\0" 22510 /* 7965 */ "ldrsh $\x01, [$\x02, $\x03]\0" 22511 /* 7984 */ "ldrsh $\x01, [$\x02]\0" 22512 /* 7999 */ "ldrsw $\x01, [$\x02, $\x03]\0" 22513 /* 8018 */ "ldrsw $\x01, [$\x02]\0" 22514 /* 8033 */ "ldr $\xFF\x01\x07, [$\x02]\0" 22515 /* 8048 */ "stsetb $\x02, [$\x03]\0" 22516 /* 8064 */ "stseth $\x02, [$\x03]\0" 22517 /* 8080 */ "stsetlb $\x02, [$\x03]\0" 22518 /* 8097 */ "stsetlh $\x02, [$\x03]\0" 22519 /* 8114 */ "stsetl $\x02, [$\x03]\0" 22520 /* 8130 */ "stset $\x02, [$\x03]\0" 22521 /* 8145 */ "stsmaxb $\x02, [$\x03]\0" 22522 /* 8162 */ "stsmaxh $\x02, [$\x03]\0" 22523 /* 8179 */ "stsmaxlb $\x02, [$\x03]\0" 22524 /* 8197 */ "stsmaxlh $\x02, [$\x03]\0" 22525 /* 8215 */ "stsmaxl $\x02, [$\x03]\0" 22526 /* 8232 */ "stsmax $\x02, [$\x03]\0" 22527 /* 8248 */ "stsminb $\x02, [$\x03]\0" 22528 /* 8265 */ "stsminh $\x02, [$\x03]\0" 22529 /* 8282 */ "stsminlb $\x02, [$\x03]\0" 22530 /* 8300 */ "stsminlh $\x02, [$\x03]\0" 22531 /* 8318 */ "stsminl $\x02, [$\x03]\0" 22532 /* 8335 */ "stsmin $\x02, [$\x03]\0" 22533 /* 8351 */ "ldtrb $\x01, [$\x02]\0" 22534 /* 8366 */ "ldtrh $\x01, [$\x02]\0" 22535 /* 8381 */ "ldtrsb $\x01, [$\x02]\0" 22536 /* 8397 */ "ldtrsh $\x01, [$\x02]\0" 22537 /* 8413 */ "ldtrsw $\x01, [$\x02]\0" 22538 /* 8429 */ "ldtr $\x01, [$\x02]\0" 22539 /* 8443 */ "stumaxb $\x02, [$\x03]\0" 22540 /* 8460 */ "stumaxh $\x02, [$\x03]\0" 22541 /* 8477 */ "stumaxlb $\x02, [$\x03]\0" 22542 /* 8495 */ "stumaxlh $\x02, [$\x03]\0" 22543 /* 8513 */ "stumaxl $\x02, [$\x03]\0" 22544 /* 8530 */ "stumax $\x02, [$\x03]\0" 22545 /* 8546 */ "stuminb $\x02, [$\x03]\0" 22546 /* 8563 */ "stuminh $\x02, [$\x03]\0" 22547 /* 8580 */ "stuminlb $\x02, [$\x03]\0" 22548 /* 8598 */ "stuminlh $\x02, [$\x03]\0" 22549 /* 8616 */ "stuminl $\x02, [$\x03]\0" 22550 /* 8633 */ "stumin $\x02, [$\x03]\0" 22551 /* 8649 */ "ldurb $\x01, [$\x02]\0" 22552 /* 8664 */ "ldur $\x01, [$\x02]\0" 22553 /* 8678 */ "ldurh $\x01, [$\x02]\0" 22554 /* 8693 */ "ldursb $\x01, [$\x02]\0" 22555 /* 8709 */ "ldursh $\x01, [$\x02]\0" 22556 /* 8725 */ "ldursw $\x01, [$\x02]\0" 22557 /* 8741 */ "mul $\x01, $\x02, $\x03\0" 22558 /* 8756 */ "mneg $\x01, $\x02, $\x03\0" 22559 /* 8772 */ "mvn $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0" 22560 /* 8795 */ "mvn $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0" 22561 /* 8816 */ "mvn $\x01, $\x03\0" 22562 /* 8827 */ "mvn $\x01, $\x03$\xFF\x04\x02\0" 22563 /* 8842 */ "orn $\x01, $\x02, $\x03\0" 22564 /* 8857 */ "movs $\xFF\x01\x06, $\xFF\x02\x06\0" 22565 /* 8873 */ "mov $\x01, $\x03\0" 22566 /* 8884 */ "orr $\x01, $\x02, $\x03\0" 22567 /* 8899 */ "mov $\xFF\x01\x06, $\xFF\x02\x06\0" 22568 /* 8914 */ "orr $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" 22569 /* 8935 */ "orr $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" 22570 /* 8956 */ "orr $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" 22571 /* 8977 */ "mov $\xFF\x01\x10, $\xFF\x02\x10\0" 22572 /* 8992 */ "mov $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0" 22573 /* 9015 */ "mov $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0" 22574 /* 9036 */ "pacia1716\0" 22575 /* 9046 */ "paciasp\0" 22576 /* 9054 */ "paciaz\0" 22577 /* 9061 */ "pacib1716\0" 22578 /* 9071 */ "pacibsp\0" 22579 /* 9079 */ "pacibz\0" 22580 /* 9086 */ "prfb $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22581 /* 9110 */ "prfb $\xFF\x01\x33, $\xFF\x02\x07, [$\x03]\0" 22582 /* 9132 */ "prfb $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22583 /* 9156 */ "prfd $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22584 /* 9180 */ "prfd $\xFF\x01\x33, $\xFF\x02\x07, [$\x03]\0" 22585 /* 9202 */ "prfd $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22586 /* 9226 */ "prfh $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22587 /* 9250 */ "prfh $\xFF\x01\x33, $\xFF\x02\x07, [$\x03]\0" 22588 /* 9272 */ "prfh $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22589 /* 9296 */ "prfm $\xFF\x01\x34, [$\x02, $\x03]\0" 22590 /* 9316 */ "prfm $\xFF\x01\x34, [$\x02]\0" 22591 /* 9332 */ "prfum $\xFF\x01\x34, [$\x02]\0" 22592 /* 9349 */ "prfw $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22593 /* 9373 */ "prfw $\xFF\x01\x33, $\xFF\x02\x07, [$\x03]\0" 22594 /* 9395 */ "prfw $\xFF\x01\x33, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22595 /* 9419 */ "ptrues $\xFF\x01\x06\0" 22596 /* 9431 */ "ptrues $\xFF\x01\x10\0" 22597 /* 9443 */ "ptrues $\xFF\x01\x09\0" 22598 /* 9455 */ "ptrues $\xFF\x01\x0B\0" 22599 /* 9467 */ "ptrue $\xFF\x01\x06\0" 22600 /* 9478 */ "ptrue $\xFF\x01\x10\0" 22601 /* 9489 */ "ptrue $\xFF\x01\x09\0" 22602 /* 9500 */ "ptrue $\xFF\x01\x0B\0" 22603 /* 9511 */ "ret\0" 22604 /* 9515 */ "ngcs $\x01, $\x03\0" 22605 /* 9527 */ "ngc $\x01, $\x03\0" 22606 /* 9538 */ "asr $\x01, $\x02, $\x03\0" 22607 /* 9553 */ "sxtb $\x01, $\x02\0" 22608 /* 9565 */ "sxth $\x01, $\x02\0" 22609 /* 9577 */ "sxtw $\x01, $\x02\0" 22610 /* 9589 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x06\0" 22611 /* 9612 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x10\0" 22612 /* 9635 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x09\0" 22613 /* 9658 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x0B\0" 22614 /* 9681 */ "smull $\x01, $\x02, $\x03\0" 22615 /* 9698 */ "smnegl $\x01, $\x02, $\x03\0" 22616 /* 9716 */ "sqdecb $\x01\0" 22617 /* 9726 */ "sqdecb $\x01, $\xFF\x03\x0E\0" 22618 /* 9742 */ "sqdecb $\x01, $\xFF\x02\x35\0" 22619 /* 9758 */ "sqdecb $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22620 /* 9780 */ "sqdecd $\x01\0" 22621 /* 9790 */ "sqdecd $\x01, $\xFF\x03\x0E\0" 22622 /* 9806 */ "sqdecd $\x01, $\xFF\x02\x35\0" 22623 /* 9822 */ "sqdecd $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22624 /* 9844 */ "sqdecd $\xFF\x01\x10\0" 22625 /* 9856 */ "sqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22626 /* 9874 */ "sqdech $\x01\0" 22627 /* 9884 */ "sqdech $\x01, $\xFF\x03\x0E\0" 22628 /* 9900 */ "sqdech $\x01, $\xFF\x02\x35\0" 22629 /* 9916 */ "sqdech $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22630 /* 9938 */ "sqdech $\xFF\x01\x09\0" 22631 /* 9950 */ "sqdech $\xFF\x01\x09, $\xFF\x03\x0E\0" 22632 /* 9968 */ "sqdecw $\x01\0" 22633 /* 9978 */ "sqdecw $\x01, $\xFF\x03\x0E\0" 22634 /* 9994 */ "sqdecw $\x01, $\xFF\x02\x35\0" 22635 /* 10010 */ "sqdecw $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22636 /* 10032 */ "sqdecw $\xFF\x01\x0B\0" 22637 /* 10044 */ "sqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22638 /* 10062 */ "sqincb $\x01\0" 22639 /* 10072 */ "sqincb $\x01, $\xFF\x03\x0E\0" 22640 /* 10088 */ "sqincb $\x01, $\xFF\x02\x35\0" 22641 /* 10104 */ "sqincb $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22642 /* 10126 */ "sqincd $\x01\0" 22643 /* 10136 */ "sqincd $\x01, $\xFF\x03\x0E\0" 22644 /* 10152 */ "sqincd $\x01, $\xFF\x02\x35\0" 22645 /* 10168 */ "sqincd $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22646 /* 10190 */ "sqincd $\xFF\x01\x10\0" 22647 /* 10202 */ "sqincd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22648 /* 10220 */ "sqinch $\x01\0" 22649 /* 10230 */ "sqinch $\x01, $\xFF\x03\x0E\0" 22650 /* 10246 */ "sqinch $\x01, $\xFF\x02\x35\0" 22651 /* 10262 */ "sqinch $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22652 /* 10284 */ "sqinch $\xFF\x01\x09\0" 22653 /* 10296 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0" 22654 /* 10314 */ "sqincw $\x01\0" 22655 /* 10324 */ "sqincw $\x01, $\xFF\x03\x0E\0" 22656 /* 10340 */ "sqincw $\x01, $\xFF\x02\x35\0" 22657 /* 10356 */ "sqincw $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0" 22658 /* 10378 */ "sqincw $\xFF\x01\x0B\0" 22659 /* 10390 */ "sqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22660 /* 10408 */ "st1b $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22661 /* 10432 */ "st1b $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22662 /* 10456 */ "st1d $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22663 /* 10480 */ "st1h $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22664 /* 10504 */ "st1h $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22665 /* 10528 */ "st1w $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22666 /* 10552 */ "st1w $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22667 /* 10576 */ "st1b $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22668 /* 10598 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22669 /* 10620 */ "st1b $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0" 22670 /* 10642 */ "st1b $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22671 /* 10664 */ "st1d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22672 /* 10686 */ "st1 $\xFF\x02\x26, [$\x01], #64\0" 22673 /* 10706 */ "st1 $\xFF\x02\x27, [$\x01], #32\0" 22674 /* 10726 */ "st1 $\xFF\x02\x28, [$\x01], #64\0" 22675 /* 10746 */ "st1 $\xFF\x02\x29, [$\x01], #32\0" 22676 /* 10766 */ "st1 $\xFF\x02\x2A, [$\x01], #32\0" 22677 /* 10786 */ "st1 $\xFF\x02\x2B, [$\x01], #64\0" 22678 /* 10806 */ "st1 $\xFF\x02\x2C, [$\x01], #32\0" 22679 /* 10826 */ "st1 $\xFF\x02\x2D, [$\x01], #64\0" 22680 /* 10846 */ "st1h $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22681 /* 10868 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22682 /* 10890 */ "st1h $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22683 /* 10912 */ "st1 $\xFF\x02\x26, [$\x01], #16\0" 22684 /* 10932 */ "st1 $\xFF\x02\x27, [$\x01], #8\0" 22685 /* 10951 */ "st1 $\xFF\x02\x28, [$\x01], #16\0" 22686 /* 10971 */ "st1 $\xFF\x02\x29, [$\x01], #8\0" 22687 /* 10990 */ "st1 $\xFF\x02\x2A, [$\x01], #8\0" 22688 /* 11009 */ "st1 $\xFF\x02\x2B, [$\x01], #16\0" 22689 /* 11029 */ "st1 $\xFF\x02\x2C, [$\x01], #8\0" 22690 /* 11048 */ "st1 $\xFF\x02\x2D, [$\x01], #16\0" 22691 /* 11068 */ "st1 $\xFF\x02\x26, [$\x01], #48\0" 22692 /* 11088 */ "st1 $\xFF\x02\x27, [$\x01], #24\0" 22693 /* 11108 */ "st1 $\xFF\x02\x28, [$\x01], #48\0" 22694 /* 11128 */ "st1 $\xFF\x02\x29, [$\x01], #24\0" 22695 /* 11148 */ "st1 $\xFF\x02\x2A, [$\x01], #24\0" 22696 /* 11168 */ "st1 $\xFF\x02\x2B, [$\x01], #48\0" 22697 /* 11188 */ "st1 $\xFF\x02\x2C, [$\x01], #24\0" 22698 /* 11208 */ "st1 $\xFF\x02\x2D, [$\x01], #48\0" 22699 /* 11228 */ "st1 $\xFF\x02\x26, [$\x01], #32\0" 22700 /* 11248 */ "st1 $\xFF\x02\x27, [$\x01], #16\0" 22701 /* 11268 */ "st1 $\xFF\x02\x28, [$\x01], #32\0" 22702 /* 11288 */ "st1 $\xFF\x02\x29, [$\x01], #16\0" 22703 /* 11308 */ "st1 $\xFF\x02\x2A, [$\x01], #16\0" 22704 /* 11328 */ "st1 $\xFF\x02\x2B, [$\x01], #32\0" 22705 /* 11348 */ "st1 $\xFF\x02\x2C, [$\x01], #16\0" 22706 /* 11368 */ "st1 $\xFF\x02\x2D, [$\x01], #32\0" 22707 /* 11388 */ "st1w $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22708 /* 11410 */ "st1w $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22709 /* 11432 */ "st1 $\xFF\x02\x2E$\xFF\x03\x19, [$\x01], #2\0" 22710 /* 11455 */ "st1 $\xFF\x02\x2F$\xFF\x03\x19, [$\x01], #4\0" 22711 /* 11478 */ "st1 $\xFF\x02\x30$\xFF\x03\x19, [$\x01], #8\0" 22712 /* 11501 */ "st1 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #1\0" 22713 /* 11524 */ "st2b $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0" 22714 /* 11546 */ "st2d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22715 /* 11568 */ "st2g $\x01, [$\x02]\0" 22716 /* 11582 */ "st2h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22717 /* 11604 */ "st2 $\xFF\x02\x26, [$\x01], #32\0" 22718 /* 11624 */ "st2 $\xFF\x02\x28, [$\x01], #32\0" 22719 /* 11644 */ "st2 $\xFF\x02\x29, [$\x01], #16\0" 22720 /* 11664 */ "st2 $\xFF\x02\x2A, [$\x01], #16\0" 22721 /* 11684 */ "st2 $\xFF\x02\x2B, [$\x01], #32\0" 22722 /* 11704 */ "st2 $\xFF\x02\x2C, [$\x01], #16\0" 22723 /* 11724 */ "st2 $\xFF\x02\x2D, [$\x01], #32\0" 22724 /* 11744 */ "st2w $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22725 /* 11766 */ "st2 $\xFF\x02\x2E$\xFF\x03\x19, [$\x01], #4\0" 22726 /* 11789 */ "st2 $\xFF\x02\x2F$\xFF\x03\x19, [$\x01], #8\0" 22727 /* 11812 */ "st2 $\xFF\x02\x30$\xFF\x03\x19, [$\x01], #16\0" 22728 /* 11836 */ "st2 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #2\0" 22729 /* 11859 */ "st3b $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0" 22730 /* 11881 */ "st3d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22731 /* 11903 */ "st3h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22732 /* 11925 */ "st3 $\xFF\x02\x26, [$\x01], #48\0" 22733 /* 11945 */ "st3 $\xFF\x02\x28, [$\x01], #48\0" 22734 /* 11965 */ "st3 $\xFF\x02\x29, [$\x01], #24\0" 22735 /* 11985 */ "st3 $\xFF\x02\x2A, [$\x01], #24\0" 22736 /* 12005 */ "st3 $\xFF\x02\x2B, [$\x01], #48\0" 22737 /* 12025 */ "st3 $\xFF\x02\x2C, [$\x01], #24\0" 22738 /* 12045 */ "st3 $\xFF\x02\x2D, [$\x01], #48\0" 22739 /* 12065 */ "st3w $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22740 /* 12087 */ "st3 $\xFF\x02\x2E$\xFF\x03\x19, [$\x01], #6\0" 22741 /* 12110 */ "st3 $\xFF\x02\x2F$\xFF\x03\x19, [$\x01], #12\0" 22742 /* 12134 */ "st3 $\xFF\x02\x30$\xFF\x03\x19, [$\x01], #24\0" 22743 /* 12158 */ "st3 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #3\0" 22744 /* 12181 */ "st4b $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0" 22745 /* 12203 */ "st4d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22746 /* 12225 */ "st4 $\xFF\x02\x26, [$\x01], #64\0" 22747 /* 12245 */ "st4 $\xFF\x02\x28, [$\x01], #64\0" 22748 /* 12265 */ "st4 $\xFF\x02\x29, [$\x01], #32\0" 22749 /* 12285 */ "st4 $\xFF\x02\x2A, [$\x01], #32\0" 22750 /* 12305 */ "st4 $\xFF\x02\x2B, [$\x01], #64\0" 22751 /* 12325 */ "st4 $\xFF\x02\x2C, [$\x01], #32\0" 22752 /* 12345 */ "st4 $\xFF\x02\x2D, [$\x01], #64\0" 22753 /* 12365 */ "st4h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22754 /* 12387 */ "st4w $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22755 /* 12409 */ "st4 $\xFF\x02\x2E$\xFF\x03\x19, [$\x01], #8\0" 22756 /* 12432 */ "st4 $\xFF\x02\x2F$\xFF\x03\x19, [$\x01], #16\0" 22757 /* 12456 */ "st4 $\xFF\x02\x30$\xFF\x03\x19, [$\x01], #32\0" 22758 /* 12480 */ "st4 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #4\0" 22759 /* 12503 */ "stg $\x01, [$\x02]\0" 22760 /* 12516 */ "stgp $\x01, $\x02, [$\x03]\0" 22761 /* 12534 */ "stlurb $\x01, [$\x02]\0" 22762 /* 12550 */ "stlurh $\x01, [$\x02]\0" 22763 /* 12566 */ "stlur $\x01, [$\x02]\0" 22764 /* 12581 */ "stnp $\x01, $\x02, [$\x03]\0" 22765 /* 12599 */ "stnt1b $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0" 22766 /* 12623 */ "stnt1b $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22767 /* 12649 */ "stnt1b $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22768 /* 12675 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0" 22769 /* 12699 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22770 /* 12725 */ "stnt1h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" 22771 /* 12749 */ "stnt1h $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22772 /* 12775 */ "stnt1h $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22773 /* 12801 */ "stnt1w $\xFF\x01\x21, $\xFF\x02\x07, [$\x03]\0" 22774 /* 12825 */ "stnt1w $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0" 22775 /* 12851 */ "stnt1w $\xFF\x01\x21, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" 22776 /* 12877 */ "stp $\x01, $\x02, [$\x03]\0" 22777 /* 12894 */ "strb $\x01, [$\x02, $\x03]\0" 22778 /* 12912 */ "strb $\x01, [$\x02]\0" 22779 /* 12926 */ "str $\x01, [$\x02, $\x03]\0" 22780 /* 12943 */ "str $\x01, [$\x02]\0" 22781 /* 12956 */ "strh $\x01, [$\x02, $\x03]\0" 22782 /* 12974 */ "strh $\x01, [$\x02]\0" 22783 /* 12988 */ "str $\xFF\x01\x07, [$\x02]\0" 22784 /* 13003 */ "sttrb $\x01, [$\x02]\0" 22785 /* 13018 */ "sttrh $\x01, [$\x02]\0" 22786 /* 13033 */ "sttr $\x01, [$\x02]\0" 22787 /* 13047 */ "sturb $\x01, [$\x02]\0" 22788 /* 13062 */ "stur $\x01, [$\x02]\0" 22789 /* 13076 */ "sturh $\x01, [$\x02]\0" 22790 /* 13091 */ "stz2g $\x01, [$\x02]\0" 22791 /* 13106 */ "stzg $\x01, [$\x02]\0" 22792 /* 13120 */ "cmp $\x02, $\xFF\x03\x01\0" 22793 /* 13133 */ "cmp $\x02, $\x03\0" 22794 /* 13144 */ "cmp $\x02, $\x03$\xFF\x04\x02\0" 22795 /* 13159 */ "negs $\x01, $\x03\0" 22796 /* 13171 */ "negs $\x01, $\x03$\xFF\x04\x02\0" 22797 /* 13187 */ "subs $\x01, $\x02, $\x03\0" 22798 /* 13203 */ "cmp $\x02, $\x03$\xFF\x04\x03\0" 22799 /* 13218 */ "neg $\x01, $\x03\0" 22800 /* 13229 */ "neg $\x01, $\x03$\xFF\x04\x02\0" 22801 /* 13244 */ "sub $\x01, $\x02, $\x03\0" 22802 /* 13259 */ "sys $\x01, $\xFF\x02\x36, $\xFF\x03\x36, $\x04\0" 22803 /* 13282 */ "lsr $\x01, $\x02, $\x03\0" 22804 /* 13297 */ "uxtb $\x01, $\x02\0" 22805 /* 13309 */ "uxth $\x01, $\x02\0" 22806 /* 13321 */ "uxtw $\x01, $\x02\0" 22807 /* 13333 */ "umull $\x01, $\x02, $\x03\0" 22808 /* 13350 */ "mov $\x01, $\xFF\x02\x0C.s$\xFF\x03\x19\0" 22809 /* 13369 */ "mov $\x01, $\xFF\x02\x0C.d$\xFF\x03\x19\0" 22810 /* 13388 */ "umnegl $\x01, $\x02, $\x03\0" 22811 /* 13406 */ "uqdecb $\x01\0" 22812 /* 13416 */ "uqdecb $\x01, $\xFF\x03\x0E\0" 22813 /* 13432 */ "uqdecd $\x01\0" 22814 /* 13442 */ "uqdecd $\x01, $\xFF\x03\x0E\0" 22815 /* 13458 */ "uqdecd $\xFF\x01\x10\0" 22816 /* 13470 */ "uqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22817 /* 13488 */ "uqdech $\x01\0" 22818 /* 13498 */ "uqdech $\x01, $\xFF\x03\x0E\0" 22819 /* 13514 */ "uqdech $\xFF\x01\x09\0" 22820 /* 13526 */ "uqdech $\xFF\x01\x09, $\xFF\x03\x0E\0" 22821 /* 13544 */ "uqdecw $\x01\0" 22822 /* 13554 */ "uqdecw $\x01, $\xFF\x03\x0E\0" 22823 /* 13570 */ "uqdecw $\xFF\x01\x0B\0" 22824 /* 13582 */ "uqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22825 /* 13600 */ "uqincb $\x01\0" 22826 /* 13610 */ "uqincb $\x01, $\xFF\x03\x0E\0" 22827 /* 13626 */ "uqincd $\x01\0" 22828 /* 13636 */ "uqincd $\x01, $\xFF\x03\x0E\0" 22829 /* 13652 */ "uqincd $\xFF\x01\x10\0" 22830 /* 13664 */ "uqincd $\xFF\x01\x10, $\xFF\x03\x0E\0" 22831 /* 13682 */ "uqinch $\x01\0" 22832 /* 13692 */ "uqinch $\x01, $\xFF\x03\x0E\0" 22833 /* 13708 */ "uqinch $\xFF\x01\x09\0" 22834 /* 13720 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0" 22835 /* 13738 */ "uqincw $\x01\0" 22836 /* 13748 */ "uqincw $\x01, $\xFF\x03\x0E\0" 22837 /* 13764 */ "uqincw $\xFF\x01\x0B\0" 22838 /* 13776 */ "uqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0" 22839 /* 13794 */ "xpaclri\0" 22840 ; 22841 22842#ifndef NDEBUG 22843 static struct SortCheck { 22844 SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) { 22845 assert(std::is_sorted( 22846 OpToPatterns.begin(), OpToPatterns.end(), 22847 [](const PatternsForOpcode &L, const PatternsForOpcode &R) { 22848 return L.Opcode < R.Opcode; 22849 }) && 22850 "tablegen failed to sort opcode patterns"); 22851 } 22852 } sortCheckVar(OpToPatterns); 22853#endif 22854 22855 AliasMatchingData M { 22856 makeArrayRef(OpToPatterns), 22857 makeArrayRef(Patterns), 22858 makeArrayRef(Conds), 22859 StringRef(AsmStrings, array_lengthof(AsmStrings)), 22860 &AArch64InstPrinterValidateMCOperand, 22861 }; 22862 const char *AsmString = matchAliasPatterns(MI, &STI, M); 22863 if (!AsmString) return false; 22864 22865 unsigned I = 0; 22866 while (AsmString[I] != ' ' && AsmString[I] != '\t' && 22867 AsmString[I] != '$' && AsmString[I] != '\0') 22868 ++I; 22869 OS << '\t' << StringRef(AsmString, I); 22870 if (AsmString[I] != '\0') { 22871 if (AsmString[I] == ' ' || AsmString[I] == '\t') { 22872 OS << '\t'; 22873 ++I; 22874 } 22875 do { 22876 if (AsmString[I] == '$') { 22877 ++I; 22878 if (AsmString[I] == (char)0xff) { 22879 ++I; 22880 int OpIdx = AsmString[I++] - 1; 22881 int PrintMethodIdx = AsmString[I++] - 1; 22882 printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, STI, OS); 22883 } else 22884 printOperand(MI, unsigned(AsmString[I++]) - 1, STI, OS); 22885 } else { 22886 OS << AsmString[I++]; 22887 } 22888 } while (AsmString[I] != '\0'); 22889 } 22890 22891 return true; 22892} 22893 22894void AArch64InstPrinter::printCustomAliasOperand( 22895 const MCInst *MI, unsigned OpIdx, 22896 unsigned PrintMethodIdx, 22897 const MCSubtargetInfo &STI, 22898 raw_ostream &OS) { 22899 switch (PrintMethodIdx) { 22900 default: 22901 llvm_unreachable("Unknown PrintMethod kind"); 22902 break; 22903 case 0: 22904 printAddSubImm(MI, OpIdx, STI, OS); 22905 break; 22906 case 1: 22907 printShifter(MI, OpIdx, STI, OS); 22908 break; 22909 case 2: 22910 printArithExtend(MI, OpIdx, STI, OS); 22911 break; 22912 case 3: 22913 printLogicalImm<int32_t>(MI, OpIdx, STI, OS); 22914 break; 22915 case 4: 22916 printLogicalImm<int64_t>(MI, OpIdx, STI, OS); 22917 break; 22918 case 5: 22919 printSVERegOp<'b'>(MI, OpIdx, STI, OS); 22920 break; 22921 case 6: 22922 printSVERegOp<>(MI, OpIdx, STI, OS); 22923 break; 22924 case 7: 22925 printLogicalImm<int8_t>(MI, OpIdx, STI, OS); 22926 break; 22927 case 8: 22928 printSVERegOp<'h'>(MI, OpIdx, STI, OS); 22929 break; 22930 case 9: 22931 printLogicalImm<int16_t>(MI, OpIdx, STI, OS); 22932 break; 22933 case 10: 22934 printSVERegOp<'s'>(MI, OpIdx, STI, OS); 22935 break; 22936 case 11: 22937 printVRegOperand(MI, OpIdx, STI, OS); 22938 break; 22939 case 12: 22940 printImm(MI, OpIdx, STI, OS); 22941 break; 22942 case 13: 22943 printSVEPattern(MI, OpIdx, STI, OS); 22944 break; 22945 case 14: 22946 printImm8OptLsl<int8_t>(MI, OpIdx, STI, OS); 22947 break; 22948 case 15: 22949 printSVERegOp<'d'>(MI, OpIdx, STI, OS); 22950 break; 22951 case 16: 22952 printImm8OptLsl<int64_t>(MI, OpIdx, STI, OS); 22953 break; 22954 case 17: 22955 printImm8OptLsl<int16_t>(MI, OpIdx, STI, OS); 22956 break; 22957 case 18: 22958 printImm8OptLsl<int32_t>(MI, OpIdx, STI, OS); 22959 break; 22960 case 19: 22961 printInverseCondCode(MI, OpIdx, STI, OS); 22962 break; 22963 case 20: 22964 printSVELogicalImm<int16_t>(MI, OpIdx, STI, OS); 22965 break; 22966 case 21: 22967 printSVELogicalImm<int32_t>(MI, OpIdx, STI, OS); 22968 break; 22969 case 22: 22970 printSVELogicalImm<int64_t>(MI, OpIdx, STI, OS); 22971 break; 22972 case 23: 22973 printZPRasFPR<8>(MI, OpIdx, STI, OS); 22974 break; 22975 case 24: 22976 printVectorIndex(MI, OpIdx, STI, OS); 22977 break; 22978 case 25: 22979 printZPRasFPR<64>(MI, OpIdx, STI, OS); 22980 break; 22981 case 26: 22982 printZPRasFPR<16>(MI, OpIdx, STI, OS); 22983 break; 22984 case 27: 22985 printSVERegOp<'q'>(MI, OpIdx, STI, OS); 22986 break; 22987 case 28: 22988 printZPRasFPR<128>(MI, OpIdx, STI, OS); 22989 break; 22990 case 29: 22991 printZPRasFPR<32>(MI, OpIdx, STI, OS); 22992 break; 22993 case 30: 22994 printFPImmOperand(MI, OpIdx, STI, OS); 22995 break; 22996 case 31: 22997 printTypedVectorList<0,'d'>(MI, OpIdx, STI, OS); 22998 break; 22999 case 32: 23000 printTypedVectorList<0,'s'>(MI, OpIdx, STI, OS); 23001 break; 23002 case 33: 23003 printBTIHintOp(MI, OpIdx, STI, OS); 23004 break; 23005 case 34: 23006 printPSBHintOp(MI, OpIdx, STI, OS); 23007 break; 23008 case 35: 23009 printTypedVectorList<0,'h'>(MI, OpIdx, STI, OS); 23010 break; 23011 case 36: 23012 printTypedVectorList<0,'b'>(MI, OpIdx, STI, OS); 23013 break; 23014 case 37: 23015 printTypedVectorList<16, 'b'>(MI, OpIdx, STI, OS); 23016 break; 23017 case 38: 23018 printTypedVectorList<1, 'd'>(MI, OpIdx, STI, OS); 23019 break; 23020 case 39: 23021 printTypedVectorList<2, 'd'>(MI, OpIdx, STI, OS); 23022 break; 23023 case 40: 23024 printTypedVectorList<2, 's'>(MI, OpIdx, STI, OS); 23025 break; 23026 case 41: 23027 printTypedVectorList<4, 'h'>(MI, OpIdx, STI, OS); 23028 break; 23029 case 42: 23030 printTypedVectorList<4, 's'>(MI, OpIdx, STI, OS); 23031 break; 23032 case 43: 23033 printTypedVectorList<8, 'b'>(MI, OpIdx, STI, OS); 23034 break; 23035 case 44: 23036 printTypedVectorList<8, 'h'>(MI, OpIdx, STI, OS); 23037 break; 23038 case 45: 23039 printTypedVectorList<0, 'h'>(MI, OpIdx, STI, OS); 23040 break; 23041 case 46: 23042 printTypedVectorList<0, 's'>(MI, OpIdx, STI, OS); 23043 break; 23044 case 47: 23045 printTypedVectorList<0, 'd'>(MI, OpIdx, STI, OS); 23046 break; 23047 case 48: 23048 printTypedVectorList<0, 'b'>(MI, OpIdx, STI, OS); 23049 break; 23050 case 49: 23051 printImmHex(MI, OpIdx, STI, OS); 23052 break; 23053 case 50: 23054 printPrefetchOp<true>(MI, OpIdx, STI, OS); 23055 break; 23056 case 51: 23057 printPrefetchOp(MI, OpIdx, STI, OS); 23058 break; 23059 case 52: 23060 printGPR64as32(MI, OpIdx, STI, OS); 23061 break; 23062 case 53: 23063 printSysCROperand(MI, OpIdx, STI, OS); 23064 break; 23065 } 23066} 23067 23068static bool AArch64InstPrinterValidateMCOperand(const MCOperand &MCOp, 23069 const MCSubtargetInfo &STI, 23070 unsigned PredicateIndex) { 23071 switch (PredicateIndex) { 23072 default: 23073 llvm_unreachable("Unknown MCOperandPredicate kind"); 23074 break; 23075 case 1: { 23076 23077 if (!MCOp.isImm()) 23078 return false; 23079 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23080 return AArch64_AM::isSVEMaskOfIdenticalElements<int8_t>(Val); 23081 23082 } 23083 case 2: { 23084 23085 if (!MCOp.isImm()) 23086 return false; 23087 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23088 return AArch64_AM::isSVEMaskOfIdenticalElements<int16_t>(Val); 23089 23090 } 23091 case 3: { 23092 23093 if (!MCOp.isImm()) 23094 return false; 23095 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23096 return AArch64_AM::isSVEMaskOfIdenticalElements<int32_t>(Val); 23097 23098 } 23099 case 4: { 23100 23101 return MCOp.isImm() && 23102 MCOp.getImm() != AArch64CC::AL && 23103 MCOp.getImm() != AArch64CC::NV; 23104 23105 } 23106 case 5: { 23107 23108 if (!MCOp.isImm()) 23109 return false; 23110 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23111 return AArch64_AM::isSVEMaskOfIdenticalElements<int16_t>(Val) && 23112 AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val); 23113 23114 } 23115 case 6: { 23116 23117 if (!MCOp.isImm()) 23118 return false; 23119 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23120 return AArch64_AM::isSVEMaskOfIdenticalElements<int32_t>(Val) && 23121 AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val); 23122 23123 } 23124 case 7: { 23125 23126 if (!MCOp.isImm()) 23127 return false; 23128 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64); 23129 return AArch64_AM::isSVEMaskOfIdenticalElements<int64_t>(Val) && 23130 AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val); 23131 23132 } 23133 case 8: { 23134 23135 // "bti" is an alias to "hint" only for certain values of CRm:Op2 fields. 23136 if (!MCOp.isImm()) 23137 return false; 23138 return AArch64BTIHint::lookupBTIByEncoding((MCOp.getImm() ^ 32) >> 1) != nullptr; 23139 23140 } 23141 case 9: { 23142 23143 // Check, if operand is valid, to fix exhaustive aliasing in disassembly. 23144 // "psb" is an alias to "hint" only for certain values of CRm:Op2 fields. 23145 if (!MCOp.isImm()) 23146 return false; 23147 return AArch64PSBHint::lookupPSBByEncoding(MCOp.getImm()) != nullptr; 23148 23149 } 23150 } 23151} 23152 23153#endif // PRINT_ALIAS_INSTR 23154