1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met:
7 //
8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer.
10 //
11 // - Redistribution in binary form must reproduce the above copyright
12 // notice, this list of conditions and the following disclaimer in the
13 // documentation and/or other materials provided with the distribution.
14 //
15 // - Neither the name of Sun Microsystems or the names of contributors may
16 // be used to endorse or promote products derived from this software without
17 // specific prior written permission.
18 //
19 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
20 // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31 // The original source code covered by the above license above has been
32 // modified significantly by Google Inc.
33 // Copyright 2012 the V8 project authors. All rights reserved.
34
35 // A light-weight IA32 Assembler.
36
37 #ifndef V8_CODEGEN_IA32_ASSEMBLER_IA32_INL_H_
38 #define V8_CODEGEN_IA32_ASSEMBLER_IA32_INL_H_
39
40 #include "src/codegen/ia32/assembler-ia32.h"
41
42 #include "src/base/memory.h"
43 #include "src/codegen/assembler.h"
44 #include "src/debug/debug.h"
45 #include "src/objects/objects-inl.h"
46
47 namespace v8 {
48 namespace internal {
49
SupportsOptimizer()50 bool CpuFeatures::SupportsOptimizer() { return true; }
51
SupportsWasmSimd128()52 bool CpuFeatures::SupportsWasmSimd128() { return IsSupported(SSE4_1); }
53
54 // The modes possibly affected by apply must be in kApplyMask.
apply(intptr_t delta)55 void RelocInfo::apply(intptr_t delta) {
56 DCHECK_EQ(kApplyMask, (RelocInfo::ModeMask(RelocInfo::CODE_TARGET) |
57 RelocInfo::ModeMask(RelocInfo::INTERNAL_REFERENCE) |
58 RelocInfo::ModeMask(RelocInfo::OFF_HEAP_TARGET) |
59 RelocInfo::ModeMask(RelocInfo::RUNTIME_ENTRY)));
60 if (IsRuntimeEntry(rmode_) || IsCodeTarget(rmode_) ||
61 IsOffHeapTarget(rmode_)) {
62 base::WriteUnalignedValue(pc_,
63 base::ReadUnalignedValue<int32_t>(pc_) - delta);
64 } else if (IsInternalReference(rmode_)) {
65 // Absolute code pointer inside code object moves with the code object.
66 base::WriteUnalignedValue(pc_,
67 base::ReadUnalignedValue<int32_t>(pc_) + delta);
68 }
69 }
70
target_address()71 Address RelocInfo::target_address() {
72 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) || IsWasmCall(rmode_));
73 return Assembler::target_address_at(pc_, constant_pool_);
74 }
75
target_address_address()76 Address RelocInfo::target_address_address() {
77 DCHECK(HasTargetAddressAddress());
78 return pc_;
79 }
80
constant_pool_entry_address()81 Address RelocInfo::constant_pool_entry_address() { UNREACHABLE(); }
82
target_address_size()83 int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; }
84
target_object()85 HeapObject RelocInfo::target_object() {
86 DCHECK(IsCodeTarget(rmode_) || rmode_ == FULL_EMBEDDED_OBJECT);
87 return HeapObject::cast(Object(ReadUnalignedValue<Address>(pc_)));
88 }
89
target_object_no_host(Isolate * isolate)90 HeapObject RelocInfo::target_object_no_host(Isolate* isolate) {
91 return target_object();
92 }
93
target_object_handle(Assembler * origin)94 Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
95 DCHECK(IsCodeTarget(rmode_) || rmode_ == FULL_EMBEDDED_OBJECT);
96 return Handle<HeapObject>::cast(ReadUnalignedValue<Handle<Object>>(pc_));
97 }
98
set_target_object(Heap * heap,HeapObject target,WriteBarrierMode write_barrier_mode,ICacheFlushMode icache_flush_mode)99 void RelocInfo::set_target_object(Heap* heap, HeapObject target,
100 WriteBarrierMode write_barrier_mode,
101 ICacheFlushMode icache_flush_mode) {
102 DCHECK(IsCodeTarget(rmode_) || rmode_ == FULL_EMBEDDED_OBJECT);
103 WriteUnalignedValue(pc_, target.ptr());
104 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
105 FlushInstructionCache(pc_, sizeof(Address));
106 }
107 if (write_barrier_mode == UPDATE_WRITE_BARRIER && !host().is_null() &&
108 !FLAG_disable_write_barriers) {
109 WriteBarrierForCode(host(), this, target);
110 }
111 }
112
target_external_reference()113 Address RelocInfo::target_external_reference() {
114 DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
115 return ReadUnalignedValue<Address>(pc_);
116 }
117
set_target_external_reference(Address target,ICacheFlushMode icache_flush_mode)118 void RelocInfo::set_target_external_reference(
119 Address target, ICacheFlushMode icache_flush_mode) {
120 DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
121 WriteUnalignedValue(pc_, target);
122 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
123 FlushInstructionCache(pc_, sizeof(Address));
124 }
125 }
126
target_internal_reference()127 Address RelocInfo::target_internal_reference() {
128 DCHECK(rmode_ == INTERNAL_REFERENCE);
129 return ReadUnalignedValue<Address>(pc_);
130 }
131
target_internal_reference_address()132 Address RelocInfo::target_internal_reference_address() {
133 DCHECK(rmode_ == INTERNAL_REFERENCE);
134 return pc_;
135 }
136
target_runtime_entry(Assembler * origin)137 Address RelocInfo::target_runtime_entry(Assembler* origin) {
138 DCHECK(IsRuntimeEntry(rmode_));
139 return ReadUnalignedValue<Address>(pc_);
140 }
141
set_target_runtime_entry(Address target,WriteBarrierMode write_barrier_mode,ICacheFlushMode icache_flush_mode)142 void RelocInfo::set_target_runtime_entry(Address target,
143 WriteBarrierMode write_barrier_mode,
144 ICacheFlushMode icache_flush_mode) {
145 DCHECK(IsRuntimeEntry(rmode_));
146 if (target_address() != target) {
147 set_target_address(target, write_barrier_mode, icache_flush_mode);
148 }
149 }
150
target_off_heap_target()151 Address RelocInfo::target_off_heap_target() {
152 DCHECK(IsOffHeapTarget(rmode_));
153 return Assembler::target_address_at(pc_, constant_pool_);
154 }
155
WipeOut()156 void RelocInfo::WipeOut() {
157 if (IsFullEmbeddedObject(rmode_) || IsExternalReference(rmode_) ||
158 IsInternalReference(rmode_)) {
159 WriteUnalignedValue(pc_, kNullAddress);
160 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) ||
161 IsOffHeapTarget(rmode_)) {
162 // Effectively write zero into the relocation.
163 Assembler::set_target_address_at(pc_, constant_pool_,
164 pc_ + sizeof(int32_t));
165 } else {
166 UNREACHABLE();
167 }
168 }
169
emit(uint32_t x)170 void Assembler::emit(uint32_t x) {
171 WriteUnalignedValue(reinterpret_cast<Address>(pc_), x);
172 pc_ += sizeof(uint32_t);
173 }
174
emit_q(uint64_t x)175 void Assembler::emit_q(uint64_t x) {
176 WriteUnalignedValue(reinterpret_cast<Address>(pc_), x);
177 pc_ += sizeof(uint64_t);
178 }
179
emit(Handle<HeapObject> handle)180 void Assembler::emit(Handle<HeapObject> handle) {
181 emit(handle.address(), RelocInfo::FULL_EMBEDDED_OBJECT);
182 }
183
emit(uint32_t x,RelocInfo::Mode rmode)184 void Assembler::emit(uint32_t x, RelocInfo::Mode rmode) {
185 if (!RelocInfo::IsNone(rmode)) {
186 RecordRelocInfo(rmode);
187 }
188 emit(x);
189 }
190
emit(Handle<Code> code,RelocInfo::Mode rmode)191 void Assembler::emit(Handle<Code> code, RelocInfo::Mode rmode) {
192 emit(code.address(), rmode);
193 }
194
emit(const Immediate & x)195 void Assembler::emit(const Immediate& x) {
196 if (x.rmode_ == RelocInfo::INTERNAL_REFERENCE) {
197 Label* label = reinterpret_cast<Label*>(x.immediate());
198 emit_code_relative_offset(label);
199 return;
200 }
201 if (!RelocInfo::IsNone(x.rmode_)) RecordRelocInfo(x.rmode_);
202 if (x.is_heap_object_request()) {
203 RequestHeapObject(x.heap_object_request());
204 emit(0);
205 } else {
206 emit(x.immediate());
207 }
208 }
209
emit_code_relative_offset(Label * label)210 void Assembler::emit_code_relative_offset(Label* label) {
211 if (label->is_bound()) {
212 int32_t pos;
213 pos = label->pos() + Code::kHeaderSize - kHeapObjectTag;
214 emit(pos);
215 } else {
216 emit_disp(label, Displacement::CODE_RELATIVE);
217 }
218 }
219
emit_b(Immediate x)220 void Assembler::emit_b(Immediate x) {
221 DCHECK(x.is_int8() || x.is_uint8());
222 uint8_t value = static_cast<uint8_t>(x.immediate());
223 *pc_++ = value;
224 }
225
emit_w(const Immediate & x)226 void Assembler::emit_w(const Immediate& x) {
227 DCHECK(RelocInfo::IsNone(x.rmode_));
228 uint16_t value = static_cast<uint16_t>(x.immediate());
229 WriteUnalignedValue(reinterpret_cast<Address>(pc_), value);
230 pc_ += sizeof(uint16_t);
231 }
232
target_address_at(Address pc,Address constant_pool)233 Address Assembler::target_address_at(Address pc, Address constant_pool) {
234 return pc + sizeof(int32_t) + ReadUnalignedValue<int32_t>(pc);
235 }
236
set_target_address_at(Address pc,Address constant_pool,Address target,ICacheFlushMode icache_flush_mode)237 void Assembler::set_target_address_at(Address pc, Address constant_pool,
238 Address target,
239 ICacheFlushMode icache_flush_mode) {
240 WriteUnalignedValue(pc, target - (pc + sizeof(int32_t)));
241 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
242 FlushInstructionCache(pc, sizeof(int32_t));
243 }
244 }
245
deserialization_set_special_target_at(Address instruction_payload,Code code,Address target)246 void Assembler::deserialization_set_special_target_at(
247 Address instruction_payload, Code code, Address target) {
248 set_target_address_at(instruction_payload,
249 !code.is_null() ? code.constant_pool() : kNullAddress,
250 target);
251 }
252
deserialization_special_target_size(Address instruction_payload)253 int Assembler::deserialization_special_target_size(
254 Address instruction_payload) {
255 return kSpecialTargetSize;
256 }
257
disp_at(Label * L)258 Displacement Assembler::disp_at(Label* L) {
259 return Displacement(long_at(L->pos()));
260 }
261
disp_at_put(Label * L,Displacement disp)262 void Assembler::disp_at_put(Label* L, Displacement disp) {
263 long_at_put(L->pos(), disp.data());
264 }
265
emit_disp(Label * L,Displacement::Type type)266 void Assembler::emit_disp(Label* L, Displacement::Type type) {
267 Displacement disp(L, type);
268 L->link_to(pc_offset());
269 emit(static_cast<int>(disp.data()));
270 }
271
emit_near_disp(Label * L)272 void Assembler::emit_near_disp(Label* L) {
273 byte disp = 0x00;
274 if (L->is_near_linked()) {
275 int offset = L->near_link_pos() - pc_offset();
276 DCHECK(is_int8(offset));
277 disp = static_cast<byte>(offset & 0xFF);
278 }
279 L->link_to(pc_offset(), Label::kNear);
280 *pc_++ = disp;
281 }
282
deserialization_set_target_internal_reference_at(Address pc,Address target,RelocInfo::Mode mode)283 void Assembler::deserialization_set_target_internal_reference_at(
284 Address pc, Address target, RelocInfo::Mode mode) {
285 WriteUnalignedValue(pc, target);
286 }
287
set_sib(ScaleFactor scale,Register index,Register base)288 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
289 DCHECK_EQ(len_, 1);
290 DCHECK_EQ(scale & -4, 0);
291 // Use SIB with no index register only for base esp.
292 DCHECK(index != esp || base == esp);
293 buf_[1] = scale << 6 | index.code() << 3 | base.code();
294 len_ = 2;
295 }
296
set_disp8(int8_t disp)297 void Operand::set_disp8(int8_t disp) {
298 DCHECK(len_ == 1 || len_ == 2);
299 *reinterpret_cast<int8_t*>(&buf_[len_++]) = disp;
300 }
301
302 } // namespace internal
303 } // namespace v8
304
305 #endif // V8_CODEGEN_IA32_ASSEMBLER_IA32_INL_H_
306