1 /*
2  * Copyright (c) 1993-1999 NVIDIA, Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sublicense, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included
13  * in all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef __RIVA_HW_H__
25 #define __RIVA_HW_H__
26 
27 /*
28  * Define supported architectures.
29  */
30 /***************************************************************************\
31 *                                                                           *
32 *                             FIFO registers.                               *
33 *                                                                           *
34 \***************************************************************************/
35 
36 /*
37  * Raster OPeration. Windows style ROP3.
38  */
39 typedef volatile struct
40 {
41     U032 reserved00[4];
42     U016 FifoFree;
43     U016 Nop;
44     U032 reserved01[0x0BB];
45     U032 Rop3;
46 } RivaRop;
47 /*
48  * 8X8 Monochrome pattern.
49  */
50 typedef volatile struct
51 {
52     U032 reserved00[4];
53     U016 FifoFree;
54     U016 Nop;
55     U032 reserved01[0x0BD];
56     U032 Shape;
57     U032 reserved03[0x001];
58     U032 Color0;
59     U032 Color1;
60     U032 Monochrome[2];
61 } RivaPattern;
62 /*
63  * Scissor clip rectangle.
64  */
65 typedef volatile struct
66 {
67     U032 reserved00[4];
68     U016 FifoFree;
69     U016 Nop;
70     U032 reserved01[0x0BB];
71     U032 TopLeft;
72     U032 WidthHeight;
73 } RivaClip;
74 /*
75  * 2D filled rectangle.
76  */
77 typedef volatile struct
78 {
79     U032 reserved00[4];
80     U016 FifoFree;
81     U016 Nop[1];
82     U032 reserved01[0x0BC];
83     U032 Color;
84     U032 reserved03[0x03E];
85     U032 TopLeft;
86     U032 WidthHeight;
87 } RivaRectangle;
88 /*
89  * 2D screen-screen BLT.
90  */
91 typedef volatile struct
92 {
93     U032 reserved00[4];
94     U016 FifoFree;
95     U016 Nop;
96     U032 reserved01[0x0BB];
97     U032 TopLeftSrc;
98     U032 TopLeftDst;
99     U032 WidthHeight;
100 } RivaScreenBlt;
101 /*
102  * 2D pixel BLT.
103  */
104 typedef volatile struct
105 {
106     U032 reserved00[4];
107     U016 FifoFree;
108     U016 Nop[1];
109     U032 reserved01[0x0BC];
110     U032 TopLeft;
111     U032 WidthHeight;
112     U032 WidthHeightIn;
113     U032 reserved02[0x03C];
114     U032 Pixels;
115 } RivaPixmap;
116 /*
117  * Filled rectangle combined with monochrome expand.  Useful for glyphs.
118  */
119 typedef volatile struct
120 {
121     U032 reserved00[4];
122     U016 FifoFree;
123     U016 Nop;
124     U032 reserved01[0x0BB];
125     U032 reserved03[(0x040)-1];
126     U032 Color1A;
127     struct
128     {
129         U032 TopLeft;
130         U032 WidthHeight;
131     } UnclippedRectangle[64];
132     U032 reserved04[(0x080)-3];
133     struct
134     {
135         U032 TopLeft;
136         U032 BottomRight;
137     } ClipB;
138     U032 Color1B;
139     struct
140     {
141         U032 TopLeft;
142         U032 BottomRight;
143     } ClippedRectangle[64];
144     U032 reserved05[(0x080)-5];
145     struct
146     {
147         U032 TopLeft;
148         U032 BottomRight;
149     } ClipC;
150     U032 Color1C;
151     U032 WidthHeightC;
152     U032 PointC;
153     U032 MonochromeData1C;
154     U032 reserved06[(0x080)+121];
155     struct
156     {
157         U032 TopLeft;
158         U032 BottomRight;
159     } ClipD;
160     U032 Color1D;
161     U032 WidthHeightInD;
162     U032 WidthHeightOutD;
163     U032 PointD;
164     U032 MonochromeData1D;
165     U032 reserved07[(0x080)+120];
166     struct
167     {
168         U032 TopLeft;
169         U032 BottomRight;
170     } ClipE;
171     U032 Color0E;
172     U032 Color1E;
173     U032 WidthHeightInE;
174     U032 WidthHeightOutE;
175     U032 PointE;
176     U032 MonochromeData01E;
177 } RivaBitmap;
178 /*
179  * 2D line.
180  */
181 typedef volatile struct
182 {
183     U032 reserved00[4];
184     U016 FifoFree;
185     U016 Nop[1];
186     U032 reserved01[0x0BC];
187     U032 Color;             /* source color               0304-0307*/
188     U032 Reserved02[0x03e];
189     struct {                /* start aliased methods in array   0400-    */
190         U032 point0;        /* y_x S16_S16 in pixels            0-   3*/
191         U032 point1;        /* y_x S16_S16 in pixels            4-   7*/
192     } Lin[16];              /* end of aliased methods in array      -047f*/
193     struct {                /* start aliased methods in array   0480-    */
194         U032 point0X;       /* in pixels, 0 at left                0-   3*/
195         U032 point0Y;       /* in pixels, 0 at top                 4-   7*/
196         U032 point1X;       /* in pixels, 0 at left                8-   b*/
197         U032 point1Y;       /* in pixels, 0 at top                 c-   f*/
198     } Lin32[8];             /* end of aliased methods in array      -04ff*/
199     U032 PolyLin[32];       /* y_x S16_S16 in pixels         0500-057f*/
200     struct {                /* start aliased methods in array   0580-    */
201         U032 x;             /* in pixels, 0 at left                0-   3*/
202         U032 y;             /* in pixels, 0 at top                 4-   7*/
203     } PolyLin32[16];        /* end of aliased methods in array      -05ff*/
204     struct {                /* start aliased methods in array   0600-    */
205         U032 color;         /* source color                     0-   3*/
206         U032 point;         /* y_x S16_S16 in pixels            4-   7*/
207     } ColorPolyLin[16];     /* end of aliased methods in array      -067f*/
208 } RivaLine;
209 /*
210  * 2D/3D surfaces
211  */
212 typedef volatile struct
213 {
214     U032 reserved00[4];
215     U016 FifoFree;
216     U016 Nop;
217     U032 reserved01[0x0BE];
218     U032 Offset;
219 } RivaSurface;
220 typedef volatile struct
221 {
222     U032 reserved00[4];
223     U016 FifoFree;
224     U016 Nop;
225     U032 reserved01[0x0BD];
226     U032 Pitch;
227     U032 RenderBufferOffset;
228     U032 ZBufferOffset;
229 } RivaSurface3D;
230 
231 /***************************************************************************\
232 *                                                                           *
233 *                        Virtualized RIVA H/W interface.                    *
234 *                                                                           *
235 \***************************************************************************/
236 
237 #define FP_ENABLE  1
238 #define FP_DITHER  2
239 
240 struct _riva_hw_inst;
241 struct _riva_hw_state;
242 /*
243  * Virtialized chip interface. Makes RIVA 128 and TNT look alike.
244  */
245 typedef struct _riva_hw_inst
246 {
247     /*
248      * Chip specific settings.
249      */
250     U032 CrystalFreqKHz;
251     U032 RamAmountKBytes;
252     U032 MaxVClockFreqKHz;
253     U032 RamBandwidthKBytesPerSec;
254     U032 EnableIRQ;
255     U032 IO;
256     U032 VBlankBit;
257     U032 FifoFreeCount;
258     U032 FifoEmptyCount;
259     U032 CursorStart;
260     /*
261      * Non-FIFO registers.
262      */
263     volatile U032 *PCRTC;
264     volatile U032 *PFB;
265     volatile U032 *PFIFO;
266     volatile U032 *PGRAPH;
267     volatile U032 *PEXTDEV;
268     volatile U032 *PTIMER;
269     volatile U032 *PMC;
270     volatile U032 *PRAMIN;
271     volatile U032 *FIFO;
272     volatile U032 *CURSOR;
273     volatile U008 *PCIO;
274     volatile U008 *PVIO;
275     volatile U008 *PDIO;
276     volatile U032 *PRAMDAC;
277     /*
278      * Common chip functions.
279      */
280     int  (*Busy)(struct _riva_hw_inst *);
281     void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int,int);
282     void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
283     void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
284     void (*SetStartAddress)(struct _riva_hw_inst *,U032);
285     int  (*ShowHideCursor)(struct _riva_hw_inst *,int);
286     void (*LockUnlock)(struct _riva_hw_inst *, int);
287     /*
288      * Current extended mode settings.
289      */
290     struct _riva_hw_state *CurrentState;
291     /*
292      * FIFO registers.
293      */
294     RivaRop                 *Rop;
295     RivaPattern             *Patt;
296     RivaClip                *Clip;
297     RivaPixmap              *Pixmap;
298     RivaScreenBlt           *Blt;
299     RivaBitmap              *Bitmap;
300     RivaLine                *Line;
301 } RIVA_HW_INST;
302 /*
303  * Extended mode state information.
304  */
305 typedef struct _riva_hw_state
306 {
307     U032 bpp;
308     U032 width;
309     U032 height;
310     U032 interlace;
311     U032 repaint0;
312     U032 repaint1;
313     U032 screen;
314     U032 extra;
315     U032 pixel;
316     U032 horiz;
317     U032 arbitration0;
318     U032 arbitration1;
319     U032 vpll;
320     U032 pllsel;
321     U032 general;
322     U032 config;
323     U032 cursorConfig;
324     U032 cursor0;
325     U032 cursor1;
326     U032 cursor2;
327     U032 offset;
328     U032 pitch;
329 } RIVA_HW_STATE;
330 
331 /*
332  * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
333  */
334 
335 #define RIVA_FIFO_FREE(hwinst,hwptr,cnt)                           \
336 {                                                                  \
337    while ((hwinst).FifoFreeCount < (cnt)) {                          \
338         mem_barrier(); \
339         mem_barrier(); \
340 	(hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2;        \
341    } \
342    (hwinst).FifoFreeCount -= (cnt);                                \
343 }
344 #define RIVA_BUSY(hwinst) \
345 { \
346    mem_barrier(); \
347    while ((hwinst).Busy(&(hwinst))); \
348 }
349 #endif /* __RIVA_HW_H__ */
350