1 /*
2 * Copyright 2006 Luc Verhaegen.
3 * Copyright 2008 Red Hat, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25 /**
26 * @file This file covers code to convert a xf86MonPtr containing EDID-probed
27 * information into a list of modes, including applying monitor-specific
28 * quirks to fix broken EDID data.
29 */
30 #ifdef HAVE_XORG_CONFIG_H
31 #include <xorg-config.h>
32 #endif
33
34 #define _PARSE_EDID_
35 #include "xf86.h"
36 #include "xf86DDC.h"
37 #include <X11/Xatom.h>
38 #include "property.h"
39 #include "propertyst.h"
40 #include "xf86Crtc.h"
41 #include <string.h>
42 #include <math.h>
43
44 static void
handle_detailed_rblank(struct detailed_monitor_section * det_mon,void * data)45 handle_detailed_rblank(struct detailed_monitor_section *det_mon, void *data)
46 {
47 if (det_mon->type == DS_RANGES)
48 if (det_mon->section.ranges.supported_blanking & CVT_REDUCED)
49 *(Bool *) data = TRUE;
50 }
51
52 static Bool
xf86MonitorSupportsReducedBlanking(xf86MonPtr DDC)53 xf86MonitorSupportsReducedBlanking(xf86MonPtr DDC)
54 {
55 /* EDID 1.4 explicitly defines RB support */
56 if (DDC->ver.revision >= 4) {
57 Bool ret = FALSE;
58
59 xf86ForEachDetailedBlock(DDC, handle_detailed_rblank, &ret);
60 return ret;
61 }
62
63 /* For anything older, assume digital means RB support. Boo. */
64 if (DDC->features.input_type)
65 return TRUE;
66
67 return FALSE;
68 }
69
70 static Bool
quirk_prefer_large_60(int scrnIndex,xf86MonPtr DDC)71 quirk_prefer_large_60(int scrnIndex, xf86MonPtr DDC)
72 {
73 /* Belinea 10 15 55 */
74 if (memcmp(DDC->vendor.name, "MAX", 4) == 0 &&
75 ((DDC->vendor.prod_id == 1516) || (DDC->vendor.prod_id == 0x77e)))
76 return TRUE;
77
78 /* Acer AL1706 */
79 if (memcmp(DDC->vendor.name, "ACR", 4) == 0 && DDC->vendor.prod_id == 44358)
80 return TRUE;
81
82 /* Bug #10814: Samsung SyncMaster 225BW */
83 if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 596)
84 return TRUE;
85
86 /* Bug #10545: Samsung SyncMaster 226BW */
87 if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 638)
88 return TRUE;
89
90 /* Acer F51 */
91 if (memcmp(DDC->vendor.name, "API", 4) == 0 &&
92 DDC->vendor.prod_id == 0x7602)
93 return TRUE;
94
95 return FALSE;
96 }
97
98 static Bool
quirk_prefer_large_75(int scrnIndex,xf86MonPtr DDC)99 quirk_prefer_large_75(int scrnIndex, xf86MonPtr DDC)
100 {
101 /* Bug #11603: Funai Electronics PM36B */
102 if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
103 return TRUE;
104
105 return FALSE;
106 }
107
108 static Bool
quirk_detailed_h_in_cm(int scrnIndex,xf86MonPtr DDC)109 quirk_detailed_h_in_cm(int scrnIndex, xf86MonPtr DDC)
110 {
111 /* Bug #11603: Funai Electronics PM36B */
112 if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
113 return TRUE;
114
115 return FALSE;
116 }
117
118 static Bool
quirk_detailed_v_in_cm(int scrnIndex,xf86MonPtr DDC)119 quirk_detailed_v_in_cm(int scrnIndex, xf86MonPtr DDC)
120 {
121 /* Bug #11603: Funai Electronics PM36B */
122 if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
123 return TRUE;
124
125 /* Bug #21000: LGPhilipsLCD LP154W01-TLAJ */
126 if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 47360)
127 return TRUE;
128
129 /* Bug #10304: LGPhilipsLCD LP154W01-A5 */
130 if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 0)
131 return TRUE;
132
133 /* Bug #24482: LGPhilipsLCD LP154W01-TLA1 */
134 if (memcmp(DDC->vendor.name, "LPL", 4) == 0 &&
135 DDC->vendor.prod_id == 0x2a00)
136 return TRUE;
137
138 /* Bug #28414: HP Compaq NC8430 LP154W01-TLA8 */
139 if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 5750)
140 return TRUE;
141
142 /* Bug #21750: Samsung Syncmaster 2333HD */
143 if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 1157)
144 return TRUE;
145
146 return FALSE;
147 }
148
149 static Bool
quirk_detailed_use_maximum_size(int scrnIndex,xf86MonPtr DDC)150 quirk_detailed_use_maximum_size(int scrnIndex, xf86MonPtr DDC)
151 {
152 /* ADA 1024x600 7" display */
153 if (memcmp(DDC->vendor.name, "ADA", 4) == 0 &&
154 DDC->vendor.prod_id == 4)
155 return TRUE;
156
157 /* Bug #21324: Iiyama Vision Master 450 */
158 if (memcmp(DDC->vendor.name, "IVM", 4) == 0 && DDC->vendor.prod_id == 6400)
159 return TRUE;
160
161 /* Bug #41141: Acer Aspire One */
162 if (memcmp(DDC->vendor.name, "LGD", 4) == 0 &&
163 DDC->vendor.prod_id == 0x7f01)
164 return TRUE;
165
166 /* Sony Vaio Pro 13 */
167 if (memcmp(DDC->vendor.name, "MEI", 4) == 0 &&
168 DDC->vendor.prod_id == 0x96a2)
169 return TRUE;
170
171 return FALSE;
172 }
173
174 static Bool
quirk_135_clock_too_high(int scrnIndex,xf86MonPtr DDC)175 quirk_135_clock_too_high(int scrnIndex, xf86MonPtr DDC)
176 {
177 /* Envision Peripherals, Inc. EN-7100e. See bug #9550. */
178 if (memcmp(DDC->vendor.name, "EPI", 4) == 0 && DDC->vendor.prod_id == 59264)
179 return TRUE;
180
181 return FALSE;
182 }
183
184 static Bool
quirk_first_detailed_preferred(int scrnIndex,xf86MonPtr DDC)185 quirk_first_detailed_preferred(int scrnIndex, xf86MonPtr DDC)
186 {
187 /* Philips 107p5 CRT. Reported on xorg@ with pastebin. */
188 if (memcmp(DDC->vendor.name, "PHL", 4) == 0 && DDC->vendor.prod_id == 57364)
189 return TRUE;
190
191 /* Proview AY765C 17" LCD. See bug #15160 */
192 if (memcmp(DDC->vendor.name, "PTS", 4) == 0 && DDC->vendor.prod_id == 765)
193 return TRUE;
194
195 /* ACR of some sort RH #284231 */
196 if (memcmp(DDC->vendor.name, "ACR", 4) == 0 && DDC->vendor.prod_id == 2423)
197 return TRUE;
198
199 /* Peacock Ergovision 19. See rh#492359 */
200 if (memcmp(DDC->vendor.name, "PEA", 4) == 0 && DDC->vendor.prod_id == 9003)
201 return TRUE;
202
203 return FALSE;
204 }
205
206 static Bool
quirk_detailed_sync_pp(int scrnIndex,xf86MonPtr DDC)207 quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC)
208 {
209 /* Bug #12439: Samsung SyncMaster 205BW */
210 if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 541)
211 return TRUE;
212 return FALSE;
213 }
214
215 /* This should probably be made more generic */
216 static Bool
quirk_dvi_single_link(int scrnIndex,xf86MonPtr DDC)217 quirk_dvi_single_link(int scrnIndex, xf86MonPtr DDC)
218 {
219 /* Red Hat bug #453106: Apple 23" Cinema Display */
220 if (memcmp(DDC->vendor.name, "APL", 4) == 0 &&
221 DDC->vendor.prod_id == 0x921c)
222 return TRUE;
223 return FALSE;
224 }
225
226 typedef struct {
227 Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
228 ddc_quirk_t quirk;
229 const char *description;
230 } ddc_quirk_map_t;
231
232 static const ddc_quirk_map_t ddc_quirks[] = {
233 {
234 quirk_prefer_large_60, DDC_QUIRK_PREFER_LARGE_60,
235 "Detailed timing is not preferred, use largest mode at 60Hz"},
236 {
237 quirk_135_clock_too_high, DDC_QUIRK_135_CLOCK_TOO_HIGH,
238 "Recommended 135MHz pixel clock is too high"},
239 {
240 quirk_prefer_large_75, DDC_QUIRK_PREFER_LARGE_75,
241 "Detailed timing is not preferred, use largest mode at 75Hz"},
242 {
243 quirk_detailed_h_in_cm, DDC_QUIRK_DETAILED_H_IN_CM,
244 "Detailed timings give horizontal size in cm."},
245 {
246 quirk_detailed_v_in_cm, DDC_QUIRK_DETAILED_V_IN_CM,
247 "Detailed timings give vertical size in cm."},
248 {
249 quirk_detailed_use_maximum_size, DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE,
250 "Use maximum size instead of detailed timing sizes."},
251 {
252 quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED,
253 "First detailed timing was not marked as preferred."},
254 {
255 quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP,
256 "Use +hsync +vsync for detailed timing."},
257 {
258 quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK,
259 "Forcing maximum pixel clock to single DVI link."},
260 {
261 NULL, DDC_QUIRK_NONE,
262 "No known quirks"},
263 };
264
265 /*
266 * These more or less come from the DMT spec. The 720x400 modes are
267 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
268 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
269 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
270 * mode.
271 *
272 * The DMT modes have been fact-checked; the rest are mild guesses.
273 */
274 #define MODEPREFIX NULL, NULL, NULL, 0, M_T_DRIVER
275 #define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
276
277 static const DisplayModeRec DDCEstablishedModes[17] = {
278 {MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@60Hz */
279 {MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@56Hz */
280 {MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@75Hz */
281 {MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@72Hz */
282 {MODEPREFIX, 30240, 640, 704, 768, 864, 0, 480, 483, 486, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@67Hz */
283 {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@60Hz */
284 {MODEPREFIX, 35500, 720, 738, 846, 900, 0, 400, 421, 423, 449, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 720x400@88Hz */
285 {MODEPREFIX, 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 720x400@70Hz */
286 {MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x1024@75Hz */
287 {MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1024x768@75Hz */
288 {MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 1024x768@70Hz */
289 {MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 1024x768@60Hz */
290 {MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* 1024x768@43Hz */
291 {MODEPREFIX, 57284, 832, 864, 928, 1152, 0, 624, 625, 628, 667, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 832x624@75Hz */
292 {MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@75Hz */
293 {MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@72Hz */
294 {MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1152x864@75Hz */
295 };
296
297 static DisplayModePtr
DDCModesFromEstablished(int scrnIndex,struct established_timings * timing,ddc_quirk_t quirks)298 DDCModesFromEstablished(int scrnIndex, struct established_timings *timing,
299 ddc_quirk_t quirks)
300 {
301 DisplayModePtr Modes = NULL, Mode = NULL;
302 CARD32 bits = (timing->t1) | (timing->t2 << 8) |
303 ((timing->t_manu & 0x80) << 9);
304 int i;
305
306 for (i = 0; i < 17; i++) {
307 if (bits & (0x01 << i)) {
308 Mode = xf86DuplicateMode(&DDCEstablishedModes[i]);
309 Modes = xf86ModesAdd(Modes, Mode);
310 }
311 }
312
313 return Modes;
314 }
315
316 /* Autogenerated from the DMT spec */
317 const DisplayModeRec DMTModes[] = {
318 {MODEPREFIX, 31500, 640, 672, 736, 832, 0, 350, 382, 385, 445, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x350@85Hz */
319 {MODEPREFIX, 31500, 640, 672, 736, 832, 0, 400, 401, 404, 445, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 640x400@85Hz */
320 {MODEPREFIX, 35500, 720, 756, 828, 936, 0, 400, 401, 404, 446, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 720x400@85Hz */
321 {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@60Hz */
322 {MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@72Hz */
323 {MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@75Hz */
324 {MODEPREFIX, 36000, 640, 696, 752, 832, 0, 480, 481, 484, 509, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@85Hz */
325 {MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@56Hz */
326 {MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@60Hz */
327 {MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@72Hz */
328 {MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@75Hz */
329 {MODEPREFIX, 56250, 800, 832, 896, 1048, 0, 600, 601, 604, 631, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 800x600@85Hz */
330 {MODEPREFIX, 73250, 800, 848, 880, 960, 0, 600, 603, 607, 636, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 800x600@120Hz RB */
331 {MODEPREFIX, 33750, 848, 864, 976, 1088, 0, 480, 486, 494, 517, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 848x480@60Hz */
332 {MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* 1024x768@43Hz (interlaced) */
333 {MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 1024x768@60Hz */
334 {MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 1024x768@70Hz */
335 {MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1024x768@75Hz */
336 {MODEPREFIX, 94500, 1024, 1072, 1168, 1376, 0, 768, 769, 772, 808, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1024x768@85Hz */
337 {MODEPREFIX, 115500, 1024, 1072, 1104, 1184, 0, 768, 771, 775, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1024x768@120Hz RB */
338 {MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1152x864@75Hz */
339 {MODEPREFIX, 68250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 790, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x768@60Hz RB */
340 {MODEPREFIX, 79500, 1280, 1344, 1472, 1664, 0, 768, 771, 778, 798, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x768@60Hz */
341 {MODEPREFIX, 102250, 1280, 1360, 1488, 1696, 0, 768, 771, 778, 805, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x768@75Hz */
342 {MODEPREFIX, 117500, 1280, 1360, 1496, 1712, 0, 768, 771, 778, 809, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x768@85Hz */
343 {MODEPREFIX, 140250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x768@120Hz RB */
344 {MODEPREFIX, 71000, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 823, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x800@60Hz RB */
345 {MODEPREFIX, 83500, 1280, 1352, 1480, 1680, 0, 800, 803, 809, 831, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x800@60Hz */
346 {MODEPREFIX, 106500, 1280, 1360, 1488, 1696, 0, 800, 803, 809, 838, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x800@75Hz */
347 {MODEPREFIX, 122500, 1280, 1360, 1496, 1712, 0, 800, 803, 809, 843, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x800@85Hz */
348 {MODEPREFIX, 146250, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 847, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x800@120Hz RB */
349 {MODEPREFIX, 108000, 1280, 1376, 1488, 1800, 0, 960, 961, 964, 1000, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x960@60Hz */
350 {MODEPREFIX, 148500, 1280, 1344, 1504, 1728, 0, 960, 961, 964, 1011, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x960@85Hz */
351 {MODEPREFIX, 175500, 1280, 1328, 1360, 1440, 0, 960, 963, 967, 1017, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x960@120Hz RB */
352 {MODEPREFIX, 108000, 1280, 1328, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x1024@60Hz */
353 {MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x1024@75Hz */
354 {MODEPREFIX, 157500, 1280, 1344, 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1280x1024@85Hz */
355 {MODEPREFIX, 187250, 1280, 1328, 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1280x1024@120Hz RB */
356 {MODEPREFIX, 85500, 1360, 1424, 1536, 1792, 0, 768, 771, 777, 795, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1360x768@60Hz */
357 {MODEPREFIX, 148250, 1360, 1408, 1440, 1520, 0, 768, 771, 776, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1360x768@120Hz RB */
358 {MODEPREFIX, 101000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1400x1050@60Hz RB */
359 {MODEPREFIX, 121750, 1400, 1488, 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1400x1050@60Hz */
360 {MODEPREFIX, 156000, 1400, 1504, 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1400x1050@75Hz */
361 {MODEPREFIX, 179500, 1400, 1504, 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1400x1050@85Hz */
362 {MODEPREFIX, 208000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1400x1050@120Hz RB */
363 {MODEPREFIX, 88750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 926, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1440x900@60Hz RB */
364 {MODEPREFIX, 106500, 1440, 1520, 1672, 1904, 0, 900, 903, 909, 934, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1440x900@60Hz */
365 {MODEPREFIX, 136750, 1440, 1536, 1688, 1936, 0, 900, 903, 909, 942, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1440x900@75Hz */
366 {MODEPREFIX, 157000, 1440, 1544, 1696, 1952, 0, 900, 903, 909, 948, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1440x900@85Hz */
367 {MODEPREFIX, 182750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 953, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1440x900@120Hz RB */
368 {MODEPREFIX, 162000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1600x1200@60Hz */
369 {MODEPREFIX, 175500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1600x1200@65Hz */
370 {MODEPREFIX, 189000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1600x1200@70Hz */
371 {MODEPREFIX, 202500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1600x1200@75Hz */
372 {MODEPREFIX, 229500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* 1600x1200@85Hz */
373 {MODEPREFIX, 268250, 1600, 1648, 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1600x1200@120Hz RB */
374 {MODEPREFIX, 119000, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1680x1050@60Hz RB */
375 {MODEPREFIX, 146250, 1680, 1784, 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1680x1050@60Hz */
376 {MODEPREFIX, 187000, 1680, 1800, 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1680x1050@75Hz */
377 {MODEPREFIX, 214750, 1680, 1808, 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1680x1050@85Hz */
378 {MODEPREFIX, 245500, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1680x1050@120Hz RB */
379 {MODEPREFIX, 204750, 1792, 1920, 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1792x1344@60Hz */
380 {MODEPREFIX, 261000, 1792, 1888, 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1792x1344@75Hz */
381 {MODEPREFIX, 333250, 1792, 1840, 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1792x1344@120Hz RB */
382 {MODEPREFIX, 218250, 1856, 1952, 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1856x1392@60Hz */
383 {MODEPREFIX, 288000, 1856, 1984, 2208, 2560, 0, 1392, 1393, 1396, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1856x1392@75Hz */
384 {MODEPREFIX, 356500, 1856, 1904, 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1856x1392@120Hz RB */
385 {MODEPREFIX, 154000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1920x1200@60Hz RB */
386 {MODEPREFIX, 193250, 1920, 2056, 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1920x1200@60Hz */
387 {MODEPREFIX, 245250, 1920, 2056, 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1920x1200@75Hz */
388 {MODEPREFIX, 281250, 1920, 2064, 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1920x1200@85Hz */
389 {MODEPREFIX, 317000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1920x1200@120Hz RB */
390 {MODEPREFIX, 234000, 1920, 2048, 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1920x1440@60Hz */
391 {MODEPREFIX, 297000, 1920, 2064, 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 1920x1440@75Hz */
392 {MODEPREFIX, 380500, 1920, 1968, 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 1920x1440@120Hz RB */
393 {MODEPREFIX, 268500, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 2560x1600@60Hz RB */
394 {MODEPREFIX, 348500, 2560, 2752, 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 2560x1600@60Hz */
395 {MODEPREFIX, 443250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 2560x1600@75Hz */
396 {MODEPREFIX, 505250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 2560x1600@85Hz */
397 {MODEPREFIX, 552750, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 2560x1600@120Hz RB */
398 };
399
400 #define LEVEL_DMT 0
401 #define LEVEL_GTF 1
402 #define LEVEL_CVT 2
403
404 static int
MonitorStandardTimingLevel(xf86MonPtr DDC)405 MonitorStandardTimingLevel(xf86MonPtr DDC)
406 {
407 if (DDC->ver.revision >= 2) {
408 if (DDC->ver.revision >= 4 && CVT_SUPPORTED(DDC->features.msc)) {
409 return LEVEL_CVT;
410 }
411 return LEVEL_GTF;
412 }
413 return LEVEL_DMT;
414 }
415
416 static int
ModeRefresh(const DisplayModeRec * mode)417 ModeRefresh(const DisplayModeRec * mode)
418 {
419 return (int) (xf86ModeVRefresh(mode) + 0.5);
420 }
421
422 /*
423 * If rb is not set, then we'll not consider reduced-blanking modes as
424 * part of the DMT pool. For the 'standard' EDID mode descriptor there's
425 * no way to specify whether the mode should be RB or not.
426 */
427 DisplayModePtr
FindDMTMode(int hsize,int vsize,int refresh,Bool rb)428 FindDMTMode(int hsize, int vsize, int refresh, Bool rb)
429 {
430 int i;
431 const DisplayModeRec *ret;
432
433 for (i = 0; i < ARRAY_SIZE(DMTModes); i++) {
434 ret = &DMTModes[i];
435
436 if (!rb && xf86ModeIsReduced(ret))
437 continue;
438
439 if (ret->HDisplay == hsize &&
440 ret->VDisplay == vsize && refresh == ModeRefresh(ret))
441 return xf86DuplicateMode(ret);
442 }
443
444 return NULL;
445 }
446
447 /*
448 * Appendix B of the EDID 1.4 spec defines the right thing to do here.
449 * If the timing given here matches a mode defined in the VESA DMT standard,
450 * we _must_ use that. If the device supports CVT modes, then we should
451 * generate a CVT timing. If both of the above fail, use GTF.
452 *
453 * There are some wrinkles here. EDID 1.1 and 1.0 sinks can't really
454 * "support" GTF, since it wasn't a standard yet; so if they ask for a
455 * timing in this section that isn't defined in DMT, returning a GTF mode
456 * may not actually be valid. EDID 1.3 sinks often report support for
457 * some CVT modes, but they are not required to support CVT timings for
458 * modes in the standard timing descriptor, so we should _not_ treat them
459 * as CVT-compliant (unless specified in an extension block I suppose).
460 *
461 * EDID 1.4 requires that all sink devices support both GTF and CVT timings
462 * for modes in this section, but does say that CVT is preferred.
463 */
464 static DisplayModePtr
DDCModesFromStandardTiming(DisplayModePtr pool,struct std_timings * timing,ddc_quirk_t quirks,int timing_level,Bool rb)465 DDCModesFromStandardTiming(DisplayModePtr pool, struct std_timings *timing,
466 ddc_quirk_t quirks,
467 int timing_level, Bool rb)
468 {
469 DisplayModePtr Modes = NULL, Mode = NULL;
470 int i, hsize, vsize, refresh;
471
472 for (i = 0; i < STD_TIMINGS; i++) {
473 DisplayModePtr p = NULL;
474 hsize = timing[i].hsize;
475 vsize = timing[i].vsize;
476 refresh = timing[i].refresh;
477
478 /* HDTV hack, part one */
479 if (refresh == 60 &&
480 ((hsize == 1360 && vsize == 765) ||
481 (hsize == 1368 && vsize == 769))) {
482 hsize = 1366;
483 vsize = 768;
484 }
485
486 /* If we already have a detailed timing for this size, don't add more */
487 for (p = pool; p; p = p->next) {
488 if (p->HDisplay == hsize && p->VDisplay == vsize &&
489 refresh == round(xf86ModeVRefresh(p)))
490 break;
491 }
492 if (p)
493 continue;
494
495 /* HDTV hack, because you can't say 1366 */
496 if (refresh == 60 && hsize == 1366 && vsize == 768) {
497 Mode = xf86CVTMode(1366, 768, 60, FALSE, FALSE);
498 Mode->HDisplay = 1366;
499 Mode->HSyncStart--;
500 Mode->HSyncEnd--;
501 }
502 else if (hsize && vsize && refresh) {
503 Mode = FindDMTMode(hsize, vsize, refresh, rb);
504
505 if (!Mode) {
506 if (timing_level == LEVEL_CVT)
507 /* pass rb here too? */
508 Mode = xf86CVTMode(hsize, vsize, refresh, FALSE, FALSE);
509 else if (timing_level == LEVEL_GTF)
510 Mode = xf86GTFMode(hsize, vsize, refresh, FALSE, FALSE);
511 }
512
513 }
514
515 if (Mode) {
516 Mode->type = M_T_DRIVER;
517 Modes = xf86ModesAdd(Modes, Mode);
518 }
519 Mode = NULL;
520 }
521
522 return Modes;
523 }
524
525 static void
DDCModeDoInterlaceQuirks(DisplayModePtr mode)526 DDCModeDoInterlaceQuirks(DisplayModePtr mode)
527 {
528 /*
529 * EDID is delightfully ambiguous about how interlaced modes are to be
530 * encoded. X's internal representation is of frame height, but some
531 * HDTV detailed timings are encoded as field height.
532 *
533 * The format list here is from CEA, in frame size. Technically we
534 * should be checking refresh rate too. Whatever.
535 */
536 static const struct {
537 int w, h;
538 } cea_interlaced[] = {
539 {1920, 1080},
540 {720, 480},
541 {1440, 480},
542 {2880, 480},
543 {720, 576},
544 {1440, 576},
545 {2880, 576},
546 };
547 int i;
548
549 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
550 if ((mode->HDisplay == cea_interlaced[i].w) &&
551 (mode->VDisplay == cea_interlaced[i].h / 2)) {
552 mode->VDisplay *= 2;
553 mode->VSyncStart *= 2;
554 mode->VSyncEnd *= 2;
555 mode->VTotal *= 2;
556 mode->VTotal |= 1;
557 }
558 }
559
560 mode->Flags |= V_INTERLACE;
561 }
562
563 /*
564 *
565 */
566 static DisplayModePtr
DDCModeFromDetailedTiming(int scrnIndex,struct detailed_timings * timing,Bool preferred,ddc_quirk_t quirks)567 DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
568 Bool preferred, ddc_quirk_t quirks)
569 {
570 DisplayModePtr Mode;
571
572 /*
573 * Refuse to create modes that are insufficiently large. 64 is a random
574 * number, maybe the spec says something about what the minimum is. In
575 * particular I see this frequently with _old_ EDID, 1.0 or so, so maybe
576 * our parser is just being too aggresive there.
577 */
578 if (timing->h_active < 64 || timing->v_active < 64) {
579 xf86DrvMsg(scrnIndex, X_INFO,
580 "%s: Ignoring tiny %dx%d mode\n", __func__,
581 timing->h_active, timing->v_active);
582 return NULL;
583 }
584
585 /* We don't do stereo */
586 if (timing->stereo) {
587 xf86DrvMsg(scrnIndex, X_INFO,
588 "%s: Ignoring: We don't handle stereo.\n", __func__);
589 return NULL;
590 }
591
592 /* We only do seperate sync currently */
593 if (timing->sync != 0x03) {
594 xf86DrvMsg(scrnIndex, X_INFO,
595 "%s: %dx%d Warning: We only handle separate"
596 " sync.\n", __func__, timing->h_active, timing->v_active);
597 }
598
599 Mode = xnfcalloc(1, sizeof(DisplayModeRec));
600
601 Mode->type = M_T_DRIVER;
602 if (preferred)
603 Mode->type |= M_T_PREFERRED;
604
605 if ((quirks & DDC_QUIRK_135_CLOCK_TOO_HIGH) && timing->clock == 135000000)
606 Mode->Clock = 108880;
607 else
608 Mode->Clock = timing->clock / 1000.0;
609
610 Mode->HDisplay = timing->h_active;
611 Mode->HSyncStart = timing->h_active + timing->h_sync_off;
612 Mode->HSyncEnd = Mode->HSyncStart + timing->h_sync_width;
613 Mode->HTotal = timing->h_active + timing->h_blanking;
614
615 Mode->VDisplay = timing->v_active;
616 Mode->VSyncStart = timing->v_active + timing->v_sync_off;
617 Mode->VSyncEnd = Mode->VSyncStart + timing->v_sync_width;
618 Mode->VTotal = timing->v_active + timing->v_blanking;
619
620 /* perform basic check on the detail timing */
621 if (Mode->HSyncEnd > Mode->HTotal || Mode->VSyncEnd > Mode->VTotal) {
622 free(Mode);
623 return NULL;
624 }
625
626 /* We ignore h/v_size and h/v_border for now. */
627
628 if (timing->interlaced)
629 DDCModeDoInterlaceQuirks(Mode);
630
631 if (quirks & DDC_QUIRK_DETAILED_SYNC_PP)
632 Mode->Flags |= V_PVSYNC | V_PHSYNC;
633 else {
634 if (timing->misc & 0x02)
635 Mode->Flags |= V_PVSYNC;
636 else
637 Mode->Flags |= V_NVSYNC;
638
639 if (timing->misc & 0x01)
640 Mode->Flags |= V_PHSYNC;
641 else
642 Mode->Flags |= V_NHSYNC;
643 }
644
645 xf86SetModeDefaultName(Mode);
646
647 return Mode;
648 }
649
650 static DisplayModePtr
DDCModesFromCVT(int scrnIndex,struct cvt_timings * t)651 DDCModesFromCVT(int scrnIndex, struct cvt_timings *t)
652 {
653 DisplayModePtr modes = NULL;
654 int i;
655
656 for (i = 0; i < 4; i++) {
657 if (t[i].height) {
658 if (t[i].rates & 0x10)
659 modes = xf86ModesAdd(modes,
660 xf86CVTMode(t[i].width, t[i].height, 50, 0,
661 0));
662 if (t[i].rates & 0x08)
663 modes = xf86ModesAdd(modes,
664 xf86CVTMode(t[i].width, t[i].height, 60, 0,
665 0));
666 if (t[i].rates & 0x04)
667 modes = xf86ModesAdd(modes,
668 xf86CVTMode(t[i].width, t[i].height, 75, 0,
669 0));
670 if (t[i].rates & 0x02)
671 modes = xf86ModesAdd(modes,
672 xf86CVTMode(t[i].width, t[i].height, 85, 0,
673 0));
674 if (t[i].rates & 0x01)
675 modes = xf86ModesAdd(modes,
676 xf86CVTMode(t[i].width, t[i].height, 60, 1,
677 0));
678 }
679 else
680 break;
681 }
682
683 return modes;
684 }
685
686 static const struct {
687 short w;
688 short h;
689 short r;
690 short rb;
691 } EstIIIModes[] = {
692 /* byte 6 */
693 {640, 350, 85, 0},
694 {640, 400, 85, 0},
695 {720, 400, 85, 0},
696 {640, 480, 85, 0},
697 {848, 480, 60, 0},
698 {800, 600, 85, 0},
699 {1024, 768, 85, 0},
700 {1152, 864, 75, 0},
701 /* byte 7 */
702 {1280, 768, 60, 1},
703 {1280, 768, 60, 0},
704 {1280, 768, 75, 0},
705 {1280, 768, 85, 0},
706 {1280, 960, 60, 0},
707 {1280, 960, 85, 0},
708 {1280, 1024, 60, 0},
709 {1280, 1024, 85, 0},
710 /* byte 8 */
711 {1360, 768, 60, 0},
712 {1440, 900, 60, 1},
713 {1440, 900, 60, 0},
714 {1440, 900, 75, 0},
715 {1440, 900, 85, 0},
716 {1400, 1050, 60, 1},
717 {1400, 1050, 60, 0},
718 {1400, 1050, 75, 0},
719 /* byte 9 */
720 {1400, 1050, 85, 0},
721 {1680, 1050, 60, 1},
722 {1680, 1050, 60, 0},
723 {1680, 1050, 75, 0},
724 {1680, 1050, 85, 0},
725 {1600, 1200, 60, 0},
726 {1600, 1200, 65, 0},
727 {1600, 1200, 70, 0},
728 /* byte 10 */
729 {1600, 1200, 75, 0},
730 {1600, 1200, 85, 0},
731 {1792, 1344, 60, 0},
732 {1792, 1344, 75, 0},
733 {1856, 1392, 60, 0},
734 {1856, 1392, 75, 0},
735 {1920, 1200, 60, 1},
736 {1920, 1200, 60, 0},
737 /* byte 11 */
738 {1920, 1200, 75, 0},
739 {1920, 1200, 85, 0},
740 {1920, 1440, 60, 0},
741 {1920, 1440, 75, 0},
742 /* fill up last byte */
743 {0,0,0,0},
744 {0,0,0,0},
745 {0,0,0,0},
746 {0,0,0,0},
747 };
748
749 static DisplayModePtr
DDCModesFromEstIII(unsigned char * est)750 DDCModesFromEstIII(unsigned char *est)
751 {
752 DisplayModePtr modes = NULL;
753 int i, j, m;
754
755 for (i = 0; i < 6; i++) {
756 for (j = 7; j >= 0; j--) {
757 if (est[i] & (1 << j)) {
758 m = (i * 8) + (7 - j);
759 if (EstIIIModes[m].w)
760 modes = xf86ModesAdd(modes,
761 FindDMTMode(EstIIIModes[m].w,
762 EstIIIModes[m].h,
763 EstIIIModes[m].r,
764 EstIIIModes[m].rb));
765 }
766 }
767 }
768
769 return modes;
770 }
771
772 /*
773 * This is only valid when the sink claims to be continuous-frequency
774 * but does not supply a detailed range descriptor. Such sinks are
775 * arguably broken. Currently the mode validation code isn't aware of
776 * this; the non-RANDR code even punts the decision of optional sync
777 * range checking to the driver. Loss.
778 */
779 static void
DDCGuessRangesFromModes(int scrnIndex,MonPtr Monitor,DisplayModePtr Modes)780 DDCGuessRangesFromModes(int scrnIndex, MonPtr Monitor, DisplayModePtr Modes)
781 {
782 DisplayModePtr Mode = Modes;
783
784 if (!Monitor || !Modes)
785 return;
786
787 /* set up the ranges for scanning through the modes */
788 Monitor->nHsync = 1;
789 Monitor->hsync[0].lo = 1024.0;
790 Monitor->hsync[0].hi = 0.0;
791
792 Monitor->nVrefresh = 1;
793 Monitor->vrefresh[0].lo = 1024.0;
794 Monitor->vrefresh[0].hi = 0.0;
795
796 while (Mode) {
797 if (!Mode->HSync)
798 Mode->HSync = ((float) Mode->Clock) / ((float) Mode->HTotal);
799
800 if (!Mode->VRefresh)
801 Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
802 ((float) (Mode->HTotal * Mode->VTotal));
803
804 if (Mode->HSync < Monitor->hsync[0].lo)
805 Monitor->hsync[0].lo = Mode->HSync;
806
807 if (Mode->HSync > Monitor->hsync[0].hi)
808 Monitor->hsync[0].hi = Mode->HSync;
809
810 if (Mode->VRefresh < Monitor->vrefresh[0].lo)
811 Monitor->vrefresh[0].lo = Mode->VRefresh;
812
813 if (Mode->VRefresh > Monitor->vrefresh[0].hi)
814 Monitor->vrefresh[0].hi = Mode->VRefresh;
815
816 Mode = Mode->next;
817 }
818 }
819
820 ddc_quirk_t
xf86DDCDetectQuirks(int scrnIndex,xf86MonPtr DDC,Bool verbose)821 xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose)
822 {
823 ddc_quirk_t quirks;
824 int i;
825
826 quirks = DDC_QUIRK_NONE;
827 for (i = 0; ddc_quirks[i].detect; i++) {
828 if (ddc_quirks[i].detect(scrnIndex, DDC)) {
829 if (verbose) {
830 xf86DrvMsg(scrnIndex, X_INFO, " EDID quirk: %s\n",
831 ddc_quirks[i].description);
832 }
833 quirks |= ddc_quirks[i].quirk;
834 }
835 }
836
837 return quirks;
838 }
839
840 void
xf86DetTimingApplyQuirks(struct detailed_monitor_section * det_mon,ddc_quirk_t quirks,int hsize,int vsize)841 xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
842 ddc_quirk_t quirks, int hsize, int vsize)
843 {
844 if (det_mon->type != DT)
845 return;
846
847 if (quirks & DDC_QUIRK_DETAILED_H_IN_CM)
848 det_mon->section.d_timings.h_size *= 10;
849
850 if (quirks & DDC_QUIRK_DETAILED_V_IN_CM)
851 det_mon->section.d_timings.v_size *= 10;
852
853 if (quirks & DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
854 det_mon->section.d_timings.h_size = 10 * hsize;
855 det_mon->section.d_timings.v_size = 10 * vsize;
856 }
857 }
858
859 /**
860 * Applies monitor-specific quirks to the decoded EDID information.
861 *
862 * Note that some quirks applying to the mode list are still implemented in
863 * xf86DDCGetModes.
864 */
865 void
xf86DDCApplyQuirks(int scrnIndex,xf86MonPtr DDC)866 xf86DDCApplyQuirks(int scrnIndex, xf86MonPtr DDC)
867 {
868 ddc_quirk_t quirks = xf86DDCDetectQuirks(scrnIndex, DDC, FALSE);
869 int i;
870
871 for (i = 0; i < DET_TIMINGS; i++) {
872 xf86DetTimingApplyQuirks(DDC->det_mon + i, quirks,
873 DDC->features.hsize, DDC->features.vsize);
874 }
875 }
876
877 /**
878 * Walks the modes list, finding the mode with the largest area which is
879 * closest to the target refresh rate, and marks it as the only preferred mode.
880 */
881 static void
xf86DDCSetPreferredRefresh(int scrnIndex,DisplayModePtr modes,float target_refresh)882 xf86DDCSetPreferredRefresh(int scrnIndex, DisplayModePtr modes,
883 float target_refresh)
884 {
885 DisplayModePtr mode, best = modes;
886
887 for (mode = modes; mode; mode = mode->next) {
888 mode->type &= ~M_T_PREFERRED;
889
890 if (mode == best)
891 continue;
892
893 if (mode->HDisplay * mode->VDisplay > best->HDisplay * best->VDisplay) {
894 best = mode;
895 continue;
896 }
897 if (mode->HDisplay * mode->VDisplay == best->HDisplay * best->VDisplay) {
898 double mode_refresh = xf86ModeVRefresh(mode);
899 double best_refresh = xf86ModeVRefresh(best);
900 double mode_dist = fabs(mode_refresh - target_refresh);
901 double best_dist = fabs(best_refresh - target_refresh);
902
903 if (mode_dist < best_dist) {
904 best = mode;
905 continue;
906 }
907 }
908 }
909 if (best)
910 best->type |= M_T_PREFERRED;
911 }
912
913 #define CEA_VIDEO_MODES_NUM 64
914 static const DisplayModeRec CEAVideoModes[CEA_VIDEO_MODES_NUM] = {
915 {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 1:640x480@60Hz */
916 {MODEPREFIX, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 2:720x480@60Hz */
917 {MODEPREFIX, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 3:720x480@60Hz */
918 {MODEPREFIX, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 4: 1280x720@60Hz */
919 {MODEPREFIX, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 5:1920x1080i@60Hz */
920 {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 6:1440x480i@60Hz */
921 {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 7:1440x480i@60Hz */
922 {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 8:1440x240@60Hz */
923 {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 9:1440x240@60Hz */
924 {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 10:2880x480i@60Hz */
925 {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 11:2880x480i@60Hz */
926 {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 12:2880x240@60Hz */
927 {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 13:2880x240@60Hz */
928 {MODEPREFIX, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 14:1440x480@60Hz */
929 {MODEPREFIX, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 15:1440x480@60Hz */
930 {MODEPREFIX, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 16:1920x1080@60Hz */
931 {MODEPREFIX, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 17:720x576@50Hz */
932 {MODEPREFIX, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 18:720x576@50Hz */
933 {MODEPREFIX, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 19: 1280x720@50Hz */
934 {MODEPREFIX, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 20:1920x1080i@50Hz */
935 {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 21:1440x576i@50Hz */
936 {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 22:1440x576i@50Hz */
937 {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 23:1440x288@50Hz */
938 {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 24:1440x288@50Hz */
939 {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 25:2880x576i@50Hz */
940 {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 26:2880x576i@50Hz */
941 {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 27:2880x288@50Hz */
942 {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 28:2880x288@50Hz */
943 {MODEPREFIX, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 29:1440x576@50Hz */
944 {MODEPREFIX, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 30:1440x576@50Hz */
945 {MODEPREFIX, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 31:1920x1080@50Hz */
946 {MODEPREFIX, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 32:1920x1080@24Hz */
947 {MODEPREFIX, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 33:1920x1080@25Hz */
948 {MODEPREFIX, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 34:1920x1080@30Hz */
949 {MODEPREFIX, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 35:2880x480@60Hz */
950 {MODEPREFIX, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 36:2880x480@60Hz */
951 {MODEPREFIX, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 37:2880x576@50Hz */
952 {MODEPREFIX, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 38:2880x576@50Hz */
953 {MODEPREFIX, 72000, 1920, 1952, 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, V_PHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 39:1920x1080i@50Hz */
954 {MODEPREFIX, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 40:1920x1080i@100Hz */
955 {MODEPREFIX, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 41:1280x720@100Hz */
956 {MODEPREFIX, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 42:720x576@100Hz */
957 {MODEPREFIX, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 43:720x576@100Hz */
958 {MODEPREFIX, 54000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 44:1440x576i@100Hz */
959 {MODEPREFIX, 54000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 45:1440x576i@100Hz */
960 {MODEPREFIX, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 46:1920x1080i@120Hz */
961 {MODEPREFIX, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 47:1280x720@120Hz */
962 {MODEPREFIX, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 48:720x480@120Hz */
963 {MODEPREFIX, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 49:720x480@120Hz */
964 {MODEPREFIX, 54000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 50:1440x480i@120Hz */
965 {MODEPREFIX, 54000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 51:1440x480i@120Hz */
966 {MODEPREFIX, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 52:720x576@200Hz */
967 {MODEPREFIX, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 53:720x576@200Hz */
968 {MODEPREFIX, 108000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 54:1440x576i@200Hz */
969 {MODEPREFIX, 108000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 55:1440x576i@200Hz */
970 {MODEPREFIX, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 56:720x480@240Hz */
971 {MODEPREFIX, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 57:720x480@240Hz */
972 {MODEPREFIX, 108000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 58:1440x480i@240 */
973 {MODEPREFIX, 108000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX}, /* VIC 59:1440x480i@240 */
974 {MODEPREFIX, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 60: 1280x720@24Hz */
975 {MODEPREFIX, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 61: 1280x720@25Hz */
976 {MODEPREFIX, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 62: 1280x720@30Hz */
977 {MODEPREFIX, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 63: 1920x1080@120Hz */
978 {MODEPREFIX, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 64:1920x1080@100Hz */
979 };
980
981 /* chose mode line by cea short video descriptor*/
982 static void
handle_cea_svd(struct cea_video_block * video,void * data)983 handle_cea_svd(struct cea_video_block *video, void *data)
984 {
985 DisplayModePtr Mode;
986 DisplayModePtr *Modes = (DisplayModePtr *) data;
987 int vid;
988
989 vid = video->video_code & 0x7f;
990 if (vid >= 1 && vid <= CEA_VIDEO_MODES_NUM) {
991 Mode = xf86DuplicateMode(CEAVideoModes + (vid - 1));
992 *Modes = xf86ModesAdd(*Modes, Mode);
993 }
994 }
995
996 static DisplayModePtr
DDCModesFromCEAExtension(int scrnIndex,xf86MonPtr mon_ptr)997 DDCModesFromCEAExtension(int scrnIndex, xf86MonPtr mon_ptr)
998 {
999 DisplayModePtr Modes = NULL;
1000
1001 xf86ForEachVideoBlock(mon_ptr, handle_cea_svd, &Modes);
1002
1003 return Modes;
1004 }
1005
1006 struct det_modes_parameter {
1007 xf86MonPtr DDC;
1008 ddc_quirk_t quirks;
1009 DisplayModePtr Modes;
1010 Bool rb;
1011 Bool preferred;
1012 int timing_level;
1013 };
1014
1015 static void
handle_detailed_modes(struct detailed_monitor_section * det_mon,void * data)1016 handle_detailed_modes(struct detailed_monitor_section *det_mon, void *data)
1017 {
1018 DisplayModePtr Mode;
1019 struct det_modes_parameter *p = (struct det_modes_parameter *) data;
1020
1021 xf86DetTimingApplyQuirks(det_mon, p->quirks,
1022 p->DDC->features.hsize, p->DDC->features.vsize);
1023
1024 switch (det_mon->type) {
1025 case DT:
1026 Mode = DDCModeFromDetailedTiming(p->DDC->scrnIndex,
1027 &det_mon->section.d_timings,
1028 p->preferred, p->quirks);
1029 p->preferred = FALSE;
1030 p->Modes = xf86ModesAdd(p->Modes, Mode);
1031 break;
1032 case DS_STD_TIMINGS:
1033 Mode = DDCModesFromStandardTiming(p->Modes,
1034 det_mon->section.std_t,
1035 p->quirks, p->timing_level, p->rb);
1036 p->Modes = xf86ModesAdd(p->Modes, Mode);
1037 break;
1038 case DS_CVT:
1039 Mode = DDCModesFromCVT(p->DDC->scrnIndex, det_mon->section.cvt);
1040 p->Modes = xf86ModesAdd(p->Modes, Mode);
1041 break;
1042 case DS_EST_III:
1043 Mode = DDCModesFromEstIII(det_mon->section.est_iii);
1044 p->Modes = xf86ModesAdd(p->Modes, Mode);
1045 break;
1046 default:
1047 break;
1048 }
1049 }
1050
1051 DisplayModePtr
xf86DDCGetModes(int scrnIndex,xf86MonPtr DDC)1052 xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC)
1053 {
1054 DisplayModePtr Modes = NULL, Mode;
1055 ddc_quirk_t quirks;
1056 Bool preferred, rb;
1057 int timing_level;
1058 struct det_modes_parameter p;
1059
1060 xf86DrvMsg(scrnIndex, X_INFO, "EDID vendor \"%s\", prod id %d\n",
1061 DDC->vendor.name, DDC->vendor.prod_id);
1062
1063 quirks = xf86DDCDetectQuirks(scrnIndex, DDC, TRUE);
1064
1065 preferred = PREFERRED_TIMING_MODE(DDC->features.msc);
1066 if (DDC->ver.revision >= 4)
1067 preferred = TRUE;
1068 if (quirks & DDC_QUIRK_FIRST_DETAILED_PREFERRED)
1069 preferred = TRUE;
1070 if (quirks & (DDC_QUIRK_PREFER_LARGE_60 | DDC_QUIRK_PREFER_LARGE_75))
1071 preferred = FALSE;
1072
1073 rb = xf86MonitorSupportsReducedBlanking(DDC);
1074
1075 timing_level = MonitorStandardTimingLevel(DDC);
1076
1077 p.quirks = quirks;
1078 p.DDC = DDC;
1079 p.Modes = Modes;
1080 p.rb = rb;
1081 p.preferred = preferred;
1082 p.timing_level = timing_level;
1083 xf86ForEachDetailedBlock(DDC, handle_detailed_modes, &p);
1084 Modes = p.Modes;
1085
1086 /* Add cea-extension mode timings */
1087 Mode = DDCModesFromCEAExtension(scrnIndex, DDC);
1088 Modes = xf86ModesAdd(Modes, Mode);
1089
1090 /* Add established timings */
1091 Mode = DDCModesFromEstablished(scrnIndex, &DDC->timings1, quirks);
1092 Modes = xf86ModesAdd(Modes, Mode);
1093
1094 /* Add standard timings */
1095 Mode = DDCModesFromStandardTiming(Modes, DDC->timings2, quirks,
1096 timing_level, rb);
1097 Modes = xf86ModesAdd(Modes, Mode);
1098
1099 if (quirks & DDC_QUIRK_PREFER_LARGE_60)
1100 xf86DDCSetPreferredRefresh(scrnIndex, Modes, 60);
1101
1102 if (quirks & DDC_QUIRK_PREFER_LARGE_75)
1103 xf86DDCSetPreferredRefresh(scrnIndex, Modes, 75);
1104
1105 Modes = xf86PruneDuplicateModes(Modes);
1106
1107 return Modes;
1108 }
1109
1110 struct det_mon_parameter {
1111 MonPtr Monitor;
1112 ddc_quirk_t quirks;
1113 Bool have_hsync;
1114 Bool have_vrefresh;
1115 Bool have_maxpixclock;
1116 };
1117
1118 static void
handle_detailed_monset(struct detailed_monitor_section * det_mon,void * data)1119 handle_detailed_monset(struct detailed_monitor_section *det_mon, void *data)
1120 {
1121 int clock;
1122 struct det_mon_parameter *p = (struct det_mon_parameter *) data;
1123 int scrnIndex = ((xf86MonPtr) (p->Monitor->DDC))->scrnIndex;
1124
1125 switch (det_mon->type) {
1126 case DS_RANGES:
1127 if (!p->have_hsync) {
1128 if (!p->Monitor->nHsync)
1129 xf86DrvMsg(scrnIndex, X_INFO,
1130 "Using EDID range info for horizontal sync\n");
1131 p->Monitor->hsync[p->Monitor->nHsync].lo =
1132 det_mon->section.ranges.min_h;
1133 p->Monitor->hsync[p->Monitor->nHsync].hi =
1134 det_mon->section.ranges.max_h;
1135 p->Monitor->nHsync++;
1136 }
1137 else {
1138 xf86DrvMsg(scrnIndex, X_INFO,
1139 "Using hsync ranges from config file\n");
1140 }
1141
1142 if (!p->have_vrefresh) {
1143 if (!p->Monitor->nVrefresh)
1144 xf86DrvMsg(scrnIndex, X_INFO,
1145 "Using EDID range info for vertical refresh\n");
1146 p->Monitor->vrefresh[p->Monitor->nVrefresh].lo =
1147 det_mon->section.ranges.min_v;
1148 p->Monitor->vrefresh[p->Monitor->nVrefresh].hi =
1149 det_mon->section.ranges.max_v;
1150 p->Monitor->nVrefresh++;
1151 }
1152 else {
1153 xf86DrvMsg(scrnIndex, X_INFO,
1154 "Using vrefresh ranges from config file\n");
1155 }
1156
1157 clock = det_mon->section.ranges.max_clock * 1000;
1158 if (p->quirks & DDC_QUIRK_DVI_SINGLE_LINK)
1159 clock = min(clock, 165000);
1160 if (!p->have_maxpixclock && clock > p->Monitor->maxPixClock)
1161 p->Monitor->maxPixClock = clock;
1162
1163 break;
1164 default:
1165 break;
1166 }
1167 }
1168
1169 /*
1170 * Fill out MonPtr with xf86MonPtr information.
1171 */
1172 void
xf86EdidMonitorSet(int scrnIndex,MonPtr Monitor,xf86MonPtr DDC)1173 xf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
1174 {
1175 DisplayModePtr Modes = NULL, Mode;
1176 struct det_mon_parameter p;
1177
1178 if (!Monitor || !DDC)
1179 return;
1180
1181 Monitor->DDC = DDC;
1182
1183 if (Monitor->widthmm <= 0 || Monitor->heightmm <= 0) {
1184 Monitor->widthmm = 10 * DDC->features.hsize;
1185 Monitor->heightmm = 10 * DDC->features.vsize;
1186 }
1187
1188 Monitor->reducedblanking = xf86MonitorSupportsReducedBlanking(DDC);
1189
1190 Modes = xf86DDCGetModes(scrnIndex, DDC);
1191
1192 /* Go through the detailed monitor sections */
1193 p.Monitor = Monitor;
1194 p.quirks = xf86DDCDetectQuirks(scrnIndex, Monitor->DDC, FALSE);
1195 p.have_hsync = (Monitor->nHsync != 0);
1196 p.have_vrefresh = (Monitor->nVrefresh != 0);
1197 p.have_maxpixclock = (Monitor->maxPixClock != 0);
1198 xf86ForEachDetailedBlock(DDC, handle_detailed_monset, &p);
1199
1200 if (Modes) {
1201 /* Print Modes */
1202 xf86DrvMsg(scrnIndex, X_INFO, "Printing DDC gathered Modelines:\n");
1203
1204 Mode = Modes;
1205 while (Mode) {
1206 xf86PrintModeline(scrnIndex, Mode);
1207 Mode = Mode->next;
1208 }
1209
1210 /* Do we still need ranges to be filled in? */
1211 if (!Monitor->nHsync || !Monitor->nVrefresh)
1212 DDCGuessRangesFromModes(scrnIndex, Monitor, Modes);
1213
1214 /* add to MonPtr */
1215 if (Monitor->Modes) {
1216 Monitor->Last->next = Modes;
1217 Modes->prev = Monitor->Last;
1218 }
1219 else {
1220 Monitor->Modes = Modes;
1221 }
1222
1223 Monitor->Modes = xf86PruneDuplicateModes(Monitor->Modes);
1224
1225 /* Update pointer to last mode */
1226 for (Mode = Monitor->Modes; Mode && Mode->next; Mode = Mode->next) {}
1227 Monitor->Last = Mode;
1228 }
1229 }
1230