1 2 #include <xf86RamDac.h> 3 4 extern _X_EXPORT RamDacHelperRecPtr IBMramdacProbe(ScrnInfoPtr pScrn, 5 RamDacSupportedInfoRecPtr 6 ramdacs); 7 extern _X_EXPORT void IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, 8 RamDacRegRecPtr RamDacRegRec); 9 extern _X_EXPORT void IBMramdacRestore(ScrnInfoPtr pScrn, 10 RamDacRecPtr RamDacRec, 11 RamDacRegRecPtr RamDacRegRec); 12 extern _X_EXPORT void IBMramdac526SetBpp(ScrnInfoPtr pScrn, 13 RamDacRegRecPtr RamDacRegRec); 14 extern _X_EXPORT void IBMramdac640SetBpp(ScrnInfoPtr pScrn, 15 RamDacRegRecPtr RamDacRegRec); 16 extern _X_EXPORT unsigned long IBMramdac526CalculateMNPCForClock(unsigned long 17 RefClock, 18 unsigned long 19 ReqClock, 20 char 21 IsPixClock, 22 unsigned long 23 MinClock, 24 unsigned long 25 MaxClock, 26 unsigned long 27 *rM, 28 unsigned long 29 *rN, 30 unsigned long 31 *rP, 32 unsigned long 33 *rC); 34 extern _X_EXPORT unsigned long IBMramdac640CalculateMNPCForClock(unsigned long 35 RefClock, 36 unsigned long 37 ReqClock, 38 char 39 IsPixClock, 40 unsigned long 41 MinClock, 42 unsigned long 43 MaxClock, 44 unsigned long 45 *rM, 46 unsigned long 47 *rN, 48 unsigned long 49 *rP, 50 unsigned long 51 *rC); 52 extern _X_EXPORT void IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr); 53 extern _X_EXPORT void IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr); 54 55 typedef void IBMramdac526SetBppProc(ScrnInfoPtr, RamDacRegRecPtr); 56 extern _X_EXPORT IBMramdac526SetBppProc *IBMramdac526SetBppWeak(void); 57 58 #define IBM524_RAMDAC ((VENDOR_IBM << 16) | 0x00) 59 #define IBM524A_RAMDAC ((VENDOR_IBM << 16) | 0x01) 60 #define IBM525_RAMDAC ((VENDOR_IBM << 16) | 0x02) 61 #define IBM526_RAMDAC ((VENDOR_IBM << 16) | 0x03) 62 #define IBM526DB_RAMDAC ((VENDOR_IBM << 16) | 0x04) 63 #define IBM528_RAMDAC ((VENDOR_IBM << 16) | 0x05) 64 #define IBM528A_RAMDAC ((VENDOR_IBM << 16) | 0x06) 65 #define IBM624_RAMDAC ((VENDOR_IBM << 16) | 0x07) 66 #define IBM624DB_RAMDAC ((VENDOR_IBM << 16) | 0x08) 67 #define IBM640_RAMDAC ((VENDOR_IBM << 16) | 0x09) 68 69 /* 70 * IBM Ramdac registers 71 */ 72 73 #define IBMRGB_REF_FREQ_1 14.31818 74 #define IBMRGB_REF_FREQ_2 50.00000 75 76 #define IBMRGB_rev 0x00 77 #define IBMRGB_id 0x01 78 #define IBMRGB_misc_clock 0x02 79 #define IBMRGB_sync 0x03 80 #define IBMRGB_hsync_pos 0x04 81 #define IBMRGB_pwr_mgmt 0x05 82 #define IBMRGB_dac_op 0x06 83 #define IBMRGB_pal_ctrl 0x07 84 #define IBMRGB_sysclk 0x08 /* not RGB525 */ 85 #define IBMRGB_pix_fmt 0x0a 86 #define IBMRGB_8bpp 0x0b 87 #define IBMRGB_16bpp 0x0c 88 #define IBMRGB_24bpp 0x0d 89 #define IBMRGB_32bpp 0x0e 90 #define IBMRGB_pll_ctrl1 0x10 91 #define IBMRGB_pll_ctrl2 0x11 92 #define IBMRGB_pll_ref_div_fix 0x14 93 #define IBMRGB_sysclk_ref_div 0x15 /* not RGB525 */ 94 #define IBMRGB_sysclk_vco_div 0x16 /* not RGB525 */ 95 /* #define IBMRGB_f0 0x20 */ 96 97 #define IBMRGB_sysclk_n 0x15 98 #define IBMRGB_sysclk_m 0x16 99 #define IBMRGB_sysclk_p 0x17 100 #define IBMRGB_sysclk_c 0x18 101 102 #define IBMRGB_m0 0x20 103 #define IBMRGB_n0 0x21 104 #define IBMRGB_p0 0x22 105 #define IBMRGB_c0 0x23 106 #define IBMRGB_m1 0x24 107 #define IBMRGB_n1 0x25 108 #define IBMRGB_p1 0x26 109 #define IBMRGB_c1 0x27 110 #define IBMRGB_m2 0x28 111 #define IBMRGB_n2 0x29 112 #define IBMRGB_p2 0x2a 113 #define IBMRGB_c2 0x2b 114 #define IBMRGB_m3 0x2c 115 #define IBMRGB_n3 0x2d 116 #define IBMRGB_p3 0x2e 117 #define IBMRGB_c3 0x2f 118 119 #define IBMRGB_curs 0x30 120 #define IBMRGB_curs_xl 0x31 121 #define IBMRGB_curs_xh 0x32 122 #define IBMRGB_curs_yl 0x33 123 #define IBMRGB_curs_yh 0x34 124 #define IBMRGB_curs_hot_x 0x35 125 #define IBMRGB_curs_hot_y 0x36 126 #define IBMRGB_curs_col1_r 0x40 127 #define IBMRGB_curs_col1_g 0x41 128 #define IBMRGB_curs_col1_b 0x42 129 #define IBMRGB_curs_col2_r 0x43 130 #define IBMRGB_curs_col2_g 0x44 131 #define IBMRGB_curs_col2_b 0x45 132 #define IBMRGB_curs_col3_r 0x46 133 #define IBMRGB_curs_col3_g 0x47 134 #define IBMRGB_curs_col3_b 0x48 135 #define IBMRGB_border_col_r 0x60 136 #define IBMRGB_border_col_g 0x61 137 #define IBMRGB_botder_col_b 0x62 138 #define IBMRGB_key 0x68 139 #define IBMRGB_key_mask 0x6C 140 #define IBMRGB_misc1 0x70 141 #define IBMRGB_misc2 0x71 142 #define IBMRGB_misc3 0x72 143 #define IBMRGB_misc4 0x73 /* not RGB525 */ 144 #define IBMRGB_key_control 0x78 145 #define IBMRGB_dac_sense 0x82 146 #define IBMRGB_misr_r 0x84 147 #define IBMRGB_misr_g 0x86 148 #define IBMRGB_misr_b 0x88 149 #define IBMRGB_pll_vco_div_in 0x8e 150 #define IBMRGB_pll_ref_div_in 0x8f 151 #define IBMRGB_vram_mask_0 0x90 152 #define IBMRGB_vram_mask_1 0x91 153 #define IBMRGB_vram_mask_2 0x92 154 #define IBMRGB_vram_mask_3 0x93 155 #define IBMRGB_curs_array 0x100 156 157 /* Constants rgb525.h */ 158 159 /* RGB525_REVISION_LEVEL */ 160 #define RGB525_PRODUCT_REV_LEVEL 0xf0 161 162 /* RGB525_ID */ 163 #define RGB525_PRODUCT_ID 0x01 164 165 /* RGB525_MISC_CTRL_1 */ 166 #define MISR_CNTL_ENABLE 0x80 167 #define VMSK_CNTL_ENABLE 0x40 168 #define PADR_RDMT_RDADDR 0x0 169 #define PADR_RDMT_PAL_STATE 0x20 170 #define SENS_DSAB_DISABLE 0x10 171 #define SENS_SEL_BIT3 0x0 172 #define SENS_SEL_BIT7 0x08 173 #define VRAM_SIZE_32 0x0 174 #define VRAM_SIZE_64 0x01 175 176 /* RGB525_MISC_CTRL_2 */ 177 #define PCLK_SEL_LCLK 0x0 178 #define PCLK_SEL_PLL 0x40 179 #define PCLK_SEL_EXT 0x80 180 #define INTL_MODE_ENABLE 0x20 181 #define BLANK_CNTL_ENABLE 0x10 182 #define COL_RES_6BIT 0x0 183 #define COL_RES_8BIT 0x04 184 #define PORT_SEL_VGA 0x0 185 #define PORT_SEL_VRAM 0x01 186 187 /* RGB525_MISC_CTRL_3 */ 188 #define SWAP_RB 0x80 189 #define SWAP_WORD_LOHI 0x0 190 #define SWAP_WORD_HILO 0x10 191 #define SWAP_NIB_HILO 0x0 192 #define SWAP_NIB_LOHI 0x02 193 194 /* RGB525_MISC_CLK_CTRL */ 195 #define DDOT_CLK_ENABLE 0x0 196 #define DDOT_CLK_DISABLE 0x80 197 #define SCLK_ENABLE 0x0 198 #define SCLK_DISABLE 0x40 199 #define B24P_DDOT_PLL 0x0 200 #define B24P_DDOT_SCLK 0x20 201 #define DDOT_DIV_PLL_1 0x0 202 #define DDOT_DIV_PLL_2 0x02 203 #define DDOT_DIV_PLL_4 0x04 204 #define DDOT_DIV_PLL_8 0x06 205 #define DDOT_DIV_PLL_16 0x08 206 #define PLL_DISABLE 0x0 207 #define PLL_ENABLE 0x01 208 209 /* RGB525_SYNC_CTRL */ 210 #define DLY_CNTL_ADD 0x0 211 #define DLY_SYNC_NOADD 0x80 212 #define CSYN_INVT_DISABLE 0x0 213 #define CSYN_INVT_ENABLE 0x40 214 #define VSYN_INVT_DISABLE 0x0 215 #define VSYN_INVT_ENABLE 0x20 216 #define HSYN_INVT_DISABLE 0x0 217 #define HSYN_INVT_ENABLE 0x10 218 #define VSYN_CNTL_NORMAL 0x0 219 #define VSYN_CNTL_HIGH 0x04 220 #define VSYN_CNTL_LOW 0x08 221 #define VSYN_CNTL_DISABLE 0x0C 222 #define HSYN_CNTL_NORMAL 0x0 223 #define HSYN_CNTL_HIGH 0x01 224 #define HSYN_CNTL_LOW 0x02 225 #define HSYN_CNTL_DISABLE 0x03 226 227 /* RGB525_HSYNC_CTRL */ 228 #define HSYN_POS(n) (n) 229 230 /* RGB525_POWER_MANAGEMENT */ 231 #define SCLK_PWR_NORMAL 0x0 232 #define SCLK_PWR_DISABLE 0x10 233 #define DDOT_PWR_NORMAL 0x0 234 #define DDOT_PWR_DISABLE 0x08 235 #define SYNC_PWR_NORMAL 0x0 236 #define SYNC_PWR_DISABLE 0x04 237 #define ICLK_PWR_NORMAL 0x0 238 #define ICLK_PWR_DISABLE 0x02 239 #define DAC_PWR_NORMAL 0x0 240 #define DAC_PWR_DISABLE 0x01 241 242 /* RGB525_DAC_OPERATION */ 243 #define SOG_DISABLE 0x0 244 #define SOG_ENABLE 0x08 245 #define BRB_NORMAL 0x0 246 #define BRB_ALWAYS 0x04 247 #define DSR_DAC_SLOW 0x02 248 #define DSR_DAC_FAST 0x0 249 #define DPE_DISABLE 0x0 250 #define DPE_ENABLE 0x01 251 252 /* RGB525_PALETTE_CTRL */ 253 #define SIXBIT_LINEAR_ENABLE 0x0 254 #define SIXBIT_LINEAR_DISABLE 0x80 255 #define PALETTE_PARITION(n) (n) 256 257 /* RGB525_PIXEL_FORMAT */ 258 #define PIXEL_FORMAT_4BPP 0x02 259 #define PIXEL_FORMAT_8BPP 0x03 260 #define PIXEL_FORMAT_16BPP 0x04 261 #define PIXEL_FORMAT_24BPP 0x05 262 #define PIXEL_FORMAT_32BPP 0x06 263 264 /* RGB525_8BPP_CTRL */ 265 #define B8_DCOL_INDIRECT 0x0 266 #define B8_DCOL_DIRECT 0x01 267 268 /* RGB525_16BPP_CTRL */ 269 #define B16_DCOL_INDIRECT 0x0 270 #define B16_DCOL_DYNAMIC 0x40 271 #define B16_DCOL_DIRECT 0xC0 272 #define B16_POL_FORCE_BYPASS 0x0 273 #define B16_POL_FORCE_LOOKUP 0x20 274 #define B16_ZIB 0x0 275 #define B16_LINEAR 0x04 276 #define B16_555 0x0 277 #define B16_565 0x02 278 #define B16_SPARSE 0x0 279 #define B16_CONTIGUOUS 0x01 280 281 /* RGB525_24BPP_CTRL */ 282 #define B24_DCOL_INDIRECT 0x0 283 #define B24_DCOL_DIRECT 0x01 284 285 /* RGB525_32BPP_CTRL */ 286 #define B32_POL_FORCE_BYPASS 0x0 287 #define B32_POL_FORCE_LOOKUP 0x04 288 #define B32_DCOL_INDIRECT 0x0 289 #define B32_DCOL_DYNAMIC 0x01 290 #define B32_DCOL_DIRECT 0x03 291 292 /* RGB525_PLL_CTRL_1 */ 293 #define REF_SRC_REFCLK 0x0 294 #define REF_SRC_EXTCLK 0x10 295 #define PLL_EXT_FS_3_0 0x0 296 #define PLL_EXT_FS_2_0 0x01 297 #define PLL_CNTL2_3_0 0x02 298 #define PLL_CNTL2_2_0 0x03 299 300 /* RGB525_PLL_CTRL_2 */ 301 #define PLL_INT_FS_3_0(n) (n) 302 #define PLL_INT_FS_2_0(n) (n) 303 304 /* RGB525_PLL_REF_DIV_COUNT */ 305 #define REF_DIV_COUNT(n) (n) 306 307 /* RGB525_F0 - RGB525_F15 */ 308 #define VCO_DIV_COUNT(n) (n) 309 310 /* RGB525_PLL_REFCLK values */ 311 #define RGB525_PLL_REFCLK_MHz(n) ((n)/2) 312 313 /* RGB525_CURSOR_CONTROL */ 314 #define SMLC_PART_0 0x0 315 #define SMLC_PART_1 0x40 316 #define SMLC_PART_2 0x80 317 #define SMLC_PART_3 0xC0 318 #define PIX_ORDER_RL 0x0 319 #define PIX_ORDER_LR 0x20 320 #define LOC_READ_LAST 0x0 321 #define LOC_READ_ACTUAL 0x10 322 #define UPDT_CNTL_DELAYED 0x0 323 #define UPDT_CNTL_IMMEDIATE 0x08 324 #define CURSOR_SIZE_32 0x0 325 #define CURSOR_SIZE_64 0x40 326 #define CURSOR_MODE_OFF 0x0 327 #define CURSOR_MODE_3_COLOR 0x01 328 #define CURSOR_MODE_2_COLOR_HL 0x02 329 #define CURSOR_MODE_2_COLOR 0x03 330 331 /* RGB525_REVISION_LEVEL */ 332 #define REVISION_LEVEL 0xF0 /* predefined */ 333 334 /* RGB525_ID */ 335 #define ID_CODE 0x01 /* predefined */ 336 337 /* MISR status */ 338 #define RGB525_MISR_DONE 0x01 339 340 /* the IBMRGB640 is rather different from the rest of the RAMDACs, 341 so we define a completely new set of register names for it */ 342 #define RGB640_SER_07_00 0x02 343 #define RGB640_SER_15_08 0x03 344 #define RGB640_SER_23_16 0x04 345 #define RGB640_SER_31_24 0x05 346 #define RGB640_SER_WID_03_00 0x06 347 #define RGB640_SER_WID_07_04 0x07 348 #define RGB640_SER_MODE 0x08 349 #define IBM640_SER_2_1 0x00 350 #define IBM640_SER_4_1 0x01 351 #define IBM640_SER_8_1 0x02 352 #define IBM640_SER_16_1 0x03 353 #define IBM640_SER_16_3 0x05 354 #define IBM640_SER_5_1 0x06 355 #define RGB640_PIXEL_INTERLEAVE 0x09 356 #define RGB640_MISC_CONF 0x0a 357 #define IBM640_PCLK 0x00 358 #define IBM640_PCLK_2 0x40 359 #define IBM640_PCLK_4 0x80 360 #define IBM640_PCLK_8 0xc0 361 #define IBM640_PSIZE10 0x10 362 #define IBM640_LCI 0x08 363 #define IBM640_WIDCTL_MASK 0x07 364 #define RGB640_VGA_CONTROL 0x0b 365 #define IBM640_RDBK 0x04 366 #define IBM640_PSIZE8 0x02 367 #define IBM640_VRAM 0x01 368 #define RGB640_DAC_CONTROL 0x0d 369 #define IBM640_MONO 0x08 370 #define IBM640_DACENBL 0x04 371 #define IBM640_SHUNT 0x02 372 #define IBM640_SLOWSLEW 0x01 373 #define RGB640_OUTPUT_CONTROL 0x0e 374 #define IBM640_RDAI 0x04 375 #define IBM640_WDAI 0x02 376 #define IBM640_WATCTL 0x01 377 #define RGB640_SYNC_CONTROL 0x0f 378 #define IBM640_PWR 0x20 379 #define IBM640_VSP 0x10 380 #define IBM640_HSP 0x08 381 #define IBM640_CSE 0x04 382 #define IBM640_CSG 0x02 383 #define IBM640_BPE 0x01 384 #define RGB640_PLL_N 0x10 385 #define RGB640_PLL_M 0x11 386 #define RGB640_PLL_P 0x12 387 #define RGB640_PLL_CTL 0x13 388 #define IBM640_PLL_EN 0x04 389 #define IBM640_PLL_HIGH 0x10 390 #define IBM640_PLL_LOW 0x01 391 #define RGB640_AUX_PLL_CTL 0x17 392 #define IBM640_AUXPLL 0x04 393 #define IBM640_AUX_HI 0x02 394 #define IBM640_AUX_LO 0x01 395 #define RGB640_CHROMA_KEY0 0x20 396 #define RGB640_CHROMA_MASK0 0x21 397 #define RGB640_CURS_X_LOW 0x40 398 #define RGB640_CURS_X_HIGH 0x41 399 #define RGB640_CURS_Y_LOW 0x42 400 #define RGB640_CURS_Y_HIGH 0x43 401 #define RGB640_CURS_OFFSETX 0x44 402 #define RGB640_CURS_OFFSETY 0x45 403 #define RGB640_CURSOR_CONTROL 0x4B 404 #define IBM640_CURS_OFF 0x00 405 #define IBM640_CURS_MODE0 0x01 406 #define IBM640_CURS_MODE1 0x02 407 #define IBM640_CURS_MODE2 0x03 408 #define IBM640_CURS_ADV 0x04 409 #define RGB640_CROSSHAIR_CONTROL 0x57 410 #define RGB640_VRAM_MASK0 0xf0 411 #define RGB640_VRAM_MASK1 0xf1 412 #define RGB640_VRAM_MASK2 0xf2 413 #define RGB640_DIAGS 0xfa 414 #define RGB640_CURS_WRITE 0x1000 415 #define RGB640_CURS_COL0 0x4800 416 #define RGB640_CURS_COL1 0x4801 417 #define RGB640_CURS_COL2 0x4802 418 #define RGB640_CURS_COL3 0x4803 419