xref: /dragonfly/sys/dev/netif/sn/if_sn.c (revision 3f5e28f4)
1 /*
2  * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *      This product includes software developed by Gardner Buchanan.
16  * 4. The name of Gardner Buchanan may not be used to endorse or promote
17  *    products derived from this software without specific prior written
18  *    permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  *   $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $
32  *   $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.27 2006/12/22 23:26:22 swildner Exp $
33  */
34 
35 /*
36  * This is a driver for SMC's 9000 series of Ethernet adapters.
37  *
38  * This FreeBSD driver is derived from the smc9194 Linux driver by
39  * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
40  * This driver also shamelessly borrows from the FreeBSD ep driver
41  * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
42  * All rights reserved.
43  *
44  * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
45  * PC.  It is adapted from Erik Stahlman's Linux driver which worked
46  * with his EFA Info*Express SVC VLB adaptor.  According to SMC's databook,
47  * it will work for the entire SMC 9xxx series. (Ha Ha)
48  *
49  * "Features" of the SMC chip:
50  *   4608 byte packet memory. (for the 91C92.  Others have more)
51  *   EEPROM for configuration
52  *   AUI/TP selection
53  *
54  * Authors:
55  *      Erik Stahlman                   erik@vt.edu
56  *      Herb Peyerl                     hpeyerl@novatel.ca
57  *      Andres Vega Garcia              avega@sophia.inria.fr
58  *      Serge Babkin                    babkin@hq.icb.chel.su
59  *      Gardner Buchanan                gbuchanan@shl.com
60  *
61  * Sources:
62  *    o   SMC databook
63  *    o   "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
64  *    o   "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
65  *
66  * Known Bugs:
67  *    o   The hardware multicast filter isn't used yet.
68  *    o   Setting of the hardware address isn't supported.
69  *    o   Hardware padding isn't used.
70  */
71 
72 /*
73  * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
74  *
75  * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
76  *                       BSD-nomads, Tokyo, Japan.
77  */
78 /*
79  * Multicast support by Kei TANAKA <kei@pal.xerox.com>
80  * Special thanks to itojun@itojun.org
81  */
82 
83 #undef	SN_DEBUG	/* (by hosokawa) */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/errno.h>
89 #include <sys/sockio.h>
90 #include <sys/malloc.h>
91 #include <sys/mbuf.h>
92 #include <sys/socket.h>
93 #include <sys/syslog.h>
94 #include <sys/serialize.h>
95 #include <sys/module.h>
96 #include <sys/bus.h>
97 #include <sys/rman.h>
98 #include <sys/thread2.h>
99 
100 #include <net/ethernet.h>
101 #include <net/if.h>
102 #include <net/ifq_var.h>
103 #include <net/if_arp.h>
104 #include <net/if_dl.h>
105 #include <net/if_types.h>
106 #include <net/if_mib.h>
107 
108 #ifdef INET
109 #include <netinet/in.h>
110 #include <netinet/in_systm.h>
111 #include <netinet/in_var.h>
112 #include <netinet/ip.h>
113 #endif
114 
115 #ifdef NS
116 #include <netns/ns.h>
117 #include <netns/ns_if.h>
118 #endif
119 
120 #include <net/bpf.h>
121 #include <net/bpfdesc.h>
122 
123 #include <machine/clock.h>
124 
125 #include "if_snreg.h"
126 #include "if_snvar.h"
127 
128 /* Exported variables */
129 devclass_t sn_devclass;
130 
131 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *);
132 
133 static void snresume(struct ifnet *);
134 
135 void sninit(void *);
136 void snread(struct ifnet *);
137 void snreset(struct sn_softc *);
138 void snstart(struct ifnet *);
139 void snstop(struct sn_softc *);
140 void snwatchdog(struct ifnet *);
141 
142 static void sn_setmcast(struct sn_softc *);
143 static int sn_getmcf(struct arpcom *ac, u_char *mcf);
144 static u_int smc_crc(u_char *);
145 
146 DECLARE_DUMMY_MODULE(if_sn);
147 
148 /* I (GB) have been unlucky getting the hardware padding
149  * to work properly.
150  */
151 #define SW_PAD
152 
153 static const char *chip_ids[15] = {
154 	NULL, NULL, NULL,
155 	 /* 3 */ "SMC91C90/91C92",
156 	 /* 4 */ "SMC91C94",
157 	 /* 5 */ "SMC91C95",
158 	NULL,
159 	 /* 7 */ "SMC91C100",
160 	 /* 8 */ "SMC91C100FD",
161 	NULL, NULL, NULL,
162 	NULL, NULL, NULL
163 };
164 
165 int
166 sn_attach(device_t dev)
167 {
168 	struct sn_softc *sc = device_get_softc(dev);
169 	struct ifnet   *ifp = &sc->arpcom.ac_if;
170 	u_short         i;
171 	u_char         *p;
172 	int             rev;
173 	u_short         address;
174 	int		j;
175 	int		error;
176 
177 	sn_activate(dev);
178 
179 	snstop(sc);
180 
181 	sc->dev = dev;
182 	sc->pages_wanted = -1;
183 
184 	device_printf(dev, " ");
185 
186 	SMC_SELECT_BANK(3);
187 	rev = inw(BASE + REVISION_REG_W);
188 	if (chip_ids[(rev >> 4) & 0xF])
189 		kprintf("%s ", chip_ids[(rev >> 4) & 0xF]);
190 
191 	SMC_SELECT_BANK(1);
192 	i = inw(BASE + CONFIG_REG_W);
193 	kprintf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP");
194 
195 	if (sc->pccard_enaddr)
196 		for (j = 0; j < 3; j++) {
197 			u_short	w;
198 
199 			w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
200 				(((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
201 			outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
202 		}
203 
204 	/*
205 	 * Read the station address from the chip. The MAC address is bank 1,
206 	 * regs 4 - 9
207 	 */
208 	SMC_SELECT_BANK(1);
209 	p = (u_char *) & sc->arpcom.ac_enaddr;
210 	for (i = 0; i < 6; i += 2) {
211 		address = inw(BASE + IAR_ADDR0_REG_W + i);
212 		p[i + 1] = address >> 8;
213 		p[i] = address & 0xFF;
214 	}
215 	ifp->if_softc = sc;
216 	if_initname(ifp, "sn", device_get_unit(dev));
217 	ifp->if_mtu = ETHERMTU;
218 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
219 	ifp->if_start = snstart;
220 	ifp->if_ioctl = snioctl;
221 	ifp->if_watchdog = snwatchdog;
222 	ifp->if_init = sninit;
223 	ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
224 	ifq_set_ready(&ifp->if_snd);
225 	ifp->if_timer = 0;
226 
227 	ether_ifattach(ifp, sc->arpcom.ac_enaddr, NULL);
228 
229 	error = bus_setup_intr(dev, sc->irq_res, INTR_NETSAFE,
230 			       sn_intr, sc, &sc->intrhand,
231 			       ifp->if_serializer);
232 	if (error) {
233 		ether_ifdetach(ifp);
234 		sn_deactivate(dev);
235 		return error;
236 	}
237 
238 	return 0;
239 }
240 
241 
242 /*
243  * Reset and initialize the chip
244  */
245 void
246 sninit(void *xsc)
247 {
248 	struct sn_softc *sc = xsc;
249 	struct ifnet *ifp = &sc->arpcom.ac_if;
250 	int             flags;
251 	int             mask;
252 
253 	/*
254 	 * This resets the registers mostly to defaults, but doesn't affect
255 	 * EEPROM.  After the reset cycle, we pause briefly for the chip to
256 	 * be happy.
257 	 */
258 	SMC_SELECT_BANK(0);
259 	outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
260 	SMC_DELAY();
261 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
262 	SMC_DELAY();
263 	SMC_DELAY();
264 
265 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
266 
267 	/*
268 	 * Set the control register to automatically release succesfully
269 	 * transmitted packets (making the best use out of our limited
270 	 * memory) and to enable the EPH interrupt on certain TX errors.
271 	 */
272 	SMC_SELECT_BANK(1);
273 	outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
274 				    CTR_CR_ENABLE | CTR_LE_ENABLE));
275 
276 	/* Set squelch level to 240mV (default 480mV) */
277 	flags = inw(BASE + CONFIG_REG_W);
278 	flags |= CR_SET_SQLCH;
279 	outw(BASE + CONFIG_REG_W, flags);
280 
281 	/*
282 	 * Reset the MMU and wait for it to be un-busy.
283 	 */
284 	SMC_SELECT_BANK(2);
285 	outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
286 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
287 		;
288 
289 	/*
290 	 * Disable all interrupts
291 	 */
292 	outb(BASE + INTR_MASK_REG_B, 0x00);
293 
294 	sn_setmcast(sc);
295 
296 	/*
297 	 * Set the transmitter control.  We want it enabled.
298 	 */
299 	flags = TCR_ENABLE;
300 
301 #ifndef SW_PAD
302 	/*
303 	 * I (GB) have been unlucky getting this to work.
304 	 */
305 	flags |= TCR_PAD_ENABLE;
306 #endif	/* SW_PAD */
307 
308 	outw(BASE + TXMIT_CONTROL_REG_W, flags);
309 
310 
311 	/*
312 	 * Now, enable interrupts
313 	 */
314 	SMC_SELECT_BANK(2);
315 
316 	mask = IM_EPH_INT |
317 		IM_RX_OVRN_INT |
318 		IM_RCV_INT |
319 		IM_TX_INT;
320 
321 	outb(BASE + INTR_MASK_REG_B, mask);
322 	sc->intr_mask = mask;
323 	sc->pages_wanted = -1;
324 
325 
326 	/*
327 	 * Mark the interface running but not active.
328 	 */
329 	ifp->if_flags |= IFF_RUNNING;
330 	ifp->if_flags &= ~IFF_OACTIVE;
331 
332 	/*
333 	 * Attempt to push out any waiting packets.
334 	 */
335 	snstart(ifp);
336 }
337 
338 
339 void
340 snstart(struct ifnet *ifp)
341 {
342 	struct sn_softc *sc = ifp->if_softc;
343 	u_int  len;
344 	struct mbuf *m;
345 	struct mbuf    *top;
346 	int             pad;
347 	int             mask;
348 	u_short         length;
349 	u_short         numPages;
350 	u_char          packet_no;
351 	int             time_out;
352 
353 	if (ifp->if_flags & IFF_OACTIVE) {
354 		return;
355 	}
356 	if (sc->pages_wanted != -1) {
357 		kprintf("%s: snstart() while memory allocation pending\n",
358 		       ifp->if_xname);
359 		return;
360 	}
361 startagain:
362 
363 	/*
364 	 * Sneak a peek at the next packet
365 	 */
366 	m = ifq_poll(&ifp->if_snd);
367 	if (m == 0) {
368 		return;
369 	}
370 	/*
371 	 * Compute the frame length and set pad to give an overall even
372 	 * number of bytes.  Below we assume that the packet length is even.
373 	 */
374 	for (len = 0, top = m; m; m = m->m_next)
375 		len += m->m_len;
376 
377 	pad = (len & 1);
378 
379 	/*
380 	 * We drop packets that are too large. Perhaps we should truncate
381 	 * them instead?
382 	 */
383 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
384 		kprintf("%s: large packet discarded (A)\n", ifp->if_xname);
385 		++sc->arpcom.ac_if.if_oerrors;
386 		ifq_dequeue(&ifp->if_snd, m);
387 		m_freem(m);
388 		goto readcheck;
389 	}
390 #ifdef SW_PAD
391 
392 	/*
393 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
394 	 */
395 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
396 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
397 
398 #endif	/* SW_PAD */
399 
400 	length = pad + len;
401 
402 	/*
403 	 * The MMU wants the number of pages to be the number of 256 byte
404 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
405 	 * include space for the status word, byte count and control bytes in
406 	 * the allocation request.
407 	 */
408 	numPages = (length + 6) >> 8;
409 
410 
411 	/*
412 	 * Now, try to allocate the memory
413 	 */
414 	SMC_SELECT_BANK(2);
415 	outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
416 
417 	/*
418 	 * Wait a short amount of time to see if the allocation request
419 	 * completes.  Otherwise, I enable the interrupt and wait for
420 	 * completion asyncronously.
421 	 */
422 
423 	time_out = MEMORY_WAIT_TIME;
424 	do {
425 		if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
426 			break;
427 	} while (--time_out);
428 
429 	if (!time_out) {
430 
431 		/*
432 		 * No memory now.  Oh well, wait until the chip finds memory
433 		 * later.   Remember how many pages we were asking for and
434 		 * enable the allocation completion interrupt. Also set a
435 		 * watchdog in case  we miss the interrupt. We mark the
436 		 * interface active since there is no point in attempting an
437 		 * snstart() until after the memory is available.
438 		 */
439 		mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
440 		outb(BASE + INTR_MASK_REG_B, mask);
441 		sc->intr_mask = mask;
442 
443 		ifp->if_timer = 1;
444 		ifp->if_flags |= IFF_OACTIVE;
445 		sc->pages_wanted = numPages;
446 
447 		return;
448 	}
449 	/*
450 	 * The memory allocation completed.  Check the results.
451 	 */
452 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
453 	if (packet_no & ARR_FAILED) {
454 		kprintf("%s: Memory allocation failed\n", ifp->if_xname);
455 		goto startagain;
456 	}
457 	/*
458 	 * We have a packet number, so tell the card to use it.
459 	 */
460 	outb(BASE + PACKET_NUM_REG_B, packet_no);
461 
462 	/*
463 	 * Point to the beginning of the packet
464 	 */
465 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
466 
467 	/*
468 	 * Send the packet length (+6 for status, length and control byte)
469 	 * and the status word (set to zeros)
470 	 */
471 	outw(BASE + DATA_REG_W, 0);
472 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
473 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
474 
475 	/*
476 	 * Get the packet from the kernel.  This will include the Ethernet
477 	 * frame header, MAC Addresses etc.
478 	 */
479 	ifq_dequeue(&ifp->if_snd, m);
480 
481 	/*
482 	 * Push out the data to the card.
483 	 */
484 	for (top = m; m != 0; m = m->m_next) {
485 
486 		/*
487 		 * Push out words.
488 		 */
489 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
490 
491 		/*
492 		 * Push out remaining byte.
493 		 */
494 		if (m->m_len & 1)
495 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
496 	}
497 
498 	/*
499 	 * Push out padding.
500 	 */
501 	while (pad > 1) {
502 		outw(BASE + DATA_REG_W, 0);
503 		pad -= 2;
504 	}
505 	if (pad)
506 		outb(BASE + DATA_REG_B, 0);
507 
508 	/*
509 	 * Push out control byte and unused packet byte The control byte is 0
510 	 * meaning the packet is even lengthed and no special CRC handling is
511 	 * desired.
512 	 */
513 	outw(BASE + DATA_REG_W, 0);
514 
515 	/*
516 	 * Enable the interrupts and let the chipset deal with it Also set a
517 	 * watchdog in case we miss the interrupt.
518 	 */
519 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
520 	outb(BASE + INTR_MASK_REG_B, mask);
521 	sc->intr_mask = mask;
522 
523 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
524 
525 	ifp->if_flags |= IFF_OACTIVE;
526 	ifp->if_timer = 1;
527 
528 	BPF_MTAP(ifp, top);
529 
530 	ifp->if_opackets++;
531 	m_freem(top);
532 
533 readcheck:
534 
535 	/*
536 	 * Is another packet coming in?  We don't want to overflow the tiny
537 	 * RX FIFO.  If nothing has arrived then attempt to queue another
538 	 * transmit packet.
539 	 */
540 	if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
541 		goto startagain;
542 }
543 
544 
545 
546 /* Resume a packet transmit operation after a memory allocation
547  * has completed.
548  *
549  * This is basically a hacked up copy of snstart() which handles
550  * a completed memory allocation the same way snstart() does.
551  * It then passes control to snstart to handle any other queued
552  * packets.
553  */
554 static void
555 snresume(struct ifnet *ifp)
556 {
557 	struct sn_softc *sc = ifp->if_softc;
558 	u_int  len;
559 	struct mbuf *m;
560 	struct mbuf    *top;
561 	int             pad;
562 	int             mask;
563 	u_short         length;
564 	u_short         numPages;
565 	u_short         pages_wanted;
566 	u_char          packet_no;
567 
568 	if (sc->pages_wanted < 0)
569 		return;
570 
571 	pages_wanted = sc->pages_wanted;
572 	sc->pages_wanted = -1;
573 
574 	/*
575 	 * Sneak a peek at the next packet
576 	 */
577 	m = ifq_poll(&ifp->if_snd);
578 	if (m == NULL) {
579 		kprintf("%s: snresume() with nothing to send\n", ifp->if_xname);
580 		return;
581 	}
582 	/*
583 	 * Compute the frame length and set pad to give an overall even
584 	 * number of bytes.  Below we assume that the packet length is even.
585 	 */
586 	for (len = 0, top = m; m; m = m->m_next)
587 		len += m->m_len;
588 
589 	pad = (len & 1);
590 
591 	/*
592 	 * We drop packets that are too large. Perhaps we should truncate
593 	 * them instead?
594 	 */
595 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
596 		kprintf("%s: large packet discarded (B)\n", ifp->if_xname);
597 		++ifp->if_oerrors;
598 		ifq_dequeue(&ifp->if_snd, m);
599 		m_freem(m);
600 		return;
601 	}
602 #ifdef SW_PAD
603 
604 	/*
605 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
606 	 */
607 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
608 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
609 
610 #endif	/* SW_PAD */
611 
612 	length = pad + len;
613 
614 
615 	/*
616 	 * The MMU wants the number of pages to be the number of 256 byte
617 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
618 	 * include space for the status word, byte count and control bytes in
619 	 * the allocation request.
620 	 */
621 	numPages = (length + 6) >> 8;
622 
623 
624 	SMC_SELECT_BANK(2);
625 
626 	/*
627 	 * The memory allocation completed.  Check the results. If it failed,
628 	 * we simply set a watchdog timer and hope for the best.
629 	 */
630 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
631 	if (packet_no & ARR_FAILED) {
632 		kprintf("%s: Memory allocation failed.  Weird.\n", ifp->if_xname);
633 		ifp->if_timer = 1;
634 		goto try_start;
635 	}
636 	/*
637 	 * We have a packet number, so tell the card to use it.
638 	 */
639 	outb(BASE + PACKET_NUM_REG_B, packet_no);
640 
641 	/*
642 	 * Now, numPages should match the pages_wanted recorded when the
643 	 * memory allocation was initiated.
644 	 */
645 	if (pages_wanted != numPages) {
646 		kprintf("%s: memory allocation wrong size.  Weird.\n", ifp->if_xname);
647 		/*
648 		 * If the allocation was the wrong size we simply release the
649 		 * memory once it is granted. Wait for the MMU to be un-busy.
650 		 */
651 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
652 			;
653 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
654 
655 		return;
656 	}
657 	/*
658 	 * Point to the beginning of the packet
659 	 */
660 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
661 
662 	/*
663 	 * Send the packet length (+6 for status, length and control byte)
664 	 * and the status word (set to zeros)
665 	 */
666 	outw(BASE + DATA_REG_W, 0);
667 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
668 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
669 
670 	/*
671 	 * Get the packet from the kernel.  This will include the Ethernet
672 	 * frame header, MAC Addresses etc.
673 	 */
674 	ifq_dequeue(&ifp->if_snd, m);
675 
676 	/*
677 	 * Push out the data to the card.
678 	 */
679 	for (top = m; m != 0; m = m->m_next) {
680 
681 		/*
682 		 * Push out words.
683 		 */
684 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
685 
686 		/*
687 		 * Push out remaining byte.
688 		 */
689 		if (m->m_len & 1)
690 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
691 	}
692 
693 	/*
694 	 * Push out padding.
695 	 */
696 	while (pad > 1) {
697 		outw(BASE + DATA_REG_W, 0);
698 		pad -= 2;
699 	}
700 	if (pad)
701 		outb(BASE + DATA_REG_B, 0);
702 
703 	/*
704 	 * Push out control byte and unused packet byte The control byte is 0
705 	 * meaning the packet is even lengthed and no special CRC handling is
706 	 * desired.
707 	 */
708 	outw(BASE + DATA_REG_W, 0);
709 
710 	/*
711 	 * Enable the interrupts and let the chipset deal with it Also set a
712 	 * watchdog in case we miss the interrupt.
713 	 */
714 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
715 	outb(BASE + INTR_MASK_REG_B, mask);
716 	sc->intr_mask = mask;
717 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
718 
719 	BPF_MTAP(ifp, top);
720 
721 	ifp->if_opackets++;
722 	m_freem(top);
723 
724 try_start:
725 
726 	/*
727 	 * Now pass control to snstart() to queue any additional packets
728 	 */
729 	ifp->if_flags &= ~IFF_OACTIVE;
730 	snstart(ifp);
731 
732 	/*
733 	 * We've sent something, so we're active.  Set a watchdog in case the
734 	 * TX_EMPTY interrupt is lost.
735 	 */
736 	ifp->if_flags |= IFF_OACTIVE;
737 	ifp->if_timer = 1;
738 }
739 
740 
741 void
742 sn_intr(void *arg)
743 {
744 	int             status, interrupts;
745 	struct sn_softc *sc = (struct sn_softc *) arg;
746 	struct ifnet   *ifp = &sc->arpcom.ac_if;
747 
748 	/*
749 	 * Chip state registers
750 	 */
751 	u_char          mask;
752 	u_char          packet_no;
753 	u_short         tx_status;
754 	u_short         card_stats;
755 
756 	/*
757 	 * Clear the watchdog.
758 	 */
759 	ifp->if_timer = 0;
760 
761 	SMC_SELECT_BANK(2);
762 
763 	/*
764 	 * Obtain the current interrupt mask and clear the hardware mask
765 	 * while servicing interrupts.
766 	 */
767 	mask = inb(BASE + INTR_MASK_REG_B);
768 	outb(BASE + INTR_MASK_REG_B, 0x00);
769 
770 	/*
771 	 * Get the set of interrupts which occurred and eliminate any which
772 	 * are masked.
773 	 */
774 	interrupts = inb(BASE + INTR_STAT_REG_B);
775 	status = interrupts & mask;
776 
777 	/*
778 	 * Now, process each of the interrupt types.
779 	 */
780 
781 	/*
782 	 * Receive Overrun.
783 	 */
784 	if (status & IM_RX_OVRN_INT) {
785 
786 		/*
787 		 * Acknowlege Interrupt
788 		 */
789 		SMC_SELECT_BANK(2);
790 		outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
791 
792 		++sc->arpcom.ac_if.if_ierrors;
793 	}
794 	/*
795 	 * Got a packet.
796 	 */
797 	if (status & IM_RCV_INT) {
798 #if 1
799 		int             packet_number;
800 
801 		SMC_SELECT_BANK(2);
802 		packet_number = inw(BASE + FIFO_PORTS_REG_W);
803 
804 		if (packet_number & FIFO_REMPTY) {
805 
806 			/*
807 			 * we got called , but nothing was on the FIFO
808 			 */
809 			kprintf("sn: Receive interrupt with nothing on FIFO\n");
810 
811 			goto out;
812 		}
813 #endif
814 		snread(ifp);
815 	}
816 	/*
817 	 * An on-card memory allocation came through.
818 	 */
819 	if (status & IM_ALLOC_INT) {
820 
821 		/*
822 		 * Disable this interrupt.
823 		 */
824 		mask &= ~IM_ALLOC_INT;
825 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
826 		snresume(&sc->arpcom.ac_if);
827 	}
828 	/*
829 	 * TX Completion.  Handle a transmit error message. This will only be
830 	 * called when there is an error, because of the AUTO_RELEASE mode.
831 	 */
832 	if (status & IM_TX_INT) {
833 
834 		/*
835 		 * Acknowlege Interrupt
836 		 */
837 		SMC_SELECT_BANK(2);
838 		outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
839 
840 		packet_no = inw(BASE + FIFO_PORTS_REG_W);
841 		packet_no &= FIFO_TX_MASK;
842 
843 		/*
844 		 * select this as the packet to read from
845 		 */
846 		outb(BASE + PACKET_NUM_REG_B, packet_no);
847 
848 		/*
849 		 * Position the pointer to the first word from this packet
850 		 */
851 		outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
852 
853 		/*
854 		 * Fetch the TX status word.  The value found here will be a
855 		 * copy of the EPH_STATUS_REG_W at the time the transmit
856 		 * failed.
857 		 */
858 		tx_status = inw(BASE + DATA_REG_W);
859 
860 		if (tx_status & EPHSR_TX_SUC) {
861 			device_printf(sc->dev,
862 			    "Successful packet caused interrupt\n");
863 		} else {
864 			++sc->arpcom.ac_if.if_oerrors;
865 		}
866 
867 		if (tx_status & EPHSR_LATCOL)
868 			++sc->arpcom.ac_if.if_collisions;
869 
870 		/*
871 		 * Some of these errors will have disabled transmit.
872 		 * Re-enable transmit now.
873 		 */
874 		SMC_SELECT_BANK(0);
875 
876 #ifdef SW_PAD
877 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
878 #else
879 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
880 #endif	/* SW_PAD */
881 
882 		/*
883 		 * kill the failed packet. Wait for the MMU to be un-busy.
884 		 */
885 		SMC_SELECT_BANK(2);
886 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
887 			;
888 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
889 
890 		/*
891 		 * Attempt to queue more transmits.
892 		 */
893 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
894 		snstart(&sc->arpcom.ac_if);
895 	}
896 	/*
897 	 * Transmit underrun.  We use this opportunity to update transmit
898 	 * statistics from the card.
899 	 */
900 	if (status & IM_TX_EMPTY_INT) {
901 
902 		/*
903 		 * Acknowlege Interrupt
904 		 */
905 		SMC_SELECT_BANK(2);
906 		outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
907 
908 		/*
909 		 * Disable this interrupt.
910 		 */
911 		mask &= ~IM_TX_EMPTY_INT;
912 
913 		SMC_SELECT_BANK(0);
914 		card_stats = inw(BASE + COUNTER_REG_W);
915 
916 		/*
917 		 * Single collisions
918 		 */
919 		sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
920 
921 		/*
922 		 * Multiple collisions
923 		 */
924 		sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
925 
926 		SMC_SELECT_BANK(2);
927 
928 		/*
929 		 * Attempt to enqueue some more stuff.
930 		 */
931 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
932 		snstart(&sc->arpcom.ac_if);
933 	}
934 	/*
935 	 * Some other error.  Try to fix it by resetting the adapter.
936 	 */
937 	if (status & IM_EPH_INT) {
938 		snstop(sc);
939 		sninit(sc);
940 	}
941 
942 out:
943 	/*
944 	 * Handled all interrupt sources.
945 	 */
946 
947 	SMC_SELECT_BANK(2);
948 
949 	/*
950 	 * Reestablish interrupts from mask which have not been deselected
951 	 * during this interrupt.  Note that the hardware mask, which was set
952 	 * to 0x00 at the start of this service routine, may have been
953 	 * updated by one or more of the interrupt handers and we must let
954 	 * those new interrupts stay enabled here.
955 	 */
956 	mask |= inb(BASE + INTR_MASK_REG_B);
957 	outb(BASE + INTR_MASK_REG_B, mask);
958 	sc->intr_mask = mask;
959 }
960 
961 void
962 snread(struct ifnet *ifp)
963 {
964         struct sn_softc *sc = ifp->if_softc;
965 	struct mbuf    *m;
966 	short           status;
967 	int             packet_number;
968 	u_short         packet_length;
969 	u_char         *data;
970 
971 	SMC_SELECT_BANK(2);
972 #if 0
973 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
974 
975 	if (packet_number & FIFO_REMPTY) {
976 
977 		/*
978 		 * we got called , but nothing was on the FIFO
979 		 */
980 		kprintf("sn: Receive interrupt with nothing on FIFO\n");
981 		return;
982 	}
983 #endif
984 read_another:
985 
986 	/*
987 	 * Start reading from the start of the packet. Since PTR_RCV is set,
988 	 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
989 	 */
990 	outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
991 
992 	/*
993 	 * First two words are status and packet_length
994 	 */
995 	status = inw(BASE + DATA_REG_W);
996 	packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
997 
998 	/*
999 	 * The packet length contains 3 extra words: status, length, and a
1000 	 * extra word with the control byte.
1001 	 */
1002 	packet_length -= 6;
1003 
1004 	/*
1005 	 * Account for receive errors and discard.
1006 	 */
1007 	if (status & RS_ERRORS) {
1008 		++ifp->if_ierrors;
1009 		goto out;
1010 	}
1011 	/*
1012 	 * A packet is received.
1013 	 */
1014 
1015 	/*
1016 	 * Adjust for odd-length packet.
1017 	 */
1018 	if (status & RS_ODDFRAME)
1019 		packet_length++;
1020 
1021 	/*
1022 	 * Allocate a header mbuf from the kernel.
1023 	 */
1024 	MGETHDR(m, MB_DONTWAIT, MT_DATA);
1025 	if (m == NULL)
1026 		goto out;
1027 
1028 	m->m_pkthdr.rcvif = ifp;
1029 	m->m_pkthdr.len = m->m_len = packet_length;
1030 
1031 	/*
1032 	 * Attach an mbuf cluster
1033 	 */
1034 	MCLGET(m, MB_DONTWAIT);
1035 
1036 	/*
1037 	 * Insist on getting a cluster
1038 	 */
1039 	if ((m->m_flags & M_EXT) == 0) {
1040 		m_freem(m);
1041 		++ifp->if_ierrors;
1042 		kprintf("sn: snread() kernel memory allocation problem\n");
1043 		goto out;
1044 	}
1045 
1046 	/*
1047 	 * Get packet, including link layer address, from interface.
1048 	 */
1049 
1050 	data = mtod(m, u_char *);
1051 	insw(BASE + DATA_REG_W, data, packet_length >> 1);
1052 	if (packet_length & 1) {
1053 		data += packet_length & ~1;
1054 		*data = inb(BASE + DATA_REG_B);
1055 	}
1056 	++ifp->if_ipackets;
1057 
1058 	m->m_pkthdr.len = m->m_len = packet_length;
1059 
1060 	ifp->if_input(ifp, m);
1061 
1062 out:
1063 
1064 	/*
1065 	 * Error or good, tell the card to get rid of this packet Wait for
1066 	 * the MMU to be un-busy.
1067 	 */
1068 	SMC_SELECT_BANK(2);
1069 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
1070 		;
1071 	outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1072 
1073 	/*
1074 	 * Check whether another packet is ready
1075 	 */
1076 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
1077 	if (packet_number & FIFO_REMPTY) {
1078 		return;
1079 	}
1080 	goto read_another;
1081 }
1082 
1083 
1084 /*
1085  * Handle IOCTLS.  This function is completely stolen from if_ep.c
1086  * As with its progenitor, it does not handle hardware address
1087  * changes.
1088  */
1089 static int
1090 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1091 {
1092 	struct sn_softc *sc = ifp->if_softc;
1093 	int error = 0;
1094 
1095 	switch (cmd) {
1096 	case SIOCSIFFLAGS:
1097 		if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1098 			ifp->if_flags &= ~IFF_RUNNING;
1099 			snstop(sc);
1100 			break;
1101 		} else {
1102 			/* reinitialize card on any parameter change */
1103 			sninit(sc);
1104 			break;
1105 		}
1106 		break;
1107 
1108 #ifdef notdef
1109 	case SIOCGHWADDR:
1110 		bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1111 		      sizeof(sc->sc_addr));
1112 		break;
1113 #endif
1114 
1115 	case SIOCADDMULTI:
1116 	    /* update multicast filter list. */
1117 	    sn_setmcast(sc);
1118 	    error = 0;
1119 	    break;
1120 	case SIOCDELMULTI:
1121 	    /* update multicast filter list. */
1122 	    sn_setmcast(sc);
1123 	    error = 0;
1124 	    break;
1125 	default:
1126 		error = ether_ioctl(ifp, cmd, data);
1127 		break;
1128 	}
1129 
1130 	return (error);
1131 }
1132 
1133 void
1134 snreset(struct sn_softc *sc)
1135 {
1136 	snstop(sc);
1137 	sninit(sc);
1138 }
1139 
1140 void
1141 snwatchdog(struct ifnet *ifp)
1142 {
1143 	sn_intr(ifp->if_softc);
1144 }
1145 
1146 
1147 /* 1. zero the interrupt mask
1148  * 2. clear the enable receive flag
1149  * 3. clear the enable xmit flags
1150  */
1151 void
1152 snstop(struct sn_softc *sc)
1153 {
1154 
1155 	struct ifnet   *ifp = &sc->arpcom.ac_if;
1156 
1157 	/*
1158 	 * Clear interrupt mask; disable all interrupts.
1159 	 */
1160 	SMC_SELECT_BANK(2);
1161 	outb(BASE + INTR_MASK_REG_B, 0x00);
1162 
1163 	/*
1164 	 * Disable transmitter and Receiver
1165 	 */
1166 	SMC_SELECT_BANK(0);
1167 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1168 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1169 
1170 	/*
1171 	 * Cancel watchdog.
1172 	 */
1173 	ifp->if_timer = 0;
1174 }
1175 
1176 
1177 int
1178 sn_activate(device_t dev)
1179 {
1180 	struct sn_softc *sc = device_get_softc(dev);
1181 
1182 	sc->port_rid = 0;
1183 	sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1184 	    0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1185 	if (!sc->port_res) {
1186 #ifdef SN_DEBUG
1187 		device_printf(dev, "Cannot allocate ioport\n");
1188 #endif
1189 		return ENOMEM;
1190 	}
1191 
1192 	sc->irq_rid = 0;
1193 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
1194 	    RF_ACTIVE);
1195 	if (!sc->irq_res) {
1196 #ifdef SN_DEBUG
1197 		device_printf(dev, "Cannot allocate irq\n");
1198 #endif
1199 		sn_deactivate(dev);
1200 		return ENOMEM;
1201 	}
1202 
1203 	sc->sn_io_addr = rman_get_start(sc->port_res);
1204 	return (0);
1205 }
1206 
1207 void
1208 sn_deactivate(device_t dev)
1209 {
1210 	struct sn_softc *sc = device_get_softc(dev);
1211 
1212 	if (sc->port_res)
1213 		bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1214 		    sc->port_res);
1215 	sc->port_res = 0;
1216 	if (sc->irq_res)
1217 		bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1218 		    sc->irq_res);
1219 	sc->irq_res = 0;
1220 	return;
1221 }
1222 
1223 /*
1224  * Function: sn_probe( device_t dev, int pccard )
1225  *
1226  * Purpose:
1227  *      Tests to see if a given ioaddr points to an SMC9xxx chip.
1228  *      Tries to cause as little damage as possible if it's not a SMC chip.
1229  *      Returns a 0 on success
1230  *
1231  * Algorithm:
1232  *      (1) see if the high byte of BANK_SELECT is 0x33
1233  *      (2) compare the ioaddr with the base register's address
1234  *      (3) see if I recognize the chip ID in the appropriate register
1235  *
1236  *
1237  */
1238 int
1239 sn_probe(device_t dev, int pccard)
1240 {
1241 	struct sn_softc *sc = device_get_softc(dev);
1242 	u_int           bank;
1243 	u_short         revision_register;
1244 	u_short         base_address_register;
1245 	u_short		ioaddr;
1246 	int		err;
1247 
1248 	if ((err = sn_activate(dev)) != 0)
1249 		return err;
1250 
1251 	ioaddr = sc->sn_io_addr;
1252 
1253 	/*
1254 	 * First, see if the high byte is 0x33
1255 	 */
1256 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1257 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1258 #ifdef	SN_DEBUG
1259 		device_printf(dev, "test1 failed\n");
1260 #endif
1261 		goto error;
1262 	}
1263 	/*
1264 	 * The above MIGHT indicate a device, but I need to write to further
1265 	 * test this.  Go to bank 0, then test that the register still
1266 	 * reports the high byte is 0x33.
1267 	 */
1268 	outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1269 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1270 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1271 #ifdef	SN_DEBUG
1272 		device_printf(dev, "test2 failed\n");
1273 #endif
1274 		goto error;
1275 	}
1276 	/*
1277 	 * well, we've already written once, so hopefully another time won't
1278 	 * hurt.  This time, I need to switch the bank register to bank 1, so
1279 	 * I can access the base address register.  The contents of the
1280 	 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1281 	 * to match the I/O port address where the adapter is being probed.
1282 	 */
1283 	outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1284 	base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1285 
1286 	/*
1287 	 * This test is nonsence on PC-card architecture, so if
1288 	 * pccard == 1, skip this test. (hosokawa)
1289 	 */
1290 	if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1291 
1292 		/*
1293 		 * Well, the base address register didn't match.  Must not
1294 		 * have been a SMC chip after all.
1295 		 */
1296 		/*
1297 		 * kprintf("sn: ioaddr %x doesn't match card configuration
1298 		 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 );
1299 		 */
1300 
1301 #ifdef	SN_DEBUG
1302 		device_printf(dev, "test3 failed ioaddr = 0x%x, "
1303 		    "base_address_register = 0x%x\n", ioaddr,
1304 		    base_address_register >> 3 & 0x3E0);
1305 #endif
1306 		goto error;
1307 	}
1308 	/*
1309 	 * Check if the revision register is something that I recognize.
1310 	 * These might need to be added to later, as future revisions could
1311 	 * be added.
1312 	 */
1313 	outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1314 	revision_register = inw(ioaddr + REVISION_REG_W);
1315 	if (!chip_ids[(revision_register >> 4) & 0xF]) {
1316 
1317 		/*
1318 		 * I don't regonize this chip, so...
1319 		 */
1320 #ifdef	SN_DEBUG
1321 		device_printf(dev, "test4 failed\n");
1322 #endif
1323 		goto error;
1324 	}
1325 	/*
1326 	 * at this point I'll assume that the chip is an SMC9xxx. It might be
1327 	 * prudent to check a listing of MAC addresses against the hardware
1328 	 * address, or do some other tests.
1329 	 */
1330 	sn_deactivate(dev);
1331 	return 0;
1332  error:
1333 	sn_deactivate(dev);
1334 	return ENXIO;
1335 }
1336 
1337 #define MCFSZ 8
1338 
1339 static void
1340 sn_setmcast(struct sn_softc *sc)
1341 {
1342 	struct ifnet *ifp = (struct ifnet *)sc;
1343 	int flags;
1344 
1345 	/*
1346 	 * Set the receiver filter.  We want receive enabled and auto strip
1347 	 * of CRC from received packet.  If we are promiscuous then set that
1348 	 * bit too.
1349 	 */
1350 	flags = RCR_ENABLE | RCR_STRIP_CRC;
1351 
1352 	if (ifp->if_flags & IFF_PROMISC) {
1353 		flags |= RCR_PROMISC | RCR_ALMUL;
1354 	} else if (ifp->if_flags & IFF_ALLMULTI) {
1355 		flags |= RCR_ALMUL;
1356 	} else {
1357 		u_char mcf[MCFSZ];
1358 		if (sn_getmcf(&sc->arpcom, mcf)) {
1359 			/* set filter */
1360 			SMC_SELECT_BANK(3);
1361 			outw(BASE + MULTICAST1_REG_W,
1362 			    ((u_short)mcf[1] << 8) |  mcf[0]);
1363 			outw(BASE + MULTICAST2_REG_W,
1364 			    ((u_short)mcf[3] << 8) |  mcf[2]);
1365 			outw(BASE + MULTICAST3_REG_W,
1366 			    ((u_short)mcf[5] << 8) |  mcf[4]);
1367 			outw(BASE + MULTICAST4_REG_W,
1368 			    ((u_short)mcf[7] << 8) |  mcf[6]);
1369 		} else {
1370 			flags |= RCR_ALMUL;
1371 		}
1372 	}
1373 	SMC_SELECT_BANK(0);
1374 	outw(BASE + RECV_CONTROL_REG_W, flags);
1375 }
1376 
1377 static int
1378 sn_getmcf(struct arpcom *ac, u_char *mcf)
1379 {
1380 	int i;
1381 	u_int index, index2;
1382 	u_char *af = (u_char *) mcf;
1383 	struct ifmultiaddr *ifma;
1384 
1385 	bzero(mcf, MCFSZ);
1386 
1387 	LIST_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1388 	    if (ifma->ifma_addr->sa_family != AF_LINK)
1389 		return 0;
1390 	    index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1391 	    index2 = 0;
1392 	    for (i = 0; i < 6; i++) {
1393 		index2 <<= 1;
1394 		index2 |= (index & 0x01);
1395 		index >>= 1;
1396 	    }
1397 	    af[index2 >> 3] |= 1 << (index2 & 7);
1398 	}
1399 	return 1;  /* use multicast filter */
1400 }
1401 
1402 static u_int
1403 smc_crc(u_char *s)
1404 {
1405 	int perByte;
1406 	int perBit;
1407 	const u_int poly = 0xedb88320;
1408 	u_int v = 0xffffffff;
1409 	u_char c;
1410 
1411 	for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1412 		c = s[perByte];
1413 		for (perBit = 0; perBit < 8; perBit++) {
1414 			v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1415 			c >>= 1;
1416 		}
1417 	}
1418 	return v;
1419 }
1420