xref: /dragonfly/sys/dev/netif/sn/if_sn.c (revision 71126e33)
1 /*
2  * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *      This product includes software developed by Gardner Buchanan.
16  * 4. The name of Gardner Buchanan may not be used to endorse or promote
17  *    products derived from this software without specific prior written
18  *    permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  *   $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $
32  *   $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.11 2004/07/23 07:16:28 joerg Exp $
33  */
34 
35 /*
36  * This is a driver for SMC's 9000 series of Ethernet adapters.
37  *
38  * This FreeBSD driver is derived from the smc9194 Linux driver by
39  * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
40  * This driver also shamelessly borrows from the FreeBSD ep driver
41  * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
42  * All rights reserved.
43  *
44  * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
45  * PC.  It is adapted from Erik Stahlman's Linux driver which worked
46  * with his EFA Info*Express SVC VLB adaptor.  According to SMC's databook,
47  * it will work for the entire SMC 9xxx series. (Ha Ha)
48  *
49  * "Features" of the SMC chip:
50  *   4608 byte packet memory. (for the 91C92.  Others have more)
51  *   EEPROM for configuration
52  *   AUI/TP selection
53  *
54  * Authors:
55  *      Erik Stahlman                   erik@vt.edu
56  *      Herb Peyerl                     hpeyerl@novatel.ca
57  *      Andres Vega Garcia              avega@sophia.inria.fr
58  *      Serge Babkin                    babkin@hq.icb.chel.su
59  *      Gardner Buchanan                gbuchanan@shl.com
60  *
61  * Sources:
62  *    o   SMC databook
63  *    o   "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
64  *    o   "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
65  *
66  * Known Bugs:
67  *    o   The hardware multicast filter isn't used yet.
68  *    o   Setting of the hardware address isn't supported.
69  *    o   Hardware padding isn't used.
70  */
71 
72 /*
73  * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
74  *
75  * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
76  *                       BSD-nomads, Tokyo, Japan.
77  */
78 /*
79  * Multicast support by Kei TANAKA <kei@pal.xerox.com>
80  * Special thanks to itojun@itojun.org
81  */
82 
83 #undef	SN_DEBUG	/* (by hosokawa) */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/errno.h>
89 #include <sys/sockio.h>
90 #include <sys/malloc.h>
91 #include <sys/mbuf.h>
92 #include <sys/socket.h>
93 #include <sys/syslog.h>
94 
95 #include <sys/module.h>
96 #include <sys/bus.h>
97 
98 #include <machine/bus.h>
99 #include <machine/resource.h>
100 #include <sys/rman.h>
101 
102 #include <net/ethernet.h>
103 #include <net/if.h>
104 #include <net/if_arp.h>
105 #include <net/if_dl.h>
106 #include <net/if_types.h>
107 #include <net/if_mib.h>
108 
109 #ifdef INET
110 #include <netinet/in.h>
111 #include <netinet/in_systm.h>
112 #include <netinet/in_var.h>
113 #include <netinet/ip.h>
114 #endif
115 
116 #ifdef NS
117 #include <netns/ns.h>
118 #include <netns/ns_if.h>
119 #endif
120 
121 #include <net/bpf.h>
122 #include <net/bpfdesc.h>
123 
124 #include <machine/clock.h>
125 
126 #include "if_snreg.h"
127 #include "if_snvar.h"
128 
129 /* Exported variables */
130 devclass_t sn_devclass;
131 
132 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *);
133 
134 static void snresume(struct ifnet *);
135 
136 void sninit(void *);
137 void snread(struct ifnet *);
138 void snreset(struct sn_softc *);
139 void snstart(struct ifnet *);
140 void snstop(struct sn_softc *);
141 void snwatchdog(struct ifnet *);
142 
143 static void sn_setmcast(struct sn_softc *);
144 static int sn_getmcf(struct arpcom *ac, u_char *mcf);
145 static u_int smc_crc(u_char *);
146 
147 DECLARE_DUMMY_MODULE(if_sn);
148 
149 /* I (GB) have been unlucky getting the hardware padding
150  * to work properly.
151  */
152 #define SW_PAD
153 
154 static const char *chip_ids[15] = {
155 	NULL, NULL, NULL,
156 	 /* 3 */ "SMC91C90/91C92",
157 	 /* 4 */ "SMC91C94",
158 	 /* 5 */ "SMC91C95",
159 	NULL,
160 	 /* 7 */ "SMC91C100",
161 	 /* 8 */ "SMC91C100FD",
162 	NULL, NULL, NULL,
163 	NULL, NULL, NULL
164 };
165 
166 int
167 sn_attach(device_t dev)
168 {
169 	struct sn_softc *sc = device_get_softc(dev);
170 	struct ifnet   *ifp = &sc->arpcom.ac_if;
171 	u_short         i;
172 	u_char         *p;
173 	struct ifaddr  *ifa;
174 	struct sockaddr_dl *sdl;
175 	int             rev;
176 	u_short         address;
177 	int		j;
178 
179 	sn_activate(dev);
180 
181 	snstop(sc);
182 
183 	sc->dev = dev;
184 	sc->pages_wanted = -1;
185 
186 	device_printf(dev, " ");
187 
188 	SMC_SELECT_BANK(3);
189 	rev = inw(BASE + REVISION_REG_W);
190 	if (chip_ids[(rev >> 4) & 0xF])
191 		printf("%s ", chip_ids[(rev >> 4) & 0xF]);
192 
193 	SMC_SELECT_BANK(1);
194 	i = inw(BASE + CONFIG_REG_W);
195 	printf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP");
196 
197 	if (sc->pccard_enaddr)
198 		for (j = 0; j < 3; j++) {
199 			u_short	w;
200 
201 			w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
202 				(((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
203 			outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
204 		}
205 
206 	/*
207 	 * Read the station address from the chip. The MAC address is bank 1,
208 	 * regs 4 - 9
209 	 */
210 	SMC_SELECT_BANK(1);
211 	p = (u_char *) & sc->arpcom.ac_enaddr;
212 	for (i = 0; i < 6; i += 2) {
213 		address = inw(BASE + IAR_ADDR0_REG_W + i);
214 		p[i + 1] = address >> 8;
215 		p[i] = address & 0xFF;
216 	}
217 	ifp->if_softc = sc;
218 	if_initname(ifp, "sn", device_get_unit(dev));
219 	ifp->if_mtu = ETHERMTU;
220 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
221 	ifp->if_start = snstart;
222 	ifp->if_ioctl = snioctl;
223 	ifp->if_watchdog = snwatchdog;
224 	ifp->if_init = sninit;
225 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
226 	ifp->if_timer = 0;
227 
228 	ether_ifattach(ifp, sc->arpcom.ac_enaddr);
229 
230 	/*
231 	 * Fill the hardware address into ifa_addr if we find an AF_LINK
232 	 * entry. We need to do this so bpf's can get the hardware addr of
233 	 * this card. netstat likes this too!
234 	 */
235 	ifa = TAILQ_FIRST(&ifp->if_addrhead);
236 	while ((ifa != 0) && (ifa->ifa_addr != 0) &&
237 	       (ifa->ifa_addr->sa_family != AF_LINK))
238 		ifa = TAILQ_NEXT(ifa, ifa_link);
239 
240 	if ((ifa != 0) && (ifa->ifa_addr != 0)) {
241 		sdl = (struct sockaddr_dl *) ifa->ifa_addr;
242 		sdl->sdl_type = IFT_ETHER;
243 		sdl->sdl_alen = ETHER_ADDR_LEN;
244 		sdl->sdl_slen = 0;
245 		bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
246 	}
247 
248 	return 0;
249 }
250 
251 
252 /*
253  * Reset and initialize the chip
254  */
255 void
256 sninit(void *xsc)
257 {
258 	struct sn_softc *sc = xsc;
259 	struct ifnet *ifp = &sc->arpcom.ac_if;
260 	int             s;
261 	int             flags;
262 	int             mask;
263 
264 	s = splimp();
265 
266 	/*
267 	 * This resets the registers mostly to defaults, but doesn't affect
268 	 * EEPROM.  After the reset cycle, we pause briefly for the chip to
269 	 * be happy.
270 	 */
271 	SMC_SELECT_BANK(0);
272 	outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
273 	SMC_DELAY();
274 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
275 	SMC_DELAY();
276 	SMC_DELAY();
277 
278 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
279 
280 	/*
281 	 * Set the control register to automatically release succesfully
282 	 * transmitted packets (making the best use out of our limited
283 	 * memory) and to enable the EPH interrupt on certain TX errors.
284 	 */
285 	SMC_SELECT_BANK(1);
286 	outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
287 				    CTR_CR_ENABLE | CTR_LE_ENABLE));
288 
289 	/* Set squelch level to 240mV (default 480mV) */
290 	flags = inw(BASE + CONFIG_REG_W);
291 	flags |= CR_SET_SQLCH;
292 	outw(BASE + CONFIG_REG_W, flags);
293 
294 	/*
295 	 * Reset the MMU and wait for it to be un-busy.
296 	 */
297 	SMC_SELECT_BANK(2);
298 	outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
299 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
300 		;
301 
302 	/*
303 	 * Disable all interrupts
304 	 */
305 	outb(BASE + INTR_MASK_REG_B, 0x00);
306 
307 	sn_setmcast(sc);
308 
309 	/*
310 	 * Set the transmitter control.  We want it enabled.
311 	 */
312 	flags = TCR_ENABLE;
313 
314 #ifndef SW_PAD
315 	/*
316 	 * I (GB) have been unlucky getting this to work.
317 	 */
318 	flags |= TCR_PAD_ENABLE;
319 #endif	/* SW_PAD */
320 
321 	outw(BASE + TXMIT_CONTROL_REG_W, flags);
322 
323 
324 	/*
325 	 * Now, enable interrupts
326 	 */
327 	SMC_SELECT_BANK(2);
328 
329 	mask = IM_EPH_INT |
330 		IM_RX_OVRN_INT |
331 		IM_RCV_INT |
332 		IM_TX_INT;
333 
334 	outb(BASE + INTR_MASK_REG_B, mask);
335 	sc->intr_mask = mask;
336 	sc->pages_wanted = -1;
337 
338 
339 	/*
340 	 * Mark the interface running but not active.
341 	 */
342 	ifp->if_flags |= IFF_RUNNING;
343 	ifp->if_flags &= ~IFF_OACTIVE;
344 
345 	/*
346 	 * Attempt to push out any waiting packets.
347 	 */
348 	snstart(ifp);
349 
350 	splx(s);
351 }
352 
353 
354 void
355 snstart(struct ifnet *ifp)
356 {
357 	struct sn_softc *sc = ifp->if_softc;
358 	u_int  len;
359 	struct mbuf *m;
360 	struct mbuf    *top;
361 	int             s, pad;
362 	int             mask;
363 	u_short         length;
364 	u_short         numPages;
365 	u_char          packet_no;
366 	int             time_out;
367 
368 	s = splimp();
369 
370 	if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
371 		splx(s);
372 		return;
373 	}
374 	if (sc->pages_wanted != -1) {
375 		splx(s);
376 		printf("%s: snstart() while memory allocation pending\n",
377 		       ifp->if_xname);
378 		return;
379 	}
380 startagain:
381 
382 	/*
383 	 * Sneak a peek at the next packet
384 	 */
385 	m = sc->arpcom.ac_if.if_snd.ifq_head;
386 	if (m == 0) {
387 		splx(s);
388 		return;
389 	}
390 	/*
391 	 * Compute the frame length and set pad to give an overall even
392 	 * number of bytes.  Below we assume that the packet length is even.
393 	 */
394 	for (len = 0, top = m; m; m = m->m_next)
395 		len += m->m_len;
396 
397 	pad = (len & 1);
398 
399 	/*
400 	 * We drop packets that are too large. Perhaps we should truncate
401 	 * them instead?
402 	 */
403 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
404 		printf("%s: large packet discarded (A)\n", ifp->if_xname);
405 		++sc->arpcom.ac_if.if_oerrors;
406 		IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
407 		m_freem(m);
408 		goto readcheck;
409 	}
410 #ifdef SW_PAD
411 
412 	/*
413 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
414 	 */
415 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
416 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
417 
418 #endif	/* SW_PAD */
419 
420 	length = pad + len;
421 
422 	/*
423 	 * The MMU wants the number of pages to be the number of 256 byte
424 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
425 	 * include space for the status word, byte count and control bytes in
426 	 * the allocation request.
427 	 */
428 	numPages = (length + 6) >> 8;
429 
430 
431 	/*
432 	 * Now, try to allocate the memory
433 	 */
434 	SMC_SELECT_BANK(2);
435 	outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
436 
437 	/*
438 	 * Wait a short amount of time to see if the allocation request
439 	 * completes.  Otherwise, I enable the interrupt and wait for
440 	 * completion asyncronously.
441 	 */
442 
443 	time_out = MEMORY_WAIT_TIME;
444 	do {
445 		if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
446 			break;
447 	} while (--time_out);
448 
449 	if (!time_out) {
450 
451 		/*
452 		 * No memory now.  Oh well, wait until the chip finds memory
453 		 * later.   Remember how many pages we were asking for and
454 		 * enable the allocation completion interrupt. Also set a
455 		 * watchdog in case  we miss the interrupt. We mark the
456 		 * interface active since there is no point in attempting an
457 		 * snstart() until after the memory is available.
458 		 */
459 		mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
460 		outb(BASE + INTR_MASK_REG_B, mask);
461 		sc->intr_mask = mask;
462 
463 		sc->arpcom.ac_if.if_timer = 1;
464 		sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
465 		sc->pages_wanted = numPages;
466 
467 		splx(s);
468 		return;
469 	}
470 	/*
471 	 * The memory allocation completed.  Check the results.
472 	 */
473 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
474 	if (packet_no & ARR_FAILED) {
475 		printf("%s: Memory allocation failed\n", ifp->if_xname);
476 		goto startagain;
477 	}
478 	/*
479 	 * We have a packet number, so tell the card to use it.
480 	 */
481 	outb(BASE + PACKET_NUM_REG_B, packet_no);
482 
483 	/*
484 	 * Point to the beginning of the packet
485 	 */
486 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
487 
488 	/*
489 	 * Send the packet length (+6 for status, length and control byte)
490 	 * and the status word (set to zeros)
491 	 */
492 	outw(BASE + DATA_REG_W, 0);
493 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
494 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
495 
496 	/*
497 	 * Get the packet from the kernel.  This will include the Ethernet
498 	 * frame header, MAC Addresses etc.
499 	 */
500 	IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
501 
502 	/*
503 	 * Push out the data to the card.
504 	 */
505 	for (top = m; m != 0; m = m->m_next) {
506 
507 		/*
508 		 * Push out words.
509 		 */
510 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
511 
512 		/*
513 		 * Push out remaining byte.
514 		 */
515 		if (m->m_len & 1)
516 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
517 	}
518 
519 	/*
520 	 * Push out padding.
521 	 */
522 	while (pad > 1) {
523 		outw(BASE + DATA_REG_W, 0);
524 		pad -= 2;
525 	}
526 	if (pad)
527 		outb(BASE + DATA_REG_B, 0);
528 
529 	/*
530 	 * Push out control byte and unused packet byte The control byte is 0
531 	 * meaning the packet is even lengthed and no special CRC handling is
532 	 * desired.
533 	 */
534 	outw(BASE + DATA_REG_W, 0);
535 
536 	/*
537 	 * Enable the interrupts and let the chipset deal with it Also set a
538 	 * watchdog in case we miss the interrupt.
539 	 */
540 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
541 	outb(BASE + INTR_MASK_REG_B, mask);
542 	sc->intr_mask = mask;
543 
544 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
545 
546 	sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
547 	sc->arpcom.ac_if.if_timer = 1;
548 
549 	if (ifp->if_bpf) {
550 		bpf_mtap(ifp, top);
551 	}
552 
553 	sc->arpcom.ac_if.if_opackets++;
554 	m_freem(top);
555 
556 
557 readcheck:
558 
559 	/*
560 	 * Is another packet coming in?  We don't want to overflow the tiny
561 	 * RX FIFO.  If nothing has arrived then attempt to queue another
562 	 * transmit packet.
563 	 */
564 	if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
565 		goto startagain;
566 
567 	splx(s);
568 	return;
569 }
570 
571 
572 
573 /* Resume a packet transmit operation after a memory allocation
574  * has completed.
575  *
576  * This is basically a hacked up copy of snstart() which handles
577  * a completed memory allocation the same way snstart() does.
578  * It then passes control to snstart to handle any other queued
579  * packets.
580  */
581 static void
582 snresume(struct ifnet *ifp)
583 {
584 	struct sn_softc *sc = ifp->if_softc;
585 	u_int  len;
586 	struct mbuf *m;
587 	struct mbuf    *top;
588 	int             pad;
589 	int             mask;
590 	u_short         length;
591 	u_short         numPages;
592 	u_short         pages_wanted;
593 	u_char          packet_no;
594 
595 	if (sc->pages_wanted < 0)
596 		return;
597 
598 	pages_wanted = sc->pages_wanted;
599 	sc->pages_wanted = -1;
600 
601 	/*
602 	 * Sneak a peek at the next packet
603 	 */
604 	m = sc->arpcom.ac_if.if_snd.ifq_head;
605 	if (m == 0) {
606 		printf("%s: snresume() with nothing to send\n", ifp->if_xname);
607 		return;
608 	}
609 	/*
610 	 * Compute the frame length and set pad to give an overall even
611 	 * number of bytes.  Below we assume that the packet length is even.
612 	 */
613 	for (len = 0, top = m; m; m = m->m_next)
614 		len += m->m_len;
615 
616 	pad = (len & 1);
617 
618 	/*
619 	 * We drop packets that are too large. Perhaps we should truncate
620 	 * them instead?
621 	 */
622 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
623 		printf("%s: large packet discarded (B)\n", ifp->if_xname);
624 		++sc->arpcom.ac_if.if_oerrors;
625 		IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
626 		m_freem(m);
627 		return;
628 	}
629 #ifdef SW_PAD
630 
631 	/*
632 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
633 	 */
634 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
635 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
636 
637 #endif	/* SW_PAD */
638 
639 	length = pad + len;
640 
641 
642 	/*
643 	 * The MMU wants the number of pages to be the number of 256 byte
644 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
645 	 * include space for the status word, byte count and control bytes in
646 	 * the allocation request.
647 	 */
648 	numPages = (length + 6) >> 8;
649 
650 
651 	SMC_SELECT_BANK(2);
652 
653 	/*
654 	 * The memory allocation completed.  Check the results. If it failed,
655 	 * we simply set a watchdog timer and hope for the best.
656 	 */
657 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
658 	if (packet_no & ARR_FAILED) {
659 		printf("%s: Memory allocation failed.  Weird.\n", ifp->if_xname);
660 		sc->arpcom.ac_if.if_timer = 1;
661 		goto try_start;
662 	}
663 	/*
664 	 * We have a packet number, so tell the card to use it.
665 	 */
666 	outb(BASE + PACKET_NUM_REG_B, packet_no);
667 
668 	/*
669 	 * Now, numPages should match the pages_wanted recorded when the
670 	 * memory allocation was initiated.
671 	 */
672 	if (pages_wanted != numPages) {
673 		printf("%s: memory allocation wrong size.  Weird.\n", ifp->if_xname);
674 		/*
675 		 * If the allocation was the wrong size we simply release the
676 		 * memory once it is granted. Wait for the MMU to be un-busy.
677 		 */
678 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
679 			;
680 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
681 
682 		return;
683 	}
684 	/*
685 	 * Point to the beginning of the packet
686 	 */
687 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
688 
689 	/*
690 	 * Send the packet length (+6 for status, length and control byte)
691 	 * and the status word (set to zeros)
692 	 */
693 	outw(BASE + DATA_REG_W, 0);
694 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
695 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
696 
697 	/*
698 	 * Get the packet from the kernel.  This will include the Ethernet
699 	 * frame header, MAC Addresses etc.
700 	 */
701 	IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
702 
703 	/*
704 	 * Push out the data to the card.
705 	 */
706 	for (top = m; m != 0; m = m->m_next) {
707 
708 		/*
709 		 * Push out words.
710 		 */
711 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
712 
713 		/*
714 		 * Push out remaining byte.
715 		 */
716 		if (m->m_len & 1)
717 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
718 	}
719 
720 	/*
721 	 * Push out padding.
722 	 */
723 	while (pad > 1) {
724 		outw(BASE + DATA_REG_W, 0);
725 		pad -= 2;
726 	}
727 	if (pad)
728 		outb(BASE + DATA_REG_B, 0);
729 
730 	/*
731 	 * Push out control byte and unused packet byte The control byte is 0
732 	 * meaning the packet is even lengthed and no special CRC handling is
733 	 * desired.
734 	 */
735 	outw(BASE + DATA_REG_W, 0);
736 
737 	/*
738 	 * Enable the interrupts and let the chipset deal with it Also set a
739 	 * watchdog in case we miss the interrupt.
740 	 */
741 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
742 	outb(BASE + INTR_MASK_REG_B, mask);
743 	sc->intr_mask = mask;
744 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
745 
746 	if (ifp->if_bpf) {
747 		bpf_mtap(ifp, top);
748 	}
749 
750 	sc->arpcom.ac_if.if_opackets++;
751 	m_freem(top);
752 
753 try_start:
754 
755 	/*
756 	 * Now pass control to snstart() to queue any additional packets
757 	 */
758 	sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
759 	snstart(ifp);
760 
761 	/*
762 	 * We've sent something, so we're active.  Set a watchdog in case the
763 	 * TX_EMPTY interrupt is lost.
764 	 */
765 	sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
766 	sc->arpcom.ac_if.if_timer = 1;
767 
768 	return;
769 }
770 
771 
772 void
773 sn_intr(void *arg)
774 {
775 	int             status, interrupts;
776 	struct sn_softc *sc = (struct sn_softc *) arg;
777 	struct ifnet   *ifp = &sc->arpcom.ac_if;
778 	int             x;
779 
780 	/*
781 	 * Chip state registers
782 	 */
783 	u_char          mask;
784 	u_char          packet_no;
785 	u_short         tx_status;
786 	u_short         card_stats;
787 
788 	/*
789 	 * if_ep.c did this, so I do too.  Yet if_ed.c doesn't. I wonder...
790 	 */
791 	x = splbio();
792 
793 	/*
794 	 * Clear the watchdog.
795 	 */
796 	ifp->if_timer = 0;
797 
798 	SMC_SELECT_BANK(2);
799 
800 	/*
801 	 * Obtain the current interrupt mask and clear the hardware mask
802 	 * while servicing interrupts.
803 	 */
804 	mask = inb(BASE + INTR_MASK_REG_B);
805 	outb(BASE + INTR_MASK_REG_B, 0x00);
806 
807 	/*
808 	 * Get the set of interrupts which occurred and eliminate any which
809 	 * are masked.
810 	 */
811 	interrupts = inb(BASE + INTR_STAT_REG_B);
812 	status = interrupts & mask;
813 
814 	/*
815 	 * Now, process each of the interrupt types.
816 	 */
817 
818 	/*
819 	 * Receive Overrun.
820 	 */
821 	if (status & IM_RX_OVRN_INT) {
822 
823 		/*
824 		 * Acknowlege Interrupt
825 		 */
826 		SMC_SELECT_BANK(2);
827 		outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
828 
829 		++sc->arpcom.ac_if.if_ierrors;
830 	}
831 	/*
832 	 * Got a packet.
833 	 */
834 	if (status & IM_RCV_INT) {
835 #if 1
836 		int             packet_number;
837 
838 		SMC_SELECT_BANK(2);
839 		packet_number = inw(BASE + FIFO_PORTS_REG_W);
840 
841 		if (packet_number & FIFO_REMPTY) {
842 
843 			/*
844 			 * we got called , but nothing was on the FIFO
845 			 */
846 			printf("sn: Receive interrupt with nothing on FIFO\n");
847 
848 			goto out;
849 		}
850 #endif
851 		snread(ifp);
852 	}
853 	/*
854 	 * An on-card memory allocation came through.
855 	 */
856 	if (status & IM_ALLOC_INT) {
857 
858 		/*
859 		 * Disable this interrupt.
860 		 */
861 		mask &= ~IM_ALLOC_INT;
862 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
863 		snresume(&sc->arpcom.ac_if);
864 	}
865 	/*
866 	 * TX Completion.  Handle a transmit error message. This will only be
867 	 * called when there is an error, because of the AUTO_RELEASE mode.
868 	 */
869 	if (status & IM_TX_INT) {
870 
871 		/*
872 		 * Acknowlege Interrupt
873 		 */
874 		SMC_SELECT_BANK(2);
875 		outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
876 
877 		packet_no = inw(BASE + FIFO_PORTS_REG_W);
878 		packet_no &= FIFO_TX_MASK;
879 
880 		/*
881 		 * select this as the packet to read from
882 		 */
883 		outb(BASE + PACKET_NUM_REG_B, packet_no);
884 
885 		/*
886 		 * Position the pointer to the first word from this packet
887 		 */
888 		outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
889 
890 		/*
891 		 * Fetch the TX status word.  The value found here will be a
892 		 * copy of the EPH_STATUS_REG_W at the time the transmit
893 		 * failed.
894 		 */
895 		tx_status = inw(BASE + DATA_REG_W);
896 
897 		if (tx_status & EPHSR_TX_SUC) {
898 			device_printf(sc->dev,
899 			    "Successful packet caused interrupt\n");
900 		} else {
901 			++sc->arpcom.ac_if.if_oerrors;
902 		}
903 
904 		if (tx_status & EPHSR_LATCOL)
905 			++sc->arpcom.ac_if.if_collisions;
906 
907 		/*
908 		 * Some of these errors will have disabled transmit.
909 		 * Re-enable transmit now.
910 		 */
911 		SMC_SELECT_BANK(0);
912 
913 #ifdef SW_PAD
914 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
915 #else
916 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
917 #endif	/* SW_PAD */
918 
919 		/*
920 		 * kill the failed packet. Wait for the MMU to be un-busy.
921 		 */
922 		SMC_SELECT_BANK(2);
923 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
924 			;
925 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
926 
927 		/*
928 		 * Attempt to queue more transmits.
929 		 */
930 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
931 		snstart(&sc->arpcom.ac_if);
932 	}
933 	/*
934 	 * Transmit underrun.  We use this opportunity to update transmit
935 	 * statistics from the card.
936 	 */
937 	if (status & IM_TX_EMPTY_INT) {
938 
939 		/*
940 		 * Acknowlege Interrupt
941 		 */
942 		SMC_SELECT_BANK(2);
943 		outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
944 
945 		/*
946 		 * Disable this interrupt.
947 		 */
948 		mask &= ~IM_TX_EMPTY_INT;
949 
950 		SMC_SELECT_BANK(0);
951 		card_stats = inw(BASE + COUNTER_REG_W);
952 
953 		/*
954 		 * Single collisions
955 		 */
956 		sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
957 
958 		/*
959 		 * Multiple collisions
960 		 */
961 		sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
962 
963 		SMC_SELECT_BANK(2);
964 
965 		/*
966 		 * Attempt to enqueue some more stuff.
967 		 */
968 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
969 		snstart(&sc->arpcom.ac_if);
970 	}
971 	/*
972 	 * Some other error.  Try to fix it by resetting the adapter.
973 	 */
974 	if (status & IM_EPH_INT) {
975 		snstop(sc);
976 		sninit(sc);
977 	}
978 
979 out:
980 	/*
981 	 * Handled all interrupt sources.
982 	 */
983 
984 	SMC_SELECT_BANK(2);
985 
986 	/*
987 	 * Reestablish interrupts from mask which have not been deselected
988 	 * during this interrupt.  Note that the hardware mask, which was set
989 	 * to 0x00 at the start of this service routine, may have been
990 	 * updated by one or more of the interrupt handers and we must let
991 	 * those new interrupts stay enabled here.
992 	 */
993 	mask |= inb(BASE + INTR_MASK_REG_B);
994 	outb(BASE + INTR_MASK_REG_B, mask);
995 	sc->intr_mask = mask;
996 
997 	splx(x);
998 }
999 
1000 void
1001 snread(struct ifnet *ifp)
1002 {
1003         struct sn_softc *sc = ifp->if_softc;
1004 	struct mbuf    *m;
1005 	short           status;
1006 	int             packet_number;
1007 	u_short         packet_length;
1008 	u_char         *data;
1009 
1010 	SMC_SELECT_BANK(2);
1011 #if 0
1012 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
1013 
1014 	if (packet_number & FIFO_REMPTY) {
1015 
1016 		/*
1017 		 * we got called , but nothing was on the FIFO
1018 		 */
1019 		printf("sn: Receive interrupt with nothing on FIFO\n");
1020 		return;
1021 	}
1022 #endif
1023 read_another:
1024 
1025 	/*
1026 	 * Start reading from the start of the packet. Since PTR_RCV is set,
1027 	 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1028 	 */
1029 	outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1030 
1031 	/*
1032 	 * First two words are status and packet_length
1033 	 */
1034 	status = inw(BASE + DATA_REG_W);
1035 	packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1036 
1037 	/*
1038 	 * The packet length contains 3 extra words: status, length, and a
1039 	 * extra word with the control byte.
1040 	 */
1041 	packet_length -= 6;
1042 
1043 	/*
1044 	 * Account for receive errors and discard.
1045 	 */
1046 	if (status & RS_ERRORS) {
1047 		++ifp->if_ierrors;
1048 		goto out;
1049 	}
1050 	/*
1051 	 * A packet is received.
1052 	 */
1053 
1054 	/*
1055 	 * Adjust for odd-length packet.
1056 	 */
1057 	if (status & RS_ODDFRAME)
1058 		packet_length++;
1059 
1060 	/*
1061 	 * Allocate a header mbuf from the kernel.
1062 	 */
1063 	MGETHDR(m, MB_DONTWAIT, MT_DATA);
1064 	if (m == NULL)
1065 		goto out;
1066 
1067 	m->m_pkthdr.rcvif = ifp;
1068 	m->m_pkthdr.len = m->m_len = packet_length;
1069 
1070 	/*
1071 	 * Attach an mbuf cluster
1072 	 */
1073 	MCLGET(m, MB_DONTWAIT);
1074 
1075 	/*
1076 	 * Insist on getting a cluster
1077 	 */
1078 	if ((m->m_flags & M_EXT) == 0) {
1079 		m_freem(m);
1080 		++ifp->if_ierrors;
1081 		printf("sn: snread() kernel memory allocation problem\n");
1082 		goto out;
1083 	}
1084 
1085 	/*
1086 	 * Get packet, including link layer address, from interface.
1087 	 */
1088 
1089 	data = mtod(m, u_char *);
1090 	insw(BASE + DATA_REG_W, data, packet_length >> 1);
1091 	if (packet_length & 1) {
1092 		data += packet_length & ~1;
1093 		*data = inb(BASE + DATA_REG_B);
1094 	}
1095 	++ifp->if_ipackets;
1096 
1097 	m->m_pkthdr.len = m->m_len = packet_length;
1098 
1099 	(*ifp->if_input)(ifp, m);
1100 
1101 out:
1102 
1103 	/*
1104 	 * Error or good, tell the card to get rid of this packet Wait for
1105 	 * the MMU to be un-busy.
1106 	 */
1107 	SMC_SELECT_BANK(2);
1108 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
1109 		;
1110 	outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1111 
1112 	/*
1113 	 * Check whether another packet is ready
1114 	 */
1115 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
1116 	if (packet_number & FIFO_REMPTY) {
1117 		return;
1118 	}
1119 	goto read_another;
1120 }
1121 
1122 
1123 /*
1124  * Handle IOCTLS.  This function is completely stolen from if_ep.c
1125  * As with its progenitor, it does not handle hardware address
1126  * changes.
1127  */
1128 static int
1129 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1130 {
1131 	struct sn_softc *sc = ifp->if_softc;
1132 	int             s, error = 0;
1133 
1134 	s = splimp();
1135 
1136 	switch (cmd) {
1137 	case SIOCSIFADDR:
1138 	case SIOCGIFADDR:
1139 	case SIOCSIFMTU:
1140 		error = ether_ioctl(ifp, cmd, data);
1141 		break;
1142 
1143 	case SIOCSIFFLAGS:
1144 		if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1145 			ifp->if_flags &= ~IFF_RUNNING;
1146 			snstop(sc);
1147 			break;
1148 		} else {
1149 			/* reinitialize card on any parameter change */
1150 			sninit(sc);
1151 			break;
1152 		}
1153 		break;
1154 
1155 #ifdef notdef
1156 	case SIOCGHWADDR:
1157 		bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1158 		      sizeof(sc->sc_addr));
1159 		break;
1160 #endif
1161 
1162 	case SIOCADDMULTI:
1163 	    /* update multicast filter list. */
1164 	    sn_setmcast(sc);
1165 	    error = 0;
1166 	    break;
1167 	case SIOCDELMULTI:
1168 	    /* update multicast filter list. */
1169 	    sn_setmcast(sc);
1170 	    error = 0;
1171 	    break;
1172 	default:
1173 		error = EINVAL;
1174 	}
1175 
1176 	splx(s);
1177 
1178 	return (error);
1179 }
1180 
1181 void
1182 snreset(struct sn_softc *sc)
1183 {
1184 	int	s;
1185 
1186 	s = splimp();
1187 	snstop(sc);
1188 	sninit(sc);
1189 
1190 	splx(s);
1191 }
1192 
1193 void
1194 snwatchdog(struct ifnet *ifp)
1195 {
1196 	int	s;
1197 	s = splimp();
1198 	sn_intr(ifp->if_softc);
1199 	splx(s);
1200 }
1201 
1202 
1203 /* 1. zero the interrupt mask
1204  * 2. clear the enable receive flag
1205  * 3. clear the enable xmit flags
1206  */
1207 void
1208 snstop(struct sn_softc *sc)
1209 {
1210 
1211 	struct ifnet   *ifp = &sc->arpcom.ac_if;
1212 
1213 	/*
1214 	 * Clear interrupt mask; disable all interrupts.
1215 	 */
1216 	SMC_SELECT_BANK(2);
1217 	outb(BASE + INTR_MASK_REG_B, 0x00);
1218 
1219 	/*
1220 	 * Disable transmitter and Receiver
1221 	 */
1222 	SMC_SELECT_BANK(0);
1223 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1224 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1225 
1226 	/*
1227 	 * Cancel watchdog.
1228 	 */
1229 	ifp->if_timer = 0;
1230 }
1231 
1232 
1233 int
1234 sn_activate(device_t dev)
1235 {
1236 	struct sn_softc *sc = device_get_softc(dev);
1237 	int err;
1238 
1239 	sc->port_rid = 0;
1240 	sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1241 	    0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1242 	if (!sc->port_res) {
1243 #ifdef SN_DEBUG
1244 		device_printf(dev, "Cannot allocate ioport\n");
1245 #endif
1246 		return ENOMEM;
1247 	}
1248 
1249 	sc->irq_rid = 0;
1250 	sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1251 	    0, ~0, 1, RF_ACTIVE);
1252 	if (!sc->irq_res) {
1253 #ifdef SN_DEBUG
1254 		device_printf(dev, "Cannot allocate irq\n");
1255 #endif
1256 		sn_deactivate(dev);
1257 		return ENOMEM;
1258 	}
1259 	if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1260 	    &sc->intrhand)) != 0) {
1261 		sn_deactivate(dev);
1262 		return err;
1263 	}
1264 
1265 	sc->sn_io_addr = rman_get_start(sc->port_res);
1266 	return (0);
1267 }
1268 
1269 void
1270 sn_deactivate(device_t dev)
1271 {
1272 	struct sn_softc *sc = device_get_softc(dev);
1273 
1274 	if (sc->intrhand)
1275 		bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1276 	sc->intrhand = 0;
1277 	if (sc->port_res)
1278 		bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1279 		    sc->port_res);
1280 	sc->port_res = 0;
1281 	if (sc->irq_res)
1282 		bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1283 		    sc->irq_res);
1284 	sc->irq_res = 0;
1285 	return;
1286 }
1287 
1288 /*
1289  * Function: sn_probe( device_t dev, int pccard )
1290  *
1291  * Purpose:
1292  *      Tests to see if a given ioaddr points to an SMC9xxx chip.
1293  *      Tries to cause as little damage as possible if it's not a SMC chip.
1294  *      Returns a 0 on success
1295  *
1296  * Algorithm:
1297  *      (1) see if the high byte of BANK_SELECT is 0x33
1298  *      (2) compare the ioaddr with the base register's address
1299  *      (3) see if I recognize the chip ID in the appropriate register
1300  *
1301  *
1302  */
1303 int
1304 sn_probe(device_t dev, int pccard)
1305 {
1306 	struct sn_softc *sc = device_get_softc(dev);
1307 	u_int           bank;
1308 	u_short         revision_register;
1309 	u_short         base_address_register;
1310 	u_short		ioaddr;
1311 	int		err;
1312 
1313 	if ((err = sn_activate(dev)) != 0)
1314 		return err;
1315 
1316 	ioaddr = sc->sn_io_addr;
1317 
1318 	/*
1319 	 * First, see if the high byte is 0x33
1320 	 */
1321 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1322 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1323 #ifdef	SN_DEBUG
1324 		device_printf(dev, "test1 failed\n");
1325 #endif
1326 		goto error;
1327 	}
1328 	/*
1329 	 * The above MIGHT indicate a device, but I need to write to further
1330 	 * test this.  Go to bank 0, then test that the register still
1331 	 * reports the high byte is 0x33.
1332 	 */
1333 	outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1334 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1335 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1336 #ifdef	SN_DEBUG
1337 		device_printf(dev, "test2 failed\n");
1338 #endif
1339 		goto error;
1340 	}
1341 	/*
1342 	 * well, we've already written once, so hopefully another time won't
1343 	 * hurt.  This time, I need to switch the bank register to bank 1, so
1344 	 * I can access the base address register.  The contents of the
1345 	 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1346 	 * to match the I/O port address where the adapter is being probed.
1347 	 */
1348 	outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1349 	base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1350 
1351 	/*
1352 	 * This test is nonsence on PC-card architecture, so if
1353 	 * pccard == 1, skip this test. (hosokawa)
1354 	 */
1355 	if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1356 
1357 		/*
1358 		 * Well, the base address register didn't match.  Must not
1359 		 * have been a SMC chip after all.
1360 		 */
1361 		/*
1362 		 * printf("sn: ioaddr %x doesn't match card configuration
1363 		 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 );
1364 		 */
1365 
1366 #ifdef	SN_DEBUG
1367 		device_printf(dev, "test3 failed ioaddr = 0x%x, "
1368 		    "base_address_register = 0x%x\n", ioaddr,
1369 		    base_address_register >> 3 & 0x3E0);
1370 #endif
1371 		goto error;
1372 	}
1373 	/*
1374 	 * Check if the revision register is something that I recognize.
1375 	 * These might need to be added to later, as future revisions could
1376 	 * be added.
1377 	 */
1378 	outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1379 	revision_register = inw(ioaddr + REVISION_REG_W);
1380 	if (!chip_ids[(revision_register >> 4) & 0xF]) {
1381 
1382 		/*
1383 		 * I don't regonize this chip, so...
1384 		 */
1385 #ifdef	SN_DEBUG
1386 		device_printf(dev, "test4 failed\n");
1387 #endif
1388 		goto error;
1389 	}
1390 	/*
1391 	 * at this point I'll assume that the chip is an SMC9xxx. It might be
1392 	 * prudent to check a listing of MAC addresses against the hardware
1393 	 * address, or do some other tests.
1394 	 */
1395 	sn_deactivate(dev);
1396 	return 0;
1397  error:
1398 	sn_deactivate(dev);
1399 	return ENXIO;
1400 }
1401 
1402 #define MCFSZ 8
1403 
1404 static void
1405 sn_setmcast(struct sn_softc *sc)
1406 {
1407 	struct ifnet *ifp = (struct ifnet *)sc;
1408 	int flags;
1409 
1410 	/*
1411 	 * Set the receiver filter.  We want receive enabled and auto strip
1412 	 * of CRC from received packet.  If we are promiscuous then set that
1413 	 * bit too.
1414 	 */
1415 	flags = RCR_ENABLE | RCR_STRIP_CRC;
1416 
1417 	if (ifp->if_flags & IFF_PROMISC) {
1418 		flags |= RCR_PROMISC | RCR_ALMUL;
1419 	} else if (ifp->if_flags & IFF_ALLMULTI) {
1420 		flags |= RCR_ALMUL;
1421 	} else {
1422 		u_char mcf[MCFSZ];
1423 		if (sn_getmcf(&sc->arpcom, mcf)) {
1424 			/* set filter */
1425 			SMC_SELECT_BANK(3);
1426 			outw(BASE + MULTICAST1_REG_W,
1427 			    ((u_short)mcf[1] << 8) |  mcf[0]);
1428 			outw(BASE + MULTICAST2_REG_W,
1429 			    ((u_short)mcf[3] << 8) |  mcf[2]);
1430 			outw(BASE + MULTICAST3_REG_W,
1431 			    ((u_short)mcf[5] << 8) |  mcf[4]);
1432 			outw(BASE + MULTICAST4_REG_W,
1433 			    ((u_short)mcf[7] << 8) |  mcf[6]);
1434 		} else {
1435 			flags |= RCR_ALMUL;
1436 		}
1437 	}
1438 	SMC_SELECT_BANK(0);
1439 	outw(BASE + RECV_CONTROL_REG_W, flags);
1440 }
1441 
1442 static int
1443 sn_getmcf(struct arpcom *ac, u_char *mcf)
1444 {
1445 	int i;
1446 	u_int index, index2;
1447 	u_char *af = (u_char *) mcf;
1448 	struct ifmultiaddr *ifma;
1449 
1450 	bzero(mcf, MCFSZ);
1451 
1452 	for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma;
1453 	     ifma = ifma->ifma_link.le_next) {
1454 	    if (ifma->ifma_addr->sa_family != AF_LINK)
1455 		return 0;
1456 	    index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1457 	    index2 = 0;
1458 	    for (i = 0; i < 6; i++) {
1459 		index2 <<= 1;
1460 		index2 |= (index & 0x01);
1461 		index >>= 1;
1462 	    }
1463 	    af[index2 >> 3] |= 1 << (index2 & 7);
1464 	}
1465 	return 1;  /* use multicast filter */
1466 }
1467 
1468 static u_int
1469 smc_crc(u_char *s)
1470 {
1471 	int perByte;
1472 	int perBit;
1473 	const u_int poly = 0xedb88320;
1474 	u_int v = 0xffffffff;
1475 	u_char c;
1476 
1477 	for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1478 		c = s[perByte];
1479 		for (perBit = 0; perBit < 8; perBit++) {
1480 			v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1481 			c >>= 1;
1482 		}
1483 	}
1484 	return v;
1485 }
1486