1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 */ 33 34 /* 35 * This is a driver for SMC's 9000 series of Ethernet adapters. 36 * 37 * This FreeBSD driver is derived from the smc9194 Linux driver by 38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 39 * This driver also shamelessly borrows from the FreeBSD ep driver 40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 41 * All rights reserved. 42 * 43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 44 * PC. It is adapted from Erik Stahlman's Linux driver which worked 45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 46 * it will work for the entire SMC 9xxx series. (Ha Ha) 47 * 48 * "Features" of the SMC chip: 49 * 4608 byte packet memory. (for the 91C92. Others have more) 50 * EEPROM for configuration 51 * AUI/TP selection 52 * 53 * Authors: 54 * Erik Stahlman erik@vt.edu 55 * Herb Peyerl hpeyerl@novatel.ca 56 * Andres Vega Garcia avega@sophia.inria.fr 57 * Serge Babkin babkin@hq.icb.chel.su 58 * Gardner Buchanan gbuchanan@shl.com 59 * 60 * Sources: 61 * o SMC databook 62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 64 * 65 * Known Bugs: 66 * o The hardware multicast filter isn't used yet. 67 * o Setting of the hardware address isn't supported. 68 * o Hardware padding isn't used. 69 */ 70 71 /* 72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 73 * 74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 75 * BSD-nomads, Tokyo, Japan. 76 */ 77 /* 78 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 79 * Special thanks to itojun@itojun.org 80 */ 81 82 #undef SN_DEBUG /* (by hosokawa) */ 83 84 #include <sys/param.h> 85 #include <sys/systm.h> 86 #include <sys/kernel.h> 87 #include <sys/interrupt.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 #include <sys/serialize.h> 95 #include <sys/module.h> 96 #include <sys/bus.h> 97 #include <sys/rman.h> 98 99 #include <net/ethernet.h> 100 #include <net/if.h> 101 #include <net/ifq_var.h> 102 #include <net/if_arp.h> 103 #include <net/if_dl.h> 104 #include <net/if_types.h> 105 #include <net/if_mib.h> 106 107 #ifdef INET 108 #include <netinet/in.h> 109 #include <netinet/in_systm.h> 110 #include <netinet/in_var.h> 111 #include <netinet/ip.h> 112 #endif 113 114 #include <net/bpf.h> 115 #include <net/bpfdesc.h> 116 117 #include <machine/clock.h> 118 119 #include "if_snreg.h" 120 #include "if_snvar.h" 121 122 /* Exported variables */ 123 devclass_t sn_devclass; 124 125 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *); 126 127 static void snresume(struct ifnet *); 128 129 void sninit(void *); 130 void snread(struct ifnet *); 131 void snreset(struct sn_softc *); 132 void snstart(struct ifnet *, struct ifaltq_subque *); 133 void snstop(struct sn_softc *); 134 void snwatchdog(struct ifnet *); 135 136 static void sn_setmcast(struct sn_softc *); 137 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 138 static u_int smc_crc(u_char *); 139 140 DECLARE_DUMMY_MODULE(if_sn); 141 142 /* I (GB) have been unlucky getting the hardware padding 143 * to work properly. 144 */ 145 #define SW_PAD 146 147 static const char *chip_ids[15] = { 148 NULL, NULL, NULL, 149 /* 3 */ "SMC91C90/91C92", 150 /* 4 */ "SMC91C94", 151 /* 5 */ "SMC91C95", 152 NULL, 153 /* 7 */ "SMC91C100", 154 /* 8 */ "SMC91C100FD", 155 NULL, NULL, NULL, 156 NULL, NULL, NULL 157 }; 158 159 int 160 sn_attach(device_t dev) 161 { 162 struct sn_softc *sc = device_get_softc(dev); 163 struct ifnet *ifp = &sc->arpcom.ac_if; 164 u_short i; 165 u_char *p; 166 int rev; 167 u_short address; 168 int j; 169 int error; 170 171 sn_activate(dev); 172 173 snstop(sc); 174 175 sc->dev = dev; 176 sc->pages_wanted = -1; 177 178 device_printf(dev, " "); 179 180 SMC_SELECT_BANK(3); 181 rev = inw(BASE + REVISION_REG_W); 182 if (chip_ids[(rev >> 4) & 0xF]) 183 kprintf("%s ", chip_ids[(rev >> 4) & 0xF]); 184 185 SMC_SELECT_BANK(1); 186 i = inw(BASE + CONFIG_REG_W); 187 kprintf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP"); 188 189 if (sc->pccard_enaddr) 190 for (j = 0; j < 3; j++) { 191 u_short w; 192 193 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 194 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 195 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 196 } 197 198 /* 199 * Read the station address from the chip. The MAC address is bank 1, 200 * regs 4 - 9 201 */ 202 SMC_SELECT_BANK(1); 203 p = (u_char *) & sc->arpcom.ac_enaddr; 204 for (i = 0; i < 6; i += 2) { 205 address = inw(BASE + IAR_ADDR0_REG_W + i); 206 p[i + 1] = address >> 8; 207 p[i] = address & 0xFF; 208 } 209 ifp->if_softc = sc; 210 if_initname(ifp, "sn", device_get_unit(dev)); 211 ifp->if_mtu = ETHERMTU; 212 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 213 ifp->if_start = snstart; 214 ifp->if_ioctl = snioctl; 215 ifp->if_watchdog = snwatchdog; 216 ifp->if_init = sninit; 217 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 218 ifq_set_ready(&ifp->if_snd); 219 ifp->if_timer = 0; 220 221 ether_ifattach(ifp, sc->arpcom.ac_enaddr, NULL); 222 223 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(sc->irq_res)); 224 225 error = bus_setup_intr(dev, sc->irq_res, INTR_MPSAFE, 226 sn_intr, sc, &sc->intrhand, 227 ifp->if_serializer); 228 if (error) { 229 ether_ifdetach(ifp); 230 sn_deactivate(dev); 231 return error; 232 } 233 234 return 0; 235 } 236 237 238 /* 239 * Reset and initialize the chip 240 */ 241 void 242 sninit(void *xsc) 243 { 244 struct sn_softc *sc = xsc; 245 struct ifnet *ifp = &sc->arpcom.ac_if; 246 int flags; 247 int mask; 248 249 /* 250 * This resets the registers mostly to defaults, but doesn't affect 251 * EEPROM. After the reset cycle, we pause briefly for the chip to 252 * be happy. 253 */ 254 SMC_SELECT_BANK(0); 255 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 256 SMC_DELAY(); 257 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 258 SMC_DELAY(); 259 SMC_DELAY(); 260 261 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 262 263 /* 264 * Set the control register to automatically release succesfully 265 * transmitted packets (making the best use out of our limited 266 * memory) and to enable the EPH interrupt on certain TX errors. 267 */ 268 SMC_SELECT_BANK(1); 269 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 270 CTR_CR_ENABLE | CTR_LE_ENABLE)); 271 272 /* Set squelch level to 240mV (default 480mV) */ 273 flags = inw(BASE + CONFIG_REG_W); 274 flags |= CR_SET_SQLCH; 275 outw(BASE + CONFIG_REG_W, flags); 276 277 /* 278 * Reset the MMU and wait for it to be un-busy. 279 */ 280 SMC_SELECT_BANK(2); 281 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 282 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 283 ; 284 285 /* 286 * Disable all interrupts 287 */ 288 outb(BASE + INTR_MASK_REG_B, 0x00); 289 290 sn_setmcast(sc); 291 292 /* 293 * Set the transmitter control. We want it enabled. 294 */ 295 flags = TCR_ENABLE; 296 297 #ifndef SW_PAD 298 /* 299 * I (GB) have been unlucky getting this to work. 300 */ 301 flags |= TCR_PAD_ENABLE; 302 #endif /* SW_PAD */ 303 304 outw(BASE + TXMIT_CONTROL_REG_W, flags); 305 306 307 /* 308 * Now, enable interrupts 309 */ 310 SMC_SELECT_BANK(2); 311 312 mask = IM_EPH_INT | 313 IM_RX_OVRN_INT | 314 IM_RCV_INT | 315 IM_TX_INT; 316 317 outb(BASE + INTR_MASK_REG_B, mask); 318 sc->intr_mask = mask; 319 sc->pages_wanted = -1; 320 321 322 /* 323 * Mark the interface running but not active. 324 */ 325 ifp->if_flags |= IFF_RUNNING; 326 ifq_clr_oactive(&ifp->if_snd); 327 328 /* 329 * Attempt to push out any waiting packets. 330 */ 331 if_devstart(ifp); 332 } 333 334 335 void 336 snstart(struct ifnet *ifp, struct ifaltq_subque *ifsq) 337 { 338 struct sn_softc *sc = ifp->if_softc; 339 u_int len; 340 struct mbuf *m; 341 struct mbuf *top; 342 int pad; 343 int mask; 344 u_short length; 345 u_short numPages; 346 u_char packet_no; 347 int time_out; 348 349 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 350 351 if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd)) 352 return; 353 354 if (sc->pages_wanted != -1) { 355 /* XXX should never happen */ 356 kprintf("%s: snstart() while memory allocation pending\n", 357 ifp->if_xname); 358 ifq_set_oactive(&ifp->if_snd); 359 return; 360 } 361 startagain: 362 363 /* 364 * Sneak a peek at the next packet 365 */ 366 m = ifq_dequeue(&ifp->if_snd); 367 if (m == NULL) 368 return; 369 370 /* 371 * Compute the frame length and set pad to give an overall even 372 * number of bytes. Below we assume that the packet length is even. 373 */ 374 for (len = 0, top = m; m; m = m->m_next) 375 len += m->m_len; 376 377 pad = (len & 1); 378 379 /* 380 * We drop packets that are too large. Perhaps we should truncate 381 * them instead? 382 */ 383 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 384 kprintf("%s: large packet discarded (A)\n", ifp->if_xname); 385 IFNET_STAT_INC(&sc->arpcom.ac_if, oerrors, 1); 386 m_freem(top); 387 goto readcheck; 388 } 389 #ifdef SW_PAD 390 391 /* 392 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 393 */ 394 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 395 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 396 397 #endif /* SW_PAD */ 398 399 length = pad + len; 400 401 /* 402 * The MMU wants the number of pages to be the number of 256 byte 403 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 404 * include space for the status word, byte count and control bytes in 405 * the allocation request. 406 */ 407 numPages = (length + 6) >> 8; 408 409 410 /* 411 * Now, try to allocate the memory 412 */ 413 SMC_SELECT_BANK(2); 414 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 415 416 /* 417 * Wait a short amount of time to see if the allocation request 418 * completes. Otherwise, I enable the interrupt and wait for 419 * completion asyncronously. 420 */ 421 422 time_out = MEMORY_WAIT_TIME; 423 do { 424 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 425 break; 426 } while (--time_out); 427 428 if (!time_out) { 429 430 /* 431 * No memory now. Oh well, wait until the chip finds memory 432 * later. Remember how many pages we were asking for and 433 * enable the allocation completion interrupt. Also set a 434 * watchdog in case we miss the interrupt. We mark the 435 * interface active since there is no point in attempting an 436 * snstart() until after the memory is available. 437 */ 438 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 439 outb(BASE + INTR_MASK_REG_B, mask); 440 sc->intr_mask = mask; 441 442 ifp->if_timer = 1; 443 ifq_set_oactive(&ifp->if_snd); 444 sc->pages_wanted = numPages; 445 ifq_prepend(&ifp->if_snd, top); 446 447 return; 448 } 449 /* 450 * The memory allocation completed. Check the results. 451 */ 452 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 453 if (packet_no & ARR_FAILED) { 454 kprintf("%s: Memory allocation failed\n", ifp->if_xname); 455 ifq_prepend(&ifp->if_snd, top); 456 goto startagain; 457 } 458 /* 459 * We have a packet number, so tell the card to use it. 460 */ 461 outb(BASE + PACKET_NUM_REG_B, packet_no); 462 463 /* 464 * Point to the beginning of the packet 465 */ 466 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 467 468 /* 469 * Send the packet length (+6 for status, length and control byte) 470 * and the status word (set to zeros) 471 */ 472 outw(BASE + DATA_REG_W, 0); 473 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 474 outb(BASE + DATA_REG_B, (length + 6) >> 8); 475 476 /* 477 * Push out the data to the card. 478 */ 479 for (m = top; m != NULL; m = m->m_next) { 480 481 /* 482 * Push out words. 483 */ 484 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 485 486 /* 487 * Push out remaining byte. 488 */ 489 if (m->m_len & 1) 490 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 491 } 492 493 /* 494 * Push out padding. 495 */ 496 while (pad > 1) { 497 outw(BASE + DATA_REG_W, 0); 498 pad -= 2; 499 } 500 if (pad) 501 outb(BASE + DATA_REG_B, 0); 502 503 /* 504 * Push out control byte and unused packet byte The control byte is 0 505 * meaning the packet is even lengthed and no special CRC handling is 506 * desired. 507 */ 508 outw(BASE + DATA_REG_W, 0); 509 510 /* 511 * Enable the interrupts and let the chipset deal with it Also set a 512 * watchdog in case we miss the interrupt. 513 */ 514 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 515 outb(BASE + INTR_MASK_REG_B, mask); 516 sc->intr_mask = mask; 517 518 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 519 520 ifq_set_oactive(&ifp->if_snd); 521 ifp->if_timer = 1; 522 523 BPF_MTAP(ifp, top); 524 525 IFNET_STAT_INC(ifp, opackets, 1); 526 m_freem(top); 527 528 readcheck: 529 530 /* 531 * Is another packet coming in? We don't want to overflow the tiny 532 * RX FIFO. If nothing has arrived then attempt to queue another 533 * transmit packet. 534 */ 535 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 536 goto startagain; 537 } 538 539 540 541 /* Resume a packet transmit operation after a memory allocation 542 * has completed. 543 * 544 * This is basically a hacked up copy of snstart() which handles 545 * a completed memory allocation the same way snstart() does. 546 * It then passes control to snstart to handle any other queued 547 * packets. 548 */ 549 static void 550 snresume(struct ifnet *ifp) 551 { 552 struct sn_softc *sc = ifp->if_softc; 553 u_int len; 554 struct mbuf *m; 555 struct mbuf *top; 556 int pad; 557 int mask; 558 u_short length; 559 u_short numPages; 560 u_short pages_wanted; 561 u_char packet_no; 562 563 if (sc->pages_wanted < 0) 564 return; 565 566 pages_wanted = sc->pages_wanted; 567 sc->pages_wanted = -1; 568 569 /* 570 * Sneak a peek at the next packet 571 */ 572 m = ifq_dequeue(&ifp->if_snd); 573 if (m == NULL) { 574 kprintf("%s: snresume() with nothing to send\n", 575 ifp->if_xname); 576 return; 577 } 578 579 /* 580 * Compute the frame length and set pad to give an overall even 581 * number of bytes. Below we assume that the packet length is even. 582 */ 583 for (len = 0, top = m; m; m = m->m_next) 584 len += m->m_len; 585 586 pad = (len & 1); 587 588 /* 589 * We drop packets that are too large. Perhaps we should truncate 590 * them instead? 591 */ 592 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 593 kprintf("%s: large packet discarded (B)\n", ifp->if_xname); 594 IFNET_STAT_INC(ifp, oerrors, 1); 595 m_freem(top); 596 return; 597 } 598 #ifdef SW_PAD 599 600 /* 601 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 602 */ 603 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 604 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 605 606 #endif /* SW_PAD */ 607 608 length = pad + len; 609 610 611 /* 612 * The MMU wants the number of pages to be the number of 256 byte 613 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 614 * include space for the status word, byte count and control bytes in 615 * the allocation request. 616 */ 617 numPages = (length + 6) >> 8; 618 619 620 SMC_SELECT_BANK(2); 621 622 /* 623 * The memory allocation completed. Check the results. If it failed, 624 * we simply set a watchdog timer and hope for the best. 625 */ 626 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 627 if (packet_no & ARR_FAILED) { 628 kprintf("%s: Memory allocation failed. Weird.\n", ifp->if_xname); 629 ifp->if_timer = 1; 630 ifq_prepend(&ifp->if_snd, top); 631 goto try_start; 632 } 633 /* 634 * We have a packet number, so tell the card to use it. 635 */ 636 outb(BASE + PACKET_NUM_REG_B, packet_no); 637 638 /* 639 * Now, numPages should match the pages_wanted recorded when the 640 * memory allocation was initiated. 641 */ 642 if (pages_wanted != numPages) { 643 kprintf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname); 644 /* 645 * If the allocation was the wrong size we simply release the 646 * memory once it is granted. Wait for the MMU to be un-busy. 647 */ 648 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 649 ; 650 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 651 652 ifq_prepend(&ifp->if_snd, top); 653 return; 654 } 655 /* 656 * Point to the beginning of the packet 657 */ 658 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 659 660 /* 661 * Send the packet length (+6 for status, length and control byte) 662 * and the status word (set to zeros) 663 */ 664 outw(BASE + DATA_REG_W, 0); 665 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 666 outb(BASE + DATA_REG_B, (length + 6) >> 8); 667 668 /* 669 * Push out the data to the card. 670 */ 671 for (m = top; m != NULL; m = m->m_next) { 672 673 /* 674 * Push out words. 675 */ 676 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 677 678 /* 679 * Push out remaining byte. 680 */ 681 if (m->m_len & 1) 682 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 683 } 684 685 /* 686 * Push out padding. 687 */ 688 while (pad > 1) { 689 outw(BASE + DATA_REG_W, 0); 690 pad -= 2; 691 } 692 if (pad) 693 outb(BASE + DATA_REG_B, 0); 694 695 /* 696 * Push out control byte and unused packet byte The control byte is 0 697 * meaning the packet is even lengthed and no special CRC handling is 698 * desired. 699 */ 700 outw(BASE + DATA_REG_W, 0); 701 702 /* 703 * Enable the interrupts and let the chipset deal with it Also set a 704 * watchdog in case we miss the interrupt. 705 */ 706 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 707 outb(BASE + INTR_MASK_REG_B, mask); 708 sc->intr_mask = mask; 709 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 710 711 BPF_MTAP(ifp, top); 712 713 IFNET_STAT_INC(ifp, opackets, 1); 714 m_freem(top); 715 716 try_start: 717 718 /* 719 * Now pass control to snstart() to queue any additional packets 720 */ 721 ifq_clr_oactive(&ifp->if_snd); 722 if_devstart(ifp); 723 724 /* 725 * We've sent something, so we're active. Set a watchdog in case the 726 * TX_EMPTY interrupt is lost. 727 */ 728 ifq_set_oactive(&ifp->if_snd); 729 ifp->if_timer = 1; 730 } 731 732 733 void 734 sn_intr(void *arg) 735 { 736 int status, interrupts; 737 struct sn_softc *sc = (struct sn_softc *) arg; 738 struct ifnet *ifp = &sc->arpcom.ac_if; 739 740 /* 741 * Chip state registers 742 */ 743 u_char mask; 744 u_char packet_no; 745 u_short tx_status; 746 u_short card_stats; 747 748 /* 749 * Clear the watchdog. 750 */ 751 ifp->if_timer = 0; 752 753 SMC_SELECT_BANK(2); 754 755 /* 756 * Obtain the current interrupt mask and clear the hardware mask 757 * while servicing interrupts. 758 */ 759 mask = inb(BASE + INTR_MASK_REG_B); 760 outb(BASE + INTR_MASK_REG_B, 0x00); 761 762 /* 763 * Get the set of interrupts which occurred and eliminate any which 764 * are masked. 765 */ 766 interrupts = inb(BASE + INTR_STAT_REG_B); 767 status = interrupts & mask; 768 769 /* 770 * Now, process each of the interrupt types. 771 */ 772 773 /* 774 * Receive Overrun. 775 */ 776 if (status & IM_RX_OVRN_INT) { 777 778 /* 779 * Acknowlege Interrupt 780 */ 781 SMC_SELECT_BANK(2); 782 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 783 784 IFNET_STAT_INC(&sc->arpcom.ac_if, ierrors, 1); 785 } 786 /* 787 * Got a packet. 788 */ 789 if (status & IM_RCV_INT) { 790 #if 1 791 int packet_number; 792 793 SMC_SELECT_BANK(2); 794 packet_number = inw(BASE + FIFO_PORTS_REG_W); 795 796 if (packet_number & FIFO_REMPTY) { 797 798 /* 799 * we got called , but nothing was on the FIFO 800 */ 801 kprintf("sn: Receive interrupt with nothing on FIFO\n"); 802 803 goto out; 804 } 805 #endif 806 snread(ifp); 807 } 808 /* 809 * An on-card memory allocation came through. 810 */ 811 if (status & IM_ALLOC_INT) { 812 813 /* 814 * Disable this interrupt. 815 */ 816 mask &= ~IM_ALLOC_INT; 817 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd); 818 snresume(&sc->arpcom.ac_if); 819 } 820 /* 821 * TX Completion. Handle a transmit error message. This will only be 822 * called when there is an error, because of the AUTO_RELEASE mode. 823 */ 824 if (status & IM_TX_INT) { 825 826 /* 827 * Acknowlege Interrupt 828 */ 829 SMC_SELECT_BANK(2); 830 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 831 832 packet_no = inw(BASE + FIFO_PORTS_REG_W); 833 packet_no &= FIFO_TX_MASK; 834 835 /* 836 * select this as the packet to read from 837 */ 838 outb(BASE + PACKET_NUM_REG_B, packet_no); 839 840 /* 841 * Position the pointer to the first word from this packet 842 */ 843 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 844 845 /* 846 * Fetch the TX status word. The value found here will be a 847 * copy of the EPH_STATUS_REG_W at the time the transmit 848 * failed. 849 */ 850 tx_status = inw(BASE + DATA_REG_W); 851 852 if (tx_status & EPHSR_TX_SUC) { 853 device_printf(sc->dev, 854 "Successful packet caused interrupt\n"); 855 } else { 856 IFNET_STAT_INC(&sc->arpcom.ac_if, oerrors, 1); 857 } 858 859 if (tx_status & EPHSR_LATCOL) 860 IFNET_STAT_INC(&sc->arpcom.ac_if, collisions, 1); 861 862 /* 863 * Some of these errors will have disabled transmit. 864 * Re-enable transmit now. 865 */ 866 SMC_SELECT_BANK(0); 867 868 #ifdef SW_PAD 869 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 870 #else 871 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 872 #endif /* SW_PAD */ 873 874 /* 875 * kill the failed packet. Wait for the MMU to be un-busy. 876 */ 877 SMC_SELECT_BANK(2); 878 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 879 ; 880 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 881 882 /* 883 * Attempt to queue more transmits. 884 */ 885 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd); 886 if_devstart(&sc->arpcom.ac_if); 887 } 888 /* 889 * Transmit underrun. We use this opportunity to update transmit 890 * statistics from the card. 891 */ 892 if (status & IM_TX_EMPTY_INT) { 893 894 /* 895 * Acknowlege Interrupt 896 */ 897 SMC_SELECT_BANK(2); 898 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 899 900 /* 901 * Disable this interrupt. 902 */ 903 mask &= ~IM_TX_EMPTY_INT; 904 905 SMC_SELECT_BANK(0); 906 card_stats = inw(BASE + COUNTER_REG_W); 907 908 /* 909 * Single collisions 910 */ 911 IFNET_STAT_INC(&sc->arpcom.ac_if, collisions, 912 card_stats & ECR_COLN_MASK); 913 914 /* 915 * Multiple collisions 916 */ 917 IFNET_STAT_INC(&sc->arpcom.ac_if, collisions, 918 (card_stats & ECR_MCOLN_MASK) >> 4); 919 920 SMC_SELECT_BANK(2); 921 922 /* 923 * Attempt to enqueue some more stuff. 924 */ 925 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd); 926 if_devstart(&sc->arpcom.ac_if); 927 } 928 /* 929 * Some other error. Try to fix it by resetting the adapter. 930 */ 931 if (status & IM_EPH_INT) { 932 snstop(sc); 933 sninit(sc); 934 } 935 936 out: 937 /* 938 * Handled all interrupt sources. 939 */ 940 941 SMC_SELECT_BANK(2); 942 943 /* 944 * Reestablish interrupts from mask which have not been deselected 945 * during this interrupt. Note that the hardware mask, which was set 946 * to 0x00 at the start of this service routine, may have been 947 * updated by one or more of the interrupt handers and we must let 948 * those new interrupts stay enabled here. 949 */ 950 mask |= inb(BASE + INTR_MASK_REG_B); 951 outb(BASE + INTR_MASK_REG_B, mask); 952 sc->intr_mask = mask; 953 } 954 955 void 956 snread(struct ifnet *ifp) 957 { 958 struct sn_softc *sc = ifp->if_softc; 959 struct mbuf *m; 960 short status; 961 int packet_number; 962 u_short packet_length; 963 u_char *data; 964 965 SMC_SELECT_BANK(2); 966 #if 0 967 packet_number = inw(BASE + FIFO_PORTS_REG_W); 968 969 if (packet_number & FIFO_REMPTY) { 970 971 /* 972 * we got called , but nothing was on the FIFO 973 */ 974 kprintf("sn: Receive interrupt with nothing on FIFO\n"); 975 return; 976 } 977 #endif 978 read_another: 979 980 /* 981 * Start reading from the start of the packet. Since PTR_RCV is set, 982 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 983 */ 984 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 985 986 /* 987 * First two words are status and packet_length 988 */ 989 status = inw(BASE + DATA_REG_W); 990 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 991 992 /* 993 * The packet length contains 3 extra words: status, length, and a 994 * extra word with the control byte. 995 */ 996 packet_length -= 6; 997 998 /* 999 * Account for receive errors and discard. 1000 */ 1001 if (status & RS_ERRORS) { 1002 IFNET_STAT_INC(ifp, ierrors, 1); 1003 goto out; 1004 } 1005 /* 1006 * A packet is received. 1007 */ 1008 1009 /* 1010 * Adjust for odd-length packet. 1011 */ 1012 if (status & RS_ODDFRAME) 1013 packet_length++; 1014 1015 /* 1016 * Allocate a header mbuf from the kernel. 1017 */ 1018 MGETHDR(m, M_NOWAIT, MT_DATA); 1019 if (m == NULL) 1020 goto out; 1021 1022 m->m_pkthdr.rcvif = ifp; 1023 m->m_pkthdr.len = m->m_len = packet_length; 1024 1025 /* 1026 * Attach an mbuf cluster 1027 */ 1028 MCLGET(m, M_NOWAIT); 1029 1030 /* 1031 * Insist on getting a cluster 1032 */ 1033 if ((m->m_flags & M_EXT) == 0) { 1034 m_freem(m); 1035 IFNET_STAT_INC(ifp, ierrors, 1); 1036 kprintf("sn: snread() kernel memory allocation problem\n"); 1037 goto out; 1038 } 1039 1040 /* 1041 * Get packet, including link layer address, from interface. 1042 */ 1043 1044 data = mtod(m, u_char *); 1045 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1046 if (packet_length & 1) { 1047 data += packet_length & ~1; 1048 *data = inb(BASE + DATA_REG_B); 1049 } 1050 IFNET_STAT_INC(ifp, ipackets, 1); 1051 1052 m->m_pkthdr.len = m->m_len = packet_length; 1053 1054 ifp->if_input(ifp, m, NULL, -1); 1055 1056 out: 1057 1058 /* 1059 * Error or good, tell the card to get rid of this packet Wait for 1060 * the MMU to be un-busy. 1061 */ 1062 SMC_SELECT_BANK(2); 1063 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1064 ; 1065 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1066 1067 /* 1068 * Check whether another packet is ready 1069 */ 1070 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1071 if (packet_number & FIFO_REMPTY) { 1072 return; 1073 } 1074 goto read_another; 1075 } 1076 1077 1078 /* 1079 * Handle IOCTLS. This function is completely stolen from if_ep.c 1080 * As with its progenitor, it does not handle hardware address 1081 * changes. 1082 */ 1083 static int 1084 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr) 1085 { 1086 struct sn_softc *sc = ifp->if_softc; 1087 int error = 0; 1088 1089 switch (cmd) { 1090 case SIOCSIFFLAGS: 1091 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1092 ifp->if_flags &= ~IFF_RUNNING; 1093 snstop(sc); 1094 break; 1095 } else { 1096 /* reinitialize card on any parameter change */ 1097 sninit(sc); 1098 break; 1099 } 1100 break; 1101 1102 #ifdef notdef 1103 case SIOCGHWADDR: 1104 error = copyout((caddr_t)sc->sc_addr, 1105 (caddr_t)&ifr->ifr_data, 1106 sizeof(sc->sc_addr)); 1107 break; 1108 #endif 1109 1110 case SIOCADDMULTI: 1111 /* update multicast filter list. */ 1112 sn_setmcast(sc); 1113 error = 0; 1114 break; 1115 case SIOCDELMULTI: 1116 /* update multicast filter list. */ 1117 sn_setmcast(sc); 1118 error = 0; 1119 break; 1120 default: 1121 error = ether_ioctl(ifp, cmd, data); 1122 break; 1123 } 1124 1125 return (error); 1126 } 1127 1128 void 1129 snreset(struct sn_softc *sc) 1130 { 1131 snstop(sc); 1132 sninit(sc); 1133 } 1134 1135 void 1136 snwatchdog(struct ifnet *ifp) 1137 { 1138 sn_intr(ifp->if_softc); 1139 } 1140 1141 1142 /* 1. zero the interrupt mask 1143 * 2. clear the enable receive flag 1144 * 3. clear the enable xmit flags 1145 */ 1146 void 1147 snstop(struct sn_softc *sc) 1148 { 1149 1150 struct ifnet *ifp = &sc->arpcom.ac_if; 1151 1152 /* 1153 * Clear interrupt mask; disable all interrupts. 1154 */ 1155 SMC_SELECT_BANK(2); 1156 outb(BASE + INTR_MASK_REG_B, 0x00); 1157 1158 /* 1159 * Disable transmitter and Receiver 1160 */ 1161 SMC_SELECT_BANK(0); 1162 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1163 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1164 1165 /* 1166 * Cancel watchdog. 1167 */ 1168 ifp->if_timer = 0; 1169 } 1170 1171 1172 int 1173 sn_activate(device_t dev) 1174 { 1175 struct sn_softc *sc = device_get_softc(dev); 1176 1177 sc->port_rid = 0; 1178 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1179 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1180 if (!sc->port_res) { 1181 #ifdef SN_DEBUG 1182 device_printf(dev, "Cannot allocate ioport\n"); 1183 #endif 1184 return ENOMEM; 1185 } 1186 1187 sc->irq_rid = 0; 1188 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 1189 RF_ACTIVE); 1190 if (!sc->irq_res) { 1191 #ifdef SN_DEBUG 1192 device_printf(dev, "Cannot allocate irq\n"); 1193 #endif 1194 sn_deactivate(dev); 1195 return ENOMEM; 1196 } 1197 1198 sc->sn_io_addr = rman_get_start(sc->port_res); 1199 return (0); 1200 } 1201 1202 void 1203 sn_deactivate(device_t dev) 1204 { 1205 struct sn_softc *sc = device_get_softc(dev); 1206 1207 if (sc->port_res) 1208 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1209 sc->port_res); 1210 sc->port_res = 0; 1211 if (sc->irq_res) 1212 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1213 sc->irq_res); 1214 sc->irq_res = 0; 1215 return; 1216 } 1217 1218 /* 1219 * Function: sn_probe( device_t dev, int pccard ) 1220 * 1221 * Purpose: 1222 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1223 * Tries to cause as little damage as possible if it's not a SMC chip. 1224 * Returns a 0 on success 1225 * 1226 * Algorithm: 1227 * (1) see if the high byte of BANK_SELECT is 0x33 1228 * (2) compare the ioaddr with the base register's address 1229 * (3) see if I recognize the chip ID in the appropriate register 1230 * 1231 * 1232 */ 1233 int 1234 sn_probe(device_t dev, int pccard) 1235 { 1236 struct sn_softc *sc = device_get_softc(dev); 1237 u_int bank; 1238 u_short revision_register; 1239 u_short base_address_register; 1240 u_short ioaddr; 1241 int err; 1242 1243 if ((err = sn_activate(dev)) != 0) 1244 return err; 1245 1246 ioaddr = sc->sn_io_addr; 1247 1248 /* 1249 * First, see if the high byte is 0x33 1250 */ 1251 bank = inw(ioaddr + BANK_SELECT_REG_W); 1252 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1253 #ifdef SN_DEBUG 1254 device_printf(dev, "test1 failed\n"); 1255 #endif 1256 goto error; 1257 } 1258 /* 1259 * The above MIGHT indicate a device, but I need to write to further 1260 * test this. Go to bank 0, then test that the register still 1261 * reports the high byte is 0x33. 1262 */ 1263 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1264 bank = inw(ioaddr + BANK_SELECT_REG_W); 1265 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1266 #ifdef SN_DEBUG 1267 device_printf(dev, "test2 failed\n"); 1268 #endif 1269 goto error; 1270 } 1271 /* 1272 * well, we've already written once, so hopefully another time won't 1273 * hurt. This time, I need to switch the bank register to bank 1, so 1274 * I can access the base address register. The contents of the 1275 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1276 * to match the I/O port address where the adapter is being probed. 1277 */ 1278 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1279 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1280 1281 /* 1282 * This test is nonsence on PC-card architecture, so if 1283 * pccard == 1, skip this test. (hosokawa) 1284 */ 1285 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1286 1287 /* 1288 * Well, the base address register didn't match. Must not 1289 * have been a SMC chip after all. 1290 */ 1291 /* 1292 * kprintf("sn: ioaddr %x doesn't match card configuration 1293 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1294 */ 1295 1296 #ifdef SN_DEBUG 1297 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1298 "base_address_register = 0x%x\n", ioaddr, 1299 base_address_register >> 3 & 0x3E0); 1300 #endif 1301 goto error; 1302 } 1303 /* 1304 * Check if the revision register is something that I recognize. 1305 * These might need to be added to later, as future revisions could 1306 * be added. 1307 */ 1308 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1309 revision_register = inw(ioaddr + REVISION_REG_W); 1310 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1311 1312 /* 1313 * I don't regonize this chip, so... 1314 */ 1315 #ifdef SN_DEBUG 1316 device_printf(dev, "test4 failed\n"); 1317 #endif 1318 goto error; 1319 } 1320 /* 1321 * at this point I'll assume that the chip is an SMC9xxx. It might be 1322 * prudent to check a listing of MAC addresses against the hardware 1323 * address, or do some other tests. 1324 */ 1325 sn_deactivate(dev); 1326 return 0; 1327 error: 1328 sn_deactivate(dev); 1329 return ENXIO; 1330 } 1331 1332 #define MCFSZ 8 1333 1334 static void 1335 sn_setmcast(struct sn_softc *sc) 1336 { 1337 struct ifnet *ifp = (struct ifnet *)sc; 1338 int flags; 1339 1340 /* 1341 * Set the receiver filter. We want receive enabled and auto strip 1342 * of CRC from received packet. If we are promiscuous then set that 1343 * bit too. 1344 */ 1345 flags = RCR_ENABLE | RCR_STRIP_CRC; 1346 1347 if (ifp->if_flags & IFF_PROMISC) { 1348 flags |= RCR_PROMISC | RCR_ALMUL; 1349 } else if (ifp->if_flags & IFF_ALLMULTI) { 1350 flags |= RCR_ALMUL; 1351 } else { 1352 u_char mcf[MCFSZ]; 1353 if (sn_getmcf(&sc->arpcom, mcf)) { 1354 /* set filter */ 1355 SMC_SELECT_BANK(3); 1356 outw(BASE + MULTICAST1_REG_W, 1357 ((u_short)mcf[1] << 8) | mcf[0]); 1358 outw(BASE + MULTICAST2_REG_W, 1359 ((u_short)mcf[3] << 8) | mcf[2]); 1360 outw(BASE + MULTICAST3_REG_W, 1361 ((u_short)mcf[5] << 8) | mcf[4]); 1362 outw(BASE + MULTICAST4_REG_W, 1363 ((u_short)mcf[7] << 8) | mcf[6]); 1364 } else { 1365 flags |= RCR_ALMUL; 1366 } 1367 } 1368 SMC_SELECT_BANK(0); 1369 outw(BASE + RECV_CONTROL_REG_W, flags); 1370 } 1371 1372 static int 1373 sn_getmcf(struct arpcom *ac, u_char *mcf) 1374 { 1375 int i; 1376 u_int index, index2; 1377 u_char *af = mcf; 1378 struct ifmultiaddr *ifma; 1379 1380 bzero(mcf, MCFSZ); 1381 1382 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) { 1383 if (ifma->ifma_addr->sa_family != AF_LINK) 1384 return 0; 1385 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1386 index2 = 0; 1387 for (i = 0; i < 6; i++) { 1388 index2 <<= 1; 1389 index2 |= (index & 0x01); 1390 index >>= 1; 1391 } 1392 af[index2 >> 3] |= 1 << (index2 & 7); 1393 } 1394 return 1; /* use multicast filter */ 1395 } 1396 1397 static u_int 1398 smc_crc(u_char *s) 1399 { 1400 int perByte; 1401 int perBit; 1402 const u_int poly = 0xedb88320; 1403 u_int v = 0xffffffff; 1404 u_char c; 1405 1406 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1407 c = s[perByte]; 1408 for (perBit = 0; perBit < 8; perBit++) { 1409 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1410 c >>= 1; 1411 } 1412 } 1413 return v; 1414 } 1415