1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.5 2003/11/20 22:07:31 dillon Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 95 #include <sys/module.h> 96 #include <sys/bus.h> 97 98 #include <machine/bus.h> 99 #include <machine/resource.h> 100 #include <sys/rman.h> 101 102 #include <net/ethernet.h> 103 #include <net/if.h> 104 #include <net/if_arp.h> 105 #include <net/if_dl.h> 106 #include <net/if_types.h> 107 #include <net/if_mib.h> 108 109 #ifdef INET 110 #include <netinet/in.h> 111 #include <netinet/in_systm.h> 112 #include <netinet/in_var.h> 113 #include <netinet/ip.h> 114 #endif 115 116 #ifdef NS 117 #include <netns/ns.h> 118 #include <netns/ns_if.h> 119 #endif 120 121 #include <net/bpf.h> 122 #include <net/bpfdesc.h> 123 124 #include <machine/clock.h> 125 126 #include "if_snreg.h" 127 #include "if_snvar.h" 128 129 /* Exported variables */ 130 devclass_t sn_devclass; 131 132 static int snioctl(struct ifnet * ifp, u_long, caddr_t); 133 134 static void snresume(struct ifnet *); 135 136 void sninit(void *); 137 void snread(struct ifnet *); 138 void snreset(struct sn_softc *); 139 void snstart(struct ifnet *); 140 void snstop(struct sn_softc *); 141 void snwatchdog(struct ifnet *); 142 143 static void sn_setmcast(struct sn_softc *); 144 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 145 static u_int smc_crc(u_char *); 146 147 DECLARE_DUMMY_MODULE(if_sn); 148 149 /* I (GB) have been unlucky getting the hardware padding 150 * to work properly. 151 */ 152 #define SW_PAD 153 154 static const char *chip_ids[15] = { 155 NULL, NULL, NULL, 156 /* 3 */ "SMC91C90/91C92", 157 /* 4 */ "SMC91C94", 158 /* 5 */ "SMC91C95", 159 NULL, 160 /* 7 */ "SMC91C100", 161 /* 8 */ "SMC91C100FD", 162 NULL, NULL, NULL, 163 NULL, NULL, NULL 164 }; 165 166 int 167 sn_attach(device_t dev) 168 { 169 struct sn_softc *sc = device_get_softc(dev); 170 struct ifnet *ifp = &sc->arpcom.ac_if; 171 u_short i; 172 u_char *p; 173 struct ifaddr *ifa; 174 struct sockaddr_dl *sdl; 175 int rev; 176 u_short address; 177 int j; 178 179 sn_activate(dev); 180 181 snstop(sc); 182 183 sc->dev = dev; 184 sc->pages_wanted = -1; 185 186 device_printf(dev, " "); 187 188 SMC_SELECT_BANK(3); 189 rev = inw(BASE + REVISION_REG_W); 190 if (chip_ids[(rev >> 4) & 0xF]) 191 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 192 193 SMC_SELECT_BANK(1); 194 i = inw(BASE + CONFIG_REG_W); 195 printf(i & CR_AUI_SELECT ? "AUI" : "UTP"); 196 197 if (sc->pccard_enaddr) 198 for (j = 0; j < 3; j++) { 199 u_short w; 200 201 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 202 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 203 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 204 } 205 206 /* 207 * Read the station address from the chip. The MAC address is bank 1, 208 * regs 4 - 9 209 */ 210 SMC_SELECT_BANK(1); 211 p = (u_char *) & sc->arpcom.ac_enaddr; 212 for (i = 0; i < 6; i += 2) { 213 address = inw(BASE + IAR_ADDR0_REG_W + i); 214 p[i + 1] = address >> 8; 215 p[i] = address & 0xFF; 216 } 217 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":"); 218 ifp->if_softc = sc; 219 ifp->if_unit = device_get_unit(dev); 220 ifp->if_name = "sn"; 221 ifp->if_mtu = ETHERMTU; 222 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 223 ifp->if_output = ether_output; 224 ifp->if_start = snstart; 225 ifp->if_ioctl = snioctl; 226 ifp->if_watchdog = snwatchdog; 227 ifp->if_init = sninit; 228 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 229 ifp->if_timer = 0; 230 231 ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 232 233 /* 234 * Fill the hardware address into ifa_addr if we find an AF_LINK 235 * entry. We need to do this so bpf's can get the hardware addr of 236 * this card. netstat likes this too! 237 */ 238 ifa = TAILQ_FIRST(&ifp->if_addrhead); 239 while ((ifa != 0) && (ifa->ifa_addr != 0) && 240 (ifa->ifa_addr->sa_family != AF_LINK)) 241 ifa = TAILQ_NEXT(ifa, ifa_link); 242 243 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 244 sdl = (struct sockaddr_dl *) ifa->ifa_addr; 245 sdl->sdl_type = IFT_ETHER; 246 sdl->sdl_alen = ETHER_ADDR_LEN; 247 sdl->sdl_slen = 0; 248 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 249 } 250 251 return 0; 252 } 253 254 255 /* 256 * Reset and initialize the chip 257 */ 258 void 259 sninit(void *xsc) 260 { 261 struct sn_softc *sc = xsc; 262 struct ifnet *ifp = &sc->arpcom.ac_if; 263 int s; 264 int flags; 265 int mask; 266 267 s = splimp(); 268 269 /* 270 * This resets the registers mostly to defaults, but doesn't affect 271 * EEPROM. After the reset cycle, we pause briefly for the chip to 272 * be happy. 273 */ 274 SMC_SELECT_BANK(0); 275 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 276 SMC_DELAY(); 277 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 278 SMC_DELAY(); 279 SMC_DELAY(); 280 281 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 282 283 /* 284 * Set the control register to automatically release succesfully 285 * transmitted packets (making the best use out of our limited 286 * memory) and to enable the EPH interrupt on certain TX errors. 287 */ 288 SMC_SELECT_BANK(1); 289 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 290 CTR_CR_ENABLE | CTR_LE_ENABLE)); 291 292 /* Set squelch level to 240mV (default 480mV) */ 293 flags = inw(BASE + CONFIG_REG_W); 294 flags |= CR_SET_SQLCH; 295 outw(BASE + CONFIG_REG_W, flags); 296 297 /* 298 * Reset the MMU and wait for it to be un-busy. 299 */ 300 SMC_SELECT_BANK(2); 301 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 302 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 303 ; 304 305 /* 306 * Disable all interrupts 307 */ 308 outb(BASE + INTR_MASK_REG_B, 0x00); 309 310 sn_setmcast(sc); 311 312 /* 313 * Set the transmitter control. We want it enabled. 314 */ 315 flags = TCR_ENABLE; 316 317 #ifndef SW_PAD 318 /* 319 * I (GB) have been unlucky getting this to work. 320 */ 321 flags |= TCR_PAD_ENABLE; 322 #endif /* SW_PAD */ 323 324 outw(BASE + TXMIT_CONTROL_REG_W, flags); 325 326 327 /* 328 * Now, enable interrupts 329 */ 330 SMC_SELECT_BANK(2); 331 332 mask = IM_EPH_INT | 333 IM_RX_OVRN_INT | 334 IM_RCV_INT | 335 IM_TX_INT; 336 337 outb(BASE + INTR_MASK_REG_B, mask); 338 sc->intr_mask = mask; 339 sc->pages_wanted = -1; 340 341 342 /* 343 * Mark the interface running but not active. 344 */ 345 ifp->if_flags |= IFF_RUNNING; 346 ifp->if_flags &= ~IFF_OACTIVE; 347 348 /* 349 * Attempt to push out any waiting packets. 350 */ 351 snstart(ifp); 352 353 splx(s); 354 } 355 356 357 void 358 snstart(struct ifnet *ifp) 359 { 360 struct sn_softc *sc = ifp->if_softc; 361 u_int len; 362 struct mbuf *m; 363 struct mbuf *top; 364 int s, pad; 365 int mask; 366 u_short length; 367 u_short numPages; 368 u_char packet_no; 369 int time_out; 370 371 s = splimp(); 372 373 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) { 374 splx(s); 375 return; 376 } 377 if (sc->pages_wanted != -1) { 378 splx(s); 379 printf("sn%d: snstart() while memory allocation pending\n", 380 ifp->if_unit); 381 return; 382 } 383 startagain: 384 385 /* 386 * Sneak a peek at the next packet 387 */ 388 m = sc->arpcom.ac_if.if_snd.ifq_head; 389 if (m == 0) { 390 splx(s); 391 return; 392 } 393 /* 394 * Compute the frame length and set pad to give an overall even 395 * number of bytes. Below we assume that the packet length is even. 396 */ 397 for (len = 0, top = m; m; m = m->m_next) 398 len += m->m_len; 399 400 pad = (len & 1); 401 402 /* 403 * We drop packets that are too large. Perhaps we should truncate 404 * them instead? 405 */ 406 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 407 printf("sn%d: large packet discarded (A)\n", ifp->if_unit); 408 ++sc->arpcom.ac_if.if_oerrors; 409 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 410 m_freem(m); 411 goto readcheck; 412 } 413 #ifdef SW_PAD 414 415 /* 416 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 417 */ 418 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 419 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 420 421 #endif /* SW_PAD */ 422 423 length = pad + len; 424 425 /* 426 * The MMU wants the number of pages to be the number of 256 byte 427 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 428 * include space for the status word, byte count and control bytes in 429 * the allocation request. 430 */ 431 numPages = (length + 6) >> 8; 432 433 434 /* 435 * Now, try to allocate the memory 436 */ 437 SMC_SELECT_BANK(2); 438 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 439 440 /* 441 * Wait a short amount of time to see if the allocation request 442 * completes. Otherwise, I enable the interrupt and wait for 443 * completion asyncronously. 444 */ 445 446 time_out = MEMORY_WAIT_TIME; 447 do { 448 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 449 break; 450 } while (--time_out); 451 452 if (!time_out) { 453 454 /* 455 * No memory now. Oh well, wait until the chip finds memory 456 * later. Remember how many pages we were asking for and 457 * enable the allocation completion interrupt. Also set a 458 * watchdog in case we miss the interrupt. We mark the 459 * interface active since there is no point in attempting an 460 * snstart() until after the memory is available. 461 */ 462 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 463 outb(BASE + INTR_MASK_REG_B, mask); 464 sc->intr_mask = mask; 465 466 sc->arpcom.ac_if.if_timer = 1; 467 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 468 sc->pages_wanted = numPages; 469 470 splx(s); 471 return; 472 } 473 /* 474 * The memory allocation completed. Check the results. 475 */ 476 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 477 if (packet_no & ARR_FAILED) { 478 printf("sn%d: Memory allocation failed\n", ifp->if_unit); 479 goto startagain; 480 } 481 /* 482 * We have a packet number, so tell the card to use it. 483 */ 484 outb(BASE + PACKET_NUM_REG_B, packet_no); 485 486 /* 487 * Point to the beginning of the packet 488 */ 489 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 490 491 /* 492 * Send the packet length (+6 for status, length and control byte) 493 * and the status word (set to zeros) 494 */ 495 outw(BASE + DATA_REG_W, 0); 496 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 497 outb(BASE + DATA_REG_B, (length + 6) >> 8); 498 499 /* 500 * Get the packet from the kernel. This will include the Ethernet 501 * frame header, MAC Addresses etc. 502 */ 503 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 504 505 /* 506 * Push out the data to the card. 507 */ 508 for (top = m; m != 0; m = m->m_next) { 509 510 /* 511 * Push out words. 512 */ 513 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 514 515 /* 516 * Push out remaining byte. 517 */ 518 if (m->m_len & 1) 519 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 520 } 521 522 /* 523 * Push out padding. 524 */ 525 while (pad > 1) { 526 outw(BASE + DATA_REG_W, 0); 527 pad -= 2; 528 } 529 if (pad) 530 outb(BASE + DATA_REG_B, 0); 531 532 /* 533 * Push out control byte and unused packet byte The control byte is 0 534 * meaning the packet is even lengthed and no special CRC handling is 535 * desired. 536 */ 537 outw(BASE + DATA_REG_W, 0); 538 539 /* 540 * Enable the interrupts and let the chipset deal with it Also set a 541 * watchdog in case we miss the interrupt. 542 */ 543 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 544 outb(BASE + INTR_MASK_REG_B, mask); 545 sc->intr_mask = mask; 546 547 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 548 549 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 550 sc->arpcom.ac_if.if_timer = 1; 551 552 if (ifp->if_bpf) { 553 bpf_mtap(ifp, top); 554 } 555 556 sc->arpcom.ac_if.if_opackets++; 557 m_freem(top); 558 559 560 readcheck: 561 562 /* 563 * Is another packet coming in? We don't want to overflow the tiny 564 * RX FIFO. If nothing has arrived then attempt to queue another 565 * transmit packet. 566 */ 567 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 568 goto startagain; 569 570 splx(s); 571 return; 572 } 573 574 575 576 /* Resume a packet transmit operation after a memory allocation 577 * has completed. 578 * 579 * This is basically a hacked up copy of snstart() which handles 580 * a completed memory allocation the same way snstart() does. 581 * It then passes control to snstart to handle any other queued 582 * packets. 583 */ 584 static void 585 snresume(struct ifnet *ifp) 586 { 587 struct sn_softc *sc = ifp->if_softc; 588 u_int len; 589 struct mbuf *m; 590 struct mbuf *top; 591 int pad; 592 int mask; 593 u_short length; 594 u_short numPages; 595 u_short pages_wanted; 596 u_char packet_no; 597 598 if (sc->pages_wanted < 0) 599 return; 600 601 pages_wanted = sc->pages_wanted; 602 sc->pages_wanted = -1; 603 604 /* 605 * Sneak a peek at the next packet 606 */ 607 m = sc->arpcom.ac_if.if_snd.ifq_head; 608 if (m == 0) { 609 printf("sn%d: snresume() with nothing to send\n", ifp->if_unit); 610 return; 611 } 612 /* 613 * Compute the frame length and set pad to give an overall even 614 * number of bytes. Below we assume that the packet length is even. 615 */ 616 for (len = 0, top = m; m; m = m->m_next) 617 len += m->m_len; 618 619 pad = (len & 1); 620 621 /* 622 * We drop packets that are too large. Perhaps we should truncate 623 * them instead? 624 */ 625 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 626 printf("sn%d: large packet discarded (B)\n", ifp->if_unit); 627 ++sc->arpcom.ac_if.if_oerrors; 628 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 629 m_freem(m); 630 return; 631 } 632 #ifdef SW_PAD 633 634 /* 635 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 636 */ 637 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 638 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 639 640 #endif /* SW_PAD */ 641 642 length = pad + len; 643 644 645 /* 646 * The MMU wants the number of pages to be the number of 256 byte 647 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 648 * include space for the status word, byte count and control bytes in 649 * the allocation request. 650 */ 651 numPages = (length + 6) >> 8; 652 653 654 SMC_SELECT_BANK(2); 655 656 /* 657 * The memory allocation completed. Check the results. If it failed, 658 * we simply set a watchdog timer and hope for the best. 659 */ 660 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 661 if (packet_no & ARR_FAILED) { 662 printf("sn%d: Memory allocation failed. Weird.\n", ifp->if_unit); 663 sc->arpcom.ac_if.if_timer = 1; 664 goto try_start; 665 } 666 /* 667 * We have a packet number, so tell the card to use it. 668 */ 669 outb(BASE + PACKET_NUM_REG_B, packet_no); 670 671 /* 672 * Now, numPages should match the pages_wanted recorded when the 673 * memory allocation was initiated. 674 */ 675 if (pages_wanted != numPages) { 676 printf("sn%d: memory allocation wrong size. Weird.\n", ifp->if_unit); 677 /* 678 * If the allocation was the wrong size we simply release the 679 * memory once it is granted. Wait for the MMU to be un-busy. 680 */ 681 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 682 ; 683 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 684 685 return; 686 } 687 /* 688 * Point to the beginning of the packet 689 */ 690 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 691 692 /* 693 * Send the packet length (+6 for status, length and control byte) 694 * and the status word (set to zeros) 695 */ 696 outw(BASE + DATA_REG_W, 0); 697 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 698 outb(BASE + DATA_REG_B, (length + 6) >> 8); 699 700 /* 701 * Get the packet from the kernel. This will include the Ethernet 702 * frame header, MAC Addresses etc. 703 */ 704 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 705 706 /* 707 * Push out the data to the card. 708 */ 709 for (top = m; m != 0; m = m->m_next) { 710 711 /* 712 * Push out words. 713 */ 714 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 715 716 /* 717 * Push out remaining byte. 718 */ 719 if (m->m_len & 1) 720 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 721 } 722 723 /* 724 * Push out padding. 725 */ 726 while (pad > 1) { 727 outw(BASE + DATA_REG_W, 0); 728 pad -= 2; 729 } 730 if (pad) 731 outb(BASE + DATA_REG_B, 0); 732 733 /* 734 * Push out control byte and unused packet byte The control byte is 0 735 * meaning the packet is even lengthed and no special CRC handling is 736 * desired. 737 */ 738 outw(BASE + DATA_REG_W, 0); 739 740 /* 741 * Enable the interrupts and let the chipset deal with it Also set a 742 * watchdog in case we miss the interrupt. 743 */ 744 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 745 outb(BASE + INTR_MASK_REG_B, mask); 746 sc->intr_mask = mask; 747 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 748 749 if (ifp->if_bpf) { 750 bpf_mtap(ifp, top); 751 } 752 753 sc->arpcom.ac_if.if_opackets++; 754 m_freem(top); 755 756 try_start: 757 758 /* 759 * Now pass control to snstart() to queue any additional packets 760 */ 761 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 762 snstart(ifp); 763 764 /* 765 * We've sent something, so we're active. Set a watchdog in case the 766 * TX_EMPTY interrupt is lost. 767 */ 768 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 769 sc->arpcom.ac_if.if_timer = 1; 770 771 return; 772 } 773 774 775 void 776 sn_intr(void *arg) 777 { 778 int status, interrupts; 779 struct sn_softc *sc = (struct sn_softc *) arg; 780 struct ifnet *ifp = &sc->arpcom.ac_if; 781 int x; 782 783 /* 784 * Chip state registers 785 */ 786 u_char mask; 787 u_char packet_no; 788 u_short tx_status; 789 u_short card_stats; 790 791 /* 792 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder... 793 */ 794 x = splbio(); 795 796 /* 797 * Clear the watchdog. 798 */ 799 ifp->if_timer = 0; 800 801 SMC_SELECT_BANK(2); 802 803 /* 804 * Obtain the current interrupt mask and clear the hardware mask 805 * while servicing interrupts. 806 */ 807 mask = inb(BASE + INTR_MASK_REG_B); 808 outb(BASE + INTR_MASK_REG_B, 0x00); 809 810 /* 811 * Get the set of interrupts which occurred and eliminate any which 812 * are masked. 813 */ 814 interrupts = inb(BASE + INTR_STAT_REG_B); 815 status = interrupts & mask; 816 817 /* 818 * Now, process each of the interrupt types. 819 */ 820 821 /* 822 * Receive Overrun. 823 */ 824 if (status & IM_RX_OVRN_INT) { 825 826 /* 827 * Acknowlege Interrupt 828 */ 829 SMC_SELECT_BANK(2); 830 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 831 832 ++sc->arpcom.ac_if.if_ierrors; 833 } 834 /* 835 * Got a packet. 836 */ 837 if (status & IM_RCV_INT) { 838 #if 1 839 int packet_number; 840 841 SMC_SELECT_BANK(2); 842 packet_number = inw(BASE + FIFO_PORTS_REG_W); 843 844 if (packet_number & FIFO_REMPTY) { 845 846 /* 847 * we got called , but nothing was on the FIFO 848 */ 849 printf("sn: Receive interrupt with nothing on FIFO\n"); 850 851 goto out; 852 } 853 #endif 854 snread(ifp); 855 } 856 /* 857 * An on-card memory allocation came through. 858 */ 859 if (status & IM_ALLOC_INT) { 860 861 /* 862 * Disable this interrupt. 863 */ 864 mask &= ~IM_ALLOC_INT; 865 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 866 snresume(&sc->arpcom.ac_if); 867 } 868 /* 869 * TX Completion. Handle a transmit error message. This will only be 870 * called when there is an error, because of the AUTO_RELEASE mode. 871 */ 872 if (status & IM_TX_INT) { 873 874 /* 875 * Acknowlege Interrupt 876 */ 877 SMC_SELECT_BANK(2); 878 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 879 880 packet_no = inw(BASE + FIFO_PORTS_REG_W); 881 packet_no &= FIFO_TX_MASK; 882 883 /* 884 * select this as the packet to read from 885 */ 886 outb(BASE + PACKET_NUM_REG_B, packet_no); 887 888 /* 889 * Position the pointer to the first word from this packet 890 */ 891 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 892 893 /* 894 * Fetch the TX status word. The value found here will be a 895 * copy of the EPH_STATUS_REG_W at the time the transmit 896 * failed. 897 */ 898 tx_status = inw(BASE + DATA_REG_W); 899 900 if (tx_status & EPHSR_TX_SUC) { 901 device_printf(sc->dev, 902 "Successful packet caused interrupt\n"); 903 } else { 904 ++sc->arpcom.ac_if.if_oerrors; 905 } 906 907 if (tx_status & EPHSR_LATCOL) 908 ++sc->arpcom.ac_if.if_collisions; 909 910 /* 911 * Some of these errors will have disabled transmit. 912 * Re-enable transmit now. 913 */ 914 SMC_SELECT_BANK(0); 915 916 #ifdef SW_PAD 917 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 918 #else 919 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 920 #endif /* SW_PAD */ 921 922 /* 923 * kill the failed packet. Wait for the MMU to be un-busy. 924 */ 925 SMC_SELECT_BANK(2); 926 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 927 ; 928 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 929 930 /* 931 * Attempt to queue more transmits. 932 */ 933 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 934 snstart(&sc->arpcom.ac_if); 935 } 936 /* 937 * Transmit underrun. We use this opportunity to update transmit 938 * statistics from the card. 939 */ 940 if (status & IM_TX_EMPTY_INT) { 941 942 /* 943 * Acknowlege Interrupt 944 */ 945 SMC_SELECT_BANK(2); 946 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 947 948 /* 949 * Disable this interrupt. 950 */ 951 mask &= ~IM_TX_EMPTY_INT; 952 953 SMC_SELECT_BANK(0); 954 card_stats = inw(BASE + COUNTER_REG_W); 955 956 /* 957 * Single collisions 958 */ 959 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 960 961 /* 962 * Multiple collisions 963 */ 964 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 965 966 SMC_SELECT_BANK(2); 967 968 /* 969 * Attempt to enqueue some more stuff. 970 */ 971 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 972 snstart(&sc->arpcom.ac_if); 973 } 974 /* 975 * Some other error. Try to fix it by resetting the adapter. 976 */ 977 if (status & IM_EPH_INT) { 978 snstop(sc); 979 sninit(sc); 980 } 981 982 out: 983 /* 984 * Handled all interrupt sources. 985 */ 986 987 SMC_SELECT_BANK(2); 988 989 /* 990 * Reestablish interrupts from mask which have not been deselected 991 * during this interrupt. Note that the hardware mask, which was set 992 * to 0x00 at the start of this service routine, may have been 993 * updated by one or more of the interrupt handers and we must let 994 * those new interrupts stay enabled here. 995 */ 996 mask |= inb(BASE + INTR_MASK_REG_B); 997 outb(BASE + INTR_MASK_REG_B, mask); 998 sc->intr_mask = mask; 999 1000 splx(x); 1001 } 1002 1003 void 1004 snread(struct ifnet *ifp) 1005 { 1006 struct sn_softc *sc = ifp->if_softc; 1007 struct ether_header *eh; 1008 struct mbuf *m; 1009 short status; 1010 int packet_number; 1011 u_short packet_length; 1012 u_char *data; 1013 1014 SMC_SELECT_BANK(2); 1015 #if 0 1016 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1017 1018 if (packet_number & FIFO_REMPTY) { 1019 1020 /* 1021 * we got called , but nothing was on the FIFO 1022 */ 1023 printf("sn: Receive interrupt with nothing on FIFO\n"); 1024 return; 1025 } 1026 #endif 1027 read_another: 1028 1029 /* 1030 * Start reading from the start of the packet. Since PTR_RCV is set, 1031 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1032 */ 1033 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1034 1035 /* 1036 * First two words are status and packet_length 1037 */ 1038 status = inw(BASE + DATA_REG_W); 1039 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1040 1041 /* 1042 * The packet length contains 3 extra words: status, length, and a 1043 * extra word with the control byte. 1044 */ 1045 packet_length -= 6; 1046 1047 /* 1048 * Account for receive errors and discard. 1049 */ 1050 if (status & RS_ERRORS) { 1051 ++sc->arpcom.ac_if.if_ierrors; 1052 goto out; 1053 } 1054 /* 1055 * A packet is received. 1056 */ 1057 1058 /* 1059 * Adjust for odd-length packet. 1060 */ 1061 if (status & RS_ODDFRAME) 1062 packet_length++; 1063 1064 /* 1065 * Allocate a header mbuf from the kernel. 1066 */ 1067 MGETHDR(m, M_DONTWAIT, MT_DATA); 1068 if (m == NULL) 1069 goto out; 1070 1071 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1072 m->m_pkthdr.len = m->m_len = packet_length; 1073 1074 /* 1075 * Attach an mbuf cluster 1076 */ 1077 MCLGET(m, M_DONTWAIT); 1078 1079 /* 1080 * Insist on getting a cluster 1081 */ 1082 if ((m->m_flags & M_EXT) == 0) { 1083 m_freem(m); 1084 ++sc->arpcom.ac_if.if_ierrors; 1085 printf("sn: snread() kernel memory allocation problem\n"); 1086 goto out; 1087 } 1088 eh = mtod(m, struct ether_header *); 1089 1090 /* 1091 * Get packet, including link layer address, from interface. 1092 */ 1093 1094 data = (u_char *) eh; 1095 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1096 if (packet_length & 1) { 1097 data += packet_length & ~1; 1098 *data = inb(BASE + DATA_REG_B); 1099 } 1100 ++sc->arpcom.ac_if.if_ipackets; 1101 1102 /* 1103 * Remove link layer addresses and whatnot. 1104 */ 1105 m->m_pkthdr.len = m->m_len = packet_length - sizeof(struct ether_header); 1106 m->m_data += sizeof(struct ether_header); 1107 1108 ether_input(&sc->arpcom.ac_if, eh, m); 1109 1110 out: 1111 1112 /* 1113 * Error or good, tell the card to get rid of this packet Wait for 1114 * the MMU to be un-busy. 1115 */ 1116 SMC_SELECT_BANK(2); 1117 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1118 ; 1119 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1120 1121 /* 1122 * Check whether another packet is ready 1123 */ 1124 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1125 if (packet_number & FIFO_REMPTY) { 1126 return; 1127 } 1128 goto read_another; 1129 } 1130 1131 1132 /* 1133 * Handle IOCTLS. This function is completely stolen from if_ep.c 1134 * As with its progenitor, it does not handle hardware address 1135 * changes. 1136 */ 1137 static int 1138 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1139 { 1140 struct sn_softc *sc = ifp->if_softc; 1141 int s, error = 0; 1142 1143 s = splimp(); 1144 1145 switch (cmd) { 1146 case SIOCSIFADDR: 1147 case SIOCGIFADDR: 1148 case SIOCSIFMTU: 1149 error = ether_ioctl(ifp, cmd, data); 1150 break; 1151 1152 case SIOCSIFFLAGS: 1153 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1154 ifp->if_flags &= ~IFF_RUNNING; 1155 snstop(sc); 1156 break; 1157 } else { 1158 /* reinitialize card on any parameter change */ 1159 sninit(sc); 1160 break; 1161 } 1162 break; 1163 1164 #ifdef notdef 1165 case SIOCGHWADDR: 1166 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1167 sizeof(sc->sc_addr)); 1168 break; 1169 #endif 1170 1171 case SIOCADDMULTI: 1172 /* update multicast filter list. */ 1173 sn_setmcast(sc); 1174 error = 0; 1175 break; 1176 case SIOCDELMULTI: 1177 /* update multicast filter list. */ 1178 sn_setmcast(sc); 1179 error = 0; 1180 break; 1181 default: 1182 error = EINVAL; 1183 } 1184 1185 splx(s); 1186 1187 return (error); 1188 } 1189 1190 void 1191 snreset(struct sn_softc *sc) 1192 { 1193 int s; 1194 1195 s = splimp(); 1196 snstop(sc); 1197 sninit(sc); 1198 1199 splx(s); 1200 } 1201 1202 void 1203 snwatchdog(struct ifnet *ifp) 1204 { 1205 int s; 1206 s = splimp(); 1207 sn_intr(ifp->if_softc); 1208 splx(s); 1209 } 1210 1211 1212 /* 1. zero the interrupt mask 1213 * 2. clear the enable receive flag 1214 * 3. clear the enable xmit flags 1215 */ 1216 void 1217 snstop(struct sn_softc *sc) 1218 { 1219 1220 struct ifnet *ifp = &sc->arpcom.ac_if; 1221 1222 /* 1223 * Clear interrupt mask; disable all interrupts. 1224 */ 1225 SMC_SELECT_BANK(2); 1226 outb(BASE + INTR_MASK_REG_B, 0x00); 1227 1228 /* 1229 * Disable transmitter and Receiver 1230 */ 1231 SMC_SELECT_BANK(0); 1232 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1233 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1234 1235 /* 1236 * Cancel watchdog. 1237 */ 1238 ifp->if_timer = 0; 1239 } 1240 1241 1242 int 1243 sn_activate(device_t dev) 1244 { 1245 struct sn_softc *sc = device_get_softc(dev); 1246 int err; 1247 1248 sc->port_rid = 0; 1249 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1250 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1251 if (!sc->port_res) { 1252 #ifdef SN_DEBUG 1253 device_printf(dev, "Cannot allocate ioport\n"); 1254 #endif 1255 return ENOMEM; 1256 } 1257 1258 sc->irq_rid = 0; 1259 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 1260 0, ~0, 1, RF_ACTIVE); 1261 if (!sc->irq_res) { 1262 #ifdef SN_DEBUG 1263 device_printf(dev, "Cannot allocate irq\n"); 1264 #endif 1265 sn_deactivate(dev); 1266 return ENOMEM; 1267 } 1268 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1269 &sc->intrhand)) != 0) { 1270 sn_deactivate(dev); 1271 return err; 1272 } 1273 1274 sc->sn_io_addr = rman_get_start(sc->port_res); 1275 return (0); 1276 } 1277 1278 void 1279 sn_deactivate(device_t dev) 1280 { 1281 struct sn_softc *sc = device_get_softc(dev); 1282 1283 if (sc->intrhand) 1284 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1285 sc->intrhand = 0; 1286 if (sc->port_res) 1287 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1288 sc->port_res); 1289 sc->port_res = 0; 1290 if (sc->irq_res) 1291 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1292 sc->irq_res); 1293 sc->irq_res = 0; 1294 return; 1295 } 1296 1297 /* 1298 * Function: sn_probe( device_t dev, int pccard ) 1299 * 1300 * Purpose: 1301 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1302 * Tries to cause as little damage as possible if it's not a SMC chip. 1303 * Returns a 0 on success 1304 * 1305 * Algorithm: 1306 * (1) see if the high byte of BANK_SELECT is 0x33 1307 * (2) compare the ioaddr with the base register's address 1308 * (3) see if I recognize the chip ID in the appropriate register 1309 * 1310 * 1311 */ 1312 int 1313 sn_probe(device_t dev, int pccard) 1314 { 1315 struct sn_softc *sc = device_get_softc(dev); 1316 u_int bank; 1317 u_short revision_register; 1318 u_short base_address_register; 1319 u_short ioaddr; 1320 int err; 1321 1322 if ((err = sn_activate(dev)) != 0) 1323 return err; 1324 1325 ioaddr = sc->sn_io_addr; 1326 1327 /* 1328 * First, see if the high byte is 0x33 1329 */ 1330 bank = inw(ioaddr + BANK_SELECT_REG_W); 1331 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1332 #ifdef SN_DEBUG 1333 device_printf(dev, "test1 failed\n"); 1334 #endif 1335 goto error; 1336 } 1337 /* 1338 * The above MIGHT indicate a device, but I need to write to further 1339 * test this. Go to bank 0, then test that the register still 1340 * reports the high byte is 0x33. 1341 */ 1342 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1343 bank = inw(ioaddr + BANK_SELECT_REG_W); 1344 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1345 #ifdef SN_DEBUG 1346 device_printf(dev, "test2 failed\n"); 1347 #endif 1348 goto error; 1349 } 1350 /* 1351 * well, we've already written once, so hopefully another time won't 1352 * hurt. This time, I need to switch the bank register to bank 1, so 1353 * I can access the base address register. The contents of the 1354 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1355 * to match the I/O port address where the adapter is being probed. 1356 */ 1357 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1358 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1359 1360 /* 1361 * This test is nonsence on PC-card architecture, so if 1362 * pccard == 1, skip this test. (hosokawa) 1363 */ 1364 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1365 1366 /* 1367 * Well, the base address register didn't match. Must not 1368 * have been a SMC chip after all. 1369 */ 1370 /* 1371 * printf("sn: ioaddr %x doesn't match card configuration 1372 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1373 */ 1374 1375 #ifdef SN_DEBUG 1376 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1377 "base_address_register = 0x%x\n", ioaddr, 1378 base_address_register >> 3 & 0x3E0); 1379 #endif 1380 goto error; 1381 } 1382 /* 1383 * Check if the revision register is something that I recognize. 1384 * These might need to be added to later, as future revisions could 1385 * be added. 1386 */ 1387 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1388 revision_register = inw(ioaddr + REVISION_REG_W); 1389 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1390 1391 /* 1392 * I don't regonize this chip, so... 1393 */ 1394 #ifdef SN_DEBUG 1395 device_printf(dev, "test4 failed\n"); 1396 #endif 1397 goto error; 1398 } 1399 /* 1400 * at this point I'll assume that the chip is an SMC9xxx. It might be 1401 * prudent to check a listing of MAC addresses against the hardware 1402 * address, or do some other tests. 1403 */ 1404 sn_deactivate(dev); 1405 return 0; 1406 error: 1407 sn_deactivate(dev); 1408 return ENXIO; 1409 } 1410 1411 #define MCFSZ 8 1412 1413 static void 1414 sn_setmcast(struct sn_softc *sc) 1415 { 1416 struct ifnet *ifp = (struct ifnet *)sc; 1417 int flags; 1418 1419 /* 1420 * Set the receiver filter. We want receive enabled and auto strip 1421 * of CRC from received packet. If we are promiscuous then set that 1422 * bit too. 1423 */ 1424 flags = RCR_ENABLE | RCR_STRIP_CRC; 1425 1426 if (ifp->if_flags & IFF_PROMISC) { 1427 flags |= RCR_PROMISC | RCR_ALMUL; 1428 } else if (ifp->if_flags & IFF_ALLMULTI) { 1429 flags |= RCR_ALMUL; 1430 } else { 1431 u_char mcf[MCFSZ]; 1432 if (sn_getmcf(&sc->arpcom, mcf)) { 1433 /* set filter */ 1434 SMC_SELECT_BANK(3); 1435 outw(BASE + MULTICAST1_REG_W, 1436 ((u_short)mcf[1] << 8) | mcf[0]); 1437 outw(BASE + MULTICAST2_REG_W, 1438 ((u_short)mcf[3] << 8) | mcf[2]); 1439 outw(BASE + MULTICAST3_REG_W, 1440 ((u_short)mcf[5] << 8) | mcf[4]); 1441 outw(BASE + MULTICAST4_REG_W, 1442 ((u_short)mcf[7] << 8) | mcf[6]); 1443 } else { 1444 flags |= RCR_ALMUL; 1445 } 1446 } 1447 SMC_SELECT_BANK(0); 1448 outw(BASE + RECV_CONTROL_REG_W, flags); 1449 } 1450 1451 static int 1452 sn_getmcf(struct arpcom *ac, u_char *mcf) 1453 { 1454 int i; 1455 u_int index, index2; 1456 u_char *af = (u_char *) mcf; 1457 struct ifmultiaddr *ifma; 1458 1459 bzero(mcf, MCFSZ); 1460 1461 for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma; 1462 ifma = ifma->ifma_link.le_next) { 1463 if (ifma->ifma_addr->sa_family != AF_LINK) 1464 return 0; 1465 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1466 index2 = 0; 1467 for (i = 0; i < 6; i++) { 1468 index2 <<= 1; 1469 index2 |= (index & 0x01); 1470 index >>= 1; 1471 } 1472 af[index2 >> 3] |= 1 << (index2 & 7); 1473 } 1474 return 1; /* use multicast filter */ 1475 } 1476 1477 static u_int 1478 smc_crc(u_char *s) 1479 { 1480 int perByte; 1481 int perBit; 1482 const u_int poly = 0xedb88320; 1483 u_int v = 0xffffffff; 1484 u_char c; 1485 1486 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1487 c = s[perByte]; 1488 for (perBit = 0; perBit < 8; perBit++) { 1489 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1490 c >>= 1; 1491 } 1492 } 1493 return v; 1494 } 1495