1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.25 2005/12/31 14:08:00 sephe Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 #include <sys/serialize.h> 95 #include <sys/thread2.h> 96 97 #include <sys/module.h> 98 #include <sys/bus.h> 99 100 #include <machine/bus.h> 101 #include <machine/resource.h> 102 #include <sys/rman.h> 103 104 #include <net/ethernet.h> 105 #include <net/if.h> 106 #include <net/ifq_var.h> 107 #include <net/if_arp.h> 108 #include <net/if_dl.h> 109 #include <net/if_types.h> 110 #include <net/if_mib.h> 111 112 #ifdef INET 113 #include <netinet/in.h> 114 #include <netinet/in_systm.h> 115 #include <netinet/in_var.h> 116 #include <netinet/ip.h> 117 #endif 118 119 #ifdef NS 120 #include <netns/ns.h> 121 #include <netns/ns_if.h> 122 #endif 123 124 #include <net/bpf.h> 125 #include <net/bpfdesc.h> 126 127 #include <machine/clock.h> 128 129 #include "if_snreg.h" 130 #include "if_snvar.h" 131 132 /* Exported variables */ 133 devclass_t sn_devclass; 134 135 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *); 136 137 static void snresume(struct ifnet *); 138 139 void sninit(void *); 140 void snread(struct ifnet *); 141 void snreset(struct sn_softc *); 142 void snstart(struct ifnet *); 143 void snstop(struct sn_softc *); 144 void snwatchdog(struct ifnet *); 145 146 static void sn_setmcast(struct sn_softc *); 147 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 148 static u_int smc_crc(u_char *); 149 150 DECLARE_DUMMY_MODULE(if_sn); 151 152 /* I (GB) have been unlucky getting the hardware padding 153 * to work properly. 154 */ 155 #define SW_PAD 156 157 static const char *chip_ids[15] = { 158 NULL, NULL, NULL, 159 /* 3 */ "SMC91C90/91C92", 160 /* 4 */ "SMC91C94", 161 /* 5 */ "SMC91C95", 162 NULL, 163 /* 7 */ "SMC91C100", 164 /* 8 */ "SMC91C100FD", 165 NULL, NULL, NULL, 166 NULL, NULL, NULL 167 }; 168 169 int 170 sn_attach(device_t dev) 171 { 172 struct sn_softc *sc = device_get_softc(dev); 173 struct ifnet *ifp = &sc->arpcom.ac_if; 174 u_short i; 175 u_char *p; 176 int rev; 177 u_short address; 178 int j; 179 int error; 180 181 sn_activate(dev); 182 183 snstop(sc); 184 185 sc->dev = dev; 186 sc->pages_wanted = -1; 187 188 device_printf(dev, " "); 189 190 SMC_SELECT_BANK(3); 191 rev = inw(BASE + REVISION_REG_W); 192 if (chip_ids[(rev >> 4) & 0xF]) 193 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 194 195 SMC_SELECT_BANK(1); 196 i = inw(BASE + CONFIG_REG_W); 197 printf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP"); 198 199 if (sc->pccard_enaddr) 200 for (j = 0; j < 3; j++) { 201 u_short w; 202 203 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 204 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 205 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 206 } 207 208 /* 209 * Read the station address from the chip. The MAC address is bank 1, 210 * regs 4 - 9 211 */ 212 SMC_SELECT_BANK(1); 213 p = (u_char *) & sc->arpcom.ac_enaddr; 214 for (i = 0; i < 6; i += 2) { 215 address = inw(BASE + IAR_ADDR0_REG_W + i); 216 p[i + 1] = address >> 8; 217 p[i] = address & 0xFF; 218 } 219 ifp->if_softc = sc; 220 if_initname(ifp, "sn", device_get_unit(dev)); 221 ifp->if_mtu = ETHERMTU; 222 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 223 ifp->if_start = snstart; 224 ifp->if_ioctl = snioctl; 225 ifp->if_watchdog = snwatchdog; 226 ifp->if_init = sninit; 227 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 228 ifq_set_ready(&ifp->if_snd); 229 ifp->if_timer = 0; 230 231 ether_ifattach(ifp, sc->arpcom.ac_enaddr, NULL); 232 233 error = bus_setup_intr(dev, sc->irq_res, INTR_NETSAFE, 234 sn_intr, sc, &sc->intrhand, 235 ifp->if_serializer); 236 if (error) { 237 ether_ifdetach(ifp); 238 sn_deactivate(dev); 239 return error; 240 } 241 242 return 0; 243 } 244 245 246 /* 247 * Reset and initialize the chip 248 */ 249 void 250 sninit(void *xsc) 251 { 252 struct sn_softc *sc = xsc; 253 struct ifnet *ifp = &sc->arpcom.ac_if; 254 int flags; 255 int mask; 256 257 /* 258 * This resets the registers mostly to defaults, but doesn't affect 259 * EEPROM. After the reset cycle, we pause briefly for the chip to 260 * be happy. 261 */ 262 SMC_SELECT_BANK(0); 263 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 264 SMC_DELAY(); 265 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 266 SMC_DELAY(); 267 SMC_DELAY(); 268 269 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 270 271 /* 272 * Set the control register to automatically release succesfully 273 * transmitted packets (making the best use out of our limited 274 * memory) and to enable the EPH interrupt on certain TX errors. 275 */ 276 SMC_SELECT_BANK(1); 277 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 278 CTR_CR_ENABLE | CTR_LE_ENABLE)); 279 280 /* Set squelch level to 240mV (default 480mV) */ 281 flags = inw(BASE + CONFIG_REG_W); 282 flags |= CR_SET_SQLCH; 283 outw(BASE + CONFIG_REG_W, flags); 284 285 /* 286 * Reset the MMU and wait for it to be un-busy. 287 */ 288 SMC_SELECT_BANK(2); 289 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 290 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 291 ; 292 293 /* 294 * Disable all interrupts 295 */ 296 outb(BASE + INTR_MASK_REG_B, 0x00); 297 298 sn_setmcast(sc); 299 300 /* 301 * Set the transmitter control. We want it enabled. 302 */ 303 flags = TCR_ENABLE; 304 305 #ifndef SW_PAD 306 /* 307 * I (GB) have been unlucky getting this to work. 308 */ 309 flags |= TCR_PAD_ENABLE; 310 #endif /* SW_PAD */ 311 312 outw(BASE + TXMIT_CONTROL_REG_W, flags); 313 314 315 /* 316 * Now, enable interrupts 317 */ 318 SMC_SELECT_BANK(2); 319 320 mask = IM_EPH_INT | 321 IM_RX_OVRN_INT | 322 IM_RCV_INT | 323 IM_TX_INT; 324 325 outb(BASE + INTR_MASK_REG_B, mask); 326 sc->intr_mask = mask; 327 sc->pages_wanted = -1; 328 329 330 /* 331 * Mark the interface running but not active. 332 */ 333 ifp->if_flags |= IFF_RUNNING; 334 ifp->if_flags &= ~IFF_OACTIVE; 335 336 /* 337 * Attempt to push out any waiting packets. 338 */ 339 snstart(ifp); 340 } 341 342 343 void 344 snstart(struct ifnet *ifp) 345 { 346 struct sn_softc *sc = ifp->if_softc; 347 u_int len; 348 struct mbuf *m; 349 struct mbuf *top; 350 int pad; 351 int mask; 352 u_short length; 353 u_short numPages; 354 u_char packet_no; 355 int time_out; 356 357 if (ifp->if_flags & IFF_OACTIVE) { 358 return; 359 } 360 if (sc->pages_wanted != -1) { 361 printf("%s: snstart() while memory allocation pending\n", 362 ifp->if_xname); 363 return; 364 } 365 startagain: 366 367 /* 368 * Sneak a peek at the next packet 369 */ 370 m = ifq_poll(&ifp->if_snd); 371 if (m == 0) { 372 return; 373 } 374 /* 375 * Compute the frame length and set pad to give an overall even 376 * number of bytes. Below we assume that the packet length is even. 377 */ 378 for (len = 0, top = m; m; m = m->m_next) 379 len += m->m_len; 380 381 pad = (len & 1); 382 383 /* 384 * We drop packets that are too large. Perhaps we should truncate 385 * them instead? 386 */ 387 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 388 printf("%s: large packet discarded (A)\n", ifp->if_xname); 389 ++sc->arpcom.ac_if.if_oerrors; 390 ifq_dequeue(&ifp->if_snd, m); 391 m_freem(m); 392 goto readcheck; 393 } 394 #ifdef SW_PAD 395 396 /* 397 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 398 */ 399 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 400 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 401 402 #endif /* SW_PAD */ 403 404 length = pad + len; 405 406 /* 407 * The MMU wants the number of pages to be the number of 256 byte 408 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 409 * include space for the status word, byte count and control bytes in 410 * the allocation request. 411 */ 412 numPages = (length + 6) >> 8; 413 414 415 /* 416 * Now, try to allocate the memory 417 */ 418 SMC_SELECT_BANK(2); 419 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 420 421 /* 422 * Wait a short amount of time to see if the allocation request 423 * completes. Otherwise, I enable the interrupt and wait for 424 * completion asyncronously. 425 */ 426 427 time_out = MEMORY_WAIT_TIME; 428 do { 429 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 430 break; 431 } while (--time_out); 432 433 if (!time_out) { 434 435 /* 436 * No memory now. Oh well, wait until the chip finds memory 437 * later. Remember how many pages we were asking for and 438 * enable the allocation completion interrupt. Also set a 439 * watchdog in case we miss the interrupt. We mark the 440 * interface active since there is no point in attempting an 441 * snstart() until after the memory is available. 442 */ 443 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 444 outb(BASE + INTR_MASK_REG_B, mask); 445 sc->intr_mask = mask; 446 447 ifp->if_timer = 1; 448 ifp->if_flags |= IFF_OACTIVE; 449 sc->pages_wanted = numPages; 450 451 return; 452 } 453 /* 454 * The memory allocation completed. Check the results. 455 */ 456 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 457 if (packet_no & ARR_FAILED) { 458 printf("%s: Memory allocation failed\n", ifp->if_xname); 459 goto startagain; 460 } 461 /* 462 * We have a packet number, so tell the card to use it. 463 */ 464 outb(BASE + PACKET_NUM_REG_B, packet_no); 465 466 /* 467 * Point to the beginning of the packet 468 */ 469 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 470 471 /* 472 * Send the packet length (+6 for status, length and control byte) 473 * and the status word (set to zeros) 474 */ 475 outw(BASE + DATA_REG_W, 0); 476 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 477 outb(BASE + DATA_REG_B, (length + 6) >> 8); 478 479 /* 480 * Get the packet from the kernel. This will include the Ethernet 481 * frame header, MAC Addresses etc. 482 */ 483 ifq_dequeue(&ifp->if_snd, m); 484 485 /* 486 * Push out the data to the card. 487 */ 488 for (top = m; m != 0; m = m->m_next) { 489 490 /* 491 * Push out words. 492 */ 493 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 494 495 /* 496 * Push out remaining byte. 497 */ 498 if (m->m_len & 1) 499 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 500 } 501 502 /* 503 * Push out padding. 504 */ 505 while (pad > 1) { 506 outw(BASE + DATA_REG_W, 0); 507 pad -= 2; 508 } 509 if (pad) 510 outb(BASE + DATA_REG_B, 0); 511 512 /* 513 * Push out control byte and unused packet byte The control byte is 0 514 * meaning the packet is even lengthed and no special CRC handling is 515 * desired. 516 */ 517 outw(BASE + DATA_REG_W, 0); 518 519 /* 520 * Enable the interrupts and let the chipset deal with it Also set a 521 * watchdog in case we miss the interrupt. 522 */ 523 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 524 outb(BASE + INTR_MASK_REG_B, mask); 525 sc->intr_mask = mask; 526 527 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 528 529 ifp->if_flags |= IFF_OACTIVE; 530 ifp->if_timer = 1; 531 532 BPF_MTAP(ifp, top); 533 534 ifp->if_opackets++; 535 m_freem(top); 536 537 readcheck: 538 539 /* 540 * Is another packet coming in? We don't want to overflow the tiny 541 * RX FIFO. If nothing has arrived then attempt to queue another 542 * transmit packet. 543 */ 544 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 545 goto startagain; 546 } 547 548 549 550 /* Resume a packet transmit operation after a memory allocation 551 * has completed. 552 * 553 * This is basically a hacked up copy of snstart() which handles 554 * a completed memory allocation the same way snstart() does. 555 * It then passes control to snstart to handle any other queued 556 * packets. 557 */ 558 static void 559 snresume(struct ifnet *ifp) 560 { 561 struct sn_softc *sc = ifp->if_softc; 562 u_int len; 563 struct mbuf *m; 564 struct mbuf *top; 565 int pad; 566 int mask; 567 u_short length; 568 u_short numPages; 569 u_short pages_wanted; 570 u_char packet_no; 571 572 if (sc->pages_wanted < 0) 573 return; 574 575 pages_wanted = sc->pages_wanted; 576 sc->pages_wanted = -1; 577 578 /* 579 * Sneak a peek at the next packet 580 */ 581 m = ifq_poll(&ifp->if_snd); 582 if (m == NULL) { 583 printf("%s: snresume() with nothing to send\n", ifp->if_xname); 584 return; 585 } 586 /* 587 * Compute the frame length and set pad to give an overall even 588 * number of bytes. Below we assume that the packet length is even. 589 */ 590 for (len = 0, top = m; m; m = m->m_next) 591 len += m->m_len; 592 593 pad = (len & 1); 594 595 /* 596 * We drop packets that are too large. Perhaps we should truncate 597 * them instead? 598 */ 599 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 600 printf("%s: large packet discarded (B)\n", ifp->if_xname); 601 ++ifp->if_oerrors; 602 ifq_dequeue(&ifp->if_snd, m); 603 m_freem(m); 604 return; 605 } 606 #ifdef SW_PAD 607 608 /* 609 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 610 */ 611 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 612 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 613 614 #endif /* SW_PAD */ 615 616 length = pad + len; 617 618 619 /* 620 * The MMU wants the number of pages to be the number of 256 byte 621 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 622 * include space for the status word, byte count and control bytes in 623 * the allocation request. 624 */ 625 numPages = (length + 6) >> 8; 626 627 628 SMC_SELECT_BANK(2); 629 630 /* 631 * The memory allocation completed. Check the results. If it failed, 632 * we simply set a watchdog timer and hope for the best. 633 */ 634 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 635 if (packet_no & ARR_FAILED) { 636 printf("%s: Memory allocation failed. Weird.\n", ifp->if_xname); 637 ifp->if_timer = 1; 638 goto try_start; 639 } 640 /* 641 * We have a packet number, so tell the card to use it. 642 */ 643 outb(BASE + PACKET_NUM_REG_B, packet_no); 644 645 /* 646 * Now, numPages should match the pages_wanted recorded when the 647 * memory allocation was initiated. 648 */ 649 if (pages_wanted != numPages) { 650 printf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname); 651 /* 652 * If the allocation was the wrong size we simply release the 653 * memory once it is granted. Wait for the MMU to be un-busy. 654 */ 655 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 656 ; 657 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 658 659 return; 660 } 661 /* 662 * Point to the beginning of the packet 663 */ 664 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 665 666 /* 667 * Send the packet length (+6 for status, length and control byte) 668 * and the status word (set to zeros) 669 */ 670 outw(BASE + DATA_REG_W, 0); 671 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 672 outb(BASE + DATA_REG_B, (length + 6) >> 8); 673 674 /* 675 * Get the packet from the kernel. This will include the Ethernet 676 * frame header, MAC Addresses etc. 677 */ 678 ifq_dequeue(&ifp->if_snd, m); 679 680 /* 681 * Push out the data to the card. 682 */ 683 for (top = m; m != 0; m = m->m_next) { 684 685 /* 686 * Push out words. 687 */ 688 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 689 690 /* 691 * Push out remaining byte. 692 */ 693 if (m->m_len & 1) 694 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 695 } 696 697 /* 698 * Push out padding. 699 */ 700 while (pad > 1) { 701 outw(BASE + DATA_REG_W, 0); 702 pad -= 2; 703 } 704 if (pad) 705 outb(BASE + DATA_REG_B, 0); 706 707 /* 708 * Push out control byte and unused packet byte The control byte is 0 709 * meaning the packet is even lengthed and no special CRC handling is 710 * desired. 711 */ 712 outw(BASE + DATA_REG_W, 0); 713 714 /* 715 * Enable the interrupts and let the chipset deal with it Also set a 716 * watchdog in case we miss the interrupt. 717 */ 718 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 719 outb(BASE + INTR_MASK_REG_B, mask); 720 sc->intr_mask = mask; 721 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 722 723 BPF_MTAP(ifp, top); 724 725 ifp->if_opackets++; 726 m_freem(top); 727 728 try_start: 729 730 /* 731 * Now pass control to snstart() to queue any additional packets 732 */ 733 ifp->if_flags &= ~IFF_OACTIVE; 734 snstart(ifp); 735 736 /* 737 * We've sent something, so we're active. Set a watchdog in case the 738 * TX_EMPTY interrupt is lost. 739 */ 740 ifp->if_flags |= IFF_OACTIVE; 741 ifp->if_timer = 1; 742 } 743 744 745 void 746 sn_intr(void *arg) 747 { 748 int status, interrupts; 749 struct sn_softc *sc = (struct sn_softc *) arg; 750 struct ifnet *ifp = &sc->arpcom.ac_if; 751 752 /* 753 * Chip state registers 754 */ 755 u_char mask; 756 u_char packet_no; 757 u_short tx_status; 758 u_short card_stats; 759 760 /* 761 * Clear the watchdog. 762 */ 763 ifp->if_timer = 0; 764 765 SMC_SELECT_BANK(2); 766 767 /* 768 * Obtain the current interrupt mask and clear the hardware mask 769 * while servicing interrupts. 770 */ 771 mask = inb(BASE + INTR_MASK_REG_B); 772 outb(BASE + INTR_MASK_REG_B, 0x00); 773 774 /* 775 * Get the set of interrupts which occurred and eliminate any which 776 * are masked. 777 */ 778 interrupts = inb(BASE + INTR_STAT_REG_B); 779 status = interrupts & mask; 780 781 /* 782 * Now, process each of the interrupt types. 783 */ 784 785 /* 786 * Receive Overrun. 787 */ 788 if (status & IM_RX_OVRN_INT) { 789 790 /* 791 * Acknowlege Interrupt 792 */ 793 SMC_SELECT_BANK(2); 794 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 795 796 ++sc->arpcom.ac_if.if_ierrors; 797 } 798 /* 799 * Got a packet. 800 */ 801 if (status & IM_RCV_INT) { 802 #if 1 803 int packet_number; 804 805 SMC_SELECT_BANK(2); 806 packet_number = inw(BASE + FIFO_PORTS_REG_W); 807 808 if (packet_number & FIFO_REMPTY) { 809 810 /* 811 * we got called , but nothing was on the FIFO 812 */ 813 printf("sn: Receive interrupt with nothing on FIFO\n"); 814 815 goto out; 816 } 817 #endif 818 snread(ifp); 819 } 820 /* 821 * An on-card memory allocation came through. 822 */ 823 if (status & IM_ALLOC_INT) { 824 825 /* 826 * Disable this interrupt. 827 */ 828 mask &= ~IM_ALLOC_INT; 829 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 830 snresume(&sc->arpcom.ac_if); 831 } 832 /* 833 * TX Completion. Handle a transmit error message. This will only be 834 * called when there is an error, because of the AUTO_RELEASE mode. 835 */ 836 if (status & IM_TX_INT) { 837 838 /* 839 * Acknowlege Interrupt 840 */ 841 SMC_SELECT_BANK(2); 842 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 843 844 packet_no = inw(BASE + FIFO_PORTS_REG_W); 845 packet_no &= FIFO_TX_MASK; 846 847 /* 848 * select this as the packet to read from 849 */ 850 outb(BASE + PACKET_NUM_REG_B, packet_no); 851 852 /* 853 * Position the pointer to the first word from this packet 854 */ 855 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 856 857 /* 858 * Fetch the TX status word. The value found here will be a 859 * copy of the EPH_STATUS_REG_W at the time the transmit 860 * failed. 861 */ 862 tx_status = inw(BASE + DATA_REG_W); 863 864 if (tx_status & EPHSR_TX_SUC) { 865 device_printf(sc->dev, 866 "Successful packet caused interrupt\n"); 867 } else { 868 ++sc->arpcom.ac_if.if_oerrors; 869 } 870 871 if (tx_status & EPHSR_LATCOL) 872 ++sc->arpcom.ac_if.if_collisions; 873 874 /* 875 * Some of these errors will have disabled transmit. 876 * Re-enable transmit now. 877 */ 878 SMC_SELECT_BANK(0); 879 880 #ifdef SW_PAD 881 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 882 #else 883 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 884 #endif /* SW_PAD */ 885 886 /* 887 * kill the failed packet. Wait for the MMU to be un-busy. 888 */ 889 SMC_SELECT_BANK(2); 890 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 891 ; 892 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 893 894 /* 895 * Attempt to queue more transmits. 896 */ 897 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 898 snstart(&sc->arpcom.ac_if); 899 } 900 /* 901 * Transmit underrun. We use this opportunity to update transmit 902 * statistics from the card. 903 */ 904 if (status & IM_TX_EMPTY_INT) { 905 906 /* 907 * Acknowlege Interrupt 908 */ 909 SMC_SELECT_BANK(2); 910 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 911 912 /* 913 * Disable this interrupt. 914 */ 915 mask &= ~IM_TX_EMPTY_INT; 916 917 SMC_SELECT_BANK(0); 918 card_stats = inw(BASE + COUNTER_REG_W); 919 920 /* 921 * Single collisions 922 */ 923 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 924 925 /* 926 * Multiple collisions 927 */ 928 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 929 930 SMC_SELECT_BANK(2); 931 932 /* 933 * Attempt to enqueue some more stuff. 934 */ 935 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 936 snstart(&sc->arpcom.ac_if); 937 } 938 /* 939 * Some other error. Try to fix it by resetting the adapter. 940 */ 941 if (status & IM_EPH_INT) { 942 snstop(sc); 943 sninit(sc); 944 } 945 946 out: 947 /* 948 * Handled all interrupt sources. 949 */ 950 951 SMC_SELECT_BANK(2); 952 953 /* 954 * Reestablish interrupts from mask which have not been deselected 955 * during this interrupt. Note that the hardware mask, which was set 956 * to 0x00 at the start of this service routine, may have been 957 * updated by one or more of the interrupt handers and we must let 958 * those new interrupts stay enabled here. 959 */ 960 mask |= inb(BASE + INTR_MASK_REG_B); 961 outb(BASE + INTR_MASK_REG_B, mask); 962 sc->intr_mask = mask; 963 } 964 965 void 966 snread(struct ifnet *ifp) 967 { 968 struct sn_softc *sc = ifp->if_softc; 969 struct mbuf *m; 970 short status; 971 int packet_number; 972 u_short packet_length; 973 u_char *data; 974 975 SMC_SELECT_BANK(2); 976 #if 0 977 packet_number = inw(BASE + FIFO_PORTS_REG_W); 978 979 if (packet_number & FIFO_REMPTY) { 980 981 /* 982 * we got called , but nothing was on the FIFO 983 */ 984 printf("sn: Receive interrupt with nothing on FIFO\n"); 985 return; 986 } 987 #endif 988 read_another: 989 990 /* 991 * Start reading from the start of the packet. Since PTR_RCV is set, 992 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 993 */ 994 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 995 996 /* 997 * First two words are status and packet_length 998 */ 999 status = inw(BASE + DATA_REG_W); 1000 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1001 1002 /* 1003 * The packet length contains 3 extra words: status, length, and a 1004 * extra word with the control byte. 1005 */ 1006 packet_length -= 6; 1007 1008 /* 1009 * Account for receive errors and discard. 1010 */ 1011 if (status & RS_ERRORS) { 1012 ++ifp->if_ierrors; 1013 goto out; 1014 } 1015 /* 1016 * A packet is received. 1017 */ 1018 1019 /* 1020 * Adjust for odd-length packet. 1021 */ 1022 if (status & RS_ODDFRAME) 1023 packet_length++; 1024 1025 /* 1026 * Allocate a header mbuf from the kernel. 1027 */ 1028 MGETHDR(m, MB_DONTWAIT, MT_DATA); 1029 if (m == NULL) 1030 goto out; 1031 1032 m->m_pkthdr.rcvif = ifp; 1033 m->m_pkthdr.len = m->m_len = packet_length; 1034 1035 /* 1036 * Attach an mbuf cluster 1037 */ 1038 MCLGET(m, MB_DONTWAIT); 1039 1040 /* 1041 * Insist on getting a cluster 1042 */ 1043 if ((m->m_flags & M_EXT) == 0) { 1044 m_freem(m); 1045 ++ifp->if_ierrors; 1046 printf("sn: snread() kernel memory allocation problem\n"); 1047 goto out; 1048 } 1049 1050 /* 1051 * Get packet, including link layer address, from interface. 1052 */ 1053 1054 data = mtod(m, u_char *); 1055 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1056 if (packet_length & 1) { 1057 data += packet_length & ~1; 1058 *data = inb(BASE + DATA_REG_B); 1059 } 1060 ++ifp->if_ipackets; 1061 1062 m->m_pkthdr.len = m->m_len = packet_length; 1063 1064 ifp->if_input(ifp, m); 1065 1066 out: 1067 1068 /* 1069 * Error or good, tell the card to get rid of this packet Wait for 1070 * the MMU to be un-busy. 1071 */ 1072 SMC_SELECT_BANK(2); 1073 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1074 ; 1075 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1076 1077 /* 1078 * Check whether another packet is ready 1079 */ 1080 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1081 if (packet_number & FIFO_REMPTY) { 1082 return; 1083 } 1084 goto read_another; 1085 } 1086 1087 1088 /* 1089 * Handle IOCTLS. This function is completely stolen from if_ep.c 1090 * As with its progenitor, it does not handle hardware address 1091 * changes. 1092 */ 1093 static int 1094 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr) 1095 { 1096 struct sn_softc *sc = ifp->if_softc; 1097 int error = 0; 1098 1099 switch (cmd) { 1100 case SIOCSIFFLAGS: 1101 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1102 ifp->if_flags &= ~IFF_RUNNING; 1103 snstop(sc); 1104 break; 1105 } else { 1106 /* reinitialize card on any parameter change */ 1107 sninit(sc); 1108 break; 1109 } 1110 break; 1111 1112 #ifdef notdef 1113 case SIOCGHWADDR: 1114 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1115 sizeof(sc->sc_addr)); 1116 break; 1117 #endif 1118 1119 case SIOCADDMULTI: 1120 /* update multicast filter list. */ 1121 sn_setmcast(sc); 1122 error = 0; 1123 break; 1124 case SIOCDELMULTI: 1125 /* update multicast filter list. */ 1126 sn_setmcast(sc); 1127 error = 0; 1128 break; 1129 default: 1130 error = ether_ioctl(ifp, cmd, data); 1131 break; 1132 } 1133 1134 return (error); 1135 } 1136 1137 void 1138 snreset(struct sn_softc *sc) 1139 { 1140 snstop(sc); 1141 sninit(sc); 1142 } 1143 1144 void 1145 snwatchdog(struct ifnet *ifp) 1146 { 1147 sn_intr(ifp->if_softc); 1148 } 1149 1150 1151 /* 1. zero the interrupt mask 1152 * 2. clear the enable receive flag 1153 * 3. clear the enable xmit flags 1154 */ 1155 void 1156 snstop(struct sn_softc *sc) 1157 { 1158 1159 struct ifnet *ifp = &sc->arpcom.ac_if; 1160 1161 /* 1162 * Clear interrupt mask; disable all interrupts. 1163 */ 1164 SMC_SELECT_BANK(2); 1165 outb(BASE + INTR_MASK_REG_B, 0x00); 1166 1167 /* 1168 * Disable transmitter and Receiver 1169 */ 1170 SMC_SELECT_BANK(0); 1171 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1172 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1173 1174 /* 1175 * Cancel watchdog. 1176 */ 1177 ifp->if_timer = 0; 1178 } 1179 1180 1181 int 1182 sn_activate(device_t dev) 1183 { 1184 struct sn_softc *sc = device_get_softc(dev); 1185 1186 sc->port_rid = 0; 1187 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1188 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1189 if (!sc->port_res) { 1190 #ifdef SN_DEBUG 1191 device_printf(dev, "Cannot allocate ioport\n"); 1192 #endif 1193 return ENOMEM; 1194 } 1195 1196 sc->irq_rid = 0; 1197 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 1198 RF_ACTIVE); 1199 if (!sc->irq_res) { 1200 #ifdef SN_DEBUG 1201 device_printf(dev, "Cannot allocate irq\n"); 1202 #endif 1203 sn_deactivate(dev); 1204 return ENOMEM; 1205 } 1206 1207 sc->sn_io_addr = rman_get_start(sc->port_res); 1208 return (0); 1209 } 1210 1211 void 1212 sn_deactivate(device_t dev) 1213 { 1214 struct sn_softc *sc = device_get_softc(dev); 1215 1216 if (sc->port_res) 1217 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1218 sc->port_res); 1219 sc->port_res = 0; 1220 if (sc->irq_res) 1221 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1222 sc->irq_res); 1223 sc->irq_res = 0; 1224 return; 1225 } 1226 1227 /* 1228 * Function: sn_probe( device_t dev, int pccard ) 1229 * 1230 * Purpose: 1231 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1232 * Tries to cause as little damage as possible if it's not a SMC chip. 1233 * Returns a 0 on success 1234 * 1235 * Algorithm: 1236 * (1) see if the high byte of BANK_SELECT is 0x33 1237 * (2) compare the ioaddr with the base register's address 1238 * (3) see if I recognize the chip ID in the appropriate register 1239 * 1240 * 1241 */ 1242 int 1243 sn_probe(device_t dev, int pccard) 1244 { 1245 struct sn_softc *sc = device_get_softc(dev); 1246 u_int bank; 1247 u_short revision_register; 1248 u_short base_address_register; 1249 u_short ioaddr; 1250 int err; 1251 1252 if ((err = sn_activate(dev)) != 0) 1253 return err; 1254 1255 ioaddr = sc->sn_io_addr; 1256 1257 /* 1258 * First, see if the high byte is 0x33 1259 */ 1260 bank = inw(ioaddr + BANK_SELECT_REG_W); 1261 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1262 #ifdef SN_DEBUG 1263 device_printf(dev, "test1 failed\n"); 1264 #endif 1265 goto error; 1266 } 1267 /* 1268 * The above MIGHT indicate a device, but I need to write to further 1269 * test this. Go to bank 0, then test that the register still 1270 * reports the high byte is 0x33. 1271 */ 1272 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1273 bank = inw(ioaddr + BANK_SELECT_REG_W); 1274 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1275 #ifdef SN_DEBUG 1276 device_printf(dev, "test2 failed\n"); 1277 #endif 1278 goto error; 1279 } 1280 /* 1281 * well, we've already written once, so hopefully another time won't 1282 * hurt. This time, I need to switch the bank register to bank 1, so 1283 * I can access the base address register. The contents of the 1284 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1285 * to match the I/O port address where the adapter is being probed. 1286 */ 1287 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1288 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1289 1290 /* 1291 * This test is nonsence on PC-card architecture, so if 1292 * pccard == 1, skip this test. (hosokawa) 1293 */ 1294 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1295 1296 /* 1297 * Well, the base address register didn't match. Must not 1298 * have been a SMC chip after all. 1299 */ 1300 /* 1301 * printf("sn: ioaddr %x doesn't match card configuration 1302 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1303 */ 1304 1305 #ifdef SN_DEBUG 1306 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1307 "base_address_register = 0x%x\n", ioaddr, 1308 base_address_register >> 3 & 0x3E0); 1309 #endif 1310 goto error; 1311 } 1312 /* 1313 * Check if the revision register is something that I recognize. 1314 * These might need to be added to later, as future revisions could 1315 * be added. 1316 */ 1317 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1318 revision_register = inw(ioaddr + REVISION_REG_W); 1319 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1320 1321 /* 1322 * I don't regonize this chip, so... 1323 */ 1324 #ifdef SN_DEBUG 1325 device_printf(dev, "test4 failed\n"); 1326 #endif 1327 goto error; 1328 } 1329 /* 1330 * at this point I'll assume that the chip is an SMC9xxx. It might be 1331 * prudent to check a listing of MAC addresses against the hardware 1332 * address, or do some other tests. 1333 */ 1334 sn_deactivate(dev); 1335 return 0; 1336 error: 1337 sn_deactivate(dev); 1338 return ENXIO; 1339 } 1340 1341 #define MCFSZ 8 1342 1343 static void 1344 sn_setmcast(struct sn_softc *sc) 1345 { 1346 struct ifnet *ifp = (struct ifnet *)sc; 1347 int flags; 1348 1349 /* 1350 * Set the receiver filter. We want receive enabled and auto strip 1351 * of CRC from received packet. If we are promiscuous then set that 1352 * bit too. 1353 */ 1354 flags = RCR_ENABLE | RCR_STRIP_CRC; 1355 1356 if (ifp->if_flags & IFF_PROMISC) { 1357 flags |= RCR_PROMISC | RCR_ALMUL; 1358 } else if (ifp->if_flags & IFF_ALLMULTI) { 1359 flags |= RCR_ALMUL; 1360 } else { 1361 u_char mcf[MCFSZ]; 1362 if (sn_getmcf(&sc->arpcom, mcf)) { 1363 /* set filter */ 1364 SMC_SELECT_BANK(3); 1365 outw(BASE + MULTICAST1_REG_W, 1366 ((u_short)mcf[1] << 8) | mcf[0]); 1367 outw(BASE + MULTICAST2_REG_W, 1368 ((u_short)mcf[3] << 8) | mcf[2]); 1369 outw(BASE + MULTICAST3_REG_W, 1370 ((u_short)mcf[5] << 8) | mcf[4]); 1371 outw(BASE + MULTICAST4_REG_W, 1372 ((u_short)mcf[7] << 8) | mcf[6]); 1373 } else { 1374 flags |= RCR_ALMUL; 1375 } 1376 } 1377 SMC_SELECT_BANK(0); 1378 outw(BASE + RECV_CONTROL_REG_W, flags); 1379 } 1380 1381 static int 1382 sn_getmcf(struct arpcom *ac, u_char *mcf) 1383 { 1384 int i; 1385 u_int index, index2; 1386 u_char *af = (u_char *) mcf; 1387 struct ifmultiaddr *ifma; 1388 1389 bzero(mcf, MCFSZ); 1390 1391 LIST_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) { 1392 if (ifma->ifma_addr->sa_family != AF_LINK) 1393 return 0; 1394 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1395 index2 = 0; 1396 for (i = 0; i < 6; i++) { 1397 index2 <<= 1; 1398 index2 |= (index & 0x01); 1399 index >>= 1; 1400 } 1401 af[index2 >> 3] |= 1 << (index2 & 7); 1402 } 1403 return 1; /* use multicast filter */ 1404 } 1405 1406 static u_int 1407 smc_crc(u_char *s) 1408 { 1409 int perByte; 1410 int perBit; 1411 const u_int poly = 0xedb88320; 1412 u_int v = 0xffffffff; 1413 u_char c; 1414 1415 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1416 c = s[perByte]; 1417 for (perBit = 0; perBit < 8; perBit++) { 1418 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1419 c >>= 1; 1420 } 1421 } 1422 return v; 1423 } 1424