1 /*
2 * Double-precision vector log(x) function - inline version
3 *
4 * Copyright (c) 2019-2023, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8 #include "v_math.h"
9 #include "math_config.h"
10
11 #ifndef V_LOG_INLINE_POLY_ORDER
12 # error Cannot use inline log helper without specifying poly order (options are 4 or 5)
13 #endif
14
15 #if V_LOG_INLINE_POLY_ORDER == 4
16 # define POLY \
17 { \
18 V2 (-0x1.ffffffffcbad3p-2), V2 (0x1.555555578ed68p-2), \
19 V2 (-0x1.0000d3a1e7055p-2), V2 (0x1.999392d02a63ep-3) \
20 }
21 #elif V_LOG_INLINE_POLY_ORDER == 5
22 # define POLY \
23 { \
24 V2 (-0x1.ffffffffffff7p-2), V2 (0x1.55555555170d4p-2), \
25 V2 (-0x1.0000000399c27p-2), V2 (0x1.999b2e90e94cap-3), \
26 V2 (-0x1.554e550bd501ep-3) \
27 }
28 #else
29 # error Can only choose order 4 or 5 for log poly
30 #endif
31
32 struct v_log_inline_data
33 {
34 float64x2_t poly[V_LOG_INLINE_POLY_ORDER];
35 float64x2_t ln2;
36 uint64x2_t off, sign_exp_mask;
37 };
38
39 #define V_LOG_CONSTANTS \
40 { \
41 .poly = POLY, .ln2 = V2 (0x1.62e42fefa39efp-1), \
42 .sign_exp_mask = V2 (0xfff0000000000000), .off = V2 (0x3fe6900900000000) \
43 }
44
45 #define A(i) d->poly[i]
46 #define N (1 << V_LOG_TABLE_BITS)
47 #define IndexMask (N - 1)
48
49 struct entry
50 {
51 float64x2_t invc;
52 float64x2_t logc;
53 };
54
55 static inline struct entry
log_lookup(uint64x2_t i)56 log_lookup (uint64x2_t i)
57 {
58 /* Since N is a power of 2, n % N = n & (N - 1). */
59 struct entry e;
60 uint64_t i0 = (i[0] >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
61 uint64_t i1 = (i[1] >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
62 float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc);
63 float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc);
64 e.invc = vuzp1q_f64 (e0, e1);
65 e.logc = vuzp2q_f64 (e0, e1);
66 return e;
67 }
68
69 static inline float64x2_t
v_log_inline(float64x2_t x,const struct v_log_inline_data * d)70 v_log_inline (float64x2_t x, const struct v_log_inline_data *d)
71 {
72 float64x2_t z, r, r2, p, y, kd, hi;
73 uint64x2_t ix, iz, tmp;
74 int64x2_t k;
75 struct entry e;
76
77 ix = vreinterpretq_u64_f64 (x);
78
79 /* x = 2^k z; where z is in range [Off,2*Off) and exact.
80 The range is split into N subintervals.
81 The ith subinterval contains z and c is near its center. */
82 tmp = vsubq_u64 (ix, d->off);
83 k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */
84 iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask));
85 z = vreinterpretq_f64_u64 (iz);
86 e = log_lookup (tmp);
87
88 /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */
89 r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
90 kd = vcvtq_f64_s64 (k);
91
92 /* hi = r + log(c) + k*Ln2. */
93 hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2);
94 /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */
95 r2 = vmulq_f64 (r, r);
96 y = vfmaq_f64 (A (2), A (3), r);
97 p = vfmaq_f64 (A (0), A (1), r);
98 #if V_LOG_POLY_ORDER == 5
99 y = vfmaq_f64 (y, A (4), r2);
100 #endif
101 y = vfmaq_f64 (p, y, r2);
102
103 return vfmaq_f64 (hi, y, r2);
104 }
105