1 //===-- llvm/CodeGen/TargetFrameLowering.h ----------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Interface to describe the layout of a stack frame on the target machine. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H 14 #define LLVM_CODEGEN_TARGETFRAMELOWERING_H 15 16 #include "llvm/CodeGen/MachineBasicBlock.h" 17 #include "llvm/Support/TypeSize.h" 18 #include <vector> 19 20 namespace llvm { 21 class BitVector; 22 class CalleeSavedInfo; 23 class MachineFunction; 24 class RegScavenger; 25 26 namespace TargetStackID { 27 enum Value { 28 Default = 0, 29 SGPRSpill = 1, 30 ScalableVector = 2, 31 WasmLocal = 3, 32 NoAlloc = 255 33 }; 34 } 35 36 /// Information about stack frame layout on the target. It holds the direction 37 /// of stack growth, the known stack alignment on entry to each function, and 38 /// the offset to the locals area. 39 /// 40 /// The offset to the local area is the offset from the stack pointer on 41 /// function entry to the first location where function data (local variables, 42 /// spill locations) can be stored. 43 class TargetFrameLowering { 44 public: 45 enum StackDirection { 46 StackGrowsUp, // Adding to the stack increases the stack address 47 StackGrowsDown // Adding to the stack decreases the stack address 48 }; 49 50 // Maps a callee saved register to a stack slot with a fixed offset. 51 struct SpillSlot { 52 unsigned Reg; 53 int Offset; // Offset relative to stack pointer on function entry. 54 }; 55 56 struct DwarfFrameBase { 57 // The frame base may be either a register (the default), the CFA, 58 // or a WebAssembly-specific location description. 59 enum FrameBaseKind { Register, CFA, WasmFrameBase } Kind; 60 struct WasmFrameBase { 61 unsigned Kind; // Wasm local, global, or value stack 62 unsigned Index; 63 }; 64 union { 65 unsigned Reg; 66 struct WasmFrameBase WasmLoc; 67 } Location; 68 }; 69 70 private: 71 StackDirection StackDir; 72 Align StackAlignment; 73 Align TransientStackAlignment; 74 int LocalAreaOffset; 75 bool StackRealignable; 76 public: 77 TargetFrameLowering(StackDirection D, Align StackAl, int LAO, 78 Align TransAl = Align(1), bool StackReal = true) 79 : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl), 80 LocalAreaOffset(LAO), StackRealignable(StackReal) {} 81 82 virtual ~TargetFrameLowering(); 83 84 // These methods return information that describes the abstract stack layout 85 // of the target machine. 86 87 /// getStackGrowthDirection - Return the direction the stack grows 88 /// 89 StackDirection getStackGrowthDirection() const { return StackDir; } 90 91 /// getStackAlignment - This method returns the number of bytes to which the 92 /// stack pointer must be aligned on entry to a function. Typically, this 93 /// is the largest alignment for any data object in the target. 94 /// 95 unsigned getStackAlignment() const { return StackAlignment.value(); } 96 /// getStackAlignment - This method returns the number of bytes to which the 97 /// stack pointer must be aligned on entry to a function. Typically, this 98 /// is the largest alignment for any data object in the target. 99 /// 100 Align getStackAlign() const { return StackAlignment; } 101 102 /// alignSPAdjust - This method aligns the stack adjustment to the correct 103 /// alignment. 104 /// 105 int alignSPAdjust(int SPAdj) const { 106 if (SPAdj < 0) { 107 SPAdj = -alignTo(-SPAdj, StackAlignment); 108 } else { 109 SPAdj = alignTo(SPAdj, StackAlignment); 110 } 111 return SPAdj; 112 } 113 114 /// getTransientStackAlignment - This method returns the number of bytes to 115 /// which the stack pointer must be aligned at all times, even between 116 /// calls. 117 /// 118 Align getTransientStackAlign() const { return TransientStackAlignment; } 119 120 /// isStackRealignable - This method returns whether the stack can be 121 /// realigned. 122 bool isStackRealignable() const { 123 return StackRealignable; 124 } 125 126 /// Return the skew that has to be applied to stack alignment under 127 /// certain conditions (e.g. stack was adjusted before function \p MF 128 /// was called). 129 virtual unsigned getStackAlignmentSkew(const MachineFunction &MF) const; 130 131 /// This method returns whether or not it is safe for an object with the 132 /// given stack id to be bundled into the local area. 133 virtual bool isStackIdSafeForLocalArea(unsigned StackId) const { 134 return true; 135 } 136 137 /// getOffsetOfLocalArea - This method returns the offset of the local area 138 /// from the stack pointer on entrance to a function. 139 /// 140 int getOffsetOfLocalArea() const { return LocalAreaOffset; } 141 142 /// Control the placement of special register scavenging spill slots when 143 /// allocating a stack frame. 144 /// 145 /// If this returns true, the frame indexes used by the RegScavenger will be 146 /// allocated closest to the incoming stack pointer. 147 virtual bool allocateScavengingFrameIndexesNearIncomingSP( 148 const MachineFunction &MF) const; 149 150 /// assignCalleeSavedSpillSlots - Allows target to override spill slot 151 /// assignment logic. If implemented, assignCalleeSavedSpillSlots() should 152 /// assign frame slots to all CSI entries and return true. If this method 153 /// returns false, spill slots will be assigned using generic implementation. 154 /// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of 155 /// CSI. 156 virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF, 157 const TargetRegisterInfo *TRI, 158 std::vector<CalleeSavedInfo> &CSI, 159 unsigned &MinCSFrameIndex, 160 unsigned &MaxCSFrameIndex) const { 161 return assignCalleeSavedSpillSlots(MF, TRI, CSI); 162 } 163 164 virtual bool 165 assignCalleeSavedSpillSlots(MachineFunction &MF, 166 const TargetRegisterInfo *TRI, 167 std::vector<CalleeSavedInfo> &CSI) const { 168 return false; 169 } 170 171 /// getCalleeSavedSpillSlots - This method returns a pointer to an array of 172 /// pairs, that contains an entry for each callee saved register that must be 173 /// spilled to a particular stack location if it is spilled. 174 /// 175 /// Each entry in this array contains a <register,offset> pair, indicating the 176 /// fixed offset from the incoming stack pointer that each register should be 177 /// spilled at. If a register is not listed here, the code generator is 178 /// allowed to spill it anywhere it chooses. 179 /// 180 virtual const SpillSlot * 181 getCalleeSavedSpillSlots(unsigned &NumEntries) const { 182 NumEntries = 0; 183 return nullptr; 184 } 185 186 /// targetHandlesStackFrameRounding - Returns true if the target is 187 /// responsible for rounding up the stack frame (probably at emitPrologue 188 /// time). 189 virtual bool targetHandlesStackFrameRounding() const { 190 return false; 191 } 192 193 /// Returns true if the target will correctly handle shrink wrapping. 194 virtual bool enableShrinkWrapping(const MachineFunction &MF) const { 195 return false; 196 } 197 198 /// Returns true if the stack slot holes in the fixed and callee-save stack 199 /// area should be used when allocating other stack locations to reduce stack 200 /// size. 201 virtual bool enableStackSlotScavenging(const MachineFunction &MF) const { 202 return false; 203 } 204 205 /// Returns true if the target can safely skip saving callee-saved registers 206 /// for noreturn nounwind functions. 207 virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const; 208 209 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 210 /// the function. 211 virtual void emitPrologue(MachineFunction &MF, 212 MachineBasicBlock &MBB) const = 0; 213 virtual void emitEpilogue(MachineFunction &MF, 214 MachineBasicBlock &MBB) const = 0; 215 216 /// emitZeroCallUsedRegs - Zeros out call used registers. 217 virtual void emitZeroCallUsedRegs(BitVector RegsToZero, 218 MachineBasicBlock &MBB) const {} 219 220 /// With basic block sections, emit callee saved frame moves for basic blocks 221 /// that are in a different section. 222 virtual void 223 emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB, 224 MachineBasicBlock::iterator MBBI) const {} 225 226 /// Returns true if we may need to fix the unwind information for the 227 /// function. 228 virtual bool enableCFIFixup(MachineFunction &MF) const; 229 230 /// Emit CFI instructions that recreate the state of the unwind information 231 /// upon fucntion entry. 232 virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {} 233 234 /// Replace a StackProbe stub (if any) with the actual probe code inline 235 virtual void inlineStackProbe(MachineFunction &MF, 236 MachineBasicBlock &PrologueMBB) const {} 237 238 /// Does the stack probe function call return with a modified stack pointer? 239 virtual bool stackProbeFunctionModifiesSP() const { return false; } 240 241 /// Adjust the prologue to have the function use segmented stacks. This works 242 /// by adding a check even before the "normal" function prologue. 243 virtual void adjustForSegmentedStacks(MachineFunction &MF, 244 MachineBasicBlock &PrologueMBB) const {} 245 246 /// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in 247 /// the assembly prologue to explicitly handle the stack. 248 virtual void adjustForHiPEPrologue(MachineFunction &MF, 249 MachineBasicBlock &PrologueMBB) const {} 250 251 /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee 252 /// saved registers and returns true if it isn't possible / profitable to do 253 /// so by issuing a series of store instructions via 254 /// storeRegToStackSlot(). Returns false otherwise. 255 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 256 MachineBasicBlock::iterator MI, 257 ArrayRef<CalleeSavedInfo> CSI, 258 const TargetRegisterInfo *TRI) const { 259 return false; 260 } 261 262 /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee 263 /// saved registers and returns true if it isn't possible / profitable to do 264 /// so by issuing a series of load instructions via loadRegToStackSlot(). 265 /// If it returns true, and any of the registers in CSI is not restored, 266 /// it sets the corresponding Restored flag in CSI to false. 267 /// Returns false otherwise. 268 virtual bool 269 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 270 MachineBasicBlock::iterator MI, 271 MutableArrayRef<CalleeSavedInfo> CSI, 272 const TargetRegisterInfo *TRI) const { 273 return false; 274 } 275 276 /// Return true if the target wants to keep the frame pointer regardless of 277 /// the function attribute "frame-pointer". 278 virtual bool keepFramePointer(const MachineFunction &MF) const { 279 return false; 280 } 281 282 /// hasFP - Return true if the specified function should have a dedicated 283 /// frame pointer register. For most targets this is true only if the function 284 /// has variable sized allocas or if frame pointer elimination is disabled. 285 virtual bool hasFP(const MachineFunction &MF) const = 0; 286 287 /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is 288 /// not required, we reserve argument space for call sites in the function 289 /// immediately on entry to the current function. This eliminates the need for 290 /// add/sub sp brackets around call sites. Returns true if the call frame is 291 /// included as part of the stack frame. 292 virtual bool hasReservedCallFrame(const MachineFunction &MF) const { 293 return !hasFP(MF); 294 } 295 296 /// canSimplifyCallFramePseudos - When possible, it's best to simplify the 297 /// call frame pseudo ops before doing frame index elimination. This is 298 /// possible only when frame index references between the pseudos won't 299 /// need adjusting for the call frame adjustments. Normally, that's true 300 /// if the function has a reserved call frame or a frame pointer. Some 301 /// targets (Thumb2, for example) may have more complicated criteria, 302 /// however, and can override this behavior. 303 virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const { 304 return hasReservedCallFrame(MF) || hasFP(MF); 305 } 306 307 // needsFrameIndexResolution - Do we need to perform FI resolution for 308 // this function. Normally, this is required only when the function 309 // has any stack objects. However, targets may want to override this. 310 virtual bool needsFrameIndexResolution(const MachineFunction &MF) const; 311 312 /// getFrameIndexReference - This method should return the base register 313 /// and offset used to reference a frame index location. The offset is 314 /// returned directly, and the base register is returned via FrameReg. 315 virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 316 Register &FrameReg) const; 317 318 /// Same as \c getFrameIndexReference, except that the stack pointer (as 319 /// opposed to the frame pointer) will be the preferred value for \p 320 /// FrameReg. This is generally used for emitting statepoint or EH tables that 321 /// use offsets from RSP. If \p IgnoreSPUpdates is true, the returned 322 /// offset is only guaranteed to be valid with respect to the value of SP at 323 /// the end of the prologue. 324 virtual StackOffset 325 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, 326 Register &FrameReg, 327 bool IgnoreSPUpdates) const { 328 // Always safe to dispatch to getFrameIndexReference. 329 return getFrameIndexReference(MF, FI, FrameReg); 330 } 331 332 /// getNonLocalFrameIndexReference - This method returns the offset used to 333 /// reference a frame index location. The offset can be from either FP/BP/SP 334 /// based on which base register is returned by llvm.localaddress. 335 virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF, 336 int FI) const { 337 // By default, dispatch to getFrameIndexReference. Interested targets can 338 // override this. 339 Register FrameReg; 340 return getFrameIndexReference(MF, FI, FrameReg); 341 } 342 343 /// Returns the callee-saved registers as computed by determineCalleeSaves 344 /// in the BitVector \p SavedRegs. 345 virtual void getCalleeSaves(const MachineFunction &MF, 346 BitVector &SavedRegs) const; 347 348 /// This method determines which of the registers reported by 349 /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved. 350 /// The default implementation checks populates the \p SavedRegs bitset with 351 /// all registers which are modified in the function, targets may override 352 /// this function to save additional registers. 353 /// This method also sets up the register scavenger ensuring there is a free 354 /// register or a frameindex available. 355 /// This method should not be called by any passes outside of PEI, because 356 /// it may change state passed in by \p MF and \p RS. The preferred 357 /// interface outside PEI is getCalleeSaves. 358 virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 359 RegScavenger *RS = nullptr) const; 360 361 /// processFunctionBeforeFrameFinalized - This method is called immediately 362 /// before the specified function's frame layout (MF.getFrameInfo()) is 363 /// finalized. Once the frame is finalized, MO_FrameIndex operands are 364 /// replaced with direct constants. This method is optional. 365 /// 366 virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF, 367 RegScavenger *RS = nullptr) const { 368 } 369 370 /// processFunctionBeforeFrameIndicesReplaced - This method is called 371 /// immediately before MO_FrameIndex operands are eliminated, but after the 372 /// frame is finalized. This method is optional. 373 virtual void 374 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, 375 RegScavenger *RS = nullptr) const {} 376 377 virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const { 378 report_fatal_error("WinEH not implemented for this target"); 379 } 380 381 /// This method is called during prolog/epilog code insertion to eliminate 382 /// call frame setup and destroy pseudo instructions (but only if the Target 383 /// is using them). It is responsible for eliminating these instructions, 384 /// replacing them with concrete instructions. This method need only be 385 /// implemented if using call frame setup/destroy pseudo instructions. 386 /// Returns an iterator pointing to the instruction after the replaced one. 387 virtual MachineBasicBlock::iterator 388 eliminateCallFramePseudoInstr(MachineFunction &MF, 389 MachineBasicBlock &MBB, 390 MachineBasicBlock::iterator MI) const { 391 llvm_unreachable("Call Frame Pseudo Instructions do not exist on this " 392 "target!"); 393 } 394 395 396 /// Order the symbols in the local stack frame. 397 /// The list of objects that we want to order is in \p objectsToAllocate as 398 /// indices into the MachineFrameInfo. The array can be reordered in any way 399 /// upon return. The contents of the array, however, may not be modified (i.e. 400 /// only their order may be changed). 401 /// By default, just maintain the original order. 402 virtual void 403 orderFrameObjects(const MachineFunction &MF, 404 SmallVectorImpl<int> &objectsToAllocate) const { 405 } 406 407 /// Check whether or not the given \p MBB can be used as a prologue 408 /// for the target. 409 /// The prologue will be inserted first in this basic block. 410 /// This method is used by the shrink-wrapping pass to decide if 411 /// \p MBB will be correctly handled by the target. 412 /// As soon as the target enable shrink-wrapping without overriding 413 /// this method, we assume that each basic block is a valid 414 /// prologue. 415 virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const { 416 return true; 417 } 418 419 /// Check whether or not the given \p MBB can be used as a epilogue 420 /// for the target. 421 /// The epilogue will be inserted before the first terminator of that block. 422 /// This method is used by the shrink-wrapping pass to decide if 423 /// \p MBB will be correctly handled by the target. 424 /// As soon as the target enable shrink-wrapping without overriding 425 /// this method, we assume that each basic block is a valid 426 /// epilogue. 427 virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const { 428 return true; 429 } 430 431 /// Returns the StackID that scalable vectors should be associated with. 432 virtual TargetStackID::Value getStackIDForScalableVectors() const { 433 return TargetStackID::Default; 434 } 435 436 virtual bool isSupportedStackID(TargetStackID::Value ID) const { 437 switch (ID) { 438 default: 439 return false; 440 case TargetStackID::Default: 441 case TargetStackID::NoAlloc: 442 return true; 443 } 444 } 445 446 /// Check if given function is safe for not having callee saved registers. 447 /// This is used when interprocedural register allocation is enabled. 448 static bool isSafeForNoCSROpt(const Function &F); 449 450 /// Check if the no-CSR optimisation is profitable for the given function. 451 virtual bool isProfitableForNoCSROpt(const Function &F) const { 452 return true; 453 } 454 455 /// Return initial CFA offset value i.e. the one valid at the beginning of the 456 /// function (before any stack operations). 457 virtual int getInitialCFAOffset(const MachineFunction &MF) const; 458 459 /// Return initial CFA register value i.e. the one valid at the beginning of 460 /// the function (before any stack operations). 461 virtual Register getInitialCFARegister(const MachineFunction &MF) const; 462 463 /// Return the frame base information to be encoded in the DWARF subprogram 464 /// debug info. 465 virtual DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const; 466 }; 467 468 } // End llvm namespace 469 470 #endif 471