1 /*-
2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26 #include <sys/param.h>
27 #include <sys/systm.h>
28 #include <sys/bus.h>
29 #include <sys/kernel.h>
30 #include <sys/lock.h>
31 #include <sys/mutex.h>
32 #include <sys/smp.h>
33
34 #include <vm/vm.h>
35 #include <vm/pmap.h>
36
37 #include <machine/cpu.h>
38 #include <machine/intr.h>
39 #include <machine/fdt.h>
40 #include <machine/smp.h>
41 #include <machine/platformvar.h>
42 #include <machine/pmap.h>
43
44 #include <arm/nvidia/tegra124/tegra124_mp.h>
45
46 #define PMC_PHYSBASE 0x7000e400
47 #define PMC_SIZE 0x400
48 #define PMC_CONTROL_REG 0x0
49 #define PMC_PWRGATE_TOGGLE 0x30
50 #define PCM_PWRGATE_TOGGLE_START (1 << 8)
51 #define PMC_PWRGATE_STATUS 0x38
52
53 #define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000 /* exception vectors */
54 #define TEGRA_EXCEPTION_VECTORS_SIZE 1024
55 #define TEGRA_EXCEPTION_VECTOR_ENTRY 0x100
56
57 void
tegra124_mp_setmaxid(platform_t plat)58 tegra124_mp_setmaxid(platform_t plat)
59 {
60 int ncpu;
61
62 /* If we've already set the global vars don't bother to do it again. */
63 if (mp_ncpus != 0)
64 return;
65
66 /* Read current CP15 Cache Size ID Register */
67 ncpu = cp15_l2ctlr_get();
68 ncpu = CPUV7_L2CTLR_NPROC(ncpu);
69
70 mp_ncpus = ncpu;
71 mp_maxid = ncpu - 1;
72 }
73
74 void
tegra124_mp_start_ap(platform_t plat)75 tegra124_mp_start_ap(platform_t plat)
76 {
77 bus_space_handle_t pmc;
78 bus_space_handle_t exvec;
79 int i;
80 uint32_t val;
81 uint32_t mask;
82
83 if (bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc) != 0)
84 panic("Couldn't map the PMC\n");
85 if (bus_space_map(fdtbus_bs_tag, TEGRA_EXCEPTION_VECTORS_BASE,
86 TEGRA_EXCEPTION_VECTORS_SIZE, 0, &exvec) != 0)
87 panic("Couldn't map the exception vectors\n");
88
89 bus_space_write_4(fdtbus_bs_tag, exvec , TEGRA_EXCEPTION_VECTOR_ENTRY,
90 pmap_kextract((vm_offset_t)mpentry));
91 bus_space_read_4(fdtbus_bs_tag, exvec , TEGRA_EXCEPTION_VECTOR_ENTRY);
92
93 /* Wait until POWERGATE is ready (max 20 APB cycles). */
94 do {
95 val = bus_space_read_4(fdtbus_bs_tag, pmc,
96 PMC_PWRGATE_TOGGLE);
97 } while ((val & PCM_PWRGATE_TOGGLE_START) != 0);
98
99 for (i = 1; i < mp_ncpus; i++) {
100 val = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_PWRGATE_STATUS);
101 mask = 1 << (i + 8); /* cpu mask */
102 if ((val & mask) == 0) {
103 /* Wait until POWERGATE is ready (max 20 APB cycles). */
104 do {
105 val = bus_space_read_4(fdtbus_bs_tag, pmc,
106 PMC_PWRGATE_TOGGLE);
107 } while ((val & PCM_PWRGATE_TOGGLE_START) != 0);
108 bus_space_write_4(fdtbus_bs_tag, pmc,
109 PMC_PWRGATE_TOGGLE,
110 PCM_PWRGATE_TOGGLE_START | (8 + i));
111
112 /* Wait until CPU is powered */
113 do {
114 val = bus_space_read_4(fdtbus_bs_tag, pmc,
115 PMC_PWRGATE_STATUS);
116 } while ((val & mask) == 0);
117 }
118 }
119 dsb();
120 sev();
121 bus_space_unmap(fdtbus_bs_tag, pmc, PMC_SIZE);
122 bus_space_unmap(fdtbus_bs_tag, exvec, TEGRA_EXCEPTION_VECTORS_SIZE);
123 }
124