1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
5 * Copyright (c) 2017 Manuel Stuehn
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29 #include <sys/cdefs.h>
30 #include <sys/poll.h>
31 #include <sys/time.h>
32 #include <sys/uio.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/fcntl.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/kernel.h>
39 #include <sys/lock.h>
40 #include <sys/module.h>
41 #include <sys/malloc.h>
42 #include <sys/mutex.h>
43 #include <sys/rman.h>
44 #include <sys/types.h>
45 #include <sys/sysctl.h>
46 #include <sys/event.h>
47 #include <sys/selinfo.h>
48 #include <machine/bus.h>
49 #include <machine/cpu.h>
50 #include <machine/frame.h>
51 #include <machine/intr.h>
52 #include <machine/atomic.h>
53
54 #include <dev/ofw/openfirm.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
57
58 #include <dev/clk/clk.h>
59
60 #include <arm/ti/ti_sysc.h>
61 #include <arm/ti/ti_pruss.h>
62 #include <arm/ti/ti_prm.h>
63
64 #ifdef DEBUG
65 #define DPRINTF(fmt, ...) do { \
66 printf("%s: ", __func__); \
67 printf(fmt, __VA_ARGS__); \
68 } while (0)
69 #else
70 #define DPRINTF(fmt, ...)
71 #endif
72
73 static d_open_t ti_pruss_irq_open;
74 static d_read_t ti_pruss_irq_read;
75 static d_poll_t ti_pruss_irq_poll;
76
77 static device_probe_t ti_pruss_probe;
78 static device_attach_t ti_pruss_attach;
79 static device_detach_t ti_pruss_detach;
80 static void ti_pruss_intr(void *);
81 static d_open_t ti_pruss_open;
82 static d_mmap_t ti_pruss_mmap;
83 static void ti_pruss_irq_kqread_detach(struct knote *);
84 static int ti_pruss_irq_kqevent(struct knote *, long);
85 static d_kqfilter_t ti_pruss_irq_kqfilter;
86 static void ti_pruss_privdtor(void *data);
87
88 #define TI_PRUSS_PRU_IRQS 2
89 #define TI_PRUSS_HOST_IRQS 8
90 #define TI_PRUSS_IRQS (TI_PRUSS_HOST_IRQS+TI_PRUSS_PRU_IRQS)
91 #define TI_PRUSS_EVENTS 64
92 #define NOT_SET_STR "NONE"
93 #define TI_TS_ARRAY 16
94
95 struct ctl
96 {
97 size_t cnt;
98 size_t idx;
99 };
100
101 struct ts_ring_buf
102 {
103 struct ctl ctl;
104 uint64_t ts[TI_TS_ARRAY];
105 };
106
107 struct ti_pruss_irqsc
108 {
109 struct mtx sc_mtx;
110 struct cdev *sc_pdev;
111 struct selinfo sc_selinfo;
112 int8_t channel;
113 int8_t last;
114 int8_t event;
115 bool enable;
116 struct ts_ring_buf tstamps;
117 };
118
119 static struct cdevsw ti_pruss_cdevirq = {
120 .d_version = D_VERSION,
121 .d_name = "ti_pruss_irq",
122 .d_open = ti_pruss_irq_open,
123 .d_read = ti_pruss_irq_read,
124 .d_poll = ti_pruss_irq_poll,
125 .d_kqfilter = ti_pruss_irq_kqfilter,
126 };
127
128 struct ti_pruss_softc {
129 struct mtx sc_mtx;
130 struct resource *sc_mem_res;
131 struct resource *sc_irq_res[TI_PRUSS_HOST_IRQS];
132 void *sc_intr[TI_PRUSS_HOST_IRQS];
133 struct ti_pruss_irqsc sc_irq_devs[TI_PRUSS_IRQS];
134 bus_space_tag_t sc_bt;
135 bus_space_handle_t sc_bh;
136 struct cdev *sc_pdev;
137 struct selinfo sc_selinfo;
138 bool sc_glob_irqen;
139 };
140
141 static struct cdevsw ti_pruss_cdevsw = {
142 .d_version = D_VERSION,
143 .d_name = "ti_pruss",
144 .d_open = ti_pruss_open,
145 .d_mmap = ti_pruss_mmap,
146 };
147
148 static device_method_t ti_pruss_methods[] = {
149 DEVMETHOD(device_probe, ti_pruss_probe),
150 DEVMETHOD(device_attach, ti_pruss_attach),
151 DEVMETHOD(device_detach, ti_pruss_detach),
152
153 DEVMETHOD_END
154 };
155
156 static driver_t ti_pruss_driver = {
157 "ti_pruss",
158 ti_pruss_methods,
159 sizeof(struct ti_pruss_softc)
160 };
161
162 DRIVER_MODULE(ti_pruss, simplebus, ti_pruss_driver, 0, 0);
163 MODULE_DEPEND(ti_pruss, ti_sysc, 1, 1, 1);
164 MODULE_DEPEND(ti_pruss, ti_prm, 1, 1, 1);
165
166 static struct resource_spec ti_pruss_irq_spec[] = {
167 { SYS_RES_IRQ, 0, RF_ACTIVE },
168 { SYS_RES_IRQ, 1, RF_ACTIVE },
169 { SYS_RES_IRQ, 2, RF_ACTIVE },
170 { SYS_RES_IRQ, 3, RF_ACTIVE },
171 { SYS_RES_IRQ, 4, RF_ACTIVE },
172 { SYS_RES_IRQ, 5, RF_ACTIVE },
173 { SYS_RES_IRQ, 6, RF_ACTIVE },
174 { SYS_RES_IRQ, 7, RF_ACTIVE },
175 { -1, 0, 0 }
176 };
177 CTASSERT(TI_PRUSS_HOST_IRQS == nitems(ti_pruss_irq_spec) - 1);
178
179 static int
ti_pruss_irq_open(struct cdev * dev,int oflags,int devtype,struct thread * td)180 ti_pruss_irq_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
181 {
182 struct ctl* irqs;
183 struct ti_pruss_irqsc *sc;
184 sc = dev->si_drv1;
185
186 irqs = malloc(sizeof(struct ctl), M_DEVBUF, M_WAITOK);
187 if (!irqs)
188 return (ENOMEM);
189
190 irqs->cnt = sc->tstamps.ctl.cnt;
191 irqs->idx = sc->tstamps.ctl.idx;
192
193 return devfs_set_cdevpriv(irqs, ti_pruss_privdtor);
194 }
195
196 static void
ti_pruss_privdtor(void * data)197 ti_pruss_privdtor(void *data)
198 {
199 free(data, M_DEVBUF);
200 }
201
202 static int
ti_pruss_irq_poll(struct cdev * dev,int events,struct thread * td)203 ti_pruss_irq_poll(struct cdev *dev, int events, struct thread *td)
204 {
205 struct ctl* irqs;
206 struct ti_pruss_irqsc *sc;
207 sc = dev->si_drv1;
208
209 devfs_get_cdevpriv((void**)&irqs);
210
211 if (events & (POLLIN | POLLRDNORM)) {
212 if (sc->tstamps.ctl.cnt != irqs->cnt)
213 return events & (POLLIN | POLLRDNORM);
214 else
215 selrecord(td, &sc->sc_selinfo);
216 }
217 return 0;
218 }
219
220 static int
ti_pruss_irq_read(struct cdev * cdev,struct uio * uio,int ioflag)221 ti_pruss_irq_read(struct cdev *cdev, struct uio *uio, int ioflag)
222 {
223 const size_t ts_len = sizeof(uint64_t);
224 struct ti_pruss_irqsc* irq;
225 struct ctl* priv;
226 int error = 0;
227 size_t idx;
228 ssize_t level;
229
230 irq = cdev->si_drv1;
231
232 if (uio->uio_resid < ts_len)
233 return (EINVAL);
234
235 error = devfs_get_cdevpriv((void**)&priv);
236 if (error)
237 return (error);
238
239 mtx_lock(&irq->sc_mtx);
240
241 if (irq->tstamps.ctl.cnt - priv->cnt > TI_TS_ARRAY)
242 {
243 priv->cnt = irq->tstamps.ctl.cnt;
244 priv->idx = irq->tstamps.ctl.idx;
245 mtx_unlock(&irq->sc_mtx);
246 return (ENXIO);
247 }
248
249 do {
250 idx = priv->idx;
251 level = irq->tstamps.ctl.idx - idx;
252 if (level < 0)
253 level += TI_TS_ARRAY;
254
255 if (level == 0) {
256 if (ioflag & O_NONBLOCK) {
257 mtx_unlock(&irq->sc_mtx);
258 return (EWOULDBLOCK);
259 }
260
261 error = msleep(irq, &irq->sc_mtx, PCATCH | PDROP,
262 "pruirq", 0);
263 if (error)
264 return error;
265
266 mtx_lock(&irq->sc_mtx);
267 }
268 }while(level == 0);
269
270 mtx_unlock(&irq->sc_mtx);
271
272 error = uiomove(&irq->tstamps.ts[idx], ts_len, uio);
273
274 if (++idx == TI_TS_ARRAY)
275 idx = 0;
276 priv->idx = idx;
277
278 atomic_add_32(&priv->cnt, 1);
279
280 return (error);
281 }
282
283 static struct ti_pruss_irq_arg {
284 int irq;
285 struct ti_pruss_softc *sc;
286 } ti_pruss_irq_args[TI_PRUSS_IRQS];
287
288 static __inline uint32_t
ti_pruss_reg_read(struct ti_pruss_softc * sc,uint32_t reg)289 ti_pruss_reg_read(struct ti_pruss_softc *sc, uint32_t reg)
290 {
291 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
292 }
293
294 static __inline void
ti_pruss_reg_write(struct ti_pruss_softc * sc,uint32_t reg,uint32_t val)295 ti_pruss_reg_write(struct ti_pruss_softc *sc, uint32_t reg, uint32_t val)
296 {
297 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
298 }
299
300 static __inline void
ti_pruss_interrupts_clear(struct ti_pruss_softc * sc)301 ti_pruss_interrupts_clear(struct ti_pruss_softc *sc)
302 {
303 /* disable global interrupt */
304 ti_pruss_reg_write(sc, PRUSS_INTC_GER, 0 );
305
306 /* clear all events */
307 ti_pruss_reg_write(sc, PRUSS_INTC_SECR0, 0xFFFFFFFF);
308 ti_pruss_reg_write(sc, PRUSS_INTC_SECR1, 0xFFFFFFFF);
309
310 /* disable all host interrupts */
311 ti_pruss_reg_write(sc, PRUSS_INTC_HIER, 0);
312 }
313
314 static __inline int
ti_pruss_interrupts_enable(struct ti_pruss_softc * sc,int8_t irq,bool enable)315 ti_pruss_interrupts_enable(struct ti_pruss_softc *sc, int8_t irq, bool enable)
316 {
317 if (enable && ((sc->sc_irq_devs[irq].channel == -1) ||
318 (sc->sc_irq_devs[irq].event== -1)))
319 {
320 device_printf( sc->sc_pdev->si_drv1,
321 "Interrupt chain not fully configured, not possible to enable\n" );
322 return (EINVAL);
323 }
324
325 sc->sc_irq_devs[irq].enable = enable;
326
327 if (sc->sc_irq_devs[irq].sc_pdev) {
328 destroy_dev(sc->sc_irq_devs[irq].sc_pdev);
329 sc->sc_irq_devs[irq].sc_pdev = NULL;
330 }
331
332 if (enable) {
333 sc->sc_irq_devs[irq].sc_pdev = make_dev(&ti_pruss_cdevirq, 0, UID_ROOT, GID_WHEEL,
334 0600, "pruss%d.irq%d", device_get_unit(sc->sc_pdev->si_drv1), irq);
335 sc->sc_irq_devs[irq].sc_pdev->si_drv1 = &sc->sc_irq_devs[irq];
336
337 sc->sc_irq_devs[irq].tstamps.ctl.idx = 0;
338 }
339
340 uint32_t reg = enable ? PRUSS_INTC_HIEISR : PRUSS_INTC_HIDISR;
341 ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].channel);
342
343 reg = enable ? PRUSS_INTC_EISR : PRUSS_INTC_EICR;
344 ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].event );
345
346 return (0);
347 }
348
349 static __inline void
ti_pruss_map_write(struct ti_pruss_softc * sc,uint32_t basereg,uint8_t index,uint8_t content)350 ti_pruss_map_write(struct ti_pruss_softc *sc, uint32_t basereg, uint8_t index, uint8_t content)
351 {
352 const size_t regadr = basereg + index & ~0x03;
353 const size_t bitpos = (index & 0x03) * 8;
354 uint32_t rmw = ti_pruss_reg_read(sc, regadr);
355 rmw = (rmw & ~( 0xF << bitpos)) | ( (content & 0xF) << bitpos);
356 ti_pruss_reg_write(sc, regadr, rmw);
357 }
358
359 static int
ti_pruss_event_map(SYSCTL_HANDLER_ARGS)360 ti_pruss_event_map( SYSCTL_HANDLER_ARGS )
361 {
362 struct ti_pruss_softc *sc;
363 const int8_t irq = arg2;
364 int err;
365 char event[sizeof(NOT_SET_STR)];
366
367 sc = arg1;
368
369 if(sc->sc_irq_devs[irq].event == -1)
370 bcopy(NOT_SET_STR, event, sizeof(event));
371 else
372 snprintf(event, sizeof(event), "%d", sc->sc_irq_devs[irq].event);
373
374 err = sysctl_handle_string(oidp, event, sizeof(event), req);
375 if(err != 0)
376 return (err);
377
378 if (req->newptr) { // write event
379 if (strcmp(NOT_SET_STR, event) == 0) {
380 ti_pruss_interrupts_enable(sc, irq, false);
381 sc->sc_irq_devs[irq].event = -1;
382 } else {
383 if (sc->sc_irq_devs[irq].channel == -1) {
384 device_printf( sc->sc_pdev->si_drv1,
385 "corresponding channel not configured\n");
386 return (ENXIO);
387 }
388
389 const int8_t channelnr = sc->sc_irq_devs[irq].channel;
390 const int8_t eventnr = strtol( event, NULL, 10 ); // TODO: check if strol is valid
391 if (eventnr > TI_PRUSS_EVENTS || eventnr < 0) {
392 device_printf( sc->sc_pdev->si_drv1,
393 "Event number %d not valid (0 - %d)",
394 channelnr, TI_PRUSS_EVENTS -1);
395 return (EINVAL);
396 }
397
398 sc->sc_irq_devs[irq].channel = channelnr;
399 sc->sc_irq_devs[irq].event = eventnr;
400
401 // event[nr] <= channel
402 ti_pruss_map_write(sc, PRUSS_INTC_CMR_BASE,
403 eventnr, channelnr);
404 }
405 }
406 return (err);
407 }
408
409 static int
ti_pruss_channel_map(SYSCTL_HANDLER_ARGS)410 ti_pruss_channel_map(SYSCTL_HANDLER_ARGS)
411 {
412 struct ti_pruss_softc *sc;
413 int err;
414 char channel[sizeof(NOT_SET_STR)];
415 const int8_t irq = arg2;
416
417 sc = arg1;
418
419 if (sc->sc_irq_devs[irq].channel == -1)
420 bcopy(NOT_SET_STR, channel, sizeof(channel));
421 else
422 snprintf(channel, sizeof(channel), "%d", sc->sc_irq_devs[irq].channel);
423
424 err = sysctl_handle_string(oidp, channel, sizeof(channel), req);
425 if (err != 0)
426 return (err);
427
428 if (req->newptr) { // write event
429 if (strcmp(NOT_SET_STR, channel) == 0) {
430 ti_pruss_interrupts_enable(sc, irq, false);
431 ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR,
432 sc->sc_irq_devs[irq].channel);
433 sc->sc_irq_devs[irq].channel = -1;
434 } else {
435 const int8_t channelnr = strtol(channel, NULL, 10); // TODO: check if strol is valid
436 if (channelnr > TI_PRUSS_IRQS || channelnr < 0)
437 {
438 device_printf(sc->sc_pdev->si_drv1,
439 "Channel number %d not valid (0 - %d)",
440 channelnr, TI_PRUSS_IRQS-1);
441 return (EINVAL);
442 }
443
444 sc->sc_irq_devs[irq].channel = channelnr;
445 sc->sc_irq_devs[irq].last = -1;
446
447 // channel[nr] <= irqnr
448 ti_pruss_map_write(sc, PRUSS_INTC_HMR_BASE,
449 irq, channelnr);
450 }
451 }
452
453 return (err);
454 }
455
456 static int
ti_pruss_interrupt_enable(SYSCTL_HANDLER_ARGS)457 ti_pruss_interrupt_enable(SYSCTL_HANDLER_ARGS)
458 {
459 struct ti_pruss_softc *sc;
460 int err;
461 bool irqenable;
462 const int8_t irq = arg2;
463
464 sc = arg1;
465 irqenable = sc->sc_irq_devs[arg2].enable;
466
467 err = sysctl_handle_bool(oidp, &irqenable, arg2, req);
468 if (err != 0)
469 return (err);
470
471 if (req->newptr) // write enable
472 return ti_pruss_interrupts_enable(sc, irq, irqenable);
473
474 return (err);
475 }
476
477 static int
ti_pruss_global_interrupt_enable(SYSCTL_HANDLER_ARGS)478 ti_pruss_global_interrupt_enable(SYSCTL_HANDLER_ARGS)
479 {
480 struct ti_pruss_softc *sc;
481 int err;
482 bool glob_irqen;
483
484 sc = arg1;
485 glob_irqen = sc->sc_glob_irqen;
486
487 err = sysctl_handle_bool(oidp, &glob_irqen, arg2, req);
488 if (err != 0)
489 return (err);
490
491 if (req->newptr) {
492 sc->sc_glob_irqen = glob_irqen;
493 ti_pruss_reg_write(sc, PRUSS_INTC_GER, glob_irqen);
494 }
495
496 return (err);
497 }
498 static int
ti_pruss_probe(device_t dev)499 ti_pruss_probe(device_t dev)
500 {
501
502 if (!ofw_bus_status_okay(dev))
503 return (ENXIO);
504
505 if (ofw_bus_is_compatible(dev, "ti,pruss-v1") ||
506 ofw_bus_is_compatible(dev, "ti,pruss-v2")) {
507 device_set_desc(dev, "TI Programmable Realtime Unit Subsystem");
508 return (BUS_PROBE_DEFAULT);
509 }
510
511 return (ENXIO);
512 }
513
514 static int
ti_pruss_attach(device_t dev)515 ti_pruss_attach(device_t dev)
516 {
517 struct ti_pruss_softc *sc;
518 int rid, i, err, ncells;
519 phandle_t node;
520 clk_t l3_gclk, pruss_ocp_gclk;
521 phandle_t ti_prm_ref, *cells;
522 device_t ti_prm_dev;
523
524 rid = 0;
525 sc = device_get_softc(dev);
526 node = ofw_bus_get_node(device_get_parent(dev));
527 if (node <= 0) {
528 device_printf(dev, "Cant get ofw node\n");
529 return (ENXIO);
530 }
531
532 /*
533 * Follow activate pattern from sys/arm/ti/am335x/am335x_prcm.c
534 * by Damjan Marion
535 */
536
537 /* Set MODULEMODE to ENABLE(2) */
538 /* Wait for MODULEMODE to become ENABLE(2) */
539 if (ti_sysc_clock_enable(device_get_parent(dev)) != 0) {
540 device_printf(dev, "Could not enable PRUSS clock\n");
541 return (ENXIO);
542 }
543
544 /* Set CLKTRCTRL to SW_WKUP(2) */
545 /* Wait for the 200 MHz OCP clock to become active */
546 /* Wait for the 200 MHz IEP clock to become active */
547 /* Wait for the 192 MHz UART clock to become active */
548 /*
549 * At the moment there is no reference to CM_PER_PRU_ICSS_CLKSTCTRL@140
550 * in the devicetree. The register reset state are SW_WKUP(2) as default
551 * so at the moment ignore setting this register.
552 */
553
554 /* Select L3F as OCP clock */
555 /* Get the clock and set the parent */
556 err = clk_get_by_name(dev, "l3_gclk", &l3_gclk);
557 if (err) {
558 device_printf(dev, "Cant get l3_gclk err %d\n", err);
559 return (ENXIO);
560 }
561
562 err = clk_get_by_name(dev, "pruss_ocp_gclk@530", &pruss_ocp_gclk);
563 if (err) {
564 device_printf(dev, "Cant get pruss_ocp_gclk@530 err %d\n", err);
565 return (ENXIO);
566 }
567
568 err = clk_set_parent_by_clk(pruss_ocp_gclk, l3_gclk);
569 if (err) {
570 device_printf(dev,
571 "Cant set pruss_ocp_gclk parent to l3_gclk err %d\n", err);
572 return (ENXIO);
573 }
574
575 /* Clear the RESET bit */
576 /* Find the ti_prm */
577 /* #reset-cells should not been used in this way but... */
578 err = ofw_bus_parse_xref_list_alloc(node, "resets", "#reset-cells", 0,
579 &ti_prm_ref, &ncells, &cells);
580 OF_prop_free(cells);
581 if (err) {
582 device_printf(dev,
583 "Cant fetch \"resets\" reference %x\n", err);
584 return (ENXIO);
585 }
586
587 ti_prm_dev = OF_device_from_xref(ti_prm_ref);
588 if (ti_prm_dev == NULL) {
589 device_printf(dev, "Cant get device from \"resets\"\n");
590 return (ENXIO);
591 }
592
593 err = ti_prm_reset(ti_prm_dev);
594 if (err) {
595 device_printf(dev, "ti_prm_reset failed %d\n", err);
596 return (ENXIO);
597 }
598 /* End of clock activation */
599
600 mtx_init(&sc->sc_mtx, "TI PRUSS", NULL, MTX_DEF);
601 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
602 RF_ACTIVE);
603 if (sc->sc_mem_res == NULL) {
604 device_printf(dev, "could not allocate memory resource\n");
605 return (ENXIO);
606 }
607
608 struct sysctl_ctx_list *clist = device_get_sysctl_ctx(dev);
609 if (!clist)
610 return (EINVAL);
611
612 struct sysctl_oid *poid;
613 poid = device_get_sysctl_tree( dev );
614 if (!poid)
615 return (EINVAL);
616
617 sc->sc_glob_irqen = false;
618 struct sysctl_oid *irq_root = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(poid),
619 OID_AUTO, "irq", CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
620 "PRUSS Host Interrupts");
621 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(poid), OID_AUTO,
622 "global_interrupt_enable",
623 CTLFLAG_RW | CTLTYPE_U8 | CTLFLAG_NEEDGIANT,
624 sc, 0, ti_pruss_global_interrupt_enable,
625 "CU", "Global interrupt enable");
626
627 sc->sc_bt = rman_get_bustag(sc->sc_mem_res);
628 sc->sc_bh = rman_get_bushandle(sc->sc_mem_res);
629 if (bus_alloc_resources(dev, ti_pruss_irq_spec, sc->sc_irq_res) != 0) {
630 device_printf(dev, "could not allocate interrupt resource\n");
631 ti_pruss_detach(dev);
632 return (ENXIO);
633 }
634
635 ti_pruss_interrupts_clear(sc);
636
637 for (i = 0; i < TI_PRUSS_IRQS; i++) {
638 char name[8];
639 snprintf(name, sizeof(name), "%d", i);
640
641 struct sysctl_oid *irq_nodes = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(irq_root),
642 OID_AUTO, name, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
643 "PRUSS Interrupts");
644 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
645 "channel", CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_NEEDGIANT,
646 sc, i, ti_pruss_channel_map,
647 "A", "Channel attached to this irq");
648 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
649 "event", CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_NEEDGIANT,
650 sc, i, ti_pruss_event_map,
651 "A", "Event attached to this irq");
652 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
653 "enable", CTLFLAG_RW | CTLTYPE_U8 | CTLFLAG_NEEDGIANT,
654 sc, i, ti_pruss_interrupt_enable,
655 "CU", "Enable/Disable interrupt");
656
657 sc->sc_irq_devs[i].event = -1;
658 sc->sc_irq_devs[i].channel = -1;
659 sc->sc_irq_devs[i].tstamps.ctl.idx = 0;
660
661 if (i < TI_PRUSS_HOST_IRQS) {
662 ti_pruss_irq_args[i].irq = i;
663 ti_pruss_irq_args[i].sc = sc;
664 if (bus_setup_intr(dev, sc->sc_irq_res[i],
665 INTR_MPSAFE | INTR_TYPE_MISC,
666 NULL, ti_pruss_intr, &ti_pruss_irq_args[i],
667 &sc->sc_intr[i]) != 0) {
668 device_printf(dev,
669 "unable to setup the interrupt handler\n");
670 ti_pruss_detach(dev);
671
672 return (ENXIO);
673 }
674 mtx_init(&sc->sc_irq_devs[i].sc_mtx, "TI PRUSS IRQ", NULL, MTX_DEF);
675 knlist_init_mtx(&sc->sc_irq_devs[i].sc_selinfo.si_note, &sc->sc_irq_devs[i].sc_mtx);
676 }
677 }
678
679 if (ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC) == PRUSS_AM33XX_REV)
680 device_printf(dev, "AM33xx PRU-ICSS\n");
681
682 sc->sc_pdev = make_dev(&ti_pruss_cdevsw, 0, UID_ROOT, GID_WHEEL,
683 0600, "pruss%d", device_get_unit(dev));
684 sc->sc_pdev->si_drv1 = dev;
685
686 /* Acc. to datasheet always write 1 to polarity registers */
687 ti_pruss_reg_write(sc, PRUSS_INTC_SIPR0, 0xFFFFFFFF);
688 ti_pruss_reg_write(sc, PRUSS_INTC_SIPR1, 0xFFFFFFFF);
689
690 /* Acc. to datasheet always write 0 to event type registers */
691 ti_pruss_reg_write(sc, PRUSS_INTC_SITR0, 0);
692 ti_pruss_reg_write(sc, PRUSS_INTC_SITR1, 0);
693
694 return (0);
695 }
696
697 static int
ti_pruss_detach(device_t dev)698 ti_pruss_detach(device_t dev)
699 {
700 struct ti_pruss_softc *sc = device_get_softc(dev);
701
702 ti_pruss_interrupts_clear(sc);
703
704 for (int i = 0; i < TI_PRUSS_HOST_IRQS; i++) {
705 ti_pruss_interrupts_enable( sc, i, false );
706
707 if (sc->sc_intr[i])
708 bus_teardown_intr(dev, sc->sc_irq_res[i], sc->sc_intr[i]);
709 if (sc->sc_irq_res[i])
710 bus_release_resource(dev, SYS_RES_IRQ,
711 rman_get_rid(sc->sc_irq_res[i]),
712 sc->sc_irq_res[i]);
713 knlist_clear(&sc->sc_irq_devs[i].sc_selinfo.si_note, 0);
714 mtx_lock(&sc->sc_irq_devs[i].sc_mtx);
715 if (!knlist_empty(&sc->sc_irq_devs[i].sc_selinfo.si_note))
716 printf("IRQ %d KQueue not empty!\n", i );
717 mtx_unlock(&sc->sc_irq_devs[i].sc_mtx);
718 knlist_destroy(&sc->sc_irq_devs[i].sc_selinfo.si_note);
719 mtx_destroy(&sc->sc_irq_devs[i].sc_mtx);
720 }
721
722 mtx_destroy(&sc->sc_mtx);
723 if (sc->sc_mem_res)
724 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->sc_mem_res),
725 sc->sc_mem_res);
726 if (sc->sc_pdev)
727 destroy_dev(sc->sc_pdev);
728
729 return (0);
730 }
731
732 static void
ti_pruss_intr(void * arg)733 ti_pruss_intr(void *arg)
734 {
735 int val;
736 struct ti_pruss_irq_arg *iap = arg;
737 struct ti_pruss_softc *sc = iap->sc;
738 /*
739 * Interrupts pr1_host_intr[0:7] are mapped to
740 * Host-2 to Host-9 of PRU-ICSS IRQ-controller.
741 */
742 const int pru_int = iap->irq + TI_PRUSS_PRU_IRQS;
743 const int pru_int_mask = (1 << pru_int);
744 const int pru_channel = sc->sc_irq_devs[pru_int].channel;
745 const int pru_event = sc->sc_irq_devs[pru_channel].event;
746
747 val = ti_pruss_reg_read(sc, PRUSS_INTC_HIER);
748 if (!(val & pru_int_mask))
749 return;
750
751 ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR, pru_int);
752 ti_pruss_reg_write(sc, PRUSS_INTC_SICR, pru_event);
753 ti_pruss_reg_write(sc, PRUSS_INTC_HIEISR, pru_int);
754
755 struct ti_pruss_irqsc* irq = &sc->sc_irq_devs[pru_channel];
756 size_t wr = irq->tstamps.ctl.idx;
757
758 struct timespec ts;
759 nanouptime(&ts);
760 irq->tstamps.ts[wr] = ts.tv_sec * 1000000000 + ts.tv_nsec;
761
762 if (++wr == TI_TS_ARRAY)
763 wr = 0;
764 atomic_add_32(&irq->tstamps.ctl.cnt, 1);
765
766 irq->tstamps.ctl.idx = wr;
767
768 KNOTE_UNLOCKED(&irq->sc_selinfo.si_note, pru_int);
769 wakeup(irq);
770 selwakeup(&irq->sc_selinfo);
771 }
772
773 static int
ti_pruss_open(struct cdev * cdev __unused,int oflags __unused,int devtype __unused,struct thread * td __unused)774 ti_pruss_open(struct cdev *cdev __unused, int oflags __unused,
775 int devtype __unused, struct thread *td __unused)
776 {
777 return (0);
778 }
779
780 static int
ti_pruss_mmap(struct cdev * cdev,vm_ooffset_t offset,vm_paddr_t * paddr,int nprot,vm_memattr_t * memattr)781 ti_pruss_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
782 int nprot, vm_memattr_t *memattr)
783 {
784 device_t dev = cdev->si_drv1;
785 struct ti_pruss_softc *sc = device_get_softc(dev);
786
787 if (offset >= rman_get_size(sc->sc_mem_res))
788 return (ENOSPC);
789 *paddr = rman_get_start(sc->sc_mem_res) + offset;
790 *memattr = VM_MEMATTR_UNCACHEABLE;
791
792 return (0);
793 }
794
795 static struct filterops ti_pruss_kq_read = {
796 .f_isfd = 1,
797 .f_detach = ti_pruss_irq_kqread_detach,
798 .f_event = ti_pruss_irq_kqevent,
799 };
800
801 static void
ti_pruss_irq_kqread_detach(struct knote * kn)802 ti_pruss_irq_kqread_detach(struct knote *kn)
803 {
804 struct ti_pruss_irqsc *sc = kn->kn_hook;
805
806 knlist_remove(&sc->sc_selinfo.si_note, kn, 0);
807 }
808
809 static int
ti_pruss_irq_kqevent(struct knote * kn,long hint)810 ti_pruss_irq_kqevent(struct knote *kn, long hint)
811 {
812 struct ti_pruss_irqsc* irq_sc;
813 int notify;
814
815 irq_sc = kn->kn_hook;
816
817 if (hint > 0)
818 kn->kn_data = hint - 2;
819
820 if (hint > 0 || irq_sc->last > 0)
821 notify = 1;
822 else
823 notify = 0;
824
825 irq_sc->last = hint;
826
827 return (notify);
828 }
829
830 static int
ti_pruss_irq_kqfilter(struct cdev * cdev,struct knote * kn)831 ti_pruss_irq_kqfilter(struct cdev *cdev, struct knote *kn)
832 {
833 struct ti_pruss_irqsc *sc = cdev->si_drv1;
834
835 switch (kn->kn_filter) {
836 case EVFILT_READ:
837 kn->kn_hook = sc;
838 kn->kn_fop = &ti_pruss_kq_read;
839 knlist_add(&sc->sc_selinfo.si_note, kn, 0);
840 break;
841 default:
842 return (EINVAL);
843 }
844
845 return (0);
846 }
847