1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 SiFive, Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SiFive PWM controller
9
10maintainers:
11  - Paul Walmsley <paul.walmsley@sifive.com>
12
13description:
14  Unlike most other PWM controllers, the SiFive PWM controller currently
15  only supports one period for all channels in the PWM. All PWMs need to
16  run at the same period. The period also has significant restrictions on
17  the values it can achieve, which the driver rounds to the nearest
18  achievable period. PWM RTL that corresponds to the IP block version
19  numbers can be found here -
20
21  https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
22
23allOf:
24  - $ref: pwm.yaml#
25
26properties:
27  compatible:
28    items:
29      - enum:
30          - sifive,fu540-c000-pwm
31          - sifive,fu740-c000-pwm
32      - const: sifive,pwm0
33    description:
34      Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
35      compatible strings are "sifive,fu540-c000-pwm" and
36      "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
37      SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
38      SiFive PWM v0 IP block with no chip integration tweaks.
39      Please refer to sifive-blocks-ip-versioning.txt for details.
40
41  reg:
42    maxItems: 1
43
44  clocks:
45    maxItems: 1
46
47  "#pwm-cells":
48    const: 3
49
50  interrupts:
51    maxItems: 4
52    description:
53      Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
54
55required:
56  - compatible
57  - reg
58  - clocks
59  - interrupts
60
61additionalProperties: false
62
63examples:
64  - |
65    pwm:  pwm@10020000 {
66      compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
67      reg = <0x10020000 0x1000>;
68      clocks = <&tlclk>;
69      interrupt-parent = <&plic>;
70      interrupts = <42>, <43>, <44>, <45>;
71      #pwm-cells = <3>;
72    };
73