1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,easrc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Asynchronous Sample Rate Converter (ASRC) Controller
8
9maintainers:
10  - Shengjiu Wang <shengjiu.wang@nxp.com>
11
12properties:
13  $nodename:
14    pattern: "^easrc@.*"
15
16  compatible:
17    oneOf:
18      - enum:
19          - fsl,imx8mn-easrc
20      - items:
21          - enum:
22              - fsl,imx8mp-easrc
23          - const: fsl,imx8mn-easrc
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: Peripheral clock
34
35  clock-names:
36    items:
37      - const: mem
38
39  dmas:
40    maxItems: 8
41
42  dma-names:
43    items:
44      - const: ctx0_rx
45      - const: ctx0_tx
46      - const: ctx1_rx
47      - const: ctx1_tx
48      - const: ctx2_rx
49      - const: ctx2_tx
50      - const: ctx3_rx
51      - const: ctx3_tx
52
53  firmware-name:
54    $ref: /schemas/types.yaml#/definitions/string
55    const: imx/easrc/easrc-imx8mn.bin
56    description: The coefficient table for the filters
57
58  fsl,asrc-rate:
59    $ref: /schemas/types.yaml#/definitions/uint32
60    minimum: 8000
61    maximum: 192000
62    description: Defines a mutual sample rate used by DPCM Back Ends
63
64  fsl,asrc-format:
65    $ref: /schemas/types.yaml#/definitions/uint32
66    enum: [2, 6, 10, 32, 36]
67    default: 2
68    description:
69      Defines a mutual sample format used by DPCM Back Ends
70
71required:
72  - compatible
73  - reg
74  - interrupts
75  - clocks
76  - clock-names
77  - dmas
78  - dma-names
79  - firmware-name
80  - fsl,asrc-rate
81  - fsl,asrc-format
82
83additionalProperties: false
84
85examples:
86  - |
87    #include <dt-bindings/clock/imx8mn-clock.h>
88
89    easrc: easrc@300c0000 {
90           compatible = "fsl,imx8mn-easrc";
91           reg = <0x300c0000 0x10000>;
92           interrupts = <0x0 122 0x4>;
93           clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
94           clock-names = "mem";
95           dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
96                  <&sdma2 18 23 0> , <&sdma2 19 23 0>,
97                  <&sdma2 20 23 0> , <&sdma2 21 23 0>,
98                  <&sdma2 22 23 0> , <&sdma2 23 23 0>;
99           dma-names = "ctx0_rx", "ctx0_tx",
100                       "ctx1_rx", "ctx1_tx",
101                       "ctx2_rx", "ctx2_tx",
102                       "ctx3_rx", "ctx3_tx";
103           firmware-name = "imx/easrc/easrc-imx8mn.bin";
104           fsl,asrc-rate  = <8000>;
105           fsl,asrc-format = <2>;
106    };
107