1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3#include "armada-385-clearfog-gtr.dtsi"
4
5/ {
6	model = "SolidRun Clearfog GTR L8";
7};
8
9&mdio {
10	switch0: ethernet-switch@4 {
11		compatible = "marvell,mv88e6190";
12		reg = <4>;
13		pinctrl-names = "default";
14		pinctrl-0 = <&cf_gtr_switch_reset_pins>;
15		reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
16
17		ethernet-ports {
18			#address-cells = <1>;
19			#size-cells = <0>;
20
21			ethernet-port@1 {
22				reg = <1>;
23				label = "lan8";
24				phy-handle = <&switch0phy0>;
25			};
26
27			ethernet-port@2 {
28				reg = <2>;
29				label = "lan7";
30				phy-handle = <&switch0phy1>;
31			};
32
33			ethernet-port@3 {
34				reg = <3>;
35				label = "lan6";
36				phy-handle = <&switch0phy2>;
37			};
38
39			ethernet-port@4 {
40				reg = <4>;
41				label = "lan5";
42				phy-handle = <&switch0phy3>;
43			};
44
45			ethernet-port@5 {
46				reg = <5>;
47				label = "lan4";
48				phy-handle = <&switch0phy4>;
49			};
50
51			ethernet-port@6 {
52				reg = <6>;
53				label = "lan3";
54				phy-handle = <&switch0phy5>;
55			};
56
57			ethernet-port@7 {
58				reg = <7>;
59				label = "lan2";
60				phy-handle = <&switch0phy6>;
61			};
62
63			ethernet-port@8 {
64				reg = <8>;
65				label = "lan1";
66				phy-handle = <&switch0phy7>;
67			};
68
69			ethernet-port@10 {
70				reg = <10>;
71				phy-mode = "2500base-x";
72
73				ethernet = <&eth1>;
74				fixed-link {
75					speed = <2500>;
76					full-duplex;
77				};
78			};
79
80		};
81
82		mdio {
83			#address-cells = <1>;
84			#size-cells = <0>;
85
86			switch0phy0: ethernet-phy@1 {
87				reg = <0x1>;
88			};
89
90			switch0phy1: ethernet-phy@2 {
91				reg = <0x2>;
92			};
93
94			switch0phy2: ethernet-phy@3 {
95				reg = <0x3>;
96			};
97
98			switch0phy3: ethernet-phy@4 {
99				reg = <0x4>;
100			};
101
102			switch0phy4: ethernet-phy@5 {
103				reg = <0x5>;
104			};
105
106			switch0phy5: ethernet-phy@6 {
107				reg = <0x6>;
108			};
109
110			switch0phy6: ethernet-phy@7 {
111				reg = <0x7>;
112			};
113
114			switch0phy7: ethernet-phy@8 {
115				reg = <0x8>;
116			};
117		};
118
119	};
120};
121