1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device tree for the Kobo Aura 2 ebook reader
4 *
5 * Name on mainboard is: 37NB-E60QL0+4B1
6 * Serials start with: E60QL2
7 *
8 * Copyright 2022 Andreas Kemnade
9 */
10
11/dts-v1/;
12
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/leds/common.h>
16#include "imx6sl.dtsi"
17
18/ {
19	model = "Kobo Aura 2";
20	compatible = "kobo,aura2", "fsl,imx6sl";
21
22	aliases {
23		mmc0 = &usdhc2;
24		mmc1 = &usdhc3;
25	};
26
27	chosen {
28		stdout-path = &uart1;
29	};
30
31	gpio_keys: gpio-keys {
32		compatible = "gpio-keys";
33		pinctrl-names = "default";
34		pinctrl-0 = <&pinctrl_gpio_keys>;
35
36		key-cover {
37			label = "Cover";
38			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
39			linux,code = <SW_LID>;
40			linux,input-type = <EV_SW>;
41			wakeup-source;
42		};
43
44		key-power {
45			label = "Power";
46			gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
47			linux,code = <KEY_POWER>;
48			wakeup-source;
49		};
50	};
51
52	leds: leds {
53		compatible = "gpio-leds";
54		pinctrl-names = "default";
55		pinctrl-0 = <&pinctrl_led>;
56
57		led-0 {
58			label = "koboaura2:white:on";
59			gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
60			color = <LED_COLOR_ID_WHITE>;
61			linux,default-trigger = "timer";
62		};
63	};
64
65	memory@80000000 {
66		device_type = "memory";
67		reg = <0x80000000 0x10000000>;
68	};
69
70	reg_wifi: regulator-wifi {
71		compatible = "regulator-fixed";
72		pinctrl-names = "default";
73		pinctrl-0 = <&pinctrl_wifi_power>;
74		regulator-name = "SD3_SPWR";
75		regulator-min-microvolt = <3000000>;
76		regulator-max-microvolt = <3000000>;
77		gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
78	};
79
80	wifi_pwrseq: wifi-pwrseq {
81		compatible = "mmc-pwrseq-simple";
82		pinctrl-names = "default";
83		pinctrl-0 = <&pinctrl_wifi_reset>;
84		post-power-on-delay-ms = <20>;
85		reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
86	};
87};
88
89&i2c1 {
90	pinctrl-names = "default", "sleep";
91	pinctrl-0 = <&pinctrl_i2c1>;
92	pinctrl-1 = <&pinctrl_i2c1_sleep>;
93	status = "okay";
94
95	lm3630a: backlight@36 {
96		compatible = "ti,lm3630a";
97		pinctrl-names = "default";
98		pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
99		reg = <0x36>;
100		enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
101
102		#address-cells = <1>;
103		#size-cells = <0>;
104
105		led@0 {
106			reg = <0>;
107			led-sources = <0>;
108			label = "backlight";
109			default-brightness = <0>;
110			max-brightness = <255>;
111		};
112	};
113};
114
115&i2c2 {
116	pinctrl-names = "default", "sleep";
117	pinctrl-0 = <&pinctrl_i2c2>;
118	pinctrl-1 = <&pinctrl_i2c2_sleep>;
119	clock-frequency = <100000>;
120	status = "okay";
121
122	/* eKTF2232 at 0x15 */
123	/* FP9928 at 0x48 */
124};
125
126&i2c3 {
127	pinctrl-names = "default";
128	pinctrl-0 = <&pinctrl_i2c3>;
129	clock-frequency = <400000>;
130	status = "okay";
131
132	ricoh619: pmic@32 {
133		compatible = "ricoh,rc5t619";
134		pinctrl-names = "default";
135		pinctrl-0 = <&pinctrl_ricoh_gpio>;
136		reg = <0x32>;
137		interrupt-parent = <&gpio5>;
138		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
139		system-power-controller;
140
141		regulators {
142			dcdc1_reg: DCDC1 {
143				regulator-name = "DCDC1";
144				regulator-min-microvolt = <300000>;
145				regulator-max-microvolt = <1875000>;
146				regulator-always-on;
147				regulator-boot-on;
148
149				regulator-state-mem {
150					regulator-on-in-suspend;
151					regulator-suspend-max-microvolt = <900000>;
152					regulator-suspend-min-microvolt = <900000>;
153				};
154			};
155
156			/* Core3_3V3 */
157			dcdc2_reg: DCDC2 {
158				regulator-name = "DCDC2";
159				regulator-always-on;
160				regulator-boot-on;
161
162				regulator-state-mem {
163					regulator-on-in-suspend;
164					regulator-suspend-max-microvolt = <3100000>;
165					regulator-suspend-min-microvolt = <3100000>;
166				};
167			};
168
169			dcdc3_reg: DCDC3 {
170				regulator-name = "DCDC3";
171				regulator-min-microvolt = <300000>;
172				regulator-max-microvolt = <1875000>;
173				regulator-always-on;
174				regulator-boot-on;
175
176				regulator-state-mem {
177					regulator-on-in-suspend;
178					regulator-suspend-max-microvolt = <1140000>;
179					regulator-suspend-min-microvolt = <1140000>;
180				};
181			};
182
183			/* Core4_1V2 */
184			dcdc4_reg: DCDC4 {
185				regulator-name = "DCDC4";
186				regulator-min-microvolt = <1200000>;
187				regulator-max-microvolt = <1200000>;
188				regulator-always-on;
189				regulator-boot-on;
190
191				regulator-state-mem {
192					regulator-on-in-suspend;
193					regulator-suspend-max-microvolt = <1140000>;
194					regulator-suspend-min-microvolt = <1140000>;
195				};
196			};
197
198			/* Core4_1V8 */
199			dcdc5_reg: DCDC5 {
200				regulator-name = "DCDC5";
201				regulator-min-microvolt = <1800000>;
202				regulator-max-microvolt = <1800000>;
203				regulator-always-on;
204				regulator-boot-on;
205
206				regulator-state-mem {
207					regulator-on-in-suspend;
208					regulator-suspend-max-microvolt = <1700000>;
209					regulator-suspend-min-microvolt = <1700000>;
210				};
211			};
212
213			/* IR_3V3 */
214			ldo1_reg: LDO1  {
215				regulator-name = "LDO1";
216				regulator-always-on;
217				regulator-boot-on;
218			};
219
220			/* Core1_3V3 */
221			ldo2_reg: LDO2  {
222				regulator-name = "LDO2";
223				regulator-always-on;
224				regulator-boot-on;
225
226				regulator-state-mem {
227					regulator-on-in-suspend;
228					regulator-suspend-max-microvolt = <3000000>;
229					regulator-suspend-min-microvolt = <3000000>;
230				};
231			};
232
233			/* Core5_1V2 */
234			ldo3_reg: LDO3  {
235				regulator-name = "LDO3";
236				regulator-always-on;
237				regulator-boot-on;
238			};
239
240			ldo4_reg: LDO4 {
241				regulator-name = "LDO4";
242				regulator-boot-on;
243			};
244
245			/* SPD_3V3 */
246			ldo5_reg: LDO5 {
247				regulator-name = "LDO5";
248				regulator-always-on;
249				regulator-boot-on;
250			};
251
252			/* DDR_0V6 */
253			ldo6_reg: LDO6 {
254				regulator-name = "LDO6";
255				regulator-always-on;
256				regulator-boot-on;
257			};
258
259			/* VDD_PWM */
260			ldo7_reg: LDO7 {
261				regulator-name = "LDO7";
262				regulator-always-on;
263				regulator-boot-on;
264			};
265
266			/* ldo_1v8 */
267			ldo8_reg: LDO8 {
268				regulator-name = "LDO8";
269				regulator-min-microvolt = <1800000>;
270				regulator-max-microvolt = <1800000>;
271				regulator-always-on;
272				regulator-boot-on;
273			};
274
275			ldo9_reg: LDO9 {
276				regulator-name = "LDO9";
277				regulator-boot-on;
278			};
279
280			ldo10_reg: LDO10 {
281				regulator-name = "LDO10";
282				regulator-boot-on;
283			};
284
285			ldortc1_reg: LDORTC1  {
286				regulator-name = "LDORTC1";
287				regulator-always-on;
288				regulator-boot-on;
289			};
290		};
291	};
292};
293
294&reg_vdd1p1 {
295	vin-supply = <&dcdc2_reg>;
296};
297
298&reg_vdd2p5 {
299	vin-supply = <&dcdc2_reg>;
300};
301
302&reg_arm {
303	vin-supply = <&dcdc3_reg>;
304};
305
306&reg_soc {
307	vin-supply = <&dcdc1_reg>;
308};
309
310&reg_pu {
311	vin-supply = <&dcdc1_reg>;
312};
313
314&snvs_rtc {
315	/*
316	 * We are using the RTC in the PMIC, but this one is not disabled
317	 * in imx6sl.dtsi.
318	 */
319	status = "disabled";
320};
321
322&uart1 {
323	/* J4, through-holes */
324	pinctrl-names = "default";
325	pinctrl-0 = <&pinctrl_uart1>;
326	status = "okay";
327};
328
329&uart4 {
330	/* TP198, next to J4, SMD pads */
331	pinctrl-names = "default";
332	pinctrl-0 = <&pinctrl_uart4>;
333	status = "okay";
334};
335
336&usdhc2 {
337	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
338	pinctrl-0 = <&pinctrl_usdhc2>;
339	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
340	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
341	pinctrl-3 = <&pinctrl_usdhc2_sleep>;
342	non-removable;
343	status = "okay";
344
345	/* internal uSD card */
346};
347
348&usdhc3 {
349	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
350	pinctrl-0 = <&pinctrl_usdhc3>;
351	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
352	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
353	pinctrl-3 = <&pinctrl_usdhc3_sleep>;
354	vmmc-supply = <&reg_wifi>;
355	mmc-pwrseq = <&wifi_pwrseq>;
356	cap-power-off-card;
357	non-removable;
358	status = "okay";
359
360	/*
361	 * RTL8189F SDIO WiFi
362	 */
363};
364
365&usbotg1 {
366	disable-over-current;
367	srp-disable;
368	hnp-disable;
369	adp-disable;
370	status = "okay";
371};
372
373&iomuxc {
374	pinctrl_gpio_keys: gpio-keysgrp {
375		fsl,pins = <
376			MX6SL_PAD_SD1_DAT1__GPIO5_IO08  0x17059
377			MX6SL_PAD_SD1_DAT4__GPIO5_IO12  0x17059
378		>;
379	};
380
381	pinctrl_i2c1: i2c1grp {
382		fsl,pins = <
383			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x4001f8b1
384			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x4001f8b1
385		>;
386	};
387
388	pinctrl_i2c1_sleep: i2c1-sleepgrp {
389		fsl,pins = <
390			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x400108b1
391			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x400108b1
392		>;
393	};
394
395	pinctrl_i2c2: i2c2grp {
396		fsl,pins = <
397			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x4001f8b1
398			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x4001f8b1
399		>;
400	};
401
402	pinctrl_i2c2_sleep: i2c2-sleepgrp {
403		fsl,pins = <
404			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x400108b1
405			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x400108b1
406		>;
407	};
408
409	pinctrl_i2c3: i2c3grp {
410		fsl,pins = <
411			MX6SL_PAD_REF_CLK_24M__I2C3_SCL  0x4001f8b1
412			MX6SL_PAD_REF_CLK_32K__I2C3_SDA  0x4001f8b1
413		>;
414	};
415
416	pinctrl_led: ledgrp {
417		fsl,pins = <
418			MX6SL_PAD_SD1_DAT6__GPIO5_IO07 0x17059
419		>;
420	};
421
422	pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
423		fsl,pins = <
424			MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 /* HWEN */
425		>;
426	};
427
428	pinctrl_ricoh_gpio: ricoh-gpiogrp {
429		fsl,pins = <
430			MX6SL_PAD_SD1_CLK__GPIO5_IO15	0x1b8b1 /* ricoh619 chg */
431			MX6SL_PAD_SD1_DAT0__GPIO5_IO11	0x1b8b1 /* ricoh619 irq */
432			MX6SL_PAD_KEY_COL2__GPIO3_IO28	0x1b8b1 /* ricoh619 bat_low_int */
433		>;
434	};
435
436	pinctrl_uart1: uart1grp {
437		fsl,pins = <
438			MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
439			MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
440		>;
441	};
442
443	pinctrl_uart4: uart4grp {
444		fsl,pins = <
445			MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1
446			MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1
447		>;
448	};
449
450	pinctrl_usbotg1: usbotg1grp {
451		fsl,pins = <
452			MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
453		>;
454	};
455
456	pinctrl_usdhc2: usdhc2grp {
457		fsl,pins = <
458			MX6SL_PAD_SD2_CMD__SD2_CMD		0x17059
459			MX6SL_PAD_SD2_CLK__SD2_CLK		0x13059
460			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x17059
461			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x17059
462			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x17059
463			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x17059
464		>;
465	};
466
467	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
468		fsl,pins = <
469			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9
470			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130b9
471			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
472			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
473			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
474			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
475		>;
476	};
477
478	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
479		fsl,pins = <
480			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9
481			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130f9
482			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
483			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
484			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
485			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
486		>;
487	};
488
489	pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
490		fsl,pins = <
491			MX6SL_PAD_SD2_CMD__GPIO5_IO04		0x100f9
492			MX6SL_PAD_SD2_CLK__GPIO5_IO05		0x100f9
493			MX6SL_PAD_SD2_DAT0__GPIO5_IO01		0x100f9
494			MX6SL_PAD_SD2_DAT1__GPIO4_IO30		0x100f9
495			MX6SL_PAD_SD2_DAT2__GPIO5_IO03		0x100f9
496			MX6SL_PAD_SD2_DAT3__GPIO4_IO28		0x100f9
497		>;
498	};
499
500	pinctrl_usdhc3: usdhc3grp {
501		fsl,pins = <
502			MX6SL_PAD_SD3_CMD__SD3_CMD	0x11059
503			MX6SL_PAD_SD3_CLK__SD3_CLK	0x11059
504			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x11059
505			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x11059
506			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x11059
507			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x11059
508		>;
509	};
510
511	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
512		fsl,pins = <
513			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170b9
514			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170b9
515			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x170b9
516			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x170b9
517			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x170b9
518			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x170b9
519		>;
520	};
521
522	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
523		fsl,pins = <
524			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170f9
525			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170f9
526			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x170f9
527			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x170f9
528			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x170f9
529			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x170f9
530		>;
531	};
532
533	pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
534		fsl,pins = <
535			MX6SL_PAD_SD3_CMD__GPIO5_IO21	0x100c1
536			MX6SL_PAD_SD3_CLK__GPIO5_IO18	0x100c1
537			MX6SL_PAD_SD3_DAT0__GPIO5_IO19	0x100c1
538			MX6SL_PAD_SD3_DAT1__GPIO5_IO20	0x100c1
539			MX6SL_PAD_SD3_DAT2__GPIO5_IO16	0x100c1
540			MX6SL_PAD_SD3_DAT3__GPIO5_IO17	0x100c1
541		>;
542	};
543
544	pinctrl_wifi_power: wifi-powergrp {
545		fsl,pins = <
546			MX6SL_PAD_SD2_DAT6__GPIO4_IO29	0x10059	/* WIFI_3V3_ON */
547		>;
548	};
549
550	pinctrl_wifi_reset: wifi-resetgrp {
551		fsl,pins = <
552			MX6SL_PAD_SD2_DAT7__GPIO5_IO00	0x10059	/* WIFI_RST */
553		>;
554	};
555};
556