xref: /freebsd/sys/dev/mlx5/mlx5_core/mlx5_core.h (revision 76ee71dc)
1 /*-
2  * Copyright (c) 2013-2015, Mellanox Technologies, Ltd.  All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  *
25  * $FreeBSD$
26  */
27 
28 #ifndef __MLX5_CORE_H__
29 #define __MLX5_CORE_H__
30 
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/sched.h>
34 
35 #define DRIVER_NAME "mlx5_core"
36 #ifndef DRIVER_VERSION
37 #define DRIVER_VERSION "3.4.1"
38 #endif
39 #define DRIVER_RELDATE "February 2018"
40 
41 extern int mlx5_core_debug_mask;
42 
43 #define mlx5_core_dbg(dev, format, ...)					\
44 	pr_debug("%s:%s:%d:(pid %d): " format,				\
45 		 (dev)->priv.name, __func__, __LINE__, curthread->td_proc->p_pid,	\
46 		 ##__VA_ARGS__)
47 
48 #define mlx5_core_dbg_mask(dev, mask, format, ...)			\
49 do {									\
50 	if ((mask) & mlx5_core_debug_mask)				\
51 		mlx5_core_dbg(dev, format, ##__VA_ARGS__);		\
52 } while (0)
53 
54 #define mlx5_core_err(_dev, format, ...)					\
55 	device_printf((&(_dev)->pdev->dev)->bsddev, "ERR: ""%s:%d:(pid %d): " format, \
56 		__func__, __LINE__, curthread->td_proc->p_pid, \
57 		##__VA_ARGS__)
58 
59 #define mlx5_core_warn(_dev, format, ...)				\
60 	device_printf((&(_dev)->pdev->dev)->bsddev, "WARN: ""%s:%d:(pid %d): " format, \
61 		__func__, __LINE__, curthread->td_proc->p_pid, \
62 		##__VA_ARGS__)
63 
64 enum {
65 	MLX5_CMD_DATA, /* print command payload only */
66 	MLX5_CMD_TIME, /* print command execution time */
67 };
68 
69 enum mlx5_semaphore_space_address {
70 	MLX5_SEMAPHORE_SW_RESET		= 0x20,
71 };
72 
73 enum {
74 	UNLOCK = 0,
75 	LOCK = 1,
76 	CAP_ID = 0x9,
77 };
78 
79 struct mlx5_core_dev;
80 
81 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
82 int mlx5_query_board_id(struct mlx5_core_dev *dev);
83 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
84 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
85 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
86 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
87 		     unsigned long param);
88 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
89 void mlx5_disable_device(struct mlx5_core_dev *dev);
90 void mlx5_recover_device(struct mlx5_core_dev *dev);
91 
92 void mlx5e_init(void);
93 void mlx5e_cleanup(void);
94 
95 int mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name);
96 
97 int mlx5_fwdump_init(void);
98 void mlx5_fwdump_fini(void);
99 void mlx5_fwdump_prep(struct mlx5_core_dev *mdev);
100 void mlx5_fwdump(struct mlx5_core_dev *mdev);
101 void mlx5_fwdump_clean(struct mlx5_core_dev *mdev);
102 
103 struct mlx5_crspace_regmap {
104 	uint32_t addr;
105 	unsigned cnt;
106 };
107 
108 extern struct pci_driver mlx5_core_driver;
109 
110 void mlx5_vsec_init(struct mlx5_core_dev *dev);
111 int mlx5_pciconf_cap9_sem(struct mlx5_core_dev *dev, int state);
112 int mlx5_pciconf_set_sem_addr_space(struct mlx5_core_dev *dev,
113 				    u32 sem_space_address, int state);
114 #endif /* __MLX5_CORE_H__ */
115