1 /*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #ifndef __MLX5_CORE_H__ 29 #define __MLX5_CORE_H__ 30 31 #include <linux/types.h> 32 #include <linux/kernel.h> 33 #include <linux/sched.h> 34 35 #define DRIVER_NAME "mlx5_core" 36 #ifndef DRIVER_VERSION 37 #define DRIVER_VERSION "3.5.0" 38 #endif 39 #define DRIVER_RELDATE "November 2018" 40 41 extern int mlx5_core_debug_mask; 42 43 #define mlx5_core_dbg(dev, format, ...) \ 44 pr_debug("%s:%s:%d:(pid %d): " format, \ 45 (dev)->priv.name, __func__, __LINE__, curthread->td_proc->p_pid, \ 46 ##__VA_ARGS__) 47 48 #define mlx5_core_dbg_mask(dev, mask, format, ...) \ 49 do { \ 50 if ((mask) & mlx5_core_debug_mask) \ 51 mlx5_core_dbg(dev, format, ##__VA_ARGS__); \ 52 } while (0) 53 54 #define mlx5_core_err(_dev, format, ...) \ 55 device_printf((&(_dev)->pdev->dev)->bsddev, "ERR: ""%s:%d:(pid %d): " format, \ 56 __func__, __LINE__, curthread->td_proc->p_pid, \ 57 ##__VA_ARGS__) 58 59 #define mlx5_core_warn(_dev, format, ...) \ 60 device_printf((&(_dev)->pdev->dev)->bsddev, "WARN: ""%s:%d:(pid %d): " format, \ 61 __func__, __LINE__, curthread->td_proc->p_pid, \ 62 ##__VA_ARGS__) 63 64 enum { 65 MLX5_CMD_DATA, /* print command payload only */ 66 MLX5_CMD_TIME, /* print command execution time */ 67 }; 68 69 enum mlx5_semaphore_space_address { 70 MLX5_SEMAPHORE_SW_RESET = 0x20, 71 }; 72 73 struct mlx5_core_dev; 74 75 int mlx5_query_hca_caps(struct mlx5_core_dev *dev); 76 int mlx5_query_board_id(struct mlx5_core_dev *dev); 77 int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam, 78 u8 feature_group, u8 access_reg_group); 79 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); 80 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev); 81 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev); 82 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 83 unsigned long param); 84 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force); 85 void mlx5_disable_device(struct mlx5_core_dev *dev); 86 void mlx5_recover_device(struct mlx5_core_dev *dev); 87 88 int mlx5_register_device(struct mlx5_core_dev *dev); 89 void mlx5_unregister_device(struct mlx5_core_dev *dev); 90 91 void mlx5e_init(void); 92 void mlx5e_cleanup(void); 93 94 int mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name); 95 96 int mlx5_fwdump_init(void); 97 void mlx5_fwdump_fini(void); 98 void mlx5_fwdump_prep(struct mlx5_core_dev *mdev); 99 void mlx5_fwdump(struct mlx5_core_dev *mdev); 100 void mlx5_fwdump_clean(struct mlx5_core_dev *mdev); 101 102 struct mlx5_crspace_regmap { 103 uint32_t addr; 104 unsigned cnt; 105 }; 106 107 extern struct pci_driver mlx5_core_driver; 108 109 SYSCTL_DECL(_hw_mlx5); 110 111 enum { 112 MLX5_NIC_IFC_FULL = 0, 113 MLX5_NIC_IFC_DISABLED = 1, 114 MLX5_NIC_IFC_NO_DRAM_NIC = 2, 115 MLX5_NIC_IFC_INVALID = 3, 116 MLX5_NIC_IFC_SW_RESET = 7, 117 }; 118 119 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev); 120 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state); 121 122 #endif /* __MLX5_CORE_H__ */ 123