1 /*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #ifndef __MLX5_CORE_H__ 29 #define __MLX5_CORE_H__ 30 31 #include <linux/types.h> 32 #include <linux/kernel.h> 33 #include <linux/sched.h> 34 35 #include <dev/mlxfw/mlxfw.h> 36 37 #define DRIVER_NAME "mlx5_core" 38 #ifndef DRIVER_VERSION 39 #define DRIVER_VERSION "3.5.0" 40 #endif 41 #define DRIVER_RELDATE "November 2018" 42 43 extern int mlx5_core_debug_mask; 44 45 #define mlx5_core_dbg(dev, format, ...) \ 46 pr_debug("%s:%s:%d:(pid %d): " format, \ 47 (dev)->priv.name, __func__, __LINE__, curthread->td_proc->p_pid, \ 48 ##__VA_ARGS__) 49 50 #define mlx5_core_dbg_mask(dev, mask, format, ...) \ 51 do { \ 52 if ((mask) & mlx5_core_debug_mask) \ 53 mlx5_core_dbg(dev, format, ##__VA_ARGS__); \ 54 } while (0) 55 56 #define mlx5_core_err(_dev, format, ...) \ 57 device_printf((&(_dev)->pdev->dev)->bsddev, "ERR: ""%s:%d:(pid %d): " format, \ 58 __func__, __LINE__, curthread->td_proc->p_pid, \ 59 ##__VA_ARGS__) 60 61 #define mlx5_core_warn(_dev, format, ...) \ 62 device_printf((&(_dev)->pdev->dev)->bsddev, "WARN: ""%s:%d:(pid %d): " format, \ 63 __func__, __LINE__, curthread->td_proc->p_pid, \ 64 ##__VA_ARGS__) 65 66 enum { 67 MLX5_CMD_DATA, /* print command payload only */ 68 MLX5_CMD_TIME, /* print command execution time */ 69 }; 70 71 enum mlx5_semaphore_space_address { 72 MLX5_SEMAPHORE_SW_RESET = 0x20, 73 }; 74 75 struct mlx5_core_dev; 76 77 int mlx5_query_hca_caps(struct mlx5_core_dev *dev); 78 int mlx5_query_board_id(struct mlx5_core_dev *dev); 79 int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam, 80 u8 feature_group, u8 access_reg_group); 81 int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, 82 u8 feature_group, u8 access_reg_group); 83 int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, 84 u8 feature_group, u8 access_reg_group); 85 int mlx5_query_mfrl_reg(struct mlx5_core_dev *mdev, u8 *reset_level); 86 int mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level); 87 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); 88 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev); 89 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev); 90 int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev); 91 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 92 unsigned long param); 93 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force); 94 void mlx5_disable_device(struct mlx5_core_dev *dev); 95 void mlx5_recover_device(struct mlx5_core_dev *dev); 96 97 int mlx5_register_device(struct mlx5_core_dev *dev); 98 void mlx5_unregister_device(struct mlx5_core_dev *dev); 99 100 int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw); 101 102 void mlx5e_init(void); 103 void mlx5e_cleanup(void); 104 105 int mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name); 106 107 int mlx5_ctl_init(void); 108 void mlx5_ctl_fini(void); 109 void mlx5_fwdump_prep(struct mlx5_core_dev *mdev); 110 void mlx5_fwdump(struct mlx5_core_dev *mdev); 111 void mlx5_fwdump_clean(struct mlx5_core_dev *mdev); 112 113 struct mlx5_crspace_regmap { 114 uint32_t addr; 115 unsigned cnt; 116 }; 117 118 extern struct pci_driver mlx5_core_driver; 119 120 SYSCTL_DECL(_hw_mlx5); 121 122 enum { 123 MLX5_NIC_IFC_FULL = 0, 124 MLX5_NIC_IFC_DISABLED = 1, 125 MLX5_NIC_IFC_NO_DRAM_NIC = 2, 126 MLX5_NIC_IFC_INVALID = 3, 127 MLX5_NIC_IFC_SW_RESET = 7, 128 }; 129 130 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev); 131 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state); 132 133 #endif /* __MLX5_CORE_H__ */ 134