1 /*-
2 * Copyright (c) 2022 NVIDIA corporation & affiliates.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28 #include <dev/mlx5/driver.h>
29 #include <dev/mlx5/device.h>
30 #include <dev/mlx5/mlx5_ifc.h>
31 #include <dev/mlx5/mlx5_core/mlx5_fc_cmd.h>
32 #include <dev/mlx5/mlx5_core/mlx5_core.h>
33
mlx5_cmd_fc_bulk_alloc(struct mlx5_core_dev * dev,enum mlx5_fc_bulk_alloc_bitmask alloc_bitmask,u32 * id)34 int mlx5_cmd_fc_bulk_alloc(struct mlx5_core_dev *dev,
35 enum mlx5_fc_bulk_alloc_bitmask alloc_bitmask,
36 u32 *id)
37 {
38 u32 out[MLX5_ST_SZ_DW(alloc_flow_counter_out)] = {};
39 u32 in[MLX5_ST_SZ_DW(alloc_flow_counter_in)] = {};
40 int err;
41
42 MLX5_SET(alloc_flow_counter_in, in, opcode,
43 MLX5_CMD_OP_ALLOC_FLOW_COUNTER);
44 MLX5_SET(alloc_flow_counter_in, in, flow_counter_bulk, alloc_bitmask);
45
46 err = mlx5_cmd_exec_inout(dev, alloc_flow_counter, in, out);
47 if (!err)
48 *id = MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
49 return err;
50 }
51
mlx5_cmd_fc_alloc(struct mlx5_core_dev * dev,u32 * id)52 int mlx5_cmd_fc_alloc(struct mlx5_core_dev *dev, u32 *id)
53 {
54 return mlx5_cmd_fc_bulk_alloc(dev, 0, id);
55 }
56
mlx5_cmd_fc_free(struct mlx5_core_dev * dev,u32 id)57 int mlx5_cmd_fc_free(struct mlx5_core_dev *dev, u32 id)
58 {
59 u32 in[MLX5_ST_SZ_DW(dealloc_flow_counter_in)] = {};
60
61 MLX5_SET(dealloc_flow_counter_in, in, opcode,
62 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
63 MLX5_SET(dealloc_flow_counter_in, in, flow_counter_id, id);
64 return mlx5_cmd_exec_in(dev, dealloc_flow_counter, in);
65 }
66
mlx5_cmd_fc_query(struct mlx5_core_dev * dev,u32 id,u64 * packets,u64 * bytes)67 int mlx5_cmd_fc_query(struct mlx5_core_dev *dev, u32 id,
68 u64 *packets, u64 *bytes)
69 {
70 u32 out[MLX5_ST_SZ_BYTES(query_flow_counter_out) +
71 MLX5_ST_SZ_BYTES(traffic_counter)] = {};
72 u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {};
73 void *stats;
74 int err = 0;
75
76 MLX5_SET(query_flow_counter_in, in, opcode,
77 MLX5_CMD_OP_QUERY_FLOW_COUNTER);
78 MLX5_SET(query_flow_counter_in, in, op_mod, 0);
79 MLX5_SET(query_flow_counter_in, in, flow_counter_id, id);
80 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
81 if (err)
82 return err;
83
84 stats = MLX5_ADDR_OF(query_flow_counter_out, out, flow_statistics);
85 *packets = MLX5_GET64(traffic_counter, stats, packets);
86 *bytes = MLX5_GET64(traffic_counter, stats, octets);
87 return 0;
88 }
89
mlx5_cmd_fc_bulk_query(struct mlx5_core_dev * dev,u32 base_id,int bulk_len,u32 * out)90 int mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, u32 base_id, int bulk_len,
91 u32 *out)
92 {
93 int outlen = mlx5_cmd_fc_get_bulk_query_out_len(bulk_len);
94 u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {};
95
96 MLX5_SET(query_flow_counter_in, in, opcode,
97 MLX5_CMD_OP_QUERY_FLOW_COUNTER);
98 MLX5_SET(query_flow_counter_in, in, flow_counter_id, base_id);
99 MLX5_SET(query_flow_counter_in, in, num_of_counters, bulk_len);
100 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
101 }
102
103