1 /*- 2 * Copyright (C) 2018 Cavium Inc. 3 * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> 4 * Copyright (c) 2014 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * This software was developed by Semihalf under 8 * the sponsorship of the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* Generic ECAM PCIe driver */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include "opt_platform.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/malloc.h> 42 #include <sys/kernel.h> 43 #include <sys/rman.h> 44 #include <sys/module.h> 45 #include <sys/bus.h> 46 #include <sys/endian.h> 47 #include <sys/cpuset.h> 48 #include <sys/rwlock.h> 49 50 #include <contrib/dev/acpica/include/acpi.h> 51 #include <contrib/dev/acpica/include/accommon.h> 52 53 #include <dev/acpica/acpivar.h> 54 #include <dev/acpica/acpi_pcibvar.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcib_private.h> 59 #include <dev/pci/pci_host_generic.h> 60 61 #include <machine/cpu.h> 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include "pcib_if.h" 66 #include "acpi_bus_if.h" 67 68 /* Assembling ECAM Configuration Address */ 69 #define PCIE_BUS_SHIFT 20 70 #define PCIE_SLOT_SHIFT 15 71 #define PCIE_FUNC_SHIFT 12 72 #define PCIE_BUS_MASK 0xFF 73 #define PCIE_SLOT_MASK 0x1F 74 #define PCIE_FUNC_MASK 0x07 75 #define PCIE_REG_MASK 0xFFF 76 77 #define PCIE_ADDR_OFFSET(bus, slot, func, reg) \ 78 ((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT) | \ 79 (((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \ 80 (((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \ 81 ((reg) & PCIE_REG_MASK)) 82 83 #define PCI_IO_WINDOW_OFFSET 0x1000 84 85 #define SPACE_CODE_SHIFT 24 86 #define SPACE_CODE_MASK 0x3 87 #define SPACE_CODE_IO_SPACE 0x1 88 #define PROPS_CELL_SIZE 1 89 #define PCI_ADDR_CELL_SIZE 2 90 91 struct generic_pcie_acpi_softc { 92 struct generic_pcie_core_softc base; 93 ACPI_BUFFER ap_prt; /* interrupt routing table */ 94 }; 95 96 /* Forward prototypes */ 97 98 static int generic_pcie_acpi_probe(device_t dev); 99 static ACPI_STATUS pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *, void *); 100 static int generic_pcie_acpi_read_ivar(device_t, device_t, int, uintptr_t *); 101 102 /* 103 * generic_pcie_acpi_probe - look for root bridge flag 104 */ 105 static int 106 generic_pcie_acpi_probe(device_t dev) 107 { 108 ACPI_DEVICE_INFO *devinfo; 109 ACPI_HANDLE h; 110 int root; 111 112 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || 113 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) 114 return (ENXIO); 115 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; 116 AcpiOsFree(devinfo); 117 if (!root) 118 return (ENXIO); 119 120 device_set_desc(dev, "Generic PCI host controller"); 121 return (BUS_PROBE_GENERIC); 122 } 123 124 /* 125 * pci_host_generic_acpi_parse_resource - parse PCI memory, IO and bus spaces 126 * 'produced' by this bridge 127 */ 128 static ACPI_STATUS 129 pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *res, void *arg) 130 { 131 device_t dev = (device_t)arg; 132 struct generic_pcie_acpi_softc *sc; 133 struct rman *rm; 134 rman_res_t min, max, off; 135 int r; 136 137 rm = NULL; 138 sc = device_get_softc(dev); 139 r = sc->base.nranges; 140 switch (res->Type) { 141 case ACPI_RESOURCE_TYPE_ADDRESS16: 142 min = res->Data.Address16.Address.Minimum; 143 max = res->Data.Address16.Address.Maximum; 144 break; 145 case ACPI_RESOURCE_TYPE_ADDRESS32: 146 min = res->Data.Address32.Address.Minimum; 147 max = res->Data.Address32.Address.Maximum; 148 off = res->Data.Address32.Address.TranslationOffset; 149 break; 150 case ACPI_RESOURCE_TYPE_ADDRESS64: 151 if (res->Data.Address.ResourceType != ACPI_MEMORY_RANGE) 152 break; 153 min = res->Data.Address64.Address.Minimum; 154 max = res->Data.Address64.Address.Maximum; 155 off = res->Data.Address64.Address.TranslationOffset; 156 break; 157 default: 158 return (AE_OK); 159 } 160 161 /* Save detected ranges */ 162 if (res->Data.Address.ResourceType == ACPI_MEMORY_RANGE || 163 res->Data.Address.ResourceType == ACPI_IO_RANGE) { 164 sc->base.ranges[r].pci_base = min; 165 sc->base.ranges[r].phys_base = min + off; 166 sc->base.ranges[r].size = max - min + 1; 167 if (res->Data.Address.ResourceType == ACPI_MEMORY_RANGE) 168 sc->base.ranges[r].flags |= FLAG_MEM; 169 else if (res->Data.Address.ResourceType == ACPI_IO_RANGE) 170 sc->base.ranges[r].flags |= FLAG_IO; 171 sc->base.nranges++; 172 } else if (res->Data.Address.ResourceType == ACPI_BUS_NUMBER_RANGE) { 173 sc->base.bus_start = min; 174 sc->base.bus_end = max; 175 } 176 return (AE_OK); 177 } 178 179 static int 180 pci_host_acpi_get_ecam_resource(device_t dev) 181 { 182 struct generic_pcie_acpi_softc *sc; 183 struct acpi_device *ad; 184 struct resource_list *rl; 185 ACPI_TABLE_HEADER *hdr; 186 ACPI_MCFG_ALLOCATION *mcfg_entry, *mcfg_end; 187 ACPI_HANDLE handle; 188 ACPI_STATUS status; 189 rman_res_t base, start, end; 190 int found, val; 191 192 sc = device_get_softc(dev); 193 handle = acpi_get_handle(dev); 194 195 /* Try MCFG first */ 196 status = AcpiGetTable(ACPI_SIG_MCFG, 1, &hdr); 197 if (ACPI_SUCCESS(status)) { 198 found = FALSE; 199 mcfg_end = (ACPI_MCFG_ALLOCATION *)((char *)hdr + hdr->Length); 200 mcfg_entry = (ACPI_MCFG_ALLOCATION *)((ACPI_TABLE_MCFG *)hdr + 1); 201 while (mcfg_entry < mcfg_end && !found) { 202 if (mcfg_entry->PciSegment == sc->base.ecam && 203 mcfg_entry->StartBusNumber <= sc->base.bus_start && 204 mcfg_entry->EndBusNumber >= sc->base.bus_start) 205 found = TRUE; 206 else 207 mcfg_entry++; 208 } 209 if (found) { 210 if (mcfg_entry->EndBusNumber < sc->base.bus_end) { 211 device_printf(dev, "bus end mismatch! expected %d found %d.\n", 212 sc->base.bus_end, (int)mcfg_entry->EndBusNumber); 213 sc->base.bus_end = mcfg_entry->EndBusNumber; 214 } 215 base = mcfg_entry->Address; 216 } else { 217 device_printf(dev, "MCFG exists, but does not have bus %d-%d\n", 218 sc->base.bus_start, sc->base.bus_end); 219 return (ENXIO); 220 } 221 } else { 222 status = acpi_GetInteger(handle, "_CBA", &val); 223 if (ACPI_SUCCESS(status)) 224 base = val; 225 else 226 return (ENXIO); 227 } 228 229 /* add as MEM rid 0 */ 230 ad = device_get_ivars(dev); 231 rl = &ad->ad_rl; 232 start = base + (sc->base.bus_start << PCIE_BUS_SHIFT); 233 end = base + ((sc->base.bus_end + 1) << PCIE_BUS_SHIFT) - 1; 234 resource_list_add(rl, SYS_RES_MEMORY, 0, start, end, end - start + 1); 235 if (bootverbose) 236 device_printf(dev, "ECAM for bus %d-%d at mem %jx-%jx\n", 237 sc->base.bus_start, sc->base.bus_end, start, end); 238 return (0); 239 } 240 241 static int 242 pci_host_generic_acpi_attach(device_t dev) 243 { 244 struct generic_pcie_acpi_softc *sc; 245 ACPI_HANDLE handle; 246 uint64_t phys_base; 247 uint64_t pci_base; 248 uint64_t size; 249 ACPI_STATUS status; 250 int error; 251 int tuple; 252 253 sc = device_get_softc(dev); 254 handle = acpi_get_handle(dev); 255 256 /* Get Start bus number for the PCI host bus is from _BBN method */ 257 status = acpi_GetInteger(handle, "_BBN", &sc->base.bus_start); 258 if (ACPI_FAILURE(status)) { 259 device_printf(dev, "No _BBN, using start bus 0\n"); 260 sc->base.bus_start = 0; 261 } 262 sc->base.bus_end = 255; 263 264 /* Get PCI Segment (domain) needed for MCFG lookup */ 265 status = acpi_GetInteger(handle, "_SEG", &sc->base.ecam); 266 if (ACPI_FAILURE(status)) { 267 device_printf(dev, "No _SEG for PCI Bus, using segment 0\n"); 268 sc->base.ecam = 0; 269 } 270 271 /* Bus decode ranges */ 272 status = AcpiWalkResources(handle, "_CRS", 273 pci_host_generic_acpi_parse_resource, (void *)dev); 274 if (ACPI_FAILURE(status)) 275 return (ENXIO); 276 277 /* Coherency attribute */ 278 if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent))) 279 sc->base.coherent = 0; 280 if (bootverbose) 281 device_printf(dev, "Bus is%s cache-coherent\n", 282 sc->base.coherent ? "" : " not"); 283 284 /* add config space resource */ 285 pci_host_acpi_get_ecam_resource(dev); 286 acpi_pcib_fetch_prt(dev, &sc->ap_prt); 287 288 error = pci_host_generic_core_attach(dev); 289 if (error != 0) 290 return (error); 291 292 for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) { 293 phys_base = sc->base.ranges[tuple].phys_base; 294 pci_base = sc->base.ranges[tuple].pci_base; 295 size = sc->base.ranges[tuple].size; 296 if (phys_base == 0 || size == 0) 297 continue; /* empty range element */ 298 if (sc->base.ranges[tuple].flags & FLAG_MEM) { 299 error = rman_manage_region(&sc->base.mem_rman, 300 phys_base, phys_base + size - 1); 301 } else if (sc->base.ranges[tuple].flags & FLAG_IO) { 302 error = rman_manage_region(&sc->base.io_rman, 303 pci_base + PCI_IO_WINDOW_OFFSET, 304 pci_base + PCI_IO_WINDOW_OFFSET + size - 1); 305 } else 306 continue; 307 if (error) { 308 device_printf(dev, "rman_manage_region() failed." 309 "error = %d\n", error); 310 rman_fini(&sc->base.mem_rman); 311 return (error); 312 } 313 } 314 315 device_add_child(dev, "pci", -1); 316 return (bus_generic_attach(dev)); 317 } 318 319 static int 320 generic_pcie_acpi_read_ivar(device_t dev, device_t child, int index, 321 uintptr_t *result) 322 { 323 struct generic_pcie_acpi_softc *sc; 324 325 sc = device_get_softc(dev); 326 327 if (index == PCIB_IVAR_BUS) { 328 *result = sc->base.bus_start; 329 return (0); 330 } 331 332 if (index == PCIB_IVAR_DOMAIN) { 333 *result = sc->base.ecam; 334 return (0); 335 } 336 337 if (bootverbose) 338 device_printf(dev, "ERROR: Unknown index %d.\n", index); 339 return (ENOENT); 340 } 341 342 static int 343 generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin) 344 { 345 struct generic_pcie_acpi_softc *sc; 346 347 sc = device_get_softc(bus); 348 return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt)); 349 } 350 351 static u_int 352 generic_pcie_get_xref(device_t pci, device_t child) 353 { 354 struct generic_pcie_acpi_softc *sc; 355 uintptr_t rid; 356 u_int xref, devid; 357 int err; 358 359 sc = device_get_softc(pci); 360 err = pcib_get_id(pci, child, PCI_ID_RID, &rid); 361 if (err != 0) 362 return (ACPI_MSI_XREF); 363 err = acpi_iort_map_pci_msi(sc->base.ecam, rid, &xref, &devid); 364 if (err != 0) 365 return (ACPI_MSI_XREF); 366 return (xref); 367 } 368 369 static u_int 370 generic_pcie_map_id(device_t pci, device_t child, uintptr_t *id) 371 { 372 struct generic_pcie_acpi_softc *sc; 373 uintptr_t rid; 374 u_int xref, devid; 375 int err; 376 377 sc = device_get_softc(pci); 378 err = pcib_get_id(pci, child, PCI_ID_RID, &rid); 379 if (err != 0) 380 return (err); 381 err = acpi_iort_map_pci_msi(sc->base.ecam, rid, &xref, &devid); 382 if (err == 0) 383 *id = devid; 384 else 385 *id = rid; /* RID not in IORT, likely FW bug, ignore */ 386 return (0); 387 } 388 389 static int 390 generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count, 391 int maxcount, int *irqs) 392 { 393 394 #if defined(INTRNG) 395 return (intr_alloc_msi(pci, child, generic_pcie_get_xref(pci, child), 396 count, maxcount, irqs)); 397 #else 398 return (ENXIO); 399 #endif 400 } 401 402 static int 403 generic_pcie_acpi_release_msi(device_t pci, device_t child, int count, 404 int *irqs) 405 { 406 407 #if defined(INTRNG) 408 return (intr_release_msi(pci, child, generic_pcie_get_xref(pci, child), 409 count, irqs)); 410 #else 411 return (ENXIO); 412 #endif 413 } 414 415 static int 416 generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr, 417 uint32_t *data) 418 { 419 420 #if defined(INTRNG) 421 return (intr_map_msi(pci, child, generic_pcie_get_xref(pci, child), irq, 422 addr, data)); 423 #else 424 return (ENXIO); 425 #endif 426 } 427 428 static int 429 generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq) 430 { 431 432 #if defined(INTRNG) 433 return (intr_alloc_msix(pci, child, generic_pcie_get_xref(pci, child), 434 irq)); 435 #else 436 return (ENXIO); 437 #endif 438 } 439 440 static int 441 generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq) 442 { 443 444 #if defined(INTRNG) 445 return (intr_release_msix(pci, child, generic_pcie_get_xref(pci, child), 446 irq)); 447 #else 448 return (ENXIO); 449 #endif 450 } 451 452 static int 453 generic_pcie_acpi_get_id(device_t pci, device_t child, enum pci_id_type type, 454 uintptr_t *id) 455 { 456 457 if (type == PCI_ID_MSI) 458 return (generic_pcie_map_id(pci, child, id)); 459 else 460 return (pcib_get_id(pci, child, type, id)); 461 } 462 463 static device_method_t generic_pcie_acpi_methods[] = { 464 DEVMETHOD(device_probe, generic_pcie_acpi_probe), 465 DEVMETHOD(device_attach, pci_host_generic_acpi_attach), 466 DEVMETHOD(bus_read_ivar, generic_pcie_acpi_read_ivar), 467 468 /* pcib interface */ 469 DEVMETHOD(pcib_route_interrupt, generic_pcie_acpi_route_interrupt), 470 DEVMETHOD(pcib_alloc_msi, generic_pcie_acpi_alloc_msi), 471 DEVMETHOD(pcib_release_msi, generic_pcie_acpi_release_msi), 472 DEVMETHOD(pcib_alloc_msix, generic_pcie_acpi_alloc_msix), 473 DEVMETHOD(pcib_release_msix, generic_pcie_acpi_release_msix), 474 DEVMETHOD(pcib_map_msi, generic_pcie_acpi_map_msi), 475 DEVMETHOD(pcib_get_id, generic_pcie_acpi_get_id), 476 477 DEVMETHOD_END 478 }; 479 480 DEFINE_CLASS_1(pcib, generic_pcie_acpi_driver, generic_pcie_acpi_methods, 481 sizeof(struct generic_pcie_acpi_softc), generic_pcie_core_driver); 482 483 static devclass_t generic_pcie_acpi_devclass; 484 485 DRIVER_MODULE(pcib, acpi, generic_pcie_acpi_driver, generic_pcie_acpi_devclass, 486 0, 0); 487