1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012 Thomas Skibo 5 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* Generic driver to attach sdhci controllers on simplebus. 30 * Derived mainly from sdhci_pci.c 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/lock.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <sys/resource.h> 44 #include <sys/rman.h> 45 #include <sys/sysctl.h> 46 #include <sys/taskqueue.h> 47 48 #include <machine/bus.h> 49 #include <machine/resource.h> 50 51 #include <dev/fdt/fdt_common.h> 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/mmc/bridge.h> 56 57 #include <dev/sdhci/sdhci.h> 58 59 #include "mmcbr_if.h" 60 #include "sdhci_if.h" 61 62 #include "opt_mmccam.h" 63 64 #define MAX_SLOTS 6 65 #define SDHCI_FDT_ARMADA38X 1 66 #define SDHCI_FDT_GENERIC 2 67 #define SDHCI_FDT_XLNX_ZY7 3 68 #define SDHCI_FDT_QUALCOMM 4 69 70 static struct ofw_compat_data compat_data[] = { 71 { "marvell,armada-380-sdhci", SDHCI_FDT_ARMADA38X }, 72 { "sdhci_generic", SDHCI_FDT_GENERIC }, 73 { "qcom,sdhci-msm-v4", SDHCI_FDT_QUALCOMM }, 74 { "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 }, 75 { NULL, 0 } 76 }; 77 78 struct sdhci_fdt_softc { 79 device_t dev; /* Controller device */ 80 u_int quirks; /* Chip specific quirks */ 81 u_int caps; /* If we override SDHCI_CAPABILITIES */ 82 uint32_t max_clk; /* Max possible freq */ 83 uint8_t sdma_boundary; /* If we override the SDMA boundary */ 84 struct resource *irq_res; /* IRQ resource */ 85 void *intrhand; /* Interrupt handle */ 86 87 int num_slots; /* Number of slots on this controller*/ 88 struct sdhci_slot slots[MAX_SLOTS]; 89 struct resource *mem_res[MAX_SLOTS]; /* Memory resource */ 90 91 bool wp_inverted; /* WP pin is inverted */ 92 bool no_18v; /* No 1.8V support */ 93 }; 94 95 static uint8_t 96 sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) 97 { 98 struct sdhci_fdt_softc *sc = device_get_softc(dev); 99 100 return (bus_read_1(sc->mem_res[slot->num], off)); 101 } 102 103 static void 104 sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, 105 uint8_t val) 106 { 107 struct sdhci_fdt_softc *sc = device_get_softc(dev); 108 109 bus_write_1(sc->mem_res[slot->num], off, val); 110 } 111 112 static uint16_t 113 sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) 114 { 115 struct sdhci_fdt_softc *sc = device_get_softc(dev); 116 117 return (bus_read_2(sc->mem_res[slot->num], off)); 118 } 119 120 static void 121 sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, 122 uint16_t val) 123 { 124 struct sdhci_fdt_softc *sc = device_get_softc(dev); 125 126 bus_write_2(sc->mem_res[slot->num], off, val); 127 } 128 129 static uint32_t 130 sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) 131 { 132 struct sdhci_fdt_softc *sc = device_get_softc(dev); 133 uint32_t val32; 134 135 val32 = bus_read_4(sc->mem_res[slot->num], off); 136 if (off == SDHCI_CAPABILITIES && sc->no_18v) 137 val32 &= ~SDHCI_CAN_VDD_180; 138 139 return (val32); 140 } 141 142 static void 143 sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, 144 uint32_t val) 145 { 146 struct sdhci_fdt_softc *sc = device_get_softc(dev); 147 148 bus_write_4(sc->mem_res[slot->num], off, val); 149 } 150 151 static void 152 sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot, 153 bus_size_t off, uint32_t *data, bus_size_t count) 154 { 155 struct sdhci_fdt_softc *sc = device_get_softc(dev); 156 157 bus_read_multi_4(sc->mem_res[slot->num], off, data, count); 158 } 159 160 static void 161 sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot, 162 bus_size_t off, uint32_t *data, bus_size_t count) 163 { 164 struct sdhci_fdt_softc *sc = device_get_softc(dev); 165 166 bus_write_multi_4(sc->mem_res[slot->num], off, data, count); 167 } 168 169 static void 170 sdhci_fdt_intr(void *arg) 171 { 172 struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg; 173 int i; 174 175 for (i = 0; i < sc->num_slots; i++) 176 sdhci_generic_intr(&sc->slots[i]); 177 } 178 179 static int 180 sdhci_fdt_get_ro(device_t bus, device_t dev) 181 { 182 struct sdhci_fdt_softc *sc = device_get_softc(bus); 183 184 return (sdhci_generic_get_ro(bus, dev) ^ sc->wp_inverted); 185 } 186 187 static int 188 sdhci_fdt_probe(device_t dev) 189 { 190 struct sdhci_fdt_softc *sc = device_get_softc(dev); 191 phandle_t node; 192 pcell_t cid; 193 194 sc->quirks = 0; 195 sc->num_slots = 1; 196 sc->max_clk = 0; 197 198 if (!ofw_bus_status_okay(dev)) 199 return (ENXIO); 200 201 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { 202 case SDHCI_FDT_ARMADA38X: 203 sc->quirks = SDHCI_QUIRK_BROKEN_AUTO_STOP; 204 device_set_desc(dev, "ARMADA38X SDHCI controller"); 205 break; 206 case SDHCI_FDT_GENERIC: 207 device_set_desc(dev, "generic fdt SDHCI controller"); 208 break; 209 case SDHCI_FDT_QUALCOMM: 210 sc->quirks = SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE | 211 SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY; 212 sc->sdma_boundary = SDHCI_BLKSZ_SDMA_BNDRY_4K; 213 device_set_desc(dev, "Qualcomm FDT SDHCI controller"); 214 break; 215 case SDHCI_FDT_XLNX_ZY7: 216 sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; 217 device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller"); 218 break; 219 default: 220 return (ENXIO); 221 } 222 223 node = ofw_bus_get_node(dev); 224 225 /* Allow dts to patch quirks, slots, and max-frequency. */ 226 if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0) 227 sc->quirks = cid; 228 if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0) 229 sc->num_slots = cid; 230 if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0) 231 sc->max_clk = cid; 232 if (OF_hasprop(node, "no-1-8-v")) 233 sc->no_18v = true; 234 if (OF_hasprop(node, "wp-inverted")) 235 sc->wp_inverted = true; 236 237 return (0); 238 } 239 240 static int 241 sdhci_fdt_attach(device_t dev) 242 { 243 struct sdhci_fdt_softc *sc = device_get_softc(dev); 244 struct sdhci_slot *slot; 245 int err, slots, rid, i; 246 247 sc->dev = dev; 248 249 /* Allocate IRQ. */ 250 rid = 0; 251 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 252 RF_ACTIVE); 253 if (sc->irq_res == NULL) { 254 device_printf(dev, "Can't allocate IRQ\n"); 255 return (ENOMEM); 256 } 257 258 /* Scan all slots. */ 259 slots = sc->num_slots; /* number of slots determined in probe(). */ 260 sc->num_slots = 0; 261 for (i = 0; i < slots; i++) { 262 slot = &sc->slots[sc->num_slots]; 263 264 /* Allocate memory. */ 265 rid = 0; 266 sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 267 &rid, RF_ACTIVE); 268 if (sc->mem_res[i] == NULL) { 269 device_printf(dev, 270 "Can't allocate memory for slot %d\n", i); 271 continue; 272 } 273 274 slot->quirks = sc->quirks; 275 slot->caps = sc->caps; 276 slot->max_clk = sc->max_clk; 277 slot->sdma_boundary = sc->sdma_boundary; 278 279 if (sdhci_init_slot(dev, slot, i) != 0) 280 continue; 281 282 sc->num_slots++; 283 } 284 device_printf(dev, "%d slot(s) allocated\n", sc->num_slots); 285 286 /* Activate the interrupt */ 287 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 288 NULL, sdhci_fdt_intr, sc, &sc->intrhand); 289 if (err) { 290 device_printf(dev, "Cannot setup IRQ\n"); 291 return (err); 292 } 293 294 /* Process cards detection. */ 295 for (i = 0; i < sc->num_slots; i++) 296 sdhci_start_slot(&sc->slots[i]); 297 298 return (0); 299 } 300 301 static int 302 sdhci_fdt_detach(device_t dev) 303 { 304 struct sdhci_fdt_softc *sc = device_get_softc(dev); 305 int i; 306 307 bus_generic_detach(dev); 308 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 309 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), 310 sc->irq_res); 311 312 for (i = 0; i < sc->num_slots; i++) { 313 sdhci_cleanup_slot(&sc->slots[i]); 314 bus_release_resource(dev, SYS_RES_MEMORY, 315 rman_get_rid(sc->mem_res[i]), sc->mem_res[i]); 316 } 317 318 return (0); 319 } 320 321 static device_method_t sdhci_fdt_methods[] = { 322 /* device_if */ 323 DEVMETHOD(device_probe, sdhci_fdt_probe), 324 DEVMETHOD(device_attach, sdhci_fdt_attach), 325 DEVMETHOD(device_detach, sdhci_fdt_detach), 326 327 /* Bus interface */ 328 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), 329 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), 330 331 /* mmcbr_if */ 332 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios), 333 DEVMETHOD(mmcbr_request, sdhci_generic_request), 334 DEVMETHOD(mmcbr_get_ro, sdhci_fdt_get_ro), 335 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), 336 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), 337 338 /* SDHCI registers accessors */ 339 DEVMETHOD(sdhci_read_1, sdhci_fdt_read_1), 340 DEVMETHOD(sdhci_read_2, sdhci_fdt_read_2), 341 DEVMETHOD(sdhci_read_4, sdhci_fdt_read_4), 342 DEVMETHOD(sdhci_read_multi_4, sdhci_fdt_read_multi_4), 343 DEVMETHOD(sdhci_write_1, sdhci_fdt_write_1), 344 DEVMETHOD(sdhci_write_2, sdhci_fdt_write_2), 345 DEVMETHOD(sdhci_write_4, sdhci_fdt_write_4), 346 DEVMETHOD(sdhci_write_multi_4, sdhci_fdt_write_multi_4), 347 348 DEVMETHOD_END 349 }; 350 351 static driver_t sdhci_fdt_driver = { 352 "sdhci_fdt", 353 sdhci_fdt_methods, 354 sizeof(struct sdhci_fdt_softc), 355 }; 356 static devclass_t sdhci_fdt_devclass; 357 358 DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass, 359 NULL, NULL); 360 SDHCI_DEPEND(sdhci_fdt); 361 #ifndef MMCCAM 362 MMC_DECLARE_BRIDGE(sdhci_fdt); 363 #endif 364