1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
6 * Copyright (c) 2000, BSDi
7 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice unmodified, this list of conditions, and the following
15 * disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/libkern.h>
36 #include <sys/module.h>
37 #include <sys/pciio.h>
38 #include <sys/sbuf.h>
39 #include <sys/smp.h>
40
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43 #include <dev/ofw/ofw_pci.h>
44 #include <dev/ofw/openfirm.h>
45
46 #include <machine/bus.h>
47 #include <machine/intr_machdep.h>
48 #include <machine/resource.h>
49
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pci_private.h>
53
54 #include "ofw_pcibus.h"
55 #include "pcib_if.h"
56 #include "pci_if.h"
57
58 typedef uint32_t ofw_pci_intr_t;
59
60 /* Methods */
61 static device_probe_t ofw_pcibus_probe;
62 static device_attach_t ofw_pcibus_attach;
63 static pci_alloc_devinfo_t ofw_pcibus_alloc_devinfo;
64 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
65 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
66 static bus_child_deleted_t ofw_pcibus_child_deleted;
67 static int ofw_pcibus_child_pnpinfo_method(device_t cbdev, device_t child,
68 struct sbuf *sb);
69
70 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
71 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
72
73 static device_method_t ofw_pcibus_methods[] = {
74 /* Device interface */
75 DEVMETHOD(device_probe, ofw_pcibus_probe),
76 DEVMETHOD(device_attach, ofw_pcibus_attach),
77
78 /* Bus interface */
79 DEVMETHOD(bus_child_deleted, ofw_pcibus_child_deleted),
80 DEVMETHOD(bus_child_pnpinfo, ofw_pcibus_child_pnpinfo_method),
81 DEVMETHOD(bus_rescan, bus_null_rescan),
82 DEVMETHOD(bus_get_cpus, ofw_pcibus_get_cpus),
83 DEVMETHOD(bus_get_domain, ofw_pcibus_get_domain),
84
85 /* PCI interface */
86 DEVMETHOD(pci_alloc_devinfo, ofw_pcibus_alloc_devinfo),
87 DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
88
89 /* ofw_bus interface */
90 DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo),
91 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
92 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
93 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
94 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
95 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
96
97 DEVMETHOD_END
98 };
99
100 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
101 sizeof(struct pci_softc), pci_driver);
102 EARLY_DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, 0, 0, BUS_PASS_BUS);
103 MODULE_VERSION(ofw_pcibus, 1);
104 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
105
106 static int ofw_devices_only = 0;
107 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only);
108
109 static int
ofw_pcibus_probe(device_t dev)110 ofw_pcibus_probe(device_t dev)
111 {
112
113 if (ofw_bus_get_node(dev) == -1)
114 return (ENXIO);
115 device_set_desc(dev, "OFW PCI bus");
116
117 return (BUS_PROBE_DEFAULT);
118 }
119
120 static int
ofw_pcibus_attach(device_t dev)121 ofw_pcibus_attach(device_t dev)
122 {
123 u_int busno, domain;
124 int error;
125
126 error = pci_attach_common(dev);
127 if (error)
128 return (error);
129 domain = pcib_get_domain(dev);
130 busno = pcib_get_bus(dev);
131
132 /*
133 * Attach those children represented in the device tree.
134 */
135
136 ofw_pcibus_enum_devtree(dev, domain, busno);
137
138 /*
139 * We now attach any laggard devices. FDT, for instance, allows
140 * the device tree to enumerate only some PCI devices. Apple's
141 * OF device tree on some Grackle-based hardware can also miss
142 * functions on multi-function cards.
143 */
144
145 if (!ofw_devices_only)
146 ofw_pcibus_enum_bus(dev, domain, busno);
147
148 return (bus_generic_attach(dev));
149 }
150
151 struct pci_devinfo *
ofw_pcibus_alloc_devinfo(device_t dev)152 ofw_pcibus_alloc_devinfo(device_t dev)
153 {
154 struct ofw_pcibus_devinfo *dinfo;
155
156 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
157 return (&dinfo->opd_dinfo);
158 }
159
160 static void
ofw_pcibus_enum_devtree(device_t dev,u_int domain,u_int busno)161 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
162 {
163 device_t pcib;
164 struct ofw_pci_register pcir;
165 struct ofw_pcibus_devinfo *dinfo;
166 phandle_t node, child;
167 u_int func, slot;
168 int intline;
169
170 pcib = device_get_parent(dev);
171 node = ofw_bus_get_node(dev);
172
173 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
174 if (OF_getencprop(child, "reg", (pcell_t *)&pcir,
175 sizeof(pcir)) == -1)
176 continue;
177 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
178 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
179
180 /* Some OFW device trees contain dupes. */
181 if (pci_find_dbsf(domain, busno, slot, func) != NULL)
182 continue;
183
184 /*
185 * The preset in the intline register is usually bogus. Reset
186 * it such that the PCI code will reroute the interrupt if
187 * needed.
188 */
189
190 intline = PCI_INVALID_IRQ;
191 if (OF_getproplen(child, "interrupts") > 0)
192 intline = 0;
193 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
194 intline, 1);
195
196 /*
197 * Now set up the PCI and OFW bus layer devinfo and add it
198 * to the PCI bus.
199 */
200
201 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, dev,
202 domain, busno, slot, func);
203 if (dinfo == NULL)
204 continue;
205 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
206 0) {
207 pci_freecfg((struct pci_devinfo *)dinfo);
208 continue;
209 }
210 dinfo->opd_dma_tag = NULL;
211 pci_add_child(dev, (struct pci_devinfo *)dinfo);
212
213 /*
214 * Some devices don't have an intpin set, but do have
215 * interrupts. These are fully specified, and set in the
216 * interrupts property, so add that value to the device's
217 * resource list.
218 */
219 if (dinfo->opd_dinfo.cfg.intpin == 0)
220 ofw_bus_intr_to_rl(dev, child,
221 &dinfo->opd_dinfo.resources, NULL);
222 }
223 }
224
225 /*
226 * The following is an almost exact clone of pci_add_children(), with the
227 * addition that it (a) will not add children that have already been added,
228 * and (b) will set up the OFW devinfo to point to invalid values. This is
229 * to handle non-enumerated PCI children as exist in FDT and on the second
230 * function of the Rage 128 in my Blue & White G3.
231 */
232
233 static void
ofw_pcibus_enum_bus(device_t dev,u_int domain,u_int busno)234 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
235 {
236 device_t pcib;
237 struct ofw_pcibus_devinfo *dinfo;
238 int maxslots;
239 int s, f, pcifunchigh;
240 uint8_t hdrtype;
241
242 pcib = device_get_parent(dev);
243
244 maxslots = PCIB_MAXSLOTS(pcib);
245 for (s = 0; s <= maxslots; s++) {
246 pcifunchigh = 0;
247 f = 0;
248 DELAY(1);
249 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
250 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
251 continue;
252 if (hdrtype & PCIM_MFDEV)
253 pcifunchigh = PCI_FUNCMAX;
254 for (f = 0; f <= pcifunchigh; f++) {
255 /* Filter devices we have already added */
256 if (pci_find_dbsf(domain, busno, s, f) != NULL)
257 continue;
258
259 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
260 pcib, dev, domain, busno, s, f);
261 if (dinfo == NULL)
262 continue;
263
264 dinfo->opd_dma_tag = NULL;
265 dinfo->opd_obdinfo.obd_node = -1;
266
267 dinfo->opd_obdinfo.obd_name = NULL;
268 dinfo->opd_obdinfo.obd_compat = NULL;
269 dinfo->opd_obdinfo.obd_type = NULL;
270 dinfo->opd_obdinfo.obd_model = NULL;
271
272 /*
273 * For non OFW-devices, don't believe 0
274 * for an interrupt.
275 */
276 if (dinfo->opd_dinfo.cfg.intline == 0) {
277 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
278 PCIB_WRITE_CONFIG(pcib, busno, s, f,
279 PCIR_INTLINE, PCI_INVALID_IRQ, 1);
280 }
281
282 pci_add_child(dev, (struct pci_devinfo *)dinfo);
283 }
284 }
285 }
286
287 static void
ofw_pcibus_child_deleted(device_t dev,device_t child)288 ofw_pcibus_child_deleted(device_t dev, device_t child)
289 {
290 struct ofw_pcibus_devinfo *dinfo;
291
292 dinfo = device_get_ivars(child);
293 ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
294 pci_child_deleted(dev, child);
295 }
296
297 static int
ofw_pcibus_child_pnpinfo_method(device_t cbdev,device_t child,struct sbuf * sb)298 ofw_pcibus_child_pnpinfo_method(device_t cbdev, device_t child, struct sbuf *sb)
299 {
300 pci_child_pnpinfo_method(cbdev, child, sb);
301
302 if (ofw_bus_get_node(child) != -1) {
303 sbuf_cat(sb, " "); /* Separate info */
304 ofw_bus_gen_child_pnpinfo(cbdev, child, sb);
305 }
306
307 return (0);
308 }
309
310 static int
ofw_pcibus_assign_interrupt(device_t dev,device_t child)311 ofw_pcibus_assign_interrupt(device_t dev, device_t child)
312 {
313 ofw_pci_intr_t intr[2];
314 phandle_t node, iparent;
315 int isz, icells;
316
317 node = ofw_bus_get_node(child);
318
319 if (node == -1) {
320 /* Non-firmware enumerated child, use standard routing */
321
322 intr[0] = pci_get_intpin(child);
323 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
324 intr[0]));
325 }
326
327 /*
328 * Try to determine the node's interrupt parent so we know which
329 * PIC to use.
330 */
331
332 iparent = -1;
333 if (OF_getencprop(node, "interrupt-parent", &iparent,
334 sizeof(iparent)) < 0)
335 iparent = -1;
336 icells = 1;
337 if (iparent != -1)
338 OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells",
339 &icells, sizeof(icells));
340
341 /*
342 * Any AAPL,interrupts property gets priority and is
343 * fully specified (i.e. does not need routing)
344 */
345
346 isz = OF_getencprop(node, "AAPL,interrupts", intr, sizeof(intr));
347 if (isz == sizeof(intr[0])*icells)
348 return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev,
349 iparent, icells, intr));
350
351 isz = OF_getencprop(node, "interrupts", intr, sizeof(intr));
352 if (isz == sizeof(intr[0])*icells) {
353 if (iparent != -1)
354 intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr);
355 } else {
356 /* No property: our best guess is the intpin. */
357 intr[0] = pci_get_intpin(child);
358 }
359
360 /*
361 * If we got intr from a property, it may or may not be an intpin.
362 * For on-board devices, it frequently is not, and is completely out
363 * of the valid intpin range. For PCI slots, it hopefully is,
364 * otherwise we will have trouble interfacing with non-OFW buses
365 * such as cardbus.
366 * Since we cannot tell which it is without violating layering, we
367 * will always use the route_interrupt method, and treat exceptions
368 * on the level they become apparent.
369 */
370 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0]));
371 }
372
373 static const struct ofw_bus_devinfo *
ofw_pcibus_get_devinfo(device_t bus,device_t dev)374 ofw_pcibus_get_devinfo(device_t bus, device_t dev)
375 {
376 struct ofw_pcibus_devinfo *dinfo;
377
378 dinfo = device_get_ivars(dev);
379 return (&dinfo->opd_obdinfo);
380 }
381
382 int
ofw_pcibus_get_cpus(device_t dev,device_t child,enum cpu_sets op,size_t setsize,cpuset_t * cpuset)383 ofw_pcibus_get_cpus(device_t dev, device_t child, enum cpu_sets op, size_t setsize,
384 cpuset_t *cpuset)
385 {
386 int d, error;
387
388 d = platform_node_numa_domain(ofw_bus_get_node(dev));
389
390 switch (op) {
391 case LOCAL_CPUS:
392 if (setsize != sizeof(cpuset_t))
393 return (EINVAL);
394 *cpuset = cpuset_domain[d];
395 return (0);
396 case INTR_CPUS:
397 error = bus_generic_get_cpus(dev, child, op, setsize, cpuset);
398 if (error != 0)
399 return (error);
400 if (setsize != sizeof(cpuset_t))
401 return (EINVAL);
402 CPU_AND(cpuset, cpuset, &cpuset_domain[d]);
403 return (0);
404 default:
405 return (bus_generic_get_cpus(dev, child, op, setsize, cpuset));
406 }
407 return (0);
408 }
409
410 /*
411 * Fetch the NUMA domain for the given device 'dev'.
412 *
413 * If a device has a _PXM method, map that to a NUMA domain.
414 * Otherwise, pass the request up to the parent.
415 * If there's no matching domain or the domain cannot be
416 * determined, return ENOENT.
417 */
418 int
ofw_pcibus_get_domain(device_t dev,device_t child,int * domain)419 ofw_pcibus_get_domain(device_t dev, device_t child, int *domain)
420 {
421 *domain = platform_node_numa_domain(ofw_bus_get_node(child));
422
423 return (0);
424 }
425