1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 5 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 6 * Copyright (c) 2000, BSDi 7 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org> 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice unmodified, this list of conditions, and the following 15 * disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/libkern.h> 39 #include <sys/module.h> 40 #include <sys/pciio.h> 41 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 #include <dev/ofw/ofw_pci.h> 45 #include <dev/ofw/openfirm.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/resource.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pci_private.h> 54 55 #include "ofw_pcibus.h" 56 #include "pcib_if.h" 57 #include "pci_if.h" 58 59 typedef uint32_t ofw_pci_intr_t; 60 61 /* Methods */ 62 static device_probe_t ofw_pcibus_probe; 63 static device_attach_t ofw_pcibus_attach; 64 static pci_alloc_devinfo_t ofw_pcibus_alloc_devinfo; 65 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt; 66 static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo; 67 static bus_child_deleted_t ofw_pcibus_child_deleted; 68 static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, 69 char *buf, size_t buflen); 70 71 static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno); 72 static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno); 73 74 static device_method_t ofw_pcibus_methods[] = { 75 /* Device interface */ 76 DEVMETHOD(device_probe, ofw_pcibus_probe), 77 DEVMETHOD(device_attach, ofw_pcibus_attach), 78 79 /* Bus interface */ 80 DEVMETHOD(bus_child_deleted, ofw_pcibus_child_deleted), 81 DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method), 82 DEVMETHOD(bus_rescan, bus_null_rescan), 83 84 /* PCI interface */ 85 DEVMETHOD(pci_alloc_devinfo, ofw_pcibus_alloc_devinfo), 86 DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt), 87 88 /* ofw_bus interface */ 89 DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo), 90 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 91 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 92 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 93 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 94 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 95 96 DEVMETHOD_END 97 }; 98 99 static devclass_t pci_devclass; 100 101 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 102 sizeof(struct pci_softc), pci_driver); 103 EARLY_DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0, 104 BUS_PASS_BUS); 105 MODULE_VERSION(ofw_pcibus, 1); 106 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); 107 108 static int ofw_devices_only = 0; 109 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only); 110 111 static int 112 ofw_pcibus_probe(device_t dev) 113 { 114 115 if (ofw_bus_get_node(dev) == -1) 116 return (ENXIO); 117 device_set_desc(dev, "OFW PCI bus"); 118 119 return (BUS_PROBE_DEFAULT); 120 } 121 122 static int 123 ofw_pcibus_attach(device_t dev) 124 { 125 u_int busno, domain; 126 int error; 127 128 error = pci_attach_common(dev); 129 if (error) 130 return (error); 131 domain = pcib_get_domain(dev); 132 busno = pcib_get_bus(dev); 133 134 /* 135 * Attach those children represented in the device tree. 136 */ 137 138 ofw_pcibus_enum_devtree(dev, domain, busno); 139 140 /* 141 * We now attach any laggard devices. FDT, for instance, allows 142 * the device tree to enumerate only some PCI devices. Apple's 143 * OF device tree on some Grackle-based hardware can also miss 144 * functions on multi-function cards. 145 */ 146 147 if (!ofw_devices_only) 148 ofw_pcibus_enum_bus(dev, domain, busno); 149 150 return (bus_generic_attach(dev)); 151 } 152 153 struct pci_devinfo * 154 ofw_pcibus_alloc_devinfo(device_t dev) 155 { 156 struct ofw_pcibus_devinfo *dinfo; 157 158 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 159 return (&dinfo->opd_dinfo); 160 } 161 162 static void 163 ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno) 164 { 165 device_t pcib; 166 struct ofw_pci_register pcir; 167 struct ofw_pcibus_devinfo *dinfo; 168 phandle_t node, child; 169 u_int func, slot; 170 int intline; 171 172 pcib = device_get_parent(dev); 173 node = ofw_bus_get_node(dev); 174 175 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 176 if (OF_getencprop(child, "reg", (pcell_t *)&pcir, 177 sizeof(pcir)) == -1) 178 continue; 179 slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); 180 func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); 181 182 /* Some OFW device trees contain dupes. */ 183 if (pci_find_dbsf(domain, busno, slot, func) != NULL) 184 continue; 185 186 /* 187 * The preset in the intline register is usually bogus. Reset 188 * it such that the PCI code will reroute the interrupt if 189 * needed. 190 */ 191 192 intline = PCI_INVALID_IRQ; 193 if (OF_getproplen(child, "interrupts") > 0) 194 intline = 0; 195 PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE, 196 intline, 1); 197 198 /* 199 * Now set up the PCI and OFW bus layer devinfo and add it 200 * to the PCI bus. 201 */ 202 203 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, dev, 204 domain, busno, slot, func); 205 if (dinfo == NULL) 206 continue; 207 if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != 208 0) { 209 pci_freecfg((struct pci_devinfo *)dinfo); 210 continue; 211 } 212 dinfo->opd_dma_tag = NULL; 213 pci_add_child(dev, (struct pci_devinfo *)dinfo); 214 215 /* 216 * Some devices don't have an intpin set, but do have 217 * interrupts. These are fully specified, and set in the 218 * interrupts property, so add that value to the device's 219 * resource list. 220 */ 221 if (dinfo->opd_dinfo.cfg.intpin == 0) 222 ofw_bus_intr_to_rl(dev, child, 223 &dinfo->opd_dinfo.resources, NULL); 224 } 225 } 226 227 /* 228 * The following is an almost exact clone of pci_add_children(), with the 229 * addition that it (a) will not add children that have already been added, 230 * and (b) will set up the OFW devinfo to point to invalid values. This is 231 * to handle non-enumerated PCI children as exist in FDT and on the second 232 * function of the Rage 128 in my Blue & White G3. 233 */ 234 235 static void 236 ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno) 237 { 238 device_t pcib; 239 struct ofw_pcibus_devinfo *dinfo; 240 int maxslots; 241 int s, f, pcifunchigh; 242 uint8_t hdrtype; 243 244 pcib = device_get_parent(dev); 245 246 maxslots = PCIB_MAXSLOTS(pcib); 247 for (s = 0; s <= maxslots; s++) { 248 pcifunchigh = 0; 249 f = 0; 250 DELAY(1); 251 hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1); 252 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) 253 continue; 254 if (hdrtype & PCIM_MFDEV) 255 pcifunchigh = PCI_FUNCMAX; 256 for (f = 0; f <= pcifunchigh; f++) { 257 /* Filter devices we have already added */ 258 if (pci_find_dbsf(domain, busno, s, f) != NULL) 259 continue; 260 261 dinfo = (struct ofw_pcibus_devinfo *)pci_read_device( 262 pcib, dev, domain, busno, s, f); 263 if (dinfo == NULL) 264 continue; 265 266 dinfo->opd_dma_tag = NULL; 267 dinfo->opd_obdinfo.obd_node = -1; 268 269 dinfo->opd_obdinfo.obd_name = NULL; 270 dinfo->opd_obdinfo.obd_compat = NULL; 271 dinfo->opd_obdinfo.obd_type = NULL; 272 dinfo->opd_obdinfo.obd_model = NULL; 273 274 /* 275 * For non OFW-devices, don't believe 0 276 * for an interrupt. 277 */ 278 if (dinfo->opd_dinfo.cfg.intline == 0) { 279 dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ; 280 PCIB_WRITE_CONFIG(pcib, busno, s, f, 281 PCIR_INTLINE, PCI_INVALID_IRQ, 1); 282 } 283 284 pci_add_child(dev, (struct pci_devinfo *)dinfo); 285 } 286 } 287 } 288 289 static void 290 ofw_pcibus_child_deleted(device_t dev, device_t child) 291 { 292 struct ofw_pcibus_devinfo *dinfo; 293 294 dinfo = device_get_ivars(dev); 295 ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); 296 pci_child_deleted(dev, child); 297 } 298 299 static int 300 ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf, 301 size_t buflen) 302 { 303 pci_child_pnpinfo_str_method(cbdev, child, buf, buflen); 304 305 if (ofw_bus_get_node(child) != -1) { 306 strlcat(buf, " ", buflen); /* Separate info */ 307 ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen); 308 } 309 310 return (0); 311 } 312 313 static int 314 ofw_pcibus_assign_interrupt(device_t dev, device_t child) 315 { 316 ofw_pci_intr_t intr[2]; 317 phandle_t node, iparent; 318 int isz, icells; 319 320 node = ofw_bus_get_node(child); 321 322 if (node == -1) { 323 /* Non-firmware enumerated child, use standard routing */ 324 325 intr[0] = pci_get_intpin(child); 326 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, 327 intr[0])); 328 } 329 330 /* 331 * Try to determine the node's interrupt parent so we know which 332 * PIC to use. 333 */ 334 335 iparent = -1; 336 if (OF_getencprop(node, "interrupt-parent", &iparent, 337 sizeof(iparent)) < 0) 338 iparent = -1; 339 icells = 1; 340 if (iparent != -1) 341 OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells", 342 &icells, sizeof(icells)); 343 344 /* 345 * Any AAPL,interrupts property gets priority and is 346 * fully specified (i.e. does not need routing) 347 */ 348 349 isz = OF_getencprop(node, "AAPL,interrupts", intr, sizeof(intr)); 350 if (isz == sizeof(intr[0])*icells) 351 return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev, 352 iparent, icells, intr)); 353 354 isz = OF_getencprop(node, "interrupts", intr, sizeof(intr)); 355 if (isz == sizeof(intr[0])*icells) { 356 if (iparent != -1) 357 intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr); 358 } else { 359 /* No property: our best guess is the intpin. */ 360 intr[0] = pci_get_intpin(child); 361 } 362 363 /* 364 * If we got intr from a property, it may or may not be an intpin. 365 * For on-board devices, it frequently is not, and is completely out 366 * of the valid intpin range. For PCI slots, it hopefully is, 367 * otherwise we will have trouble interfacing with non-OFW buses 368 * such as cardbus. 369 * Since we cannot tell which it is without violating layering, we 370 * will always use the route_interrupt method, and treat exceptions 371 * on the level they become apparent. 372 */ 373 return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0])); 374 } 375 376 static const struct ofw_bus_devinfo * 377 ofw_pcibus_get_devinfo(device_t bus, device_t dev) 378 { 379 struct ofw_pcibus_devinfo *dinfo; 380 381 dinfo = device_get_ivars(dev); 382 return (&dinfo->opd_obdinfo); 383 } 384 385