1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2004 John Baldwin <jhb@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 /*
30 * The ELCR is a register that controls the trigger mode and polarity of
31 * EISA and ISA interrupts. In FreeBSD 3.x and 4.x, the ELCR was only
32 * consulted for determining the appropriate trigger mode of EISA
33 * interrupts when using an APIC. However, it seems that almost all
34 * systems that include PCI also include an ELCR that manages the ISA
35 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on
36 * every machine by checking to see if the values found at bootup are
37 * sane. Note that the polarity of ISA and EISA IRQs are linked to the
38 * trigger mode. All edge triggered IRQs use active-hi polarity, and
39 * all level triggered interrupts use active-lo polarity.
40 *
41 * The format of the ELCR is simple: it is a 16-bit bitmap where bit 0
42 * controls IRQ 0, bit 1 controls IRQ 1, etc. If the bit is zero, the
43 * associated IRQ is edge triggered. If the bit is one, the IRQ is
44 * level triggered.
45 */
46
47 #include <sys/param.h>
48 #include <sys/bus.h>
49 #include <sys/systm.h>
50 #include <machine/intr_machdep.h>
51
52 #define ELCR_PORT 0x4d0
53 #define ELCR_MASK(irq) (1 << (irq))
54
55 static int elcr_status;
56 int elcr_found;
57
58 /*
59 * Check to see if we have what looks like a valid ELCR. We do this by
60 * verifying that IRQs 0, 1, 2, and 13 are all edge triggered.
61 */
62 int
elcr_probe(void)63 elcr_probe(void)
64 {
65 int i;
66
67 elcr_status = inb(ELCR_PORT) | inb(ELCR_PORT + 1) << 8;
68 if ((elcr_status & (ELCR_MASK(0) | ELCR_MASK(1) | ELCR_MASK(2) |
69 ELCR_MASK(8) | ELCR_MASK(13))) != 0)
70 return (ENXIO);
71 if (bootverbose) {
72 printf("ELCR Found. ISA IRQs programmed as:\n");
73 for (i = 0; i < 16; i++)
74 printf(" %2d", i);
75 printf("\n");
76 for (i = 0; i < 16; i++)
77 if (elcr_status & ELCR_MASK(i))
78 printf(" L");
79 else
80 printf(" E");
81 printf("\n");
82 }
83 if (resource_disabled("elcr", 0))
84 return (ENXIO);
85 elcr_found = 1;
86 return (0);
87 }
88
89 /*
90 * Returns 1 for level trigger, 0 for edge.
91 */
92 enum intr_trigger
elcr_read_trigger(u_int irq)93 elcr_read_trigger(u_int irq)
94 {
95
96 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
97 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq));
98 if (elcr_status & ELCR_MASK(irq))
99 return (INTR_TRIGGER_LEVEL);
100 else
101 return (INTR_TRIGGER_EDGE);
102 }
103
104 /*
105 * Set the trigger mode for a specified IRQ. Mode of 0 means edge triggered,
106 * and a mode of 1 means level triggered.
107 */
108 void
elcr_write_trigger(u_int irq,enum intr_trigger trigger)109 elcr_write_trigger(u_int irq, enum intr_trigger trigger)
110 {
111 int new_status;
112
113 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
114 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq));
115 if (trigger == INTR_TRIGGER_LEVEL)
116 new_status = elcr_status | ELCR_MASK(irq);
117 else
118 new_status = elcr_status & ~ELCR_MASK(irq);
119 if (new_status == elcr_status)
120 return;
121 elcr_status = new_status;
122 if (irq >= 8)
123 outb(ELCR_PORT + 1, elcr_status >> 8);
124 else
125 outb(ELCR_PORT, elcr_status & 0xff);
126 }
127
128 void
elcr_resume(void)129 elcr_resume(void)
130 {
131
132 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
133 outb(ELCR_PORT, elcr_status & 0xff);
134 outb(ELCR_PORT + 1, elcr_status >> 8);
135 }
136