1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * Copyright IBM Corp. 1999 5 * Author(s): Hartmut Penner (hp@de.ibm.com), 6 * Martin Schwidefsky (schwidefsky@de.ibm.com) 7 * 8 * Derived from "include/asm-i386/processor.h" 9 * Copyright (C) 1994, Linus Torvalds 10 */ 11 12 #ifndef __ASM_S390_PROCESSOR_H 13 #define __ASM_S390_PROCESSOR_H 14 15 #include <linux/const.h> 16 17 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */ 18 #define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */ 19 #define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */ 20 #define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */ 21 #define CIF_FPU 4 /* restore FPU registers */ 22 #define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */ 23 #define CIF_ENABLED_WAIT 6 /* in enabled wait state */ 24 #define CIF_MCCK_GUEST 7 /* machine check happening in guest */ 25 #define CIF_DEDICATED_CPU 8 /* this CPU is dedicated */ 26 27 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING) 28 #define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY) 29 #define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY) 30 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY) 31 #define _CIF_FPU _BITUL(CIF_FPU) 32 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ) 33 #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT) 34 #define _CIF_MCCK_GUEST _BITUL(CIF_MCCK_GUEST) 35 #define _CIF_DEDICATED_CPU _BITUL(CIF_DEDICATED_CPU) 36 37 #ifndef __ASSEMBLY__ 38 39 #include <linux/linkage.h> 40 #include <linux/irqflags.h> 41 #include <asm/cpu.h> 42 #include <asm/page.h> 43 #include <asm/ptrace.h> 44 #include <asm/setup.h> 45 #include <asm/runtime_instr.h> 46 #include <asm/fpu/types.h> 47 #include <asm/fpu/internal.h> 48 49 static inline void set_cpu_flag(int flag) 50 { 51 S390_lowcore.cpu_flags |= (1UL << flag); 52 } 53 54 static inline void clear_cpu_flag(int flag) 55 { 56 S390_lowcore.cpu_flags &= ~(1UL << flag); 57 } 58 59 static inline int test_cpu_flag(int flag) 60 { 61 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 62 } 63 64 /* 65 * Test CIF flag of another CPU. The caller needs to ensure that 66 * CPU hotplug can not happen, e.g. by disabling preemption. 67 */ 68 static inline int test_cpu_flag_of(int flag, int cpu) 69 { 70 struct lowcore *lc = lowcore_ptr[cpu]; 71 return !!(lc->cpu_flags & (1UL << flag)); 72 } 73 74 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 75 76 static inline void get_cpu_id(struct cpuid *ptr) 77 { 78 asm volatile("stidp %0" : "=Q" (*ptr)); 79 } 80 81 void s390_adjust_jiffies(void); 82 void s390_update_cpu_mhz(void); 83 void cpu_detect_mhz_feature(void); 84 85 extern const struct seq_operations cpuinfo_op; 86 extern int sysctl_ieee_emulation_warnings; 87 extern void execve_tail(void); 88 extern void __bpon(void); 89 90 /* 91 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 92 */ 93 94 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \ 95 (1UL << 31) : -PAGE_SIZE) 96 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 97 (1UL << 30) : (1UL << 41)) 98 #define TASK_SIZE TASK_SIZE_OF(current) 99 #define TASK_SIZE_MAX (-PAGE_SIZE) 100 101 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \ 102 (1UL << 31) : (1UL << 42)) 103 #define STACK_TOP_MAX (1UL << 42) 104 105 #define HAVE_ARCH_PICK_MMAP_LAYOUT 106 107 typedef unsigned int mm_segment_t; 108 109 /* 110 * Thread structure 111 */ 112 struct thread_struct { 113 unsigned int acrs[NUM_ACRS]; 114 unsigned long ksp; /* kernel stack pointer */ 115 unsigned long user_timer; /* task cputime in user space */ 116 unsigned long guest_timer; /* task cputime in kvm guest */ 117 unsigned long system_timer; /* task cputime in kernel space */ 118 unsigned long hardirq_timer; /* task cputime in hardirq context */ 119 unsigned long softirq_timer; /* task cputime in softirq context */ 120 unsigned long sys_call_table; /* system call table address */ 121 mm_segment_t mm_segment; 122 unsigned long gmap_addr; /* address of last gmap fault. */ 123 unsigned int gmap_write_flag; /* gmap fault write indication */ 124 unsigned int gmap_int_code; /* int code of last gmap fault */ 125 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 126 /* Per-thread information related to debugging */ 127 struct per_regs per_user; /* User specified PER registers */ 128 struct per_event per_event; /* Cause of the last PER trap */ 129 unsigned long per_flags; /* Flags to control debug behavior */ 130 unsigned int system_call; /* system call number in signal */ 131 unsigned long last_break; /* last breaking-event-address. */ 132 /* pfault_wait is used to block the process on a pfault event */ 133 unsigned long pfault_wait; 134 struct list_head list; 135 /* cpu runtime instrumentation */ 136 struct runtime_instr_cb *ri_cb; 137 struct gs_cb *gs_cb; /* Current guarded storage cb */ 138 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */ 139 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 140 /* 141 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 142 * the end. 143 */ 144 struct fpu fpu; /* FP and VX register save area */ 145 }; 146 147 /* Flag to disable transactions. */ 148 #define PER_FLAG_NO_TE 1UL 149 /* Flag to enable random transaction aborts. */ 150 #define PER_FLAG_TE_ABORT_RAND 2UL 151 /* Flag to specify random transaction abort mode: 152 * - abort each transaction at a random instruction before TEND if set. 153 * - abort random transactions at a random instruction if cleared. 154 */ 155 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 156 157 typedef struct thread_struct thread_struct; 158 159 #define ARCH_MIN_TASKALIGN 8 160 161 #define INIT_THREAD { \ 162 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 163 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 164 } 165 166 /* 167 * Do necessary setup to start up a new thread. 168 */ 169 #define start_thread(regs, new_psw, new_stackp) do { \ 170 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 171 regs->psw.addr = new_psw; \ 172 regs->gprs[15] = new_stackp; \ 173 execve_tail(); \ 174 } while (0) 175 176 #define start_thread31(regs, new_psw, new_stackp) do { \ 177 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 178 regs->psw.addr = new_psw; \ 179 regs->gprs[15] = new_stackp; \ 180 crst_table_downgrade(current->mm); \ 181 execve_tail(); \ 182 } while (0) 183 184 /* Forward declaration, a strange C thing */ 185 struct task_struct; 186 struct mm_struct; 187 struct seq_file; 188 struct pt_regs; 189 190 void show_registers(struct pt_regs *regs); 191 void show_cacheinfo(struct seq_file *m); 192 193 /* Free all resources held by a thread. */ 194 static inline void release_thread(struct task_struct *tsk) { } 195 196 /* Free guarded storage control block */ 197 void guarded_storage_release(struct task_struct *tsk); 198 199 unsigned long get_wchan(struct task_struct *p); 200 #define task_pt_regs(tsk) ((struct pt_regs *) \ 201 (task_stack_page(tsk) + THREAD_SIZE) - 1) 202 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 203 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 204 205 /* Has task runtime instrumentation enabled ? */ 206 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 207 208 static inline unsigned long current_stack_pointer(void) 209 { 210 unsigned long sp; 211 212 asm volatile("la %0,0(15)" : "=a" (sp)); 213 return sp; 214 } 215 216 static __no_kasan_or_inline unsigned short stap(void) 217 { 218 unsigned short cpu_address; 219 220 asm volatile("stap %0" : "=Q" (cpu_address)); 221 return cpu_address; 222 } 223 224 /* 225 * Give up the time slice of the virtual PU. 226 */ 227 #define cpu_relax_yield cpu_relax_yield 228 void cpu_relax_yield(void); 229 230 #define cpu_relax() barrier() 231 232 #define ECAG_CACHE_ATTRIBUTE 0 233 #define ECAG_CPU_ATTRIBUTE 1 234 235 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 236 { 237 unsigned long val; 238 239 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 240 : "=d" (val) : "a" (asi << 8 | parm)); 241 return val; 242 } 243 244 static inline void psw_set_key(unsigned int key) 245 { 246 asm volatile("spka 0(%0)" : : "d" (key)); 247 } 248 249 /* 250 * Set PSW to specified value. 251 */ 252 static inline void __load_psw(psw_t psw) 253 { 254 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 255 } 256 257 /* 258 * Set PSW mask to specified value, while leaving the 259 * PSW addr pointing to the next instruction. 260 */ 261 static __no_kasan_or_inline void __load_psw_mask(unsigned long mask) 262 { 263 unsigned long addr; 264 psw_t psw; 265 266 psw.mask = mask; 267 268 asm volatile( 269 " larl %0,1f\n" 270 " stg %0,%1\n" 271 " lpswe %2\n" 272 "1:" 273 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); 274 } 275 276 /* 277 * Extract current PSW mask 278 */ 279 static inline unsigned long __extract_psw(void) 280 { 281 unsigned int reg1, reg2; 282 283 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 284 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 285 } 286 287 static inline void local_mcck_enable(void) 288 { 289 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 290 } 291 292 static inline void local_mcck_disable(void) 293 { 294 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 295 } 296 297 /* 298 * Rewind PSW instruction address by specified number of bytes. 299 */ 300 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 301 { 302 unsigned long mask; 303 304 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 305 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 306 (1UL << 24) - 1; 307 return (psw.addr - ilc) & mask; 308 } 309 310 /* 311 * Function to stop a processor until the next interrupt occurs 312 */ 313 void enabled_wait(void); 314 315 /* 316 * Function to drop a processor into disabled wait state 317 */ 318 static inline void __noreturn disabled_wait(void) 319 { 320 psw_t psw; 321 322 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 323 psw.addr = _THIS_IP_; 324 __load_psw(psw); 325 while (1); 326 } 327 328 /* 329 * Basic Machine Check/Program Check Handler. 330 */ 331 332 extern void s390_base_mcck_handler(void); 333 extern void s390_base_pgm_handler(void); 334 extern void s390_base_ext_handler(void); 335 336 extern void (*s390_base_mcck_handler_fn)(void); 337 extern void (*s390_base_pgm_handler_fn)(void); 338 extern void (*s390_base_ext_handler_fn)(void); 339 340 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 341 342 extern int memcpy_real(void *, void *, size_t); 343 extern void memcpy_absolute(void *, void *, size_t); 344 345 #define mem_assign_absolute(dest, val) do { \ 346 __typeof__(dest) __tmp = (val); \ 347 \ 348 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 349 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 350 } while (0) 351 352 extern int s390_isolate_bp(void); 353 extern int s390_isolate_bp_guest(void); 354 355 #endif /* __ASSEMBLY__ */ 356 357 #endif /* __ASM_S390_PROCESSOR_H */ 358