1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright 2019 NXP 3 */ 4 #ifndef _MSCC_FELIX_H 5 #define _MSCC_FELIX_H 6 7 #define ocelot_to_felix(o) container_of((o), struct felix, ocelot) 8 #define FELIX_MAC_QUIRKS OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION 9 10 #define OCELOT_PORT_MODE_NONE 0 11 #define OCELOT_PORT_MODE_INTERNAL BIT(0) 12 #define OCELOT_PORT_MODE_SGMII BIT(1) 13 #define OCELOT_PORT_MODE_QSGMII BIT(2) 14 #define OCELOT_PORT_MODE_2500BASEX BIT(3) 15 #define OCELOT_PORT_MODE_USXGMII BIT(4) 16 #define OCELOT_PORT_MODE_1000BASEX BIT(5) 17 18 struct device_node; 19 20 /* Platform-specific information */ 21 struct felix_info { 22 /* Hardcoded resources provided by the hardware instantiation. */ 23 const struct resource *resources; 24 size_t num_resources; 25 /* Names of the mandatory resources that will be requested during 26 * probe. Must have TARGET_MAX elements, since it is indexed by target. 27 */ 28 const char *const *resource_names; 29 const struct reg_field *regfields; 30 const u32 *const *map; 31 const struct ocelot_ops *ops; 32 const u32 *port_modes; 33 int num_mact_rows; 34 int num_ports; 35 int num_tx_queues; 36 struct vcap_props *vcap; 37 u16 vcap_pol_base; 38 u16 vcap_pol_max; 39 u16 vcap_pol_base2; 40 u16 vcap_pol_max2; 41 const struct ptp_clock_info *ptp_caps; 42 unsigned long quirks; 43 44 /* Some Ocelot switches are integrated into the SoC without the 45 * extraction IRQ line connected to the ARM GIC. By enabling this 46 * workaround, the few packets that are delivered to the CPU port 47 * module (currently only PTP) are copied not only to the hardware CPU 48 * port module, but also to the 802.1Q Ethernet CPU port, and polling 49 * the extraction registers is triggered once the DSA tagger sees a PTP 50 * frame. The Ethernet frame is only used as a notification: it is 51 * dropped, and the original frame is extracted over MMIO and annotated 52 * with the RX timestamp. 53 */ 54 bool quirk_no_xtr_irq; 55 56 int (*mdio_bus_alloc)(struct ocelot *ocelot); 57 void (*mdio_bus_free)(struct ocelot *ocelot); 58 int (*port_setup_tc)(struct dsa_switch *ds, int port, 59 enum tc_setup_type type, void *type_data); 60 void (*port_sched_speed_set)(struct ocelot *ocelot, int port, 61 u32 speed); 62 void (*phylink_mac_config)(struct ocelot *ocelot, int port, 63 unsigned int mode, 64 const struct phylink_link_state *state); 65 int (*configure_serdes)(struct ocelot *ocelot, int port, 66 struct device_node *portnp); 67 }; 68 69 /* Methods for initializing the hardware resources specific to a tagging 70 * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs, 71 * for "ocelot-8021q"). 72 * It is important that the resources configured here do not have side effects 73 * for the other tagging protocols. If that is the case, their configuration 74 * needs to go to felix_tag_proto_setup_shared(). 75 */ 76 struct felix_tag_proto_ops { 77 int (*setup)(struct dsa_switch *ds); 78 void (*teardown)(struct dsa_switch *ds); 79 unsigned long (*get_host_fwd_mask)(struct dsa_switch *ds); 80 int (*change_conduit)(struct dsa_switch *ds, int port, 81 struct net_device *conduit, 82 struct netlink_ext_ack *extack); 83 }; 84 85 extern const struct dsa_switch_ops felix_switch_ops; 86 87 /* DSA glue / front-end for struct ocelot */ 88 struct felix { 89 struct dsa_switch *ds; 90 const struct felix_info *info; 91 struct ocelot ocelot; 92 struct mii_bus *imdio; 93 struct phylink_pcs **pcs; 94 resource_size_t switch_base; 95 enum dsa_tag_protocol tag_proto; 96 const struct felix_tag_proto_ops *tag_proto_ops; 97 struct kthread_worker *xmit_worker; 98 unsigned long host_flood_uc_mask; 99 unsigned long host_flood_mc_mask; 100 }; 101 102 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port); 103 int felix_netdev_to_port(struct net_device *dev); 104 105 #endif 106